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1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 */
18
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/mm.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/swiotlb.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/types.h>
28 #include <linux/ctype.h>
29
30 #include <asm/io.h>
31 #include <asm/dma.h>
32 #include <asm/scatterlist.h>
33
34 #include <linux/init.h>
35 #include <linux/bootmem.h>
36 #include <linux/iommu-helper.h>
37
38 #define OFFSET(val,align) ((unsigned long) \
39 ( (val) & ( (align) - 1)))
40
41 #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
42 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
43
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46 /*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53 /*
54 * Enumeration for sync targets
55 */
56 enum dma_sync_target {
57 SYNC_FOR_CPU = 0,
58 SYNC_FOR_DEVICE = 1,
59 };
60
61 int swiotlb_force;
62
63 /*
64 * Used to do a quick range check in swiotlb_unmap_single and
65 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
66 * API.
67 */
68 static char *io_tlb_start, *io_tlb_end;
69
70 /*
71 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
72 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 */
74 static unsigned long io_tlb_nslabs;
75
76 /*
77 * When the IOMMU overflows we return a fallback buffer. This sets the size.
78 */
79 static unsigned long io_tlb_overflow = 32*1024;
80
81 void *io_tlb_overflow_buffer;
82
83 /*
84 * This is a free list describing the number of free entries available from
85 * each index
86 */
87 static unsigned int *io_tlb_list;
88 static unsigned int io_tlb_index;
89
90 /*
91 * We need to save away the original address corresponding to a mapped entry
92 * for the sync operations.
93 */
94 static unsigned char **io_tlb_orig_addr;
95
96 /*
97 * Protect the above data structures in the map and unmap calls
98 */
99 static DEFINE_SPINLOCK(io_tlb_lock);
100
101 static int __init
102 setup_io_tlb_npages(char *str)
103 {
104 if (isdigit(*str)) {
105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
108 }
109 if (*str == ',')
110 ++str;
111 if (!strcmp(str, "force"))
112 swiotlb_force = 1;
113 return 1;
114 }
115 __setup("swiotlb=", setup_io_tlb_npages);
116 /* make io_tlb_overflow tunable too? */
117
118 void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
119 {
120 return alloc_bootmem_low_pages(size);
121 }
122
123 void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
124 {
125 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
126 }
127
128 dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
129 {
130 return paddr;
131 }
132
133 phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
134 {
135 return baddr;
136 }
137
138 static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
139 {
140 return swiotlb_phys_to_bus(virt_to_phys(address));
141 }
142
143 static void *swiotlb_bus_to_virt(dma_addr_t address)
144 {
145 return phys_to_virt(swiotlb_bus_to_phys(address));
146 }
147
148 int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
149 {
150 return 0;
151 }
152
153 /*
154 * Statically reserve bounce buffer space and initialize bounce buffer data
155 * structures for the software IO TLB used to implement the DMA API.
156 */
157 void __init
158 swiotlb_init_with_default_size(size_t default_size)
159 {
160 unsigned long i, bytes;
161
162 if (!io_tlb_nslabs) {
163 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
164 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
165 }
166
167 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
168
169 /*
170 * Get IO TLB memory from the low pages
171 */
172 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
173 if (!io_tlb_start)
174 panic("Cannot allocate SWIOTLB buffer");
175 io_tlb_end = io_tlb_start + bytes;
176
177 /*
178 * Allocate and initialize the free list array. This array is used
179 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
180 * between io_tlb_start and io_tlb_end.
181 */
182 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
183 for (i = 0; i < io_tlb_nslabs; i++)
184 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
185 io_tlb_index = 0;
186 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
187
188 /*
189 * Get the overflow emergency buffer
190 */
191 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
192 if (!io_tlb_overflow_buffer)
193 panic("Cannot allocate SWIOTLB overflow buffer!\n");
194
195 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
196 swiotlb_virt_to_bus(io_tlb_start), swiotlb_virt_to_bus(io_tlb_end));
197 }
198
199 void __init
200 swiotlb_init(void)
201 {
202 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
203 }
204
205 /*
206 * Systems with larger DMA zones (those that don't support ISA) can
207 * initialize the swiotlb later using the slab allocator if needed.
208 * This should be just like above, but with some error catching.
209 */
210 int
211 swiotlb_late_init_with_default_size(size_t default_size)
212 {
213 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
214 unsigned int order;
215
216 if (!io_tlb_nslabs) {
217 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
218 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
219 }
220
221 /*
222 * Get IO TLB memory from the low pages
223 */
224 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
225 io_tlb_nslabs = SLABS_PER_PAGE << order;
226 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
227
228 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
229 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
230 if (io_tlb_start)
231 break;
232 order--;
233 }
234
235 if (!io_tlb_start)
236 goto cleanup1;
237
238 if (order != get_order(bytes)) {
239 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
240 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
241 io_tlb_nslabs = SLABS_PER_PAGE << order;
242 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
243 }
244 io_tlb_end = io_tlb_start + bytes;
245 memset(io_tlb_start, 0, bytes);
246
247 /*
248 * Allocate and initialize the free list array. This array is used
249 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
250 * between io_tlb_start and io_tlb_end.
251 */
252 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
253 get_order(io_tlb_nslabs * sizeof(int)));
254 if (!io_tlb_list)
255 goto cleanup2;
256
257 for (i = 0; i < io_tlb_nslabs; i++)
258 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
259 io_tlb_index = 0;
260
261 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
262 get_order(io_tlb_nslabs * sizeof(char *)));
263 if (!io_tlb_orig_addr)
264 goto cleanup3;
265
266 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
267
268 /*
269 * Get the overflow emergency buffer
270 */
271 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
272 get_order(io_tlb_overflow));
273 if (!io_tlb_overflow_buffer)
274 goto cleanup4;
275
276 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
277 "0x%lx\n", bytes >> 20,
278 swiotlb_virt_to_bus(io_tlb_start), swiotlb_virt_to_bus(io_tlb_end));
279
280 return 0;
281
282 cleanup4:
283 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
284 sizeof(char *)));
285 io_tlb_orig_addr = NULL;
286 cleanup3:
287 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
288 sizeof(int)));
289 io_tlb_list = NULL;
290 cleanup2:
291 io_tlb_end = NULL;
292 free_pages((unsigned long)io_tlb_start, order);
293 io_tlb_start = NULL;
294 cleanup1:
295 io_tlb_nslabs = req_nslabs;
296 return -ENOMEM;
297 }
298
299 static int
300 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
301 {
302 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
303 }
304
305 static inline int range_needs_mapping(void *ptr, size_t size)
306 {
307 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
308 }
309
310 static int is_swiotlb_buffer(char *addr)
311 {
312 return addr >= io_tlb_start && addr < io_tlb_end;
313 }
314
315 static void
316 __sync_single(char *buffer, char *dma_addr, size_t size, int dir)
317 {
318 if (dir == DMA_TO_DEVICE)
319 memcpy(dma_addr, buffer, size);
320 else
321 memcpy(buffer, dma_addr, size);
322 }
323
324 /*
325 * Allocates bounce buffer and returns its kernel virtual address.
326 */
327 static void *
328 map_single(struct device *hwdev, char *buffer, size_t size, int dir)
329 {
330 unsigned long flags;
331 char *dma_addr;
332 unsigned int nslots, stride, index, wrap;
333 int i;
334 unsigned long start_dma_addr;
335 unsigned long mask;
336 unsigned long offset_slots;
337 unsigned long max_slots;
338
339 mask = dma_get_seg_boundary(hwdev);
340 start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
341
342 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
343
344 /*
345 * Carefully handle integer overflow which can occur when mask == ~0UL.
346 */
347 max_slots = mask + 1
348 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
349 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
350
351 /*
352 * For mappings greater than a page, we limit the stride (and
353 * hence alignment) to a page size.
354 */
355 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
356 if (size > PAGE_SIZE)
357 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
358 else
359 stride = 1;
360
361 BUG_ON(!nslots);
362
363 /*
364 * Find suitable number of IO TLB entries size that will fit this
365 * request and allocate a buffer from that IO TLB pool.
366 */
367 spin_lock_irqsave(&io_tlb_lock, flags);
368 index = ALIGN(io_tlb_index, stride);
369 if (index >= io_tlb_nslabs)
370 index = 0;
371 wrap = index;
372
373 do {
374 while (iommu_is_span_boundary(index, nslots, offset_slots,
375 max_slots)) {
376 index += stride;
377 if (index >= io_tlb_nslabs)
378 index = 0;
379 if (index == wrap)
380 goto not_found;
381 }
382
383 /*
384 * If we find a slot that indicates we have 'nslots' number of
385 * contiguous buffers, we allocate the buffers from that slot
386 * and mark the entries as '0' indicating unavailable.
387 */
388 if (io_tlb_list[index] >= nslots) {
389 int count = 0;
390
391 for (i = index; i < (int) (index + nslots); i++)
392 io_tlb_list[i] = 0;
393 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
394 io_tlb_list[i] = ++count;
395 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
396
397 /*
398 * Update the indices to avoid searching in the next
399 * round.
400 */
401 io_tlb_index = ((index + nslots) < io_tlb_nslabs
402 ? (index + nslots) : 0);
403
404 goto found;
405 }
406 index += stride;
407 if (index >= io_tlb_nslabs)
408 index = 0;
409 } while (index != wrap);
410
411 not_found:
412 spin_unlock_irqrestore(&io_tlb_lock, flags);
413 return NULL;
414 found:
415 spin_unlock_irqrestore(&io_tlb_lock, flags);
416
417 /*
418 * Save away the mapping from the original address to the DMA address.
419 * This is needed when we sync the memory. Then we sync the buffer if
420 * needed.
421 */
422 for (i = 0; i < nslots; i++)
423 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
424 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
425 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
426
427 return dma_addr;
428 }
429
430 /*
431 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
432 */
433 static void
434 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
435 {
436 unsigned long flags;
437 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
438 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
439 char *buffer = io_tlb_orig_addr[index];
440
441 /*
442 * First, sync the memory before unmapping the entry
443 */
444 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
445 /*
446 * bounce... copy the data back into the original buffer * and
447 * delete the bounce buffer.
448 */
449 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
450
451 /*
452 * Return the buffer to the free list by setting the corresponding
453 * entries to indicate the number of contigous entries available.
454 * While returning the entries to the free list, we merge the entries
455 * with slots below and above the pool being returned.
456 */
457 spin_lock_irqsave(&io_tlb_lock, flags);
458 {
459 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
460 io_tlb_list[index + nslots] : 0);
461 /*
462 * Step 1: return the slots to the free list, merging the
463 * slots with superceeding slots
464 */
465 for (i = index + nslots - 1; i >= index; i--)
466 io_tlb_list[i] = ++count;
467 /*
468 * Step 2: merge the returned slots with the preceding slots,
469 * if available (non zero)
470 */
471 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
472 io_tlb_list[i] = ++count;
473 }
474 spin_unlock_irqrestore(&io_tlb_lock, flags);
475 }
476
477 static void
478 sync_single(struct device *hwdev, char *dma_addr, size_t size,
479 int dir, int target)
480 {
481 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
482 char *buffer = io_tlb_orig_addr[index];
483
484 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
485
486 switch (target) {
487 case SYNC_FOR_CPU:
488 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
489 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
490 else
491 BUG_ON(dir != DMA_TO_DEVICE);
492 break;
493 case SYNC_FOR_DEVICE:
494 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
495 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
496 else
497 BUG_ON(dir != DMA_FROM_DEVICE);
498 break;
499 default:
500 BUG();
501 }
502 }
503
504 void *
505 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
506 dma_addr_t *dma_handle, gfp_t flags)
507 {
508 dma_addr_t dev_addr;
509 void *ret;
510 int order = get_order(size);
511 u64 dma_mask = DMA_32BIT_MASK;
512
513 if (hwdev && hwdev->coherent_dma_mask)
514 dma_mask = hwdev->coherent_dma_mask;
515
516 ret = (void *)__get_free_pages(flags, order);
517 if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
518 /*
519 * The allocated memory isn't reachable by the device.
520 * Fall back on swiotlb_map_single().
521 */
522 free_pages((unsigned long) ret, order);
523 ret = NULL;
524 }
525 if (!ret) {
526 /*
527 * We are either out of memory or the device can't DMA
528 * to GFP_DMA memory; fall back on
529 * swiotlb_map_single(), which will grab memory from
530 * the lowest available address range.
531 */
532 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
533 if (!ret)
534 return NULL;
535 }
536
537 memset(ret, 0, size);
538 dev_addr = swiotlb_virt_to_bus(ret);
539
540 /* Confirm address can be DMA'd by device */
541 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
542 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
543 (unsigned long long)dma_mask,
544 (unsigned long long)dev_addr);
545
546 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
547 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
548 return NULL;
549 }
550 *dma_handle = dev_addr;
551 return ret;
552 }
553
554 void
555 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
556 dma_addr_t dma_handle)
557 {
558 WARN_ON(irqs_disabled());
559 if (!is_swiotlb_buffer(vaddr))
560 free_pages((unsigned long) vaddr, get_order(size));
561 else
562 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
563 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
564 }
565
566 static void
567 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
568 {
569 /*
570 * Ran out of IOMMU space for this operation. This is very bad.
571 * Unfortunately the drivers cannot handle this operation properly.
572 * unless they check for dma_mapping_error (most don't)
573 * When the mapping is small enough return a static buffer to limit
574 * the damage, or panic when the transfer is too big.
575 */
576 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
577 "device %s\n", size, dev ? dev->bus_id : "?");
578
579 if (size > io_tlb_overflow && do_panic) {
580 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
581 panic("DMA: Memory would be corrupted\n");
582 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
583 panic("DMA: Random memory would be DMAed\n");
584 }
585 }
586
587 /*
588 * Map a single buffer of the indicated size for DMA in streaming mode. The
589 * physical address to use is returned.
590 *
591 * Once the device is given the dma address, the device owns this memory until
592 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
593 */
594 dma_addr_t
595 swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
596 int dir, struct dma_attrs *attrs)
597 {
598 dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
599 void *map;
600
601 BUG_ON(dir == DMA_NONE);
602 /*
603 * If the pointer passed in happens to be in the device's DMA window,
604 * we can safely return the device addr and not worry about bounce
605 * buffering it.
606 */
607 if (!address_needs_mapping(hwdev, dev_addr, size) &&
608 !range_needs_mapping(ptr, size))
609 return dev_addr;
610
611 /*
612 * Oh well, have to allocate and map a bounce buffer.
613 */
614 map = map_single(hwdev, ptr, size, dir);
615 if (!map) {
616 swiotlb_full(hwdev, size, dir, 1);
617 map = io_tlb_overflow_buffer;
618 }
619
620 dev_addr = swiotlb_virt_to_bus(map);
621
622 /*
623 * Ensure that the address returned is DMA'ble
624 */
625 if (address_needs_mapping(hwdev, dev_addr, size))
626 panic("map_single: bounce buffer is not DMA'ble");
627
628 return dev_addr;
629 }
630 EXPORT_SYMBOL(swiotlb_map_single_attrs);
631
632 dma_addr_t
633 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
634 {
635 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
636 }
637
638 /*
639 * Unmap a single streaming mode DMA translation. The dma_addr and size must
640 * match what was provided for in a previous swiotlb_map_single call. All
641 * other usages are undefined.
642 *
643 * After this call, reads by the cpu to the buffer are guaranteed to see
644 * whatever the device wrote there.
645 */
646 void
647 swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
648 size_t size, int dir, struct dma_attrs *attrs)
649 {
650 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
651
652 BUG_ON(dir == DMA_NONE);
653 if (is_swiotlb_buffer(dma_addr))
654 unmap_single(hwdev, dma_addr, size, dir);
655 else if (dir == DMA_FROM_DEVICE)
656 dma_mark_clean(dma_addr, size);
657 }
658 EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
659
660 void
661 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
662 int dir)
663 {
664 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
665 }
666 /*
667 * Make physical memory consistent for a single streaming mode DMA translation
668 * after a transfer.
669 *
670 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
671 * using the cpu, yet do not wish to teardown the dma mapping, you must
672 * call this function before doing so. At the next point you give the dma
673 * address back to the card, you must first perform a
674 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
675 */
676 static void
677 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
678 size_t size, int dir, int target)
679 {
680 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
681
682 BUG_ON(dir == DMA_NONE);
683 if (is_swiotlb_buffer(dma_addr))
684 sync_single(hwdev, dma_addr, size, dir, target);
685 else if (dir == DMA_FROM_DEVICE)
686 dma_mark_clean(dma_addr, size);
687 }
688
689 void
690 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
691 size_t size, int dir)
692 {
693 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
694 }
695
696 void
697 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
698 size_t size, int dir)
699 {
700 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
701 }
702
703 /*
704 * Same as above, but for a sub-range of the mapping.
705 */
706 static void
707 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
708 unsigned long offset, size_t size,
709 int dir, int target)
710 {
711 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
712
713 BUG_ON(dir == DMA_NONE);
714 if (is_swiotlb_buffer(dma_addr))
715 sync_single(hwdev, dma_addr, size, dir, target);
716 else if (dir == DMA_FROM_DEVICE)
717 dma_mark_clean(dma_addr, size);
718 }
719
720 void
721 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
722 unsigned long offset, size_t size, int dir)
723 {
724 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
725 SYNC_FOR_CPU);
726 }
727
728 void
729 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
730 unsigned long offset, size_t size, int dir)
731 {
732 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
733 SYNC_FOR_DEVICE);
734 }
735
736 void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
737 struct dma_attrs *);
738 /*
739 * Map a set of buffers described by scatterlist in streaming mode for DMA.
740 * This is the scatter-gather version of the above swiotlb_map_single
741 * interface. Here the scatter gather list elements are each tagged with the
742 * appropriate dma address and length. They are obtained via
743 * sg_dma_{address,length}(SG).
744 *
745 * NOTE: An implementation may be able to use a smaller number of
746 * DMA address/length pairs than there are SG table elements.
747 * (for example via virtual mapping capabilities)
748 * The routine returns the number of addr/length pairs actually
749 * used, at most nents.
750 *
751 * Device ownership issues as mentioned above for swiotlb_map_single are the
752 * same here.
753 */
754 int
755 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
756 int dir, struct dma_attrs *attrs)
757 {
758 struct scatterlist *sg;
759 void *addr;
760 dma_addr_t dev_addr;
761 int i;
762
763 BUG_ON(dir == DMA_NONE);
764
765 for_each_sg(sgl, sg, nelems, i) {
766 addr = SG_ENT_VIRT_ADDRESS(sg);
767 dev_addr = swiotlb_virt_to_bus(addr);
768 if (range_needs_mapping(sg_virt(sg), sg->length) ||
769 address_needs_mapping(hwdev, dev_addr, sg->length)) {
770 void *map = map_single(hwdev, addr, sg->length, dir);
771 if (!map) {
772 /* Don't panic here, we expect map_sg users
773 to do proper error handling. */
774 swiotlb_full(hwdev, sg->length, dir, 0);
775 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
776 attrs);
777 sgl[0].dma_length = 0;
778 return 0;
779 }
780 sg->dma_address = swiotlb_virt_to_bus(map);
781 } else
782 sg->dma_address = dev_addr;
783 sg->dma_length = sg->length;
784 }
785 return nelems;
786 }
787 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
788
789 int
790 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
791 int dir)
792 {
793 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
794 }
795
796 /*
797 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
798 * concerning calls here are the same as for swiotlb_unmap_single() above.
799 */
800 void
801 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
802 int nelems, int dir, struct dma_attrs *attrs)
803 {
804 struct scatterlist *sg;
805 int i;
806
807 BUG_ON(dir == DMA_NONE);
808
809 for_each_sg(sgl, sg, nelems, i) {
810 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
811 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
812 sg->dma_length, dir);
813 else if (dir == DMA_FROM_DEVICE)
814 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
815 }
816 }
817 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
818
819 void
820 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
821 int dir)
822 {
823 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
824 }
825
826 /*
827 * Make physical memory consistent for a set of streaming mode DMA translations
828 * after a transfer.
829 *
830 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
831 * and usage.
832 */
833 static void
834 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
835 int nelems, int dir, int target)
836 {
837 struct scatterlist *sg;
838 int i;
839
840 BUG_ON(dir == DMA_NONE);
841
842 for_each_sg(sgl, sg, nelems, i) {
843 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
844 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
845 sg->dma_length, dir, target);
846 else if (dir == DMA_FROM_DEVICE)
847 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
848 }
849 }
850
851 void
852 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
853 int nelems, int dir)
854 {
855 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
856 }
857
858 void
859 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
860 int nelems, int dir)
861 {
862 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
863 }
864
865 int
866 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
867 {
868 return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
869 }
870
871 /*
872 * Return whether the given device DMA address mask can be supported
873 * properly. For example, if your device can only drive the low 24-bits
874 * during bus mastering, then you would pass 0x00ffffff as the mask to
875 * this function.
876 */
877 int
878 swiotlb_dma_supported(struct device *hwdev, u64 mask)
879 {
880 return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
881 }
882
883 EXPORT_SYMBOL(swiotlb_map_single);
884 EXPORT_SYMBOL(swiotlb_unmap_single);
885 EXPORT_SYMBOL(swiotlb_map_sg);
886 EXPORT_SYMBOL(swiotlb_unmap_sg);
887 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
888 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
889 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
890 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
891 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
892 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
893 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
894 EXPORT_SYMBOL(swiotlb_alloc_coherent);
895 EXPORT_SYMBOL(swiotlb_free_coherent);
896 EXPORT_SYMBOL(swiotlb_dma_supported);