2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/swiotlb.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/types.h>
28 #include <linux/ctype.h>
32 #include <asm/scatterlist.h>
34 #include <linux/init.h>
35 #include <linux/bootmem.h>
36 #include <linux/iommu-helper.h>
38 #define OFFSET(val,align) ((unsigned long) \
39 ( (val) & ( (align) - 1)))
41 #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
42 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
54 * Enumeration for sync targets
56 enum dma_sync_target
{
64 * Used to do a quick range check in swiotlb_unmap_single and
65 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
68 static char *io_tlb_start
, *io_tlb_end
;
71 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
72 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
74 static unsigned long io_tlb_nslabs
;
77 * When the IOMMU overflows we return a fallback buffer. This sets the size.
79 static unsigned long io_tlb_overflow
= 32*1024;
81 void *io_tlb_overflow_buffer
;
84 * This is a free list describing the number of free entries available from
87 static unsigned int *io_tlb_list
;
88 static unsigned int io_tlb_index
;
91 * We need to save away the original address corresponding to a mapped entry
92 * for the sync operations.
94 static unsigned char **io_tlb_orig_addr
;
97 * Protect the above data structures in the map and unmap calls
99 static DEFINE_SPINLOCK(io_tlb_lock
);
102 setup_io_tlb_npages(char *str
)
105 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
111 if (!strcmp(str
, "force"))
115 __setup("swiotlb=", setup_io_tlb_npages
);
116 /* make io_tlb_overflow tunable too? */
118 void * __weak
swiotlb_alloc_boot(size_t size
, unsigned long nslabs
)
120 return alloc_bootmem_low_pages(size
);
123 void * __weak
swiotlb_alloc(unsigned order
, unsigned long nslabs
)
125 return (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
, order
);
128 dma_addr_t __weak
swiotlb_phys_to_bus(phys_addr_t paddr
)
133 phys_addr_t __weak
swiotlb_bus_to_phys(dma_addr_t baddr
)
138 static dma_addr_t
swiotlb_virt_to_bus(volatile void *address
)
140 return swiotlb_phys_to_bus(virt_to_phys(address
));
143 static void *swiotlb_bus_to_virt(dma_addr_t address
)
145 return phys_to_virt(swiotlb_bus_to_phys(address
));
148 int __weak
swiotlb_arch_range_needs_mapping(void *ptr
, size_t size
)
154 * Statically reserve bounce buffer space and initialize bounce buffer data
155 * structures for the software IO TLB used to implement the DMA API.
158 swiotlb_init_with_default_size(size_t default_size
)
160 unsigned long i
, bytes
;
162 if (!io_tlb_nslabs
) {
163 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
164 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
167 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
170 * Get IO TLB memory from the low pages
172 io_tlb_start
= swiotlb_alloc_boot(bytes
, io_tlb_nslabs
);
174 panic("Cannot allocate SWIOTLB buffer");
175 io_tlb_end
= io_tlb_start
+ bytes
;
178 * Allocate and initialize the free list array. This array is used
179 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
180 * between io_tlb_start and io_tlb_end.
182 io_tlb_list
= alloc_bootmem(io_tlb_nslabs
* sizeof(int));
183 for (i
= 0; i
< io_tlb_nslabs
; i
++)
184 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
186 io_tlb_orig_addr
= alloc_bootmem(io_tlb_nslabs
* sizeof(char *));
189 * Get the overflow emergency buffer
191 io_tlb_overflow_buffer
= alloc_bootmem_low(io_tlb_overflow
);
192 if (!io_tlb_overflow_buffer
)
193 panic("Cannot allocate SWIOTLB overflow buffer!\n");
195 printk(KERN_INFO
"Placing software IO TLB between 0x%lx - 0x%lx\n",
196 swiotlb_virt_to_bus(io_tlb_start
), swiotlb_virt_to_bus(io_tlb_end
));
202 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
206 * Systems with larger DMA zones (those that don't support ISA) can
207 * initialize the swiotlb later using the slab allocator if needed.
208 * This should be just like above, but with some error catching.
211 swiotlb_late_init_with_default_size(size_t default_size
)
213 unsigned long i
, bytes
, req_nslabs
= io_tlb_nslabs
;
216 if (!io_tlb_nslabs
) {
217 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
218 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
222 * Get IO TLB memory from the low pages
224 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
225 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
226 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
228 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
229 io_tlb_start
= swiotlb_alloc(order
, io_tlb_nslabs
);
238 if (order
!= get_order(bytes
)) {
239 printk(KERN_WARNING
"Warning: only able to allocate %ld MB "
240 "for software IO TLB\n", (PAGE_SIZE
<< order
) >> 20);
241 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
242 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
244 io_tlb_end
= io_tlb_start
+ bytes
;
245 memset(io_tlb_start
, 0, bytes
);
248 * Allocate and initialize the free list array. This array is used
249 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
250 * between io_tlb_start and io_tlb_end.
252 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
253 get_order(io_tlb_nslabs
* sizeof(int)));
257 for (i
= 0; i
< io_tlb_nslabs
; i
++)
258 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
261 io_tlb_orig_addr
= (unsigned char **)__get_free_pages(GFP_KERNEL
,
262 get_order(io_tlb_nslabs
* sizeof(char *)));
263 if (!io_tlb_orig_addr
)
266 memset(io_tlb_orig_addr
, 0, io_tlb_nslabs
* sizeof(char *));
269 * Get the overflow emergency buffer
271 io_tlb_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
272 get_order(io_tlb_overflow
));
273 if (!io_tlb_overflow_buffer
)
276 printk(KERN_INFO
"Placing %luMB software IO TLB between 0x%lx - "
277 "0x%lx\n", bytes
>> 20,
278 swiotlb_virt_to_bus(io_tlb_start
), swiotlb_virt_to_bus(io_tlb_end
));
283 free_pages((unsigned long)io_tlb_orig_addr
, get_order(io_tlb_nslabs
*
285 io_tlb_orig_addr
= NULL
;
287 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
292 free_pages((unsigned long)io_tlb_start
, order
);
295 io_tlb_nslabs
= req_nslabs
;
300 address_needs_mapping(struct device
*hwdev
, dma_addr_t addr
, size_t size
)
302 return !is_buffer_dma_capable(dma_get_mask(hwdev
), addr
, size
);
305 static inline int range_needs_mapping(void *ptr
, size_t size
)
307 return swiotlb_force
|| swiotlb_arch_range_needs_mapping(ptr
, size
);
310 static int is_swiotlb_buffer(char *addr
)
312 return addr
>= io_tlb_start
&& addr
< io_tlb_end
;
316 __sync_single(char *buffer
, char *dma_addr
, size_t size
, int dir
)
318 if (dir
== DMA_TO_DEVICE
)
319 memcpy(dma_addr
, buffer
, size
);
321 memcpy(buffer
, dma_addr
, size
);
325 * Allocates bounce buffer and returns its kernel virtual address.
328 map_single(struct device
*hwdev
, char *buffer
, size_t size
, int dir
)
332 unsigned int nslots
, stride
, index
, wrap
;
334 unsigned long start_dma_addr
;
336 unsigned long offset_slots
;
337 unsigned long max_slots
;
339 mask
= dma_get_seg_boundary(hwdev
);
340 start_dma_addr
= swiotlb_virt_to_bus(io_tlb_start
) & mask
;
342 offset_slots
= ALIGN(start_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
345 * Carefully handle integer overflow which can occur when mask == ~0UL.
348 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
349 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
352 * For mappings greater than a page, we limit the stride (and
353 * hence alignment) to a page size.
355 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
356 if (size
> PAGE_SIZE
)
357 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
364 * Find suitable number of IO TLB entries size that will fit this
365 * request and allocate a buffer from that IO TLB pool.
367 spin_lock_irqsave(&io_tlb_lock
, flags
);
368 index
= ALIGN(io_tlb_index
, stride
);
369 if (index
>= io_tlb_nslabs
)
374 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
377 if (index
>= io_tlb_nslabs
)
384 * If we find a slot that indicates we have 'nslots' number of
385 * contiguous buffers, we allocate the buffers from that slot
386 * and mark the entries as '0' indicating unavailable.
388 if (io_tlb_list
[index
] >= nslots
) {
391 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
393 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
394 io_tlb_list
[i
] = ++count
;
395 dma_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
398 * Update the indices to avoid searching in the next
401 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
402 ? (index
+ nslots
) : 0);
407 if (index
>= io_tlb_nslabs
)
409 } while (index
!= wrap
);
412 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
415 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
418 * Save away the mapping from the original address to the DMA address.
419 * This is needed when we sync the memory. Then we sync the buffer if
422 for (i
= 0; i
< nslots
; i
++)
423 io_tlb_orig_addr
[index
+i
] = buffer
+ (i
<< IO_TLB_SHIFT
);
424 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
425 __sync_single(buffer
, dma_addr
, size
, DMA_TO_DEVICE
);
431 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
434 unmap_single(struct device
*hwdev
, char *dma_addr
, size_t size
, int dir
)
437 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
438 int index
= (dma_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
439 char *buffer
= io_tlb_orig_addr
[index
];
442 * First, sync the memory before unmapping the entry
444 if (buffer
&& ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
446 * bounce... copy the data back into the original buffer * and
447 * delete the bounce buffer.
449 __sync_single(buffer
, dma_addr
, size
, DMA_FROM_DEVICE
);
452 * Return the buffer to the free list by setting the corresponding
453 * entries to indicate the number of contigous entries available.
454 * While returning the entries to the free list, we merge the entries
455 * with slots below and above the pool being returned.
457 spin_lock_irqsave(&io_tlb_lock
, flags
);
459 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
460 io_tlb_list
[index
+ nslots
] : 0);
462 * Step 1: return the slots to the free list, merging the
463 * slots with superceeding slots
465 for (i
= index
+ nslots
- 1; i
>= index
; i
--)
466 io_tlb_list
[i
] = ++count
;
468 * Step 2: merge the returned slots with the preceding slots,
469 * if available (non zero)
471 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
472 io_tlb_list
[i
] = ++count
;
474 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
478 sync_single(struct device
*hwdev
, char *dma_addr
, size_t size
,
481 int index
= (dma_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
482 char *buffer
= io_tlb_orig_addr
[index
];
484 buffer
+= ((unsigned long)dma_addr
& ((1 << IO_TLB_SHIFT
) - 1));
488 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
489 __sync_single(buffer
, dma_addr
, size
, DMA_FROM_DEVICE
);
491 BUG_ON(dir
!= DMA_TO_DEVICE
);
493 case SYNC_FOR_DEVICE
:
494 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
495 __sync_single(buffer
, dma_addr
, size
, DMA_TO_DEVICE
);
497 BUG_ON(dir
!= DMA_FROM_DEVICE
);
505 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
506 dma_addr_t
*dma_handle
, gfp_t flags
)
510 int order
= get_order(size
);
511 u64 dma_mask
= DMA_32BIT_MASK
;
513 if (hwdev
&& hwdev
->coherent_dma_mask
)
514 dma_mask
= hwdev
->coherent_dma_mask
;
516 ret
= (void *)__get_free_pages(flags
, order
);
517 if (ret
&& !is_buffer_dma_capable(dma_mask
, swiotlb_virt_to_bus(ret
), size
)) {
519 * The allocated memory isn't reachable by the device.
520 * Fall back on swiotlb_map_single().
522 free_pages((unsigned long) ret
, order
);
527 * We are either out of memory or the device can't DMA
528 * to GFP_DMA memory; fall back on
529 * swiotlb_map_single(), which will grab memory from
530 * the lowest available address range.
532 ret
= map_single(hwdev
, NULL
, size
, DMA_FROM_DEVICE
);
537 memset(ret
, 0, size
);
538 dev_addr
= swiotlb_virt_to_bus(ret
);
540 /* Confirm address can be DMA'd by device */
541 if (!is_buffer_dma_capable(dma_mask
, dev_addr
, size
)) {
542 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
543 (unsigned long long)dma_mask
,
544 (unsigned long long)dev_addr
);
546 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
547 unmap_single(hwdev
, ret
, size
, DMA_TO_DEVICE
);
550 *dma_handle
= dev_addr
;
555 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
556 dma_addr_t dma_handle
)
558 WARN_ON(irqs_disabled());
559 if (!is_swiotlb_buffer(vaddr
))
560 free_pages((unsigned long) vaddr
, get_order(size
));
562 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
563 unmap_single(hwdev
, vaddr
, size
, DMA_TO_DEVICE
);
567 swiotlb_full(struct device
*dev
, size_t size
, int dir
, int do_panic
)
570 * Ran out of IOMMU space for this operation. This is very bad.
571 * Unfortunately the drivers cannot handle this operation properly.
572 * unless they check for dma_mapping_error (most don't)
573 * When the mapping is small enough return a static buffer to limit
574 * the damage, or panic when the transfer is too big.
576 printk(KERN_ERR
"DMA: Out of SW-IOMMU space for %zu bytes at "
577 "device %s\n", size
, dev
? dev
->bus_id
: "?");
579 if (size
> io_tlb_overflow
&& do_panic
) {
580 if (dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
581 panic("DMA: Memory would be corrupted\n");
582 if (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
)
583 panic("DMA: Random memory would be DMAed\n");
588 * Map a single buffer of the indicated size for DMA in streaming mode. The
589 * physical address to use is returned.
591 * Once the device is given the dma address, the device owns this memory until
592 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
595 swiotlb_map_single_attrs(struct device
*hwdev
, void *ptr
, size_t size
,
596 int dir
, struct dma_attrs
*attrs
)
598 dma_addr_t dev_addr
= swiotlb_virt_to_bus(ptr
);
601 BUG_ON(dir
== DMA_NONE
);
603 * If the pointer passed in happens to be in the device's DMA window,
604 * we can safely return the device addr and not worry about bounce
607 if (!address_needs_mapping(hwdev
, dev_addr
, size
) &&
608 !range_needs_mapping(ptr
, size
))
612 * Oh well, have to allocate and map a bounce buffer.
614 map
= map_single(hwdev
, ptr
, size
, dir
);
616 swiotlb_full(hwdev
, size
, dir
, 1);
617 map
= io_tlb_overflow_buffer
;
620 dev_addr
= swiotlb_virt_to_bus(map
);
623 * Ensure that the address returned is DMA'ble
625 if (address_needs_mapping(hwdev
, dev_addr
, size
))
626 panic("map_single: bounce buffer is not DMA'ble");
630 EXPORT_SYMBOL(swiotlb_map_single_attrs
);
633 swiotlb_map_single(struct device
*hwdev
, void *ptr
, size_t size
, int dir
)
635 return swiotlb_map_single_attrs(hwdev
, ptr
, size
, dir
, NULL
);
639 * Unmap a single streaming mode DMA translation. The dma_addr and size must
640 * match what was provided for in a previous swiotlb_map_single call. All
641 * other usages are undefined.
643 * After this call, reads by the cpu to the buffer are guaranteed to see
644 * whatever the device wrote there.
647 swiotlb_unmap_single_attrs(struct device
*hwdev
, dma_addr_t dev_addr
,
648 size_t size
, int dir
, struct dma_attrs
*attrs
)
650 char *dma_addr
= swiotlb_bus_to_virt(dev_addr
);
652 BUG_ON(dir
== DMA_NONE
);
653 if (is_swiotlb_buffer(dma_addr
))
654 unmap_single(hwdev
, dma_addr
, size
, dir
);
655 else if (dir
== DMA_FROM_DEVICE
)
656 dma_mark_clean(dma_addr
, size
);
658 EXPORT_SYMBOL(swiotlb_unmap_single_attrs
);
661 swiotlb_unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
, size_t size
,
664 return swiotlb_unmap_single_attrs(hwdev
, dev_addr
, size
, dir
, NULL
);
667 * Make physical memory consistent for a single streaming mode DMA translation
670 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
671 * using the cpu, yet do not wish to teardown the dma mapping, you must
672 * call this function before doing so. At the next point you give the dma
673 * address back to the card, you must first perform a
674 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
677 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
678 size_t size
, int dir
, int target
)
680 char *dma_addr
= swiotlb_bus_to_virt(dev_addr
);
682 BUG_ON(dir
== DMA_NONE
);
683 if (is_swiotlb_buffer(dma_addr
))
684 sync_single(hwdev
, dma_addr
, size
, dir
, target
);
685 else if (dir
== DMA_FROM_DEVICE
)
686 dma_mark_clean(dma_addr
, size
);
690 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
691 size_t size
, int dir
)
693 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
697 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
698 size_t size
, int dir
)
700 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
704 * Same as above, but for a sub-range of the mapping.
707 swiotlb_sync_single_range(struct device
*hwdev
, dma_addr_t dev_addr
,
708 unsigned long offset
, size_t size
,
711 char *dma_addr
= swiotlb_bus_to_virt(dev_addr
) + offset
;
713 BUG_ON(dir
== DMA_NONE
);
714 if (is_swiotlb_buffer(dma_addr
))
715 sync_single(hwdev
, dma_addr
, size
, dir
, target
);
716 else if (dir
== DMA_FROM_DEVICE
)
717 dma_mark_clean(dma_addr
, size
);
721 swiotlb_sync_single_range_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
722 unsigned long offset
, size_t size
, int dir
)
724 swiotlb_sync_single_range(hwdev
, dev_addr
, offset
, size
, dir
,
729 swiotlb_sync_single_range_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
730 unsigned long offset
, size_t size
, int dir
)
732 swiotlb_sync_single_range(hwdev
, dev_addr
, offset
, size
, dir
,
736 void swiotlb_unmap_sg_attrs(struct device
*, struct scatterlist
*, int, int,
739 * Map a set of buffers described by scatterlist in streaming mode for DMA.
740 * This is the scatter-gather version of the above swiotlb_map_single
741 * interface. Here the scatter gather list elements are each tagged with the
742 * appropriate dma address and length. They are obtained via
743 * sg_dma_{address,length}(SG).
745 * NOTE: An implementation may be able to use a smaller number of
746 * DMA address/length pairs than there are SG table elements.
747 * (for example via virtual mapping capabilities)
748 * The routine returns the number of addr/length pairs actually
749 * used, at most nents.
751 * Device ownership issues as mentioned above for swiotlb_map_single are the
755 swiotlb_map_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
756 int dir
, struct dma_attrs
*attrs
)
758 struct scatterlist
*sg
;
763 BUG_ON(dir
== DMA_NONE
);
765 for_each_sg(sgl
, sg
, nelems
, i
) {
766 addr
= SG_ENT_VIRT_ADDRESS(sg
);
767 dev_addr
= swiotlb_virt_to_bus(addr
);
768 if (range_needs_mapping(sg_virt(sg
), sg
->length
) ||
769 address_needs_mapping(hwdev
, dev_addr
, sg
->length
)) {
770 void *map
= map_single(hwdev
, addr
, sg
->length
, dir
);
772 /* Don't panic here, we expect map_sg users
773 to do proper error handling. */
774 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
775 swiotlb_unmap_sg_attrs(hwdev
, sgl
, i
, dir
,
777 sgl
[0].dma_length
= 0;
780 sg
->dma_address
= swiotlb_virt_to_bus(map
);
782 sg
->dma_address
= dev_addr
;
783 sg
->dma_length
= sg
->length
;
787 EXPORT_SYMBOL(swiotlb_map_sg_attrs
);
790 swiotlb_map_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
793 return swiotlb_map_sg_attrs(hwdev
, sgl
, nelems
, dir
, NULL
);
797 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
798 * concerning calls here are the same as for swiotlb_unmap_single() above.
801 swiotlb_unmap_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
,
802 int nelems
, int dir
, struct dma_attrs
*attrs
)
804 struct scatterlist
*sg
;
807 BUG_ON(dir
== DMA_NONE
);
809 for_each_sg(sgl
, sg
, nelems
, i
) {
810 if (sg
->dma_address
!= SG_ENT_PHYS_ADDRESS(sg
))
811 unmap_single(hwdev
, swiotlb_bus_to_virt(sg
->dma_address
),
812 sg
->dma_length
, dir
);
813 else if (dir
== DMA_FROM_DEVICE
)
814 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg
), sg
->dma_length
);
817 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs
);
820 swiotlb_unmap_sg(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
823 return swiotlb_unmap_sg_attrs(hwdev
, sgl
, nelems
, dir
, NULL
);
827 * Make physical memory consistent for a set of streaming mode DMA translations
830 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
834 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sgl
,
835 int nelems
, int dir
, int target
)
837 struct scatterlist
*sg
;
840 BUG_ON(dir
== DMA_NONE
);
842 for_each_sg(sgl
, sg
, nelems
, i
) {
843 if (sg
->dma_address
!= SG_ENT_PHYS_ADDRESS(sg
))
844 sync_single(hwdev
, swiotlb_bus_to_virt(sg
->dma_address
),
845 sg
->dma_length
, dir
, target
);
846 else if (dir
== DMA_FROM_DEVICE
)
847 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg
), sg
->dma_length
);
852 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
855 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
859 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
862 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
866 swiotlb_dma_mapping_error(struct device
*hwdev
, dma_addr_t dma_addr
)
868 return (dma_addr
== swiotlb_virt_to_bus(io_tlb_overflow_buffer
));
872 * Return whether the given device DMA address mask can be supported
873 * properly. For example, if your device can only drive the low 24-bits
874 * during bus mastering, then you would pass 0x00ffffff as the mask to
878 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
880 return swiotlb_virt_to_bus(io_tlb_end
- 1) <= mask
;
883 EXPORT_SYMBOL(swiotlb_map_single
);
884 EXPORT_SYMBOL(swiotlb_unmap_single
);
885 EXPORT_SYMBOL(swiotlb_map_sg
);
886 EXPORT_SYMBOL(swiotlb_unmap_sg
);
887 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
888 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
889 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu
);
890 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device
);
891 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
892 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
893 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
894 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
895 EXPORT_SYMBOL(swiotlb_free_coherent
);
896 EXPORT_SYMBOL(swiotlb_dma_supported
);