]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - lib/swiotlb.c
Merge tag 'nfs-for-3.9-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
[mirror_ubuntu-zesty-kernel.git] / lib / swiotlb.c
1 /*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mm.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
32
33 #include <asm/io.h>
34 #include <asm/dma.h>
35 #include <asm/scatterlist.h>
36
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
40
41 #define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
43
44 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46 /*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53 int swiotlb_force;
54
55 /*
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
58 * API.
59 */
60 static phys_addr_t io_tlb_start, io_tlb_end;
61
62 /*
63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
65 */
66 static unsigned long io_tlb_nslabs;
67
68 /*
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
70 */
71 static unsigned long io_tlb_overflow = 32*1024;
72
73 static phys_addr_t io_tlb_overflow_buffer;
74
75 /*
76 * This is a free list describing the number of free entries available from
77 * each index
78 */
79 static unsigned int *io_tlb_list;
80 static unsigned int io_tlb_index;
81
82 /*
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
85 */
86 static phys_addr_t *io_tlb_orig_addr;
87
88 /*
89 * Protect the above data structures in the map and unmap calls
90 */
91 static DEFINE_SPINLOCK(io_tlb_lock);
92
93 static int late_alloc;
94
95 static int __init
96 setup_io_tlb_npages(char *str)
97 {
98 if (isdigit(*str)) {
99 io_tlb_nslabs = simple_strtoul(str, &str, 0);
100 /* avoid tail segment of size < IO_TLB_SEGSIZE */
101 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
102 }
103 if (*str == ',')
104 ++str;
105 if (!strcmp(str, "force"))
106 swiotlb_force = 1;
107
108 return 1;
109 }
110 __setup("swiotlb=", setup_io_tlb_npages);
111 /* make io_tlb_overflow tunable too? */
112
113 unsigned long swiotlb_nr_tbl(void)
114 {
115 return io_tlb_nslabs;
116 }
117 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
118 /* Note that this doesn't work with highmem page */
119 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
120 volatile void *address)
121 {
122 return phys_to_dma(hwdev, virt_to_phys(address));
123 }
124
125 static bool no_iotlb_memory;
126
127 void swiotlb_print_info(void)
128 {
129 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
130 unsigned char *vstart, *vend;
131
132 if (no_iotlb_memory) {
133 pr_warn("software IO TLB: No low mem\n");
134 return;
135 }
136
137 vstart = phys_to_virt(io_tlb_start);
138 vend = phys_to_virt(io_tlb_end);
139
140 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
141 (unsigned long long)io_tlb_start,
142 (unsigned long long)io_tlb_end,
143 bytes >> 20, vstart, vend - 1);
144 }
145
146 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
147 {
148 void *v_overflow_buffer;
149 unsigned long i, bytes;
150
151 bytes = nslabs << IO_TLB_SHIFT;
152
153 io_tlb_nslabs = nslabs;
154 io_tlb_start = __pa(tlb);
155 io_tlb_end = io_tlb_start + bytes;
156
157 /*
158 * Get the overflow emergency buffer
159 */
160 v_overflow_buffer = alloc_bootmem_low_pages_nopanic(
161 PAGE_ALIGN(io_tlb_overflow));
162 if (!v_overflow_buffer)
163 return -ENOMEM;
164
165 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
166
167 /*
168 * Allocate and initialize the free list array. This array is used
169 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
170 * between io_tlb_start and io_tlb_end.
171 */
172 io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
173 for (i = 0; i < io_tlb_nslabs; i++)
174 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
175 io_tlb_index = 0;
176 io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
177
178 if (verbose)
179 swiotlb_print_info();
180
181 return 0;
182 }
183
184 /*
185 * Statically reserve bounce buffer space and initialize bounce buffer data
186 * structures for the software IO TLB used to implement the DMA API.
187 */
188 void __init
189 swiotlb_init(int verbose)
190 {
191 /* default to 64MB */
192 size_t default_size = 64UL<<20;
193 unsigned char *vstart;
194 unsigned long bytes;
195
196 if (!io_tlb_nslabs) {
197 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
198 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
199 }
200
201 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
202
203 /* Get IO TLB memory from the low pages */
204 vstart = alloc_bootmem_low_pages_nopanic(PAGE_ALIGN(bytes));
205 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
206 return;
207
208 if (io_tlb_start)
209 free_bootmem(io_tlb_start,
210 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
211 pr_warn("Cannot allocate SWIOTLB buffer");
212 no_iotlb_memory = true;
213 }
214
215 /*
216 * Systems with larger DMA zones (those that don't support ISA) can
217 * initialize the swiotlb later using the slab allocator if needed.
218 * This should be just like above, but with some error catching.
219 */
220 int
221 swiotlb_late_init_with_default_size(size_t default_size)
222 {
223 unsigned long bytes, req_nslabs = io_tlb_nslabs;
224 unsigned char *vstart = NULL;
225 unsigned int order;
226 int rc = 0;
227
228 if (!io_tlb_nslabs) {
229 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
230 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
231 }
232
233 /*
234 * Get IO TLB memory from the low pages
235 */
236 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
237 io_tlb_nslabs = SLABS_PER_PAGE << order;
238 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
239
240 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
241 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
242 order);
243 if (vstart)
244 break;
245 order--;
246 }
247
248 if (!vstart) {
249 io_tlb_nslabs = req_nslabs;
250 return -ENOMEM;
251 }
252 if (order != get_order(bytes)) {
253 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
254 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
255 io_tlb_nslabs = SLABS_PER_PAGE << order;
256 }
257 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
258 if (rc)
259 free_pages((unsigned long)vstart, order);
260 return rc;
261 }
262
263 int
264 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
265 {
266 unsigned long i, bytes;
267 unsigned char *v_overflow_buffer;
268
269 bytes = nslabs << IO_TLB_SHIFT;
270
271 io_tlb_nslabs = nslabs;
272 io_tlb_start = virt_to_phys(tlb);
273 io_tlb_end = io_tlb_start + bytes;
274
275 memset(tlb, 0, bytes);
276
277 /*
278 * Get the overflow emergency buffer
279 */
280 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
281 get_order(io_tlb_overflow));
282 if (!v_overflow_buffer)
283 goto cleanup2;
284
285 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
286
287 /*
288 * Allocate and initialize the free list array. This array is used
289 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
290 * between io_tlb_start and io_tlb_end.
291 */
292 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
293 get_order(io_tlb_nslabs * sizeof(int)));
294 if (!io_tlb_list)
295 goto cleanup3;
296
297 for (i = 0; i < io_tlb_nslabs; i++)
298 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
299 io_tlb_index = 0;
300
301 io_tlb_orig_addr = (phys_addr_t *)
302 __get_free_pages(GFP_KERNEL,
303 get_order(io_tlb_nslabs *
304 sizeof(phys_addr_t)));
305 if (!io_tlb_orig_addr)
306 goto cleanup4;
307
308 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
309
310 swiotlb_print_info();
311
312 late_alloc = 1;
313
314 return 0;
315
316 cleanup4:
317 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
318 sizeof(int)));
319 io_tlb_list = NULL;
320 cleanup3:
321 free_pages((unsigned long)v_overflow_buffer,
322 get_order(io_tlb_overflow));
323 io_tlb_overflow_buffer = 0;
324 cleanup2:
325 io_tlb_end = 0;
326 io_tlb_start = 0;
327 io_tlb_nslabs = 0;
328 return -ENOMEM;
329 }
330
331 void __init swiotlb_free(void)
332 {
333 if (!io_tlb_orig_addr)
334 return;
335
336 if (late_alloc) {
337 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
338 get_order(io_tlb_overflow));
339 free_pages((unsigned long)io_tlb_orig_addr,
340 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
341 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
342 sizeof(int)));
343 free_pages((unsigned long)phys_to_virt(io_tlb_start),
344 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
345 } else {
346 free_bootmem_late(io_tlb_overflow_buffer,
347 PAGE_ALIGN(io_tlb_overflow));
348 free_bootmem_late(__pa(io_tlb_orig_addr),
349 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
350 free_bootmem_late(__pa(io_tlb_list),
351 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
352 free_bootmem_late(io_tlb_start,
353 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
354 }
355 io_tlb_nslabs = 0;
356 }
357
358 static int is_swiotlb_buffer(phys_addr_t paddr)
359 {
360 return paddr >= io_tlb_start && paddr < io_tlb_end;
361 }
362
363 /*
364 * Bounce: copy the swiotlb buffer back to the original dma location
365 */
366 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
367 size_t size, enum dma_data_direction dir)
368 {
369 unsigned long pfn = PFN_DOWN(orig_addr);
370 unsigned char *vaddr = phys_to_virt(tlb_addr);
371
372 if (PageHighMem(pfn_to_page(pfn))) {
373 /* The buffer does not have a mapping. Map it in and copy */
374 unsigned int offset = orig_addr & ~PAGE_MASK;
375 char *buffer;
376 unsigned int sz = 0;
377 unsigned long flags;
378
379 while (size) {
380 sz = min_t(size_t, PAGE_SIZE - offset, size);
381
382 local_irq_save(flags);
383 buffer = kmap_atomic(pfn_to_page(pfn));
384 if (dir == DMA_TO_DEVICE)
385 memcpy(vaddr, buffer + offset, sz);
386 else
387 memcpy(buffer + offset, vaddr, sz);
388 kunmap_atomic(buffer);
389 local_irq_restore(flags);
390
391 size -= sz;
392 pfn++;
393 vaddr += sz;
394 offset = 0;
395 }
396 } else if (dir == DMA_TO_DEVICE) {
397 memcpy(vaddr, phys_to_virt(orig_addr), size);
398 } else {
399 memcpy(phys_to_virt(orig_addr), vaddr, size);
400 }
401 }
402
403 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
404 dma_addr_t tbl_dma_addr,
405 phys_addr_t orig_addr, size_t size,
406 enum dma_data_direction dir)
407 {
408 unsigned long flags;
409 phys_addr_t tlb_addr;
410 unsigned int nslots, stride, index, wrap;
411 int i;
412 unsigned long mask;
413 unsigned long offset_slots;
414 unsigned long max_slots;
415
416 if (no_iotlb_memory)
417 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
418
419 mask = dma_get_seg_boundary(hwdev);
420
421 tbl_dma_addr &= mask;
422
423 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
424
425 /*
426 * Carefully handle integer overflow which can occur when mask == ~0UL.
427 */
428 max_slots = mask + 1
429 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
430 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
431
432 /*
433 * For mappings greater than a page, we limit the stride (and
434 * hence alignment) to a page size.
435 */
436 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
437 if (size > PAGE_SIZE)
438 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
439 else
440 stride = 1;
441
442 BUG_ON(!nslots);
443
444 /*
445 * Find suitable number of IO TLB entries size that will fit this
446 * request and allocate a buffer from that IO TLB pool.
447 */
448 spin_lock_irqsave(&io_tlb_lock, flags);
449 index = ALIGN(io_tlb_index, stride);
450 if (index >= io_tlb_nslabs)
451 index = 0;
452 wrap = index;
453
454 do {
455 while (iommu_is_span_boundary(index, nslots, offset_slots,
456 max_slots)) {
457 index += stride;
458 if (index >= io_tlb_nslabs)
459 index = 0;
460 if (index == wrap)
461 goto not_found;
462 }
463
464 /*
465 * If we find a slot that indicates we have 'nslots' number of
466 * contiguous buffers, we allocate the buffers from that slot
467 * and mark the entries as '0' indicating unavailable.
468 */
469 if (io_tlb_list[index] >= nslots) {
470 int count = 0;
471
472 for (i = index; i < (int) (index + nslots); i++)
473 io_tlb_list[i] = 0;
474 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
475 io_tlb_list[i] = ++count;
476 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
477
478 /*
479 * Update the indices to avoid searching in the next
480 * round.
481 */
482 io_tlb_index = ((index + nslots) < io_tlb_nslabs
483 ? (index + nslots) : 0);
484
485 goto found;
486 }
487 index += stride;
488 if (index >= io_tlb_nslabs)
489 index = 0;
490 } while (index != wrap);
491
492 not_found:
493 spin_unlock_irqrestore(&io_tlb_lock, flags);
494 return SWIOTLB_MAP_ERROR;
495 found:
496 spin_unlock_irqrestore(&io_tlb_lock, flags);
497
498 /*
499 * Save away the mapping from the original address to the DMA address.
500 * This is needed when we sync the memory. Then we sync the buffer if
501 * needed.
502 */
503 for (i = 0; i < nslots; i++)
504 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
505 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
506 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
507
508 return tlb_addr;
509 }
510 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
511
512 /*
513 * Allocates bounce buffer and returns its kernel virtual address.
514 */
515
516 phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size,
517 enum dma_data_direction dir)
518 {
519 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
520
521 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
522 }
523
524 /*
525 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
526 */
527 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
528 size_t size, enum dma_data_direction dir)
529 {
530 unsigned long flags;
531 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
532 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
533 phys_addr_t orig_addr = io_tlb_orig_addr[index];
534
535 /*
536 * First, sync the memory before unmapping the entry
537 */
538 if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
539 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
540
541 /*
542 * Return the buffer to the free list by setting the corresponding
543 * entries to indicate the number of contiguous entries available.
544 * While returning the entries to the free list, we merge the entries
545 * with slots below and above the pool being returned.
546 */
547 spin_lock_irqsave(&io_tlb_lock, flags);
548 {
549 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
550 io_tlb_list[index + nslots] : 0);
551 /*
552 * Step 1: return the slots to the free list, merging the
553 * slots with superceeding slots
554 */
555 for (i = index + nslots - 1; i >= index; i--)
556 io_tlb_list[i] = ++count;
557 /*
558 * Step 2: merge the returned slots with the preceding slots,
559 * if available (non zero)
560 */
561 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
562 io_tlb_list[i] = ++count;
563 }
564 spin_unlock_irqrestore(&io_tlb_lock, flags);
565 }
566 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
567
568 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
569 size_t size, enum dma_data_direction dir,
570 enum dma_sync_target target)
571 {
572 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
573 phys_addr_t orig_addr = io_tlb_orig_addr[index];
574
575 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
576
577 switch (target) {
578 case SYNC_FOR_CPU:
579 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
580 swiotlb_bounce(orig_addr, tlb_addr,
581 size, DMA_FROM_DEVICE);
582 else
583 BUG_ON(dir != DMA_TO_DEVICE);
584 break;
585 case SYNC_FOR_DEVICE:
586 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
587 swiotlb_bounce(orig_addr, tlb_addr,
588 size, DMA_TO_DEVICE);
589 else
590 BUG_ON(dir != DMA_FROM_DEVICE);
591 break;
592 default:
593 BUG();
594 }
595 }
596 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
597
598 void *
599 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
600 dma_addr_t *dma_handle, gfp_t flags)
601 {
602 dma_addr_t dev_addr;
603 void *ret;
604 int order = get_order(size);
605 u64 dma_mask = DMA_BIT_MASK(32);
606
607 if (hwdev && hwdev->coherent_dma_mask)
608 dma_mask = hwdev->coherent_dma_mask;
609
610 ret = (void *)__get_free_pages(flags, order);
611 if (ret) {
612 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
613 if (dev_addr + size - 1 > dma_mask) {
614 /*
615 * The allocated memory isn't reachable by the device.
616 */
617 free_pages((unsigned long) ret, order);
618 ret = NULL;
619 }
620 }
621 if (!ret) {
622 /*
623 * We are either out of memory or the device can't DMA to
624 * GFP_DMA memory; fall back on map_single(), which
625 * will grab memory from the lowest available address range.
626 */
627 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
628 if (paddr == SWIOTLB_MAP_ERROR)
629 return NULL;
630
631 ret = phys_to_virt(paddr);
632 dev_addr = phys_to_dma(hwdev, paddr);
633
634 /* Confirm address can be DMA'd by device */
635 if (dev_addr + size - 1 > dma_mask) {
636 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
637 (unsigned long long)dma_mask,
638 (unsigned long long)dev_addr);
639
640 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
641 swiotlb_tbl_unmap_single(hwdev, paddr,
642 size, DMA_TO_DEVICE);
643 return NULL;
644 }
645 }
646
647 *dma_handle = dev_addr;
648 memset(ret, 0, size);
649
650 return ret;
651 }
652 EXPORT_SYMBOL(swiotlb_alloc_coherent);
653
654 void
655 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
656 dma_addr_t dev_addr)
657 {
658 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
659
660 WARN_ON(irqs_disabled());
661 if (!is_swiotlb_buffer(paddr))
662 free_pages((unsigned long)vaddr, get_order(size));
663 else
664 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
665 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
666 }
667 EXPORT_SYMBOL(swiotlb_free_coherent);
668
669 static void
670 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
671 int do_panic)
672 {
673 /*
674 * Ran out of IOMMU space for this operation. This is very bad.
675 * Unfortunately the drivers cannot handle this operation properly.
676 * unless they check for dma_mapping_error (most don't)
677 * When the mapping is small enough return a static buffer to limit
678 * the damage, or panic when the transfer is too big.
679 */
680 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
681 "device %s\n", size, dev ? dev_name(dev) : "?");
682
683 if (size <= io_tlb_overflow || !do_panic)
684 return;
685
686 if (dir == DMA_BIDIRECTIONAL)
687 panic("DMA: Random memory could be DMA accessed\n");
688 if (dir == DMA_FROM_DEVICE)
689 panic("DMA: Random memory could be DMA written\n");
690 if (dir == DMA_TO_DEVICE)
691 panic("DMA: Random memory could be DMA read\n");
692 }
693
694 /*
695 * Map a single buffer of the indicated size for DMA in streaming mode. The
696 * physical address to use is returned.
697 *
698 * Once the device is given the dma address, the device owns this memory until
699 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
700 */
701 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
702 unsigned long offset, size_t size,
703 enum dma_data_direction dir,
704 struct dma_attrs *attrs)
705 {
706 phys_addr_t map, phys = page_to_phys(page) + offset;
707 dma_addr_t dev_addr = phys_to_dma(dev, phys);
708
709 BUG_ON(dir == DMA_NONE);
710 /*
711 * If the address happens to be in the device's DMA window,
712 * we can safely return the device addr and not worry about bounce
713 * buffering it.
714 */
715 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
716 return dev_addr;
717
718 /* Oh well, have to allocate and map a bounce buffer. */
719 map = map_single(dev, phys, size, dir);
720 if (map == SWIOTLB_MAP_ERROR) {
721 swiotlb_full(dev, size, dir, 1);
722 return phys_to_dma(dev, io_tlb_overflow_buffer);
723 }
724
725 dev_addr = phys_to_dma(dev, map);
726
727 /* Ensure that the address returned is DMA'ble */
728 if (!dma_capable(dev, dev_addr, size)) {
729 swiotlb_tbl_unmap_single(dev, map, size, dir);
730 return phys_to_dma(dev, io_tlb_overflow_buffer);
731 }
732
733 return dev_addr;
734 }
735 EXPORT_SYMBOL_GPL(swiotlb_map_page);
736
737 /*
738 * Unmap a single streaming mode DMA translation. The dma_addr and size must
739 * match what was provided for in a previous swiotlb_map_page call. All
740 * other usages are undefined.
741 *
742 * After this call, reads by the cpu to the buffer are guaranteed to see
743 * whatever the device wrote there.
744 */
745 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
746 size_t size, enum dma_data_direction dir)
747 {
748 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
749
750 BUG_ON(dir == DMA_NONE);
751
752 if (is_swiotlb_buffer(paddr)) {
753 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
754 return;
755 }
756
757 if (dir != DMA_FROM_DEVICE)
758 return;
759
760 /*
761 * phys_to_virt doesn't work with hihgmem page but we could
762 * call dma_mark_clean() with hihgmem page here. However, we
763 * are fine since dma_mark_clean() is null on POWERPC. We can
764 * make dma_mark_clean() take a physical address if necessary.
765 */
766 dma_mark_clean(phys_to_virt(paddr), size);
767 }
768
769 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
770 size_t size, enum dma_data_direction dir,
771 struct dma_attrs *attrs)
772 {
773 unmap_single(hwdev, dev_addr, size, dir);
774 }
775 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
776
777 /*
778 * Make physical memory consistent for a single streaming mode DMA translation
779 * after a transfer.
780 *
781 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
782 * using the cpu, yet do not wish to teardown the dma mapping, you must
783 * call this function before doing so. At the next point you give the dma
784 * address back to the card, you must first perform a
785 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
786 */
787 static void
788 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
789 size_t size, enum dma_data_direction dir,
790 enum dma_sync_target target)
791 {
792 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
793
794 BUG_ON(dir == DMA_NONE);
795
796 if (is_swiotlb_buffer(paddr)) {
797 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
798 return;
799 }
800
801 if (dir != DMA_FROM_DEVICE)
802 return;
803
804 dma_mark_clean(phys_to_virt(paddr), size);
805 }
806
807 void
808 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
809 size_t size, enum dma_data_direction dir)
810 {
811 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
812 }
813 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
814
815 void
816 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
817 size_t size, enum dma_data_direction dir)
818 {
819 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
820 }
821 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
822
823 /*
824 * Map a set of buffers described by scatterlist in streaming mode for DMA.
825 * This is the scatter-gather version of the above swiotlb_map_page
826 * interface. Here the scatter gather list elements are each tagged with the
827 * appropriate dma address and length. They are obtained via
828 * sg_dma_{address,length}(SG).
829 *
830 * NOTE: An implementation may be able to use a smaller number of
831 * DMA address/length pairs than there are SG table elements.
832 * (for example via virtual mapping capabilities)
833 * The routine returns the number of addr/length pairs actually
834 * used, at most nents.
835 *
836 * Device ownership issues as mentioned above for swiotlb_map_page are the
837 * same here.
838 */
839 int
840 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
841 enum dma_data_direction dir, struct dma_attrs *attrs)
842 {
843 struct scatterlist *sg;
844 int i;
845
846 BUG_ON(dir == DMA_NONE);
847
848 for_each_sg(sgl, sg, nelems, i) {
849 phys_addr_t paddr = sg_phys(sg);
850 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
851
852 if (swiotlb_force ||
853 !dma_capable(hwdev, dev_addr, sg->length)) {
854 phys_addr_t map = map_single(hwdev, sg_phys(sg),
855 sg->length, dir);
856 if (map == SWIOTLB_MAP_ERROR) {
857 /* Don't panic here, we expect map_sg users
858 to do proper error handling. */
859 swiotlb_full(hwdev, sg->length, dir, 0);
860 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
861 attrs);
862 sgl[0].dma_length = 0;
863 return 0;
864 }
865 sg->dma_address = phys_to_dma(hwdev, map);
866 } else
867 sg->dma_address = dev_addr;
868 sg->dma_length = sg->length;
869 }
870 return nelems;
871 }
872 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
873
874 int
875 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
876 enum dma_data_direction dir)
877 {
878 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
879 }
880 EXPORT_SYMBOL(swiotlb_map_sg);
881
882 /*
883 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
884 * concerning calls here are the same as for swiotlb_unmap_page() above.
885 */
886 void
887 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
888 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
889 {
890 struct scatterlist *sg;
891 int i;
892
893 BUG_ON(dir == DMA_NONE);
894
895 for_each_sg(sgl, sg, nelems, i)
896 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
897
898 }
899 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
900
901 void
902 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
903 enum dma_data_direction dir)
904 {
905 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
906 }
907 EXPORT_SYMBOL(swiotlb_unmap_sg);
908
909 /*
910 * Make physical memory consistent for a set of streaming mode DMA translations
911 * after a transfer.
912 *
913 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
914 * and usage.
915 */
916 static void
917 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
918 int nelems, enum dma_data_direction dir,
919 enum dma_sync_target target)
920 {
921 struct scatterlist *sg;
922 int i;
923
924 for_each_sg(sgl, sg, nelems, i)
925 swiotlb_sync_single(hwdev, sg->dma_address,
926 sg->dma_length, dir, target);
927 }
928
929 void
930 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
931 int nelems, enum dma_data_direction dir)
932 {
933 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
934 }
935 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
936
937 void
938 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
939 int nelems, enum dma_data_direction dir)
940 {
941 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
942 }
943 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
944
945 int
946 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
947 {
948 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
949 }
950 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
951
952 /*
953 * Return whether the given device DMA address mask can be supported
954 * properly. For example, if your device can only drive the low 24-bits
955 * during bus mastering, then you would pass 0x00ffffff as the mask to
956 * this function.
957 */
958 int
959 swiotlb_dma_supported(struct device *hwdev, u64 mask)
960 {
961 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
962 }
963 EXPORT_SYMBOL(swiotlb_dma_supported);