2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/export.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
31 #include <linux/gfp.h>
32 #include <linux/scatterlist.h>
37 #include <linux/init.h>
38 #include <linux/bootmem.h>
39 #include <linux/iommu-helper.h>
41 #define CREATE_TRACE_POINTS
42 #include <trace/events/swiotlb.h>
44 #define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
47 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
54 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
63 static phys_addr_t io_tlb_start
, io_tlb_end
;
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
69 static unsigned long io_tlb_nslabs
;
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
74 static unsigned long io_tlb_overflow
= 32*1024;
76 static phys_addr_t io_tlb_overflow_buffer
;
79 * This is a free list describing the number of free entries available from
82 static unsigned int *io_tlb_list
;
83 static unsigned int io_tlb_index
;
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
89 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
90 static phys_addr_t
*io_tlb_orig_addr
;
93 * Protect the above data structures in the map and unmap calls
95 static DEFINE_SPINLOCK(io_tlb_lock
);
97 static int late_alloc
;
100 setup_io_tlb_npages(char *str
)
103 io_tlb_nslabs
= simple_strtoul(str
, &str
, 0);
104 /* avoid tail segment of size < IO_TLB_SEGSIZE */
105 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
109 if (!strcmp(str
, "force"))
114 early_param("swiotlb", setup_io_tlb_npages
);
115 /* make io_tlb_overflow tunable too? */
117 unsigned long swiotlb_nr_tbl(void)
119 return io_tlb_nslabs
;
121 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl
);
123 /* default to 64MB */
124 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
125 unsigned long swiotlb_size_or_default(void)
129 size
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
131 return size
? size
: (IO_TLB_DEFAULT_SIZE
);
134 /* Note that this doesn't work with highmem page */
135 static dma_addr_t
swiotlb_virt_to_bus(struct device
*hwdev
,
136 volatile void *address
)
138 return phys_to_dma(hwdev
, virt_to_phys(address
));
141 static bool no_iotlb_memory
;
143 void swiotlb_print_info(void)
145 unsigned long bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
146 unsigned char *vstart
, *vend
;
148 if (no_iotlb_memory
) {
149 pr_warn("software IO TLB: No low mem\n");
153 vstart
= phys_to_virt(io_tlb_start
);
154 vend
= phys_to_virt(io_tlb_end
);
156 printk(KERN_INFO
"software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
157 (unsigned long long)io_tlb_start
,
158 (unsigned long long)io_tlb_end
,
159 bytes
>> 20, vstart
, vend
- 1);
162 int __init
swiotlb_init_with_tbl(char *tlb
, unsigned long nslabs
, int verbose
)
164 void *v_overflow_buffer
;
165 unsigned long i
, bytes
;
167 bytes
= nslabs
<< IO_TLB_SHIFT
;
169 io_tlb_nslabs
= nslabs
;
170 io_tlb_start
= __pa(tlb
);
171 io_tlb_end
= io_tlb_start
+ bytes
;
174 * Get the overflow emergency buffer
176 v_overflow_buffer
= memblock_virt_alloc_low_nopanic(
177 PAGE_ALIGN(io_tlb_overflow
),
179 if (!v_overflow_buffer
)
182 io_tlb_overflow_buffer
= __pa(v_overflow_buffer
);
185 * Allocate and initialize the free list array. This array is used
186 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
187 * between io_tlb_start and io_tlb_end.
189 io_tlb_list
= memblock_virt_alloc(
190 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)),
192 io_tlb_orig_addr
= memblock_virt_alloc(
193 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)),
195 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
196 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
197 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
202 swiotlb_print_info();
208 * Statically reserve bounce buffer space and initialize bounce buffer data
209 * structures for the software IO TLB used to implement the DMA API.
212 swiotlb_init(int verbose
)
214 size_t default_size
= IO_TLB_DEFAULT_SIZE
;
215 unsigned char *vstart
;
218 if (!io_tlb_nslabs
) {
219 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
220 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
223 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
225 /* Get IO TLB memory from the low pages */
226 vstart
= memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes
), PAGE_SIZE
);
227 if (vstart
&& !swiotlb_init_with_tbl(vstart
, io_tlb_nslabs
, verbose
))
231 memblock_free_early(io_tlb_start
,
232 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
233 pr_warn("Cannot allocate SWIOTLB buffer");
234 no_iotlb_memory
= true;
238 * Systems with larger DMA zones (those that don't support ISA) can
239 * initialize the swiotlb later using the slab allocator if needed.
240 * This should be just like above, but with some error catching.
243 swiotlb_late_init_with_default_size(size_t default_size
)
245 unsigned long bytes
, req_nslabs
= io_tlb_nslabs
;
246 unsigned char *vstart
= NULL
;
250 if (!io_tlb_nslabs
) {
251 io_tlb_nslabs
= (default_size
>> IO_TLB_SHIFT
);
252 io_tlb_nslabs
= ALIGN(io_tlb_nslabs
, IO_TLB_SEGSIZE
);
256 * Get IO TLB memory from the low pages
258 order
= get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
);
259 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
260 bytes
= io_tlb_nslabs
<< IO_TLB_SHIFT
;
262 while ((SLABS_PER_PAGE
<< order
) > IO_TLB_MIN_SLABS
) {
263 vstart
= (void *)__get_free_pages(GFP_DMA
| __GFP_NOWARN
,
271 io_tlb_nslabs
= req_nslabs
;
274 if (order
!= get_order(bytes
)) {
275 printk(KERN_WARNING
"Warning: only able to allocate %ld MB "
276 "for software IO TLB\n", (PAGE_SIZE
<< order
) >> 20);
277 io_tlb_nslabs
= SLABS_PER_PAGE
<< order
;
279 rc
= swiotlb_late_init_with_tbl(vstart
, io_tlb_nslabs
);
281 free_pages((unsigned long)vstart
, order
);
286 swiotlb_late_init_with_tbl(char *tlb
, unsigned long nslabs
)
288 unsigned long i
, bytes
;
289 unsigned char *v_overflow_buffer
;
291 bytes
= nslabs
<< IO_TLB_SHIFT
;
293 io_tlb_nslabs
= nslabs
;
294 io_tlb_start
= virt_to_phys(tlb
);
295 io_tlb_end
= io_tlb_start
+ bytes
;
297 memset(tlb
, 0, bytes
);
300 * Get the overflow emergency buffer
302 v_overflow_buffer
= (void *)__get_free_pages(GFP_DMA
,
303 get_order(io_tlb_overflow
));
304 if (!v_overflow_buffer
)
307 io_tlb_overflow_buffer
= virt_to_phys(v_overflow_buffer
);
310 * Allocate and initialize the free list array. This array is used
311 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
312 * between io_tlb_start and io_tlb_end.
314 io_tlb_list
= (unsigned int *)__get_free_pages(GFP_KERNEL
,
315 get_order(io_tlb_nslabs
* sizeof(int)));
319 io_tlb_orig_addr
= (phys_addr_t
*)
320 __get_free_pages(GFP_KERNEL
,
321 get_order(io_tlb_nslabs
*
322 sizeof(phys_addr_t
)));
323 if (!io_tlb_orig_addr
)
326 for (i
= 0; i
< io_tlb_nslabs
; i
++) {
327 io_tlb_list
[i
] = IO_TLB_SEGSIZE
- OFFSET(i
, IO_TLB_SEGSIZE
);
328 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
332 swiotlb_print_info();
339 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
343 free_pages((unsigned long)v_overflow_buffer
,
344 get_order(io_tlb_overflow
));
345 io_tlb_overflow_buffer
= 0;
353 void __init
swiotlb_free(void)
355 if (!io_tlb_orig_addr
)
359 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer
),
360 get_order(io_tlb_overflow
));
361 free_pages((unsigned long)io_tlb_orig_addr
,
362 get_order(io_tlb_nslabs
* sizeof(phys_addr_t
)));
363 free_pages((unsigned long)io_tlb_list
, get_order(io_tlb_nslabs
*
365 free_pages((unsigned long)phys_to_virt(io_tlb_start
),
366 get_order(io_tlb_nslabs
<< IO_TLB_SHIFT
));
368 memblock_free_late(io_tlb_overflow_buffer
,
369 PAGE_ALIGN(io_tlb_overflow
));
370 memblock_free_late(__pa(io_tlb_orig_addr
),
371 PAGE_ALIGN(io_tlb_nslabs
* sizeof(phys_addr_t
)));
372 memblock_free_late(__pa(io_tlb_list
),
373 PAGE_ALIGN(io_tlb_nslabs
* sizeof(int)));
374 memblock_free_late(io_tlb_start
,
375 PAGE_ALIGN(io_tlb_nslabs
<< IO_TLB_SHIFT
));
380 int is_swiotlb_buffer(phys_addr_t paddr
)
382 return paddr
>= io_tlb_start
&& paddr
< io_tlb_end
;
386 * Bounce: copy the swiotlb buffer back to the original dma location
388 static void swiotlb_bounce(phys_addr_t orig_addr
, phys_addr_t tlb_addr
,
389 size_t size
, enum dma_data_direction dir
)
391 unsigned long pfn
= PFN_DOWN(orig_addr
);
392 unsigned char *vaddr
= phys_to_virt(tlb_addr
);
394 if (PageHighMem(pfn_to_page(pfn
))) {
395 /* The buffer does not have a mapping. Map it in and copy */
396 unsigned int offset
= orig_addr
& ~PAGE_MASK
;
402 sz
= min_t(size_t, PAGE_SIZE
- offset
, size
);
404 local_irq_save(flags
);
405 buffer
= kmap_atomic(pfn_to_page(pfn
));
406 if (dir
== DMA_TO_DEVICE
)
407 memcpy(vaddr
, buffer
+ offset
, sz
);
409 memcpy(buffer
+ offset
, vaddr
, sz
);
410 kunmap_atomic(buffer
);
411 local_irq_restore(flags
);
418 } else if (dir
== DMA_TO_DEVICE
) {
419 memcpy(vaddr
, phys_to_virt(orig_addr
), size
);
421 memcpy(phys_to_virt(orig_addr
), vaddr
, size
);
425 phys_addr_t
swiotlb_tbl_map_single(struct device
*hwdev
,
426 dma_addr_t tbl_dma_addr
,
427 phys_addr_t orig_addr
, size_t size
,
428 enum dma_data_direction dir
,
432 phys_addr_t tlb_addr
;
433 unsigned int nslots
, stride
, index
, wrap
;
436 unsigned long offset_slots
;
437 unsigned long max_slots
;
440 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
442 mask
= dma_get_seg_boundary(hwdev
);
444 tbl_dma_addr
&= mask
;
446 offset_slots
= ALIGN(tbl_dma_addr
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
449 * Carefully handle integer overflow which can occur when mask == ~0UL.
452 ? ALIGN(mask
+ 1, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
453 : 1UL << (BITS_PER_LONG
- IO_TLB_SHIFT
);
456 * For mappings greater than a page, we limit the stride (and
457 * hence alignment) to a page size.
459 nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
460 if (size
> PAGE_SIZE
)
461 stride
= (1 << (PAGE_SHIFT
- IO_TLB_SHIFT
));
468 * Find suitable number of IO TLB entries size that will fit this
469 * request and allocate a buffer from that IO TLB pool.
471 spin_lock_irqsave(&io_tlb_lock
, flags
);
472 index
= ALIGN(io_tlb_index
, stride
);
473 if (index
>= io_tlb_nslabs
)
478 while (iommu_is_span_boundary(index
, nslots
, offset_slots
,
481 if (index
>= io_tlb_nslabs
)
488 * If we find a slot that indicates we have 'nslots' number of
489 * contiguous buffers, we allocate the buffers from that slot
490 * and mark the entries as '0' indicating unavailable.
492 if (io_tlb_list
[index
] >= nslots
) {
495 for (i
= index
; i
< (int) (index
+ nslots
); i
++)
497 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
- 1) && io_tlb_list
[i
]; i
--)
498 io_tlb_list
[i
] = ++count
;
499 tlb_addr
= io_tlb_start
+ (index
<< IO_TLB_SHIFT
);
502 * Update the indices to avoid searching in the next
505 io_tlb_index
= ((index
+ nslots
) < io_tlb_nslabs
506 ? (index
+ nslots
) : 0);
511 if (index
>= io_tlb_nslabs
)
513 } while (index
!= wrap
);
516 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
517 if (printk_ratelimit())
518 dev_warn(hwdev
, "swiotlb buffer is full (sz: %zd bytes)\n", size
);
519 return SWIOTLB_MAP_ERROR
;
521 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
524 * Save away the mapping from the original address to the DMA address.
525 * This is needed when we sync the memory. Then we sync the buffer if
528 for (i
= 0; i
< nslots
; i
++)
529 io_tlb_orig_addr
[index
+i
] = orig_addr
+ (i
<< IO_TLB_SHIFT
);
530 if (!(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
531 (dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
532 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_TO_DEVICE
);
536 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single
);
539 * Allocates bounce buffer and returns its kernel virtual address.
543 map_single(struct device
*hwdev
, phys_addr_t phys
, size_t size
,
544 enum dma_data_direction dir
, unsigned long attrs
)
546 dma_addr_t start_dma_addr
= phys_to_dma(hwdev
, io_tlb_start
);
548 return swiotlb_tbl_map_single(hwdev
, start_dma_addr
, phys
, size
,
553 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
555 void swiotlb_tbl_unmap_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
556 size_t size
, enum dma_data_direction dir
,
560 int i
, count
, nslots
= ALIGN(size
, 1 << IO_TLB_SHIFT
) >> IO_TLB_SHIFT
;
561 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
562 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
565 * First, sync the memory before unmapping the entry
567 if (orig_addr
!= INVALID_PHYS_ADDR
&&
568 !(attrs
& DMA_ATTR_SKIP_CPU_SYNC
) &&
569 ((dir
== DMA_FROM_DEVICE
) || (dir
== DMA_BIDIRECTIONAL
)))
570 swiotlb_bounce(orig_addr
, tlb_addr
, size
, DMA_FROM_DEVICE
);
573 * Return the buffer to the free list by setting the corresponding
574 * entries to indicate the number of contiguous entries available.
575 * While returning the entries to the free list, we merge the entries
576 * with slots below and above the pool being returned.
578 spin_lock_irqsave(&io_tlb_lock
, flags
);
580 count
= ((index
+ nslots
) < ALIGN(index
+ 1, IO_TLB_SEGSIZE
) ?
581 io_tlb_list
[index
+ nslots
] : 0);
583 * Step 1: return the slots to the free list, merging the
584 * slots with superceeding slots
586 for (i
= index
+ nslots
- 1; i
>= index
; i
--) {
587 io_tlb_list
[i
] = ++count
;
588 io_tlb_orig_addr
[i
] = INVALID_PHYS_ADDR
;
591 * Step 2: merge the returned slots with the preceding slots,
592 * if available (non zero)
594 for (i
= index
- 1; (OFFSET(i
, IO_TLB_SEGSIZE
) != IO_TLB_SEGSIZE
-1) && io_tlb_list
[i
]; i
--)
595 io_tlb_list
[i
] = ++count
;
597 spin_unlock_irqrestore(&io_tlb_lock
, flags
);
599 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single
);
601 void swiotlb_tbl_sync_single(struct device
*hwdev
, phys_addr_t tlb_addr
,
602 size_t size
, enum dma_data_direction dir
,
603 enum dma_sync_target target
)
605 int index
= (tlb_addr
- io_tlb_start
) >> IO_TLB_SHIFT
;
606 phys_addr_t orig_addr
= io_tlb_orig_addr
[index
];
608 if (orig_addr
== INVALID_PHYS_ADDR
)
610 orig_addr
+= (unsigned long)tlb_addr
& ((1 << IO_TLB_SHIFT
) - 1);
614 if (likely(dir
== DMA_FROM_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
615 swiotlb_bounce(orig_addr
, tlb_addr
,
616 size
, DMA_FROM_DEVICE
);
618 BUG_ON(dir
!= DMA_TO_DEVICE
);
620 case SYNC_FOR_DEVICE
:
621 if (likely(dir
== DMA_TO_DEVICE
|| dir
== DMA_BIDIRECTIONAL
))
622 swiotlb_bounce(orig_addr
, tlb_addr
,
623 size
, DMA_TO_DEVICE
);
625 BUG_ON(dir
!= DMA_FROM_DEVICE
);
631 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single
);
634 swiotlb_alloc_coherent(struct device
*hwdev
, size_t size
,
635 dma_addr_t
*dma_handle
, gfp_t flags
)
639 int order
= get_order(size
);
640 u64 dma_mask
= DMA_BIT_MASK(32);
642 if (hwdev
&& hwdev
->coherent_dma_mask
)
643 dma_mask
= hwdev
->coherent_dma_mask
;
645 ret
= (void *)__get_free_pages(flags
, order
);
647 dev_addr
= swiotlb_virt_to_bus(hwdev
, ret
);
648 if (dev_addr
+ size
- 1 > dma_mask
) {
650 * The allocated memory isn't reachable by the device.
652 free_pages((unsigned long) ret
, order
);
658 * We are either out of memory or the device can't DMA to
659 * GFP_DMA memory; fall back on map_single(), which
660 * will grab memory from the lowest available address range.
662 phys_addr_t paddr
= map_single(hwdev
, 0, size
,
664 if (paddr
== SWIOTLB_MAP_ERROR
)
667 ret
= phys_to_virt(paddr
);
668 dev_addr
= phys_to_dma(hwdev
, paddr
);
670 /* Confirm address can be DMA'd by device */
671 if (dev_addr
+ size
- 1 > dma_mask
) {
672 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
673 (unsigned long long)dma_mask
,
674 (unsigned long long)dev_addr
);
677 * DMA_TO_DEVICE to avoid memcpy in unmap_single.
678 * The DMA_ATTR_SKIP_CPU_SYNC is optional.
680 swiotlb_tbl_unmap_single(hwdev
, paddr
,
682 DMA_ATTR_SKIP_CPU_SYNC
);
687 *dma_handle
= dev_addr
;
688 memset(ret
, 0, size
);
693 pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
694 dev_name(hwdev
), size
);
699 EXPORT_SYMBOL(swiotlb_alloc_coherent
);
702 swiotlb_free_coherent(struct device
*hwdev
, size_t size
, void *vaddr
,
705 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
707 WARN_ON(irqs_disabled());
708 if (!is_swiotlb_buffer(paddr
))
709 free_pages((unsigned long)vaddr
, get_order(size
));
712 * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
713 * DMA_ATTR_SKIP_CPU_SYNC is optional.
715 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, DMA_TO_DEVICE
,
716 DMA_ATTR_SKIP_CPU_SYNC
);
718 EXPORT_SYMBOL(swiotlb_free_coherent
);
721 swiotlb_full(struct device
*dev
, size_t size
, enum dma_data_direction dir
,
725 * Ran out of IOMMU space for this operation. This is very bad.
726 * Unfortunately the drivers cannot handle this operation properly.
727 * unless they check for dma_mapping_error (most don't)
728 * When the mapping is small enough return a static buffer to limit
729 * the damage, or panic when the transfer is too big.
731 dev_err_ratelimited(dev
, "DMA: Out of SW-IOMMU space for %zu bytes\n",
734 if (size
<= io_tlb_overflow
|| !do_panic
)
737 if (dir
== DMA_BIDIRECTIONAL
)
738 panic("DMA: Random memory could be DMA accessed\n");
739 if (dir
== DMA_FROM_DEVICE
)
740 panic("DMA: Random memory could be DMA written\n");
741 if (dir
== DMA_TO_DEVICE
)
742 panic("DMA: Random memory could be DMA read\n");
746 * Map a single buffer of the indicated size for DMA in streaming mode. The
747 * physical address to use is returned.
749 * Once the device is given the dma address, the device owns this memory until
750 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
752 dma_addr_t
swiotlb_map_page(struct device
*dev
, struct page
*page
,
753 unsigned long offset
, size_t size
,
754 enum dma_data_direction dir
,
757 phys_addr_t map
, phys
= page_to_phys(page
) + offset
;
758 dma_addr_t dev_addr
= phys_to_dma(dev
, phys
);
760 BUG_ON(dir
== DMA_NONE
);
762 * If the address happens to be in the device's DMA window,
763 * we can safely return the device addr and not worry about bounce
766 if (dma_capable(dev
, dev_addr
, size
) && !swiotlb_force
)
769 trace_swiotlb_bounced(dev
, dev_addr
, size
, swiotlb_force
);
771 /* Oh well, have to allocate and map a bounce buffer. */
772 map
= map_single(dev
, phys
, size
, dir
, attrs
);
773 if (map
== SWIOTLB_MAP_ERROR
) {
774 swiotlb_full(dev
, size
, dir
, 1);
775 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
778 dev_addr
= phys_to_dma(dev
, map
);
780 /* Ensure that the address returned is DMA'ble */
781 if (dma_capable(dev
, dev_addr
, size
))
784 attrs
|= DMA_ATTR_SKIP_CPU_SYNC
;
785 swiotlb_tbl_unmap_single(dev
, map
, size
, dir
, attrs
);
787 return phys_to_dma(dev
, io_tlb_overflow_buffer
);
789 EXPORT_SYMBOL_GPL(swiotlb_map_page
);
792 * Unmap a single streaming mode DMA translation. The dma_addr and size must
793 * match what was provided for in a previous swiotlb_map_page call. All
794 * other usages are undefined.
796 * After this call, reads by the cpu to the buffer are guaranteed to see
797 * whatever the device wrote there.
799 static void unmap_single(struct device
*hwdev
, dma_addr_t dev_addr
,
800 size_t size
, enum dma_data_direction dir
,
803 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
805 BUG_ON(dir
== DMA_NONE
);
807 if (is_swiotlb_buffer(paddr
)) {
808 swiotlb_tbl_unmap_single(hwdev
, paddr
, size
, dir
, attrs
);
812 if (dir
!= DMA_FROM_DEVICE
)
816 * phys_to_virt doesn't work with hihgmem page but we could
817 * call dma_mark_clean() with hihgmem page here. However, we
818 * are fine since dma_mark_clean() is null on POWERPC. We can
819 * make dma_mark_clean() take a physical address if necessary.
821 dma_mark_clean(phys_to_virt(paddr
), size
);
824 void swiotlb_unmap_page(struct device
*hwdev
, dma_addr_t dev_addr
,
825 size_t size
, enum dma_data_direction dir
,
828 unmap_single(hwdev
, dev_addr
, size
, dir
, attrs
);
830 EXPORT_SYMBOL_GPL(swiotlb_unmap_page
);
833 * Make physical memory consistent for a single streaming mode DMA translation
836 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
837 * using the cpu, yet do not wish to teardown the dma mapping, you must
838 * call this function before doing so. At the next point you give the dma
839 * address back to the card, you must first perform a
840 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
843 swiotlb_sync_single(struct device
*hwdev
, dma_addr_t dev_addr
,
844 size_t size
, enum dma_data_direction dir
,
845 enum dma_sync_target target
)
847 phys_addr_t paddr
= dma_to_phys(hwdev
, dev_addr
);
849 BUG_ON(dir
== DMA_NONE
);
851 if (is_swiotlb_buffer(paddr
)) {
852 swiotlb_tbl_sync_single(hwdev
, paddr
, size
, dir
, target
);
856 if (dir
!= DMA_FROM_DEVICE
)
859 dma_mark_clean(phys_to_virt(paddr
), size
);
863 swiotlb_sync_single_for_cpu(struct device
*hwdev
, dma_addr_t dev_addr
,
864 size_t size
, enum dma_data_direction dir
)
866 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_CPU
);
868 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu
);
871 swiotlb_sync_single_for_device(struct device
*hwdev
, dma_addr_t dev_addr
,
872 size_t size
, enum dma_data_direction dir
)
874 swiotlb_sync_single(hwdev
, dev_addr
, size
, dir
, SYNC_FOR_DEVICE
);
876 EXPORT_SYMBOL(swiotlb_sync_single_for_device
);
879 * Map a set of buffers described by scatterlist in streaming mode for DMA.
880 * This is the scatter-gather version of the above swiotlb_map_page
881 * interface. Here the scatter gather list elements are each tagged with the
882 * appropriate dma address and length. They are obtained via
883 * sg_dma_{address,length}(SG).
885 * NOTE: An implementation may be able to use a smaller number of
886 * DMA address/length pairs than there are SG table elements.
887 * (for example via virtual mapping capabilities)
888 * The routine returns the number of addr/length pairs actually
889 * used, at most nents.
891 * Device ownership issues as mentioned above for swiotlb_map_page are the
895 swiotlb_map_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
, int nelems
,
896 enum dma_data_direction dir
, unsigned long attrs
)
898 struct scatterlist
*sg
;
901 BUG_ON(dir
== DMA_NONE
);
903 for_each_sg(sgl
, sg
, nelems
, i
) {
904 phys_addr_t paddr
= sg_phys(sg
);
905 dma_addr_t dev_addr
= phys_to_dma(hwdev
, paddr
);
908 !dma_capable(hwdev
, dev_addr
, sg
->length
)) {
909 phys_addr_t map
= map_single(hwdev
, sg_phys(sg
),
910 sg
->length
, dir
, attrs
);
911 if (map
== SWIOTLB_MAP_ERROR
) {
912 /* Don't panic here, we expect map_sg users
913 to do proper error handling. */
914 swiotlb_full(hwdev
, sg
->length
, dir
, 0);
915 attrs
|= DMA_ATTR_SKIP_CPU_SYNC
;
916 swiotlb_unmap_sg_attrs(hwdev
, sgl
, i
, dir
,
921 sg
->dma_address
= phys_to_dma(hwdev
, map
);
923 sg
->dma_address
= dev_addr
;
924 sg_dma_len(sg
) = sg
->length
;
928 EXPORT_SYMBOL(swiotlb_map_sg_attrs
);
931 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
932 * concerning calls here are the same as for swiotlb_unmap_page() above.
935 swiotlb_unmap_sg_attrs(struct device
*hwdev
, struct scatterlist
*sgl
,
936 int nelems
, enum dma_data_direction dir
,
939 struct scatterlist
*sg
;
942 BUG_ON(dir
== DMA_NONE
);
944 for_each_sg(sgl
, sg
, nelems
, i
)
945 unmap_single(hwdev
, sg
->dma_address
, sg_dma_len(sg
), dir
,
948 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs
);
951 * Make physical memory consistent for a set of streaming mode DMA translations
954 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
958 swiotlb_sync_sg(struct device
*hwdev
, struct scatterlist
*sgl
,
959 int nelems
, enum dma_data_direction dir
,
960 enum dma_sync_target target
)
962 struct scatterlist
*sg
;
965 for_each_sg(sgl
, sg
, nelems
, i
)
966 swiotlb_sync_single(hwdev
, sg
->dma_address
,
967 sg_dma_len(sg
), dir
, target
);
971 swiotlb_sync_sg_for_cpu(struct device
*hwdev
, struct scatterlist
*sg
,
972 int nelems
, enum dma_data_direction dir
)
974 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_CPU
);
976 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu
);
979 swiotlb_sync_sg_for_device(struct device
*hwdev
, struct scatterlist
*sg
,
980 int nelems
, enum dma_data_direction dir
)
982 swiotlb_sync_sg(hwdev
, sg
, nelems
, dir
, SYNC_FOR_DEVICE
);
984 EXPORT_SYMBOL(swiotlb_sync_sg_for_device
);
987 swiotlb_dma_mapping_error(struct device
*hwdev
, dma_addr_t dma_addr
)
989 return (dma_addr
== phys_to_dma(hwdev
, io_tlb_overflow_buffer
));
991 EXPORT_SYMBOL(swiotlb_dma_mapping_error
);
994 * Return whether the given device DMA address mask can be supported
995 * properly. For example, if your device can only drive the low 24-bits
996 * during bus mastering, then you would pass 0x00ffffff as the mask to
1000 swiotlb_dma_supported(struct device
*hwdev
, u64 mask
)
1002 return phys_to_dma(hwdev
, io_tlb_end
- 1) <= mask
;
1004 EXPORT_SYMBOL(swiotlb_dma_supported
);