libc-top-half/musl/arch/riscv64/atomic_arch.h

   1 #define a_barrier a_barrier
   2 static inline void a_barrier()
   3 {
   4         __asm__ __volatile__ ("fence rw,rw" : : : "memory");
   5 }
   6
   7 #define a_cas a_cas
   8 static inline int a_cas(volatile int *p, int t, int s)
   9 {
  10         int old, tmp;
  11         __asm__("\n1:   lr.w.aqrl %0, %2\n"
  12                 "       bne %0, %3, 1f\n"
  13                 "       sc.w.aqrl %1, %4, %2\n"
  14                 "       bnez %1, 1b\n"
  15                 "1:"
  16                 : "=&r"(old), "+r"(tmp), "+A"(*p)
  17                 : "r"(t), "r"(s));
  18         return old;
  19 }
  20
  21 #define a_cas_p a_cas_p
  22 static inline void *a_cas_p(volatile void *p, void *t, void *s)
  23 {
  24         void *old;
  25         int tmp;
  26         __asm__("\n1:   lr.d.aqrl %0, %2\n"
  27                 "       bne %0, %3, 1f\n"
  28                 "       sc.d.aqrl %1, %4, %2\n"
  29                 "       bnez %1, 1b\n"
  30                 "1:"
  31                 : "=&r"(old), "+r"(tmp), "+A"(*(long *)p)
  32                 : "r"(t), "r"(s));
  33         return old;
  34 }