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git.proxmox.com Git - mirror_qemu.git/blob - linux-user/i386/cpu_loop.c
4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
23 #include "user-internals.h"
24 #include "cpu_loop-common.h"
25 #include "signal-common.h"
26 #include "user-mmap.h"
28 /***********************************************************/
29 /* CPUX86 core interface */
31 uint64_t cpu_get_tsc(CPUX86State
*env
)
33 return cpu_get_host_ticks();
36 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
41 e1
= (addr
<< 16) | (limit
& 0xffff);
42 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
49 static uint64_t *idt_table
;
51 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
52 uint64_t addr
, unsigned int sel
)
55 e1
= (addr
& 0xffff) | (sel
<< 16);
56 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
60 p
[2] = tswap32(addr
>> 32);
63 /* only dpl matters as we do only user space emulation */
64 static void set_idt(int n
, unsigned int dpl
)
66 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
69 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
70 uint32_t addr
, unsigned int sel
)
73 e1
= (addr
& 0xffff) | (sel
<< 16);
74 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
80 /* only dpl matters as we do only user space emulation */
81 static void set_idt(int n
, unsigned int dpl
)
83 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
87 static void gen_signal(CPUX86State
*env
, int sig
, int code
, abi_ptr addr
)
89 target_siginfo_t info
= {
92 ._sifields
._sigfault
._addr
= addr
95 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
99 static bool write_ok_or_segv(CPUX86State
*env
, abi_ptr addr
, size_t len
)
102 * For all the vsyscalls, NULL means "don't write anything" not
103 * "write it at address 0".
105 if (addr
== 0 || access_ok(env_cpu(env
), VERIFY_WRITE
, addr
, len
)) {
109 env
->error_code
= PG_ERROR_W_MASK
| PG_ERROR_U_MASK
;
110 gen_signal(env
, TARGET_SIGSEGV
, TARGET_SEGV_MAPERR
, addr
);
115 * Since v3.1, the kernel traps and emulates the vsyscall page.
116 * Entry points other than the official generate SIGSEGV.
118 static void emulate_vsyscall(CPUX86State
*env
)
125 * Validate the entry point. We have already validated the page
126 * during translation to get here; now verify the offset.
128 switch (env
->eip
& ~TARGET_PAGE_MASK
) {
130 syscall
= TARGET_NR_gettimeofday
;
133 syscall
= TARGET_NR_time
;
136 syscall
= TARGET_NR_getcpu
;
143 * Validate the return address.
144 * Note that the kernel treats this the same as an invalid entry point.
146 if (get_user_u64(caller
, env
->regs
[R_ESP
])) {
151 * Validate the the pointer arguments.
154 case TARGET_NR_gettimeofday
:
155 if (!write_ok_or_segv(env
, env
->regs
[R_EDI
],
156 sizeof(struct target_timeval
)) ||
157 !write_ok_or_segv(env
, env
->regs
[R_ESI
],
158 sizeof(struct target_timezone
))) {
163 if (!write_ok_or_segv(env
, env
->regs
[R_EDI
], sizeof(abi_long
))) {
167 case TARGET_NR_getcpu
:
168 if (!write_ok_or_segv(env
, env
->regs
[R_EDI
], sizeof(uint32_t)) ||
169 !write_ok_or_segv(env
, env
->regs
[R_ESI
], sizeof(uint32_t))) {
174 g_assert_not_reached();
178 * Perform the syscall. None of the vsyscalls should need restarting.
180 ret
= do_syscall(env
, syscall
, env
->regs
[R_EDI
], env
->regs
[R_ESI
],
181 env
->regs
[R_EDX
], env
->regs
[10], env
->regs
[8],
183 g_assert(ret
!= -QEMU_ERESTARTSYS
);
184 g_assert(ret
!= -TARGET_QEMU_ESIGRETURN
);
185 if (ret
== -TARGET_EFAULT
) {
188 env
->regs
[R_EAX
] = ret
;
190 /* Emulate a ret instruction to leave the vsyscall page. */
192 env
->regs
[R_ESP
] += 8;
196 /* Like force_sig(SIGSEGV). */
197 gen_signal(env
, TARGET_SIGSEGV
, TARGET_SI_KERNEL
, 0);
201 void cpu_loop(CPUX86State
*env
)
203 CPUState
*cs
= env_cpu(env
);
210 trapnr
= cpu_exec(cs
);
212 process_queued_cpu_work(cs
);
216 /* linux syscall from int $0x80 */
217 ret
= do_syscall(env
,
226 if (ret
== -QEMU_ERESTARTSYS
) {
228 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
229 env
->regs
[R_EAX
] = ret
;
234 /* linux syscall from syscall instruction */
235 ret
= do_syscall(env
,
244 if (ret
== -QEMU_ERESTARTSYS
) {
246 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
247 env
->regs
[R_EAX
] = ret
;
253 emulate_vsyscall(env
);
258 gen_signal(env
, TARGET_SIGBUS
, TARGET_SI_KERNEL
, 0);
261 /* XXX: potential problem if ABI32 */
262 #ifndef TARGET_X86_64
263 if (env
->eflags
& VM_MASK
) {
264 handle_vm86_fault(env
);
268 gen_signal(env
, TARGET_SIGSEGV
, TARGET_SI_KERNEL
, 0);
271 gen_signal(env
, TARGET_SIGSEGV
,
272 (env
->error_code
& 1 ?
273 TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
),
277 #ifndef TARGET_X86_64
278 if (env
->eflags
& VM_MASK
) {
279 handle_vm86_trap(env
, trapnr
);
283 gen_signal(env
, TARGET_SIGFPE
, TARGET_FPE_INTDIV
, env
->eip
);
287 #ifndef TARGET_X86_64
288 if (env
->eflags
& VM_MASK
) {
289 handle_vm86_trap(env
, trapnr
);
293 if (trapnr
== EXCP01_DB
) {
294 gen_signal(env
, TARGET_SIGTRAP
, TARGET_TRAP_BRKPT
, env
->eip
);
296 gen_signal(env
, TARGET_SIGTRAP
, TARGET_SI_KERNEL
, 0);
301 #ifndef TARGET_X86_64
302 if (env
->eflags
& VM_MASK
) {
303 handle_vm86_trap(env
, trapnr
);
307 gen_signal(env
, TARGET_SIGSEGV
, TARGET_SI_KERNEL
, 0);
310 gen_signal(env
, TARGET_SIGILL
, TARGET_ILL_ILLOPN
, env
->eip
);
313 /* just indicate that signals should be handled asap */
316 gen_signal(env
, TARGET_SIGTRAP
, TARGET_TRAP_BRKPT
, 0);
319 cpu_exec_step_atomic(cs
);
322 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
323 EXCP_DUMP(env
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
327 process_pending_signals(env
);
331 void target_cpu_copy_regs(CPUArchState
*env
, struct target_pt_regs
*regs
)
333 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
334 env
->hflags
|= HF_PE_MASK
| HF_CPL_MASK
;
335 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
336 env
->cr
[4] |= CR4_OSFXSR_MASK
;
337 env
->hflags
|= HF_OSFXSR_MASK
;
340 /* enable 64 bit mode if possible */
341 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
342 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
345 env
->cr
[4] |= CR4_PAE_MASK
;
346 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
347 env
->hflags
|= HF_LMA_MASK
;
350 /* flags setup : we activate the IRQs by default as in user mode */
351 env
->eflags
|= IF_MASK
;
353 /* linux register setup */
355 env
->regs
[R_EAX
] = regs
->rax
;
356 env
->regs
[R_EBX
] = regs
->rbx
;
357 env
->regs
[R_ECX
] = regs
->rcx
;
358 env
->regs
[R_EDX
] = regs
->rdx
;
359 env
->regs
[R_ESI
] = regs
->rsi
;
360 env
->regs
[R_EDI
] = regs
->rdi
;
361 env
->regs
[R_EBP
] = regs
->rbp
;
362 env
->regs
[R_ESP
] = regs
->rsp
;
363 env
->eip
= regs
->rip
;
365 env
->regs
[R_EAX
] = regs
->eax
;
366 env
->regs
[R_EBX
] = regs
->ebx
;
367 env
->regs
[R_ECX
] = regs
->ecx
;
368 env
->regs
[R_EDX
] = regs
->edx
;
369 env
->regs
[R_ESI
] = regs
->esi
;
370 env
->regs
[R_EDI
] = regs
->edi
;
371 env
->regs
[R_EBP
] = regs
->ebp
;
372 env
->regs
[R_ESP
] = regs
->esp
;
373 env
->eip
= regs
->eip
;
376 /* linux interrupt setup */
378 env
->idt
.limit
= 511;
380 env
->idt
.limit
= 255;
382 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
383 PROT_READ
|PROT_WRITE
,
384 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
385 idt_table
= g2h_untagged(env
->idt
.base
);
408 /* linux segment setup */
411 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
412 PROT_READ
|PROT_WRITE
,
413 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
414 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
415 gdt_table
= g2h_untagged(env
->gdt
.base
);
417 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
418 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
419 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
421 /* 64 bit code segment */
422 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
423 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
425 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
427 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
428 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
429 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
431 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
432 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
434 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
435 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
436 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
437 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
438 /* This hack makes Wine work... */
439 env
->segs
[R_FS
].selector
= 0;
441 cpu_x86_load_seg(env
, R_DS
, 0);
442 cpu_x86_load_seg(env
, R_ES
, 0);
443 cpu_x86_load_seg(env
, R_FS
, 0);
444 cpu_x86_load_seg(env
, R_GS
, 0);