4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "cache-utils.h"
35 #include "qemu-timer.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
43 unsigned long mmap_min_addr
;
44 #if defined(CONFIG_USE_GUEST_BASE)
45 unsigned long guest_base
;
49 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
50 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
52 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
53 we allocate a bigger stack. Need a better solution, for example
54 by remapping the process stack directly at the right place */
55 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
57 void gemu_log(const char *fmt
, ...)
62 vfprintf(stderr
, fmt
, ap
);
66 #if defined(TARGET_I386)
67 int cpu_get_pic_interrupt(CPUState
*env
)
73 /* timers for rdtsc */
77 static uint64_t emu_time
;
79 int64_t cpu_get_real_ticks(void)
86 #if defined(CONFIG_USE_NPTL)
87 /***********************************************************/
88 /* Helper routines for implementing atomic operations. */
90 /* To implement exclusive operations we force all cpus to syncronise.
91 We don't require a full sync, only that no cpus are executing guest code.
92 The alternative is to map target atomic ops onto host equivalents,
93 which requires quite a lot of per host/target work. */
94 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
95 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
96 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
97 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
98 static int pending_cpus
;
100 /* Make sure everything is in a consistent state for calling fork(). */
101 void fork_start(void)
103 pthread_mutex_lock(&tb_lock
);
104 pthread_mutex_lock(&exclusive_lock
);
108 void fork_end(int child
)
110 mmap_fork_end(child
);
112 /* Child processes created by fork() only have a single thread.
113 Discard information about the parent threads. */
114 first_cpu
= thread_env
;
115 thread_env
->next_cpu
= NULL
;
117 pthread_mutex_init(&exclusive_lock
, NULL
);
118 pthread_mutex_init(&cpu_list_mutex
, NULL
);
119 pthread_cond_init(&exclusive_cond
, NULL
);
120 pthread_cond_init(&exclusive_resume
, NULL
);
121 pthread_mutex_init(&tb_lock
, NULL
);
122 gdbserver_fork(thread_env
);
124 pthread_mutex_unlock(&exclusive_lock
);
125 pthread_mutex_unlock(&tb_lock
);
129 /* Wait for pending exclusive operations to complete. The exclusive lock
131 static inline void exclusive_idle(void)
133 while (pending_cpus
) {
134 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
138 /* Start an exclusive operation.
139 Must only be called from outside cpu_arm_exec. */
140 static inline void start_exclusive(void)
143 pthread_mutex_lock(&exclusive_lock
);
147 /* Make all other cpus stop executing. */
148 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
149 if (other
->running
) {
154 if (pending_cpus
> 1) {
155 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
159 /* Finish an exclusive operation. */
160 static inline void end_exclusive(void)
163 pthread_cond_broadcast(&exclusive_resume
);
164 pthread_mutex_unlock(&exclusive_lock
);
167 /* Wait for exclusive ops to finish, and begin cpu execution. */
168 static inline void cpu_exec_start(CPUState
*env
)
170 pthread_mutex_lock(&exclusive_lock
);
173 pthread_mutex_unlock(&exclusive_lock
);
176 /* Mark cpu as not executing, and release pending exclusive ops. */
177 static inline void cpu_exec_end(CPUState
*env
)
179 pthread_mutex_lock(&exclusive_lock
);
181 if (pending_cpus
> 1) {
183 if (pending_cpus
== 1) {
184 pthread_cond_signal(&exclusive_cond
);
188 pthread_mutex_unlock(&exclusive_lock
);
191 void cpu_list_lock(void)
193 pthread_mutex_lock(&cpu_list_mutex
);
196 void cpu_list_unlock(void)
198 pthread_mutex_unlock(&cpu_list_mutex
);
200 #else /* if !CONFIG_USE_NPTL */
201 /* These are no-ops because we are not threadsafe. */
202 static inline void cpu_exec_start(CPUState
*env
)
206 static inline void cpu_exec_end(CPUState
*env
)
210 static inline void start_exclusive(void)
214 static inline void end_exclusive(void)
218 void fork_start(void)
222 void fork_end(int child
)
225 gdbserver_fork(thread_env
);
229 void cpu_list_lock(void)
233 void cpu_list_unlock(void)
240 /***********************************************************/
241 /* CPUX86 core interface */
243 void cpu_smm_update(CPUState
*env
)
247 uint64_t cpu_get_tsc(CPUX86State
*env
)
249 return cpu_get_real_ticks();
252 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
257 e1
= (addr
<< 16) | (limit
& 0xffff);
258 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
265 static uint64_t *idt_table
;
267 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
268 uint64_t addr
, unsigned int sel
)
271 e1
= (addr
& 0xffff) | (sel
<< 16);
272 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
276 p
[2] = tswap32(addr
>> 32);
279 /* only dpl matters as we do only user space emulation */
280 static void set_idt(int n
, unsigned int dpl
)
282 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
285 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
286 uint32_t addr
, unsigned int sel
)
289 e1
= (addr
& 0xffff) | (sel
<< 16);
290 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
296 /* only dpl matters as we do only user space emulation */
297 static void set_idt(int n
, unsigned int dpl
)
299 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
303 void cpu_loop(CPUX86State
*env
)
307 target_siginfo_t info
;
310 trapnr
= cpu_x86_exec(env
);
313 /* linux syscall from int $0x80 */
314 env
->regs
[R_EAX
] = do_syscall(env
,
325 /* linux syscall from syscall intruction */
326 env
->regs
[R_EAX
] = do_syscall(env
,
334 env
->eip
= env
->exception_next_eip
;
339 info
.si_signo
= SIGBUS
;
341 info
.si_code
= TARGET_SI_KERNEL
;
342 info
._sifields
._sigfault
._addr
= 0;
343 queue_signal(env
, info
.si_signo
, &info
);
346 /* XXX: potential problem if ABI32 */
347 #ifndef TARGET_X86_64
348 if (env
->eflags
& VM_MASK
) {
349 handle_vm86_fault(env
);
353 info
.si_signo
= SIGSEGV
;
355 info
.si_code
= TARGET_SI_KERNEL
;
356 info
._sifields
._sigfault
._addr
= 0;
357 queue_signal(env
, info
.si_signo
, &info
);
361 info
.si_signo
= SIGSEGV
;
363 if (!(env
->error_code
& 1))
364 info
.si_code
= TARGET_SEGV_MAPERR
;
366 info
.si_code
= TARGET_SEGV_ACCERR
;
367 info
._sifields
._sigfault
._addr
= env
->cr
[2];
368 queue_signal(env
, info
.si_signo
, &info
);
371 #ifndef TARGET_X86_64
372 if (env
->eflags
& VM_MASK
) {
373 handle_vm86_trap(env
, trapnr
);
377 /* division by zero */
378 info
.si_signo
= SIGFPE
;
380 info
.si_code
= TARGET_FPE_INTDIV
;
381 info
._sifields
._sigfault
._addr
= env
->eip
;
382 queue_signal(env
, info
.si_signo
, &info
);
387 #ifndef TARGET_X86_64
388 if (env
->eflags
& VM_MASK
) {
389 handle_vm86_trap(env
, trapnr
);
393 info
.si_signo
= SIGTRAP
;
395 if (trapnr
== EXCP01_DB
) {
396 info
.si_code
= TARGET_TRAP_BRKPT
;
397 info
._sifields
._sigfault
._addr
= env
->eip
;
399 info
.si_code
= TARGET_SI_KERNEL
;
400 info
._sifields
._sigfault
._addr
= 0;
402 queue_signal(env
, info
.si_signo
, &info
);
407 #ifndef TARGET_X86_64
408 if (env
->eflags
& VM_MASK
) {
409 handle_vm86_trap(env
, trapnr
);
413 info
.si_signo
= SIGSEGV
;
415 info
.si_code
= TARGET_SI_KERNEL
;
416 info
._sifields
._sigfault
._addr
= 0;
417 queue_signal(env
, info
.si_signo
, &info
);
421 info
.si_signo
= SIGILL
;
423 info
.si_code
= TARGET_ILL_ILLOPN
;
424 info
._sifields
._sigfault
._addr
= env
->eip
;
425 queue_signal(env
, info
.si_signo
, &info
);
428 /* just indicate that signals should be handled asap */
434 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
439 info
.si_code
= TARGET_TRAP_BRKPT
;
440 queue_signal(env
, info
.si_signo
, &info
);
445 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
446 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
450 process_pending_signals(env
);
457 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
459 abi_ulong addr
, last1
;
465 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
468 tb_invalidate_page_range(addr
, last1
+ 1);
475 /* Handle a jump to the kernel code page. */
477 do_kernel_trap(CPUARMState
*env
)
483 switch (env
->regs
[15]) {
484 case 0xffff0fa0: /* __kernel_memory_barrier */
485 /* ??? No-op. Will need to do better for SMP. */
487 case 0xffff0fc0: /* __kernel_cmpxchg */
488 /* XXX: This only works between threads, not between processes.
489 It's probably possible to implement this with native host
490 operations. However things like ldrex/strex are much harder so
491 there's not much point trying. */
493 cpsr
= cpsr_read(env
);
495 /* FIXME: This should SEGV if the access fails. */
496 if (get_user_u32(val
, addr
))
498 if (val
== env
->regs
[0]) {
500 /* FIXME: Check for segfaults. */
501 put_user_u32(val
, addr
);
508 cpsr_write(env
, cpsr
, CPSR_C
);
511 case 0xffff0fe0: /* __kernel_get_tls */
512 env
->regs
[0] = env
->cp15
.c13_tls2
;
517 /* Jump back to the caller. */
518 addr
= env
->regs
[14];
523 env
->regs
[15] = addr
;
528 static int do_strex(CPUARMState
*env
)
536 addr
= env
->exclusive_addr
;
537 if (addr
!= env
->exclusive_test
) {
540 size
= env
->exclusive_info
& 0xf;
543 segv
= get_user_u8(val
, addr
);
546 segv
= get_user_u16(val
, addr
);
550 segv
= get_user_u32(val
, addr
);
556 env
->cp15
.c6_data
= addr
;
559 if (val
!= env
->exclusive_val
) {
563 segv
= get_user_u32(val
, addr
+ 4);
565 env
->cp15
.c6_data
= addr
+ 4;
568 if (val
!= env
->exclusive_high
) {
572 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
575 segv
= put_user_u8(val
, addr
);
578 segv
= put_user_u16(val
, addr
);
582 segv
= put_user_u32(val
, addr
);
586 env
->cp15
.c6_data
= addr
;
590 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
591 segv
= put_user_u32(val
, addr
);
593 env
->cp15
.c6_data
= addr
+ 4;
600 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
606 void cpu_loop(CPUARMState
*env
)
609 unsigned int n
, insn
;
610 target_siginfo_t info
;
615 trapnr
= cpu_arm_exec(env
);
620 TaskState
*ts
= env
->opaque
;
624 /* we handle the FPU emulation here, as Linux */
625 /* we get the opcode */
626 /* FIXME - what to do if get_user() fails? */
627 get_user_u32(opcode
, env
->regs
[15]);
629 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
630 if (rc
== 0) { /* illegal instruction */
631 info
.si_signo
= SIGILL
;
633 info
.si_code
= TARGET_ILL_ILLOPN
;
634 info
._sifields
._sigfault
._addr
= env
->regs
[15];
635 queue_signal(env
, info
.si_signo
, &info
);
636 } else if (rc
< 0) { /* FP exception */
639 /* translate softfloat flags to FPSR flags */
640 if (-rc
& float_flag_invalid
)
642 if (-rc
& float_flag_divbyzero
)
644 if (-rc
& float_flag_overflow
)
646 if (-rc
& float_flag_underflow
)
648 if (-rc
& float_flag_inexact
)
651 FPSR fpsr
= ts
->fpa
.fpsr
;
652 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
654 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
655 info
.si_signo
= SIGFPE
;
658 /* ordered by priority, least first */
659 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
660 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
661 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
662 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
663 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
665 info
._sifields
._sigfault
._addr
= env
->regs
[15];
666 queue_signal(env
, info
.si_signo
, &info
);
671 /* accumulate unenabled exceptions */
672 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
674 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
676 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
678 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
680 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
683 } else { /* everything OK */
694 if (trapnr
== EXCP_BKPT
) {
696 /* FIXME - what to do if get_user() fails? */
697 get_user_u16(insn
, env
->regs
[15]);
701 /* FIXME - what to do if get_user() fails? */
702 get_user_u32(insn
, env
->regs
[15]);
703 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
708 /* FIXME - what to do if get_user() fails? */
709 get_user_u16(insn
, env
->regs
[15] - 2);
712 /* FIXME - what to do if get_user() fails? */
713 get_user_u32(insn
, env
->regs
[15] - 4);
718 if (n
== ARM_NR_cacheflush
) {
719 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
720 } else if (n
== ARM_NR_semihosting
721 || n
== ARM_NR_thumb_semihosting
) {
722 env
->regs
[0] = do_arm_semihosting (env
);
723 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
724 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
726 if (env
->thumb
|| n
== 0) {
729 n
-= ARM_SYSCALL_BASE
;
732 if ( n
> ARM_NR_BASE
) {
734 case ARM_NR_cacheflush
:
735 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
738 cpu_set_tls(env
, env
->regs
[0]);
742 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
744 env
->regs
[0] = -TARGET_ENOSYS
;
748 env
->regs
[0] = do_syscall(env
,
763 /* just indicate that signals should be handled asap */
765 case EXCP_PREFETCH_ABORT
:
766 addr
= env
->cp15
.c6_insn
;
768 case EXCP_DATA_ABORT
:
769 addr
= env
->cp15
.c6_data
;
773 info
.si_signo
= SIGSEGV
;
775 /* XXX: check env->error_code */
776 info
.si_code
= TARGET_SEGV_MAPERR
;
777 info
._sifields
._sigfault
._addr
= addr
;
778 queue_signal(env
, info
.si_signo
, &info
);
785 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
790 info
.si_code
= TARGET_TRAP_BRKPT
;
791 queue_signal(env
, info
.si_signo
, &info
);
795 case EXCP_KERNEL_TRAP
:
796 if (do_kernel_trap(env
))
801 addr
= env
->cp15
.c6_data
;
807 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
809 cpu_dump_state(env
, stderr
, fprintf
, 0);
812 process_pending_signals(env
);
819 #define SPARC64_STACK_BIAS 2047
823 /* WARNING: dealing with register windows _is_ complicated. More info
824 can be found at http://www.sics.se/~psm/sparcstack.html */
825 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
827 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
828 /* wrap handling : if cwp is on the last window, then we use the
829 registers 'after' the end */
830 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
831 index
+= 16 * env
->nwindows
;
835 /* save the register window 'cwp1' */
836 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
841 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
842 #ifdef TARGET_SPARC64
844 sp_ptr
+= SPARC64_STACK_BIAS
;
846 #if defined(DEBUG_WIN)
847 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
850 for(i
= 0; i
< 16; i
++) {
851 /* FIXME - what to do if put_user() fails? */
852 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
853 sp_ptr
+= sizeof(abi_ulong
);
857 static void save_window(CPUSPARCState
*env
)
859 #ifndef TARGET_SPARC64
860 unsigned int new_wim
;
861 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
862 ((1LL << env
->nwindows
) - 1);
863 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
866 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
872 static void restore_window(CPUSPARCState
*env
)
874 #ifndef TARGET_SPARC64
875 unsigned int new_wim
;
877 unsigned int i
, cwp1
;
880 #ifndef TARGET_SPARC64
881 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
882 ((1LL << env
->nwindows
) - 1);
885 /* restore the invalid window */
886 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
887 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
888 #ifdef TARGET_SPARC64
890 sp_ptr
+= SPARC64_STACK_BIAS
;
892 #if defined(DEBUG_WIN)
893 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
896 for(i
= 0; i
< 16; i
++) {
897 /* FIXME - what to do if get_user() fails? */
898 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
899 sp_ptr
+= sizeof(abi_ulong
);
901 #ifdef TARGET_SPARC64
903 if (env
->cleanwin
< env
->nwindows
- 1)
911 static void flush_windows(CPUSPARCState
*env
)
917 /* if restore would invoke restore_window(), then we can stop */
918 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
919 #ifndef TARGET_SPARC64
920 if (env
->wim
& (1 << cwp1
))
923 if (env
->canrestore
== 0)
928 save_window_offset(env
, cwp1
);
931 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
932 #ifndef TARGET_SPARC64
933 /* set wim so that restore will reload the registers */
934 env
->wim
= 1 << cwp1
;
936 #if defined(DEBUG_WIN)
937 printf("flush_windows: nb=%d\n", offset
- 1);
941 void cpu_loop (CPUSPARCState
*env
)
944 target_siginfo_t info
;
947 trapnr
= cpu_sparc_exec (env
);
950 #ifndef TARGET_SPARC64
957 ret
= do_syscall (env
, env
->gregs
[1],
958 env
->regwptr
[0], env
->regwptr
[1],
959 env
->regwptr
[2], env
->regwptr
[3],
960 env
->regwptr
[4], env
->regwptr
[5]);
961 if ((unsigned int)ret
>= (unsigned int)(-515)) {
962 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
963 env
->xcc
|= PSR_CARRY
;
965 env
->psr
|= PSR_CARRY
;
969 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
970 env
->xcc
&= ~PSR_CARRY
;
972 env
->psr
&= ~PSR_CARRY
;
975 env
->regwptr
[0] = ret
;
976 /* next instruction */
978 env
->npc
= env
->npc
+ 4;
980 case 0x83: /* flush windows */
985 /* next instruction */
987 env
->npc
= env
->npc
+ 4;
989 #ifndef TARGET_SPARC64
990 case TT_WIN_OVF
: /* window overflow */
993 case TT_WIN_UNF
: /* window underflow */
999 info
.si_signo
= SIGSEGV
;
1001 /* XXX: check env->error_code */
1002 info
.si_code
= TARGET_SEGV_MAPERR
;
1003 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1004 queue_signal(env
, info
.si_signo
, &info
);
1008 case TT_SPILL
: /* window overflow */
1011 case TT_FILL
: /* window underflow */
1012 restore_window(env
);
1017 info
.si_signo
= SIGSEGV
;
1019 /* XXX: check env->error_code */
1020 info
.si_code
= TARGET_SEGV_MAPERR
;
1021 if (trapnr
== TT_DFAULT
)
1022 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1024 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1025 queue_signal(env
, info
.si_signo
, &info
);
1028 #ifndef TARGET_ABI32
1031 sparc64_get_context(env
);
1035 sparc64_set_context(env
);
1039 case EXCP_INTERRUPT
:
1040 /* just indicate that signals should be handled asap */
1046 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1049 info
.si_signo
= sig
;
1051 info
.si_code
= TARGET_TRAP_BRKPT
;
1052 queue_signal(env
, info
.si_signo
, &info
);
1057 printf ("Unhandled trap: 0x%x\n", trapnr
);
1058 cpu_dump_state(env
, stderr
, fprintf
, 0);
1061 process_pending_signals (env
);
1068 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1074 uint64_t cpu_ppc_load_tbl (CPUState
*env
)
1076 return cpu_ppc_get_tb(env
);
1079 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1081 return cpu_ppc_get_tb(env
) >> 32;
1084 uint64_t cpu_ppc_load_atbl (CPUState
*env
)
1086 return cpu_ppc_get_tb(env
);
1089 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1091 return cpu_ppc_get_tb(env
) >> 32;
1094 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1095 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1097 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1099 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1102 /* XXX: to be fixed */
1103 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1108 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1113 #define EXCP_DUMP(env, fmt, ...) \
1115 fprintf(stderr, fmt , ## __VA_ARGS__); \
1116 cpu_dump_state(env, stderr, fprintf, 0); \
1117 qemu_log(fmt, ## __VA_ARGS__); \
1119 log_cpu_state(env, 0); \
1122 static int do_store_exclusive(CPUPPCState
*env
)
1125 target_ulong page_addr
;
1130 addr
= env
->reserve_ea
;
1131 page_addr
= addr
& TARGET_PAGE_MASK
;
1134 flags
= page_get_flags(page_addr
);
1135 if ((flags
& PAGE_READ
) == 0) {
1138 int reg
= env
->reserve_info
& 0x1f;
1139 int size
= (env
->reserve_info
>> 5) & 0xf;
1142 if (addr
== env
->reserve_addr
) {
1144 case 1: segv
= get_user_u8(val
, addr
); break;
1145 case 2: segv
= get_user_u16(val
, addr
); break;
1146 case 4: segv
= get_user_u32(val
, addr
); break;
1147 #if defined(TARGET_PPC64)
1148 case 8: segv
= get_user_u64(val
, addr
); break;
1152 if (!segv
&& val
== env
->reserve_val
) {
1153 val
= env
->gpr
[reg
];
1155 case 1: segv
= put_user_u8(val
, addr
); break;
1156 case 2: segv
= put_user_u16(val
, addr
); break;
1157 case 4: segv
= put_user_u32(val
, addr
); break;
1158 #if defined(TARGET_PPC64)
1159 case 8: segv
= put_user_u64(val
, addr
); break;
1168 env
->crf
[0] = (stored
<< 1) | xer_so
;
1169 env
->reserve_addr
= (target_ulong
)-1;
1179 void cpu_loop(CPUPPCState
*env
)
1181 target_siginfo_t info
;
1186 cpu_exec_start(env
);
1187 trapnr
= cpu_ppc_exec(env
);
1190 case POWERPC_EXCP_NONE
:
1193 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1194 cpu_abort(env
, "Critical interrupt while in user mode. "
1197 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1198 cpu_abort(env
, "Machine check exception while in user mode. "
1201 case POWERPC_EXCP_DSI
: /* Data storage exception */
1202 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1204 /* XXX: check this. Seems bugged */
1205 switch (env
->error_code
& 0xFF000000) {
1207 info
.si_signo
= TARGET_SIGSEGV
;
1209 info
.si_code
= TARGET_SEGV_MAPERR
;
1212 info
.si_signo
= TARGET_SIGILL
;
1214 info
.si_code
= TARGET_ILL_ILLADR
;
1217 info
.si_signo
= TARGET_SIGSEGV
;
1219 info
.si_code
= TARGET_SEGV_ACCERR
;
1222 /* Let's send a regular segfault... */
1223 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1225 info
.si_signo
= TARGET_SIGSEGV
;
1227 info
.si_code
= TARGET_SEGV_MAPERR
;
1230 info
._sifields
._sigfault
._addr
= env
->nip
;
1231 queue_signal(env
, info
.si_signo
, &info
);
1233 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1234 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1235 "\n", env
->spr
[SPR_SRR0
]);
1236 /* XXX: check this */
1237 switch (env
->error_code
& 0xFF000000) {
1239 info
.si_signo
= TARGET_SIGSEGV
;
1241 info
.si_code
= TARGET_SEGV_MAPERR
;
1245 info
.si_signo
= TARGET_SIGSEGV
;
1247 info
.si_code
= TARGET_SEGV_ACCERR
;
1250 /* Let's send a regular segfault... */
1251 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1253 info
.si_signo
= TARGET_SIGSEGV
;
1255 info
.si_code
= TARGET_SEGV_MAPERR
;
1258 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1259 queue_signal(env
, info
.si_signo
, &info
);
1261 case POWERPC_EXCP_EXTERNAL
: /* External input */
1262 cpu_abort(env
, "External interrupt while in user mode. "
1265 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1266 EXCP_DUMP(env
, "Unaligned memory access\n");
1267 /* XXX: check this */
1268 info
.si_signo
= TARGET_SIGBUS
;
1270 info
.si_code
= TARGET_BUS_ADRALN
;
1271 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1272 queue_signal(env
, info
.si_signo
, &info
);
1274 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1275 /* XXX: check this */
1276 switch (env
->error_code
& ~0xF) {
1277 case POWERPC_EXCP_FP
:
1278 EXCP_DUMP(env
, "Floating point program exception\n");
1279 info
.si_signo
= TARGET_SIGFPE
;
1281 switch (env
->error_code
& 0xF) {
1282 case POWERPC_EXCP_FP_OX
:
1283 info
.si_code
= TARGET_FPE_FLTOVF
;
1285 case POWERPC_EXCP_FP_UX
:
1286 info
.si_code
= TARGET_FPE_FLTUND
;
1288 case POWERPC_EXCP_FP_ZX
:
1289 case POWERPC_EXCP_FP_VXZDZ
:
1290 info
.si_code
= TARGET_FPE_FLTDIV
;
1292 case POWERPC_EXCP_FP_XX
:
1293 info
.si_code
= TARGET_FPE_FLTRES
;
1295 case POWERPC_EXCP_FP_VXSOFT
:
1296 info
.si_code
= TARGET_FPE_FLTINV
;
1298 case POWERPC_EXCP_FP_VXSNAN
:
1299 case POWERPC_EXCP_FP_VXISI
:
1300 case POWERPC_EXCP_FP_VXIDI
:
1301 case POWERPC_EXCP_FP_VXIMZ
:
1302 case POWERPC_EXCP_FP_VXVC
:
1303 case POWERPC_EXCP_FP_VXSQRT
:
1304 case POWERPC_EXCP_FP_VXCVI
:
1305 info
.si_code
= TARGET_FPE_FLTSUB
;
1308 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1313 case POWERPC_EXCP_INVAL
:
1314 EXCP_DUMP(env
, "Invalid instruction\n");
1315 info
.si_signo
= TARGET_SIGILL
;
1317 switch (env
->error_code
& 0xF) {
1318 case POWERPC_EXCP_INVAL_INVAL
:
1319 info
.si_code
= TARGET_ILL_ILLOPC
;
1321 case POWERPC_EXCP_INVAL_LSWX
:
1322 info
.si_code
= TARGET_ILL_ILLOPN
;
1324 case POWERPC_EXCP_INVAL_SPR
:
1325 info
.si_code
= TARGET_ILL_PRVREG
;
1327 case POWERPC_EXCP_INVAL_FP
:
1328 info
.si_code
= TARGET_ILL_COPROC
;
1331 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1332 env
->error_code
& 0xF);
1333 info
.si_code
= TARGET_ILL_ILLADR
;
1337 case POWERPC_EXCP_PRIV
:
1338 EXCP_DUMP(env
, "Privilege violation\n");
1339 info
.si_signo
= TARGET_SIGILL
;
1341 switch (env
->error_code
& 0xF) {
1342 case POWERPC_EXCP_PRIV_OPC
:
1343 info
.si_code
= TARGET_ILL_PRVOPC
;
1345 case POWERPC_EXCP_PRIV_REG
:
1346 info
.si_code
= TARGET_ILL_PRVREG
;
1349 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1350 env
->error_code
& 0xF);
1351 info
.si_code
= TARGET_ILL_PRVOPC
;
1355 case POWERPC_EXCP_TRAP
:
1356 cpu_abort(env
, "Tried to call a TRAP\n");
1359 /* Should not happen ! */
1360 cpu_abort(env
, "Unknown program exception (%02x)\n",
1364 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1365 queue_signal(env
, info
.si_signo
, &info
);
1367 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1368 EXCP_DUMP(env
, "No floating point allowed\n");
1369 info
.si_signo
= TARGET_SIGILL
;
1371 info
.si_code
= TARGET_ILL_COPROC
;
1372 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1373 queue_signal(env
, info
.si_signo
, &info
);
1375 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1376 cpu_abort(env
, "Syscall exception while in user mode. "
1379 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1380 EXCP_DUMP(env
, "No APU instruction allowed\n");
1381 info
.si_signo
= TARGET_SIGILL
;
1383 info
.si_code
= TARGET_ILL_COPROC
;
1384 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1385 queue_signal(env
, info
.si_signo
, &info
);
1387 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1388 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1391 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1392 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1395 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1396 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1399 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1400 cpu_abort(env
, "Data TLB exception while in user mode. "
1403 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1404 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1407 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1408 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1409 info
.si_signo
= TARGET_SIGILL
;
1411 info
.si_code
= TARGET_ILL_COPROC
;
1412 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1413 queue_signal(env
, info
.si_signo
, &info
);
1415 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1416 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1418 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1419 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1421 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1422 cpu_abort(env
, "Performance monitor exception not handled\n");
1424 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1425 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1428 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1429 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1432 case POWERPC_EXCP_RESET
: /* System reset exception */
1433 cpu_abort(env
, "Reset interrupt while in user mode. "
1436 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1437 cpu_abort(env
, "Data segment exception while in user mode. "
1440 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1441 cpu_abort(env
, "Instruction segment exception "
1442 "while in user mode. Aborting\n");
1444 /* PowerPC 64 with hypervisor mode support */
1445 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1446 cpu_abort(env
, "Hypervisor decrementer interrupt "
1447 "while in user mode. Aborting\n");
1449 case POWERPC_EXCP_TRACE
: /* Trace exception */
1451 * we use this exception to emulate step-by-step execution mode.
1454 /* PowerPC 64 with hypervisor mode support */
1455 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1456 cpu_abort(env
, "Hypervisor data storage exception "
1457 "while in user mode. Aborting\n");
1459 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1460 cpu_abort(env
, "Hypervisor instruction storage exception "
1461 "while in user mode. Aborting\n");
1463 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1464 cpu_abort(env
, "Hypervisor data segment exception "
1465 "while in user mode. Aborting\n");
1467 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1468 cpu_abort(env
, "Hypervisor instruction segment exception "
1469 "while in user mode. Aborting\n");
1471 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1472 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1473 info
.si_signo
= TARGET_SIGILL
;
1475 info
.si_code
= TARGET_ILL_COPROC
;
1476 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1477 queue_signal(env
, info
.si_signo
, &info
);
1479 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1480 cpu_abort(env
, "Programable interval timer interrupt "
1481 "while in user mode. Aborting\n");
1483 case POWERPC_EXCP_IO
: /* IO error exception */
1484 cpu_abort(env
, "IO error exception while in user mode. "
1487 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1488 cpu_abort(env
, "Run mode exception while in user mode. "
1491 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1492 cpu_abort(env
, "Emulation trap exception not handled\n");
1494 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1495 cpu_abort(env
, "Instruction fetch TLB exception "
1496 "while in user-mode. Aborting");
1498 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1499 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1502 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1503 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1506 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1507 cpu_abort(env
, "Floating-point assist exception not handled\n");
1509 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1510 cpu_abort(env
, "Instruction address breakpoint exception "
1513 case POWERPC_EXCP_SMI
: /* System management interrupt */
1514 cpu_abort(env
, "System management interrupt while in user mode. "
1517 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1518 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1521 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1522 cpu_abort(env
, "Performance monitor exception not handled\n");
1524 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1525 cpu_abort(env
, "Vector assist exception not handled\n");
1527 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1528 cpu_abort(env
, "Soft patch exception not handled\n");
1530 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1531 cpu_abort(env
, "Maintenance exception while in user mode. "
1534 case POWERPC_EXCP_STOP
: /* stop translation */
1535 /* We did invalidate the instruction cache. Go on */
1537 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1538 /* We just stopped because of a branch. Go on */
1540 case POWERPC_EXCP_SYSCALL_USER
:
1541 /* system call in user-mode emulation */
1543 * PPC ABI uses overflow flag in cr0 to signal an error
1547 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1548 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1550 env
->crf
[0] &= ~0x1;
1551 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1552 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1554 if (ret
== (uint32_t)(-TARGET_QEMU_ESIGRETURN
)) {
1555 /* Returning from a successful sigreturn syscall.
1556 Avoid corrupting register state. */
1559 if (ret
> (uint32_t)(-515)) {
1565 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1568 case POWERPC_EXCP_STCX
:
1569 if (do_store_exclusive(env
)) {
1570 info
.si_signo
= TARGET_SIGSEGV
;
1572 info
.si_code
= TARGET_SEGV_MAPERR
;
1573 info
._sifields
._sigfault
._addr
= env
->nip
;
1574 queue_signal(env
, info
.si_signo
, &info
);
1581 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1583 info
.si_signo
= sig
;
1585 info
.si_code
= TARGET_TRAP_BRKPT
;
1586 queue_signal(env
, info
.si_signo
, &info
);
1590 case EXCP_INTERRUPT
:
1591 /* just indicate that signals should be handled asap */
1594 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1597 process_pending_signals(env
);
1604 #define MIPS_SYS(name, args) args,
1606 static const uint8_t mips_syscall_args
[] = {
1607 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1608 MIPS_SYS(sys_exit
, 1)
1609 MIPS_SYS(sys_fork
, 0)
1610 MIPS_SYS(sys_read
, 3)
1611 MIPS_SYS(sys_write
, 3)
1612 MIPS_SYS(sys_open
, 3) /* 4005 */
1613 MIPS_SYS(sys_close
, 1)
1614 MIPS_SYS(sys_waitpid
, 3)
1615 MIPS_SYS(sys_creat
, 2)
1616 MIPS_SYS(sys_link
, 2)
1617 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1618 MIPS_SYS(sys_execve
, 0)
1619 MIPS_SYS(sys_chdir
, 1)
1620 MIPS_SYS(sys_time
, 1)
1621 MIPS_SYS(sys_mknod
, 3)
1622 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1623 MIPS_SYS(sys_lchown
, 3)
1624 MIPS_SYS(sys_ni_syscall
, 0)
1625 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1626 MIPS_SYS(sys_lseek
, 3)
1627 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1628 MIPS_SYS(sys_mount
, 5)
1629 MIPS_SYS(sys_oldumount
, 1)
1630 MIPS_SYS(sys_setuid
, 1)
1631 MIPS_SYS(sys_getuid
, 0)
1632 MIPS_SYS(sys_stime
, 1) /* 4025 */
1633 MIPS_SYS(sys_ptrace
, 4)
1634 MIPS_SYS(sys_alarm
, 1)
1635 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1636 MIPS_SYS(sys_pause
, 0)
1637 MIPS_SYS(sys_utime
, 2) /* 4030 */
1638 MIPS_SYS(sys_ni_syscall
, 0)
1639 MIPS_SYS(sys_ni_syscall
, 0)
1640 MIPS_SYS(sys_access
, 2)
1641 MIPS_SYS(sys_nice
, 1)
1642 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1643 MIPS_SYS(sys_sync
, 0)
1644 MIPS_SYS(sys_kill
, 2)
1645 MIPS_SYS(sys_rename
, 2)
1646 MIPS_SYS(sys_mkdir
, 2)
1647 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1648 MIPS_SYS(sys_dup
, 1)
1649 MIPS_SYS(sys_pipe
, 0)
1650 MIPS_SYS(sys_times
, 1)
1651 MIPS_SYS(sys_ni_syscall
, 0)
1652 MIPS_SYS(sys_brk
, 1) /* 4045 */
1653 MIPS_SYS(sys_setgid
, 1)
1654 MIPS_SYS(sys_getgid
, 0)
1655 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1656 MIPS_SYS(sys_geteuid
, 0)
1657 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1658 MIPS_SYS(sys_acct
, 0)
1659 MIPS_SYS(sys_umount
, 2)
1660 MIPS_SYS(sys_ni_syscall
, 0)
1661 MIPS_SYS(sys_ioctl
, 3)
1662 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1663 MIPS_SYS(sys_ni_syscall
, 2)
1664 MIPS_SYS(sys_setpgid
, 2)
1665 MIPS_SYS(sys_ni_syscall
, 0)
1666 MIPS_SYS(sys_olduname
, 1)
1667 MIPS_SYS(sys_umask
, 1) /* 4060 */
1668 MIPS_SYS(sys_chroot
, 1)
1669 MIPS_SYS(sys_ustat
, 2)
1670 MIPS_SYS(sys_dup2
, 2)
1671 MIPS_SYS(sys_getppid
, 0)
1672 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1673 MIPS_SYS(sys_setsid
, 0)
1674 MIPS_SYS(sys_sigaction
, 3)
1675 MIPS_SYS(sys_sgetmask
, 0)
1676 MIPS_SYS(sys_ssetmask
, 1)
1677 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1678 MIPS_SYS(sys_setregid
, 2)
1679 MIPS_SYS(sys_sigsuspend
, 0)
1680 MIPS_SYS(sys_sigpending
, 1)
1681 MIPS_SYS(sys_sethostname
, 2)
1682 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1683 MIPS_SYS(sys_getrlimit
, 2)
1684 MIPS_SYS(sys_getrusage
, 2)
1685 MIPS_SYS(sys_gettimeofday
, 2)
1686 MIPS_SYS(sys_settimeofday
, 2)
1687 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1688 MIPS_SYS(sys_setgroups
, 2)
1689 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1690 MIPS_SYS(sys_symlink
, 2)
1691 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1692 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1693 MIPS_SYS(sys_uselib
, 1)
1694 MIPS_SYS(sys_swapon
, 2)
1695 MIPS_SYS(sys_reboot
, 3)
1696 MIPS_SYS(old_readdir
, 3)
1697 MIPS_SYS(old_mmap
, 6) /* 4090 */
1698 MIPS_SYS(sys_munmap
, 2)
1699 MIPS_SYS(sys_truncate
, 2)
1700 MIPS_SYS(sys_ftruncate
, 2)
1701 MIPS_SYS(sys_fchmod
, 2)
1702 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1703 MIPS_SYS(sys_getpriority
, 2)
1704 MIPS_SYS(sys_setpriority
, 3)
1705 MIPS_SYS(sys_ni_syscall
, 0)
1706 MIPS_SYS(sys_statfs
, 2)
1707 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1708 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1709 MIPS_SYS(sys_socketcall
, 2)
1710 MIPS_SYS(sys_syslog
, 3)
1711 MIPS_SYS(sys_setitimer
, 3)
1712 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1713 MIPS_SYS(sys_newstat
, 2)
1714 MIPS_SYS(sys_newlstat
, 2)
1715 MIPS_SYS(sys_newfstat
, 2)
1716 MIPS_SYS(sys_uname
, 1)
1717 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1718 MIPS_SYS(sys_vhangup
, 0)
1719 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1720 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1721 MIPS_SYS(sys_wait4
, 4)
1722 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1723 MIPS_SYS(sys_sysinfo
, 1)
1724 MIPS_SYS(sys_ipc
, 6)
1725 MIPS_SYS(sys_fsync
, 1)
1726 MIPS_SYS(sys_sigreturn
, 0)
1727 MIPS_SYS(sys_clone
, 6) /* 4120 */
1728 MIPS_SYS(sys_setdomainname
, 2)
1729 MIPS_SYS(sys_newuname
, 1)
1730 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1731 MIPS_SYS(sys_adjtimex
, 1)
1732 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1733 MIPS_SYS(sys_sigprocmask
, 3)
1734 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1735 MIPS_SYS(sys_init_module
, 5)
1736 MIPS_SYS(sys_delete_module
, 1)
1737 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1738 MIPS_SYS(sys_quotactl
, 0)
1739 MIPS_SYS(sys_getpgid
, 1)
1740 MIPS_SYS(sys_fchdir
, 1)
1741 MIPS_SYS(sys_bdflush
, 2)
1742 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1743 MIPS_SYS(sys_personality
, 1)
1744 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1745 MIPS_SYS(sys_setfsuid
, 1)
1746 MIPS_SYS(sys_setfsgid
, 1)
1747 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1748 MIPS_SYS(sys_getdents
, 3)
1749 MIPS_SYS(sys_select
, 5)
1750 MIPS_SYS(sys_flock
, 2)
1751 MIPS_SYS(sys_msync
, 3)
1752 MIPS_SYS(sys_readv
, 3) /* 4145 */
1753 MIPS_SYS(sys_writev
, 3)
1754 MIPS_SYS(sys_cacheflush
, 3)
1755 MIPS_SYS(sys_cachectl
, 3)
1756 MIPS_SYS(sys_sysmips
, 4)
1757 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1758 MIPS_SYS(sys_getsid
, 1)
1759 MIPS_SYS(sys_fdatasync
, 0)
1760 MIPS_SYS(sys_sysctl
, 1)
1761 MIPS_SYS(sys_mlock
, 2)
1762 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1763 MIPS_SYS(sys_mlockall
, 1)
1764 MIPS_SYS(sys_munlockall
, 0)
1765 MIPS_SYS(sys_sched_setparam
, 2)
1766 MIPS_SYS(sys_sched_getparam
, 2)
1767 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1768 MIPS_SYS(sys_sched_getscheduler
, 1)
1769 MIPS_SYS(sys_sched_yield
, 0)
1770 MIPS_SYS(sys_sched_get_priority_max
, 1)
1771 MIPS_SYS(sys_sched_get_priority_min
, 1)
1772 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1773 MIPS_SYS(sys_nanosleep
, 2)
1774 MIPS_SYS(sys_mremap
, 4)
1775 MIPS_SYS(sys_accept
, 3)
1776 MIPS_SYS(sys_bind
, 3)
1777 MIPS_SYS(sys_connect
, 3) /* 4170 */
1778 MIPS_SYS(sys_getpeername
, 3)
1779 MIPS_SYS(sys_getsockname
, 3)
1780 MIPS_SYS(sys_getsockopt
, 5)
1781 MIPS_SYS(sys_listen
, 2)
1782 MIPS_SYS(sys_recv
, 4) /* 4175 */
1783 MIPS_SYS(sys_recvfrom
, 6)
1784 MIPS_SYS(sys_recvmsg
, 3)
1785 MIPS_SYS(sys_send
, 4)
1786 MIPS_SYS(sys_sendmsg
, 3)
1787 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1788 MIPS_SYS(sys_setsockopt
, 5)
1789 MIPS_SYS(sys_shutdown
, 2)
1790 MIPS_SYS(sys_socket
, 3)
1791 MIPS_SYS(sys_socketpair
, 4)
1792 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1793 MIPS_SYS(sys_getresuid
, 3)
1794 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1795 MIPS_SYS(sys_poll
, 3)
1796 MIPS_SYS(sys_nfsservctl
, 3)
1797 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1798 MIPS_SYS(sys_getresgid
, 3)
1799 MIPS_SYS(sys_prctl
, 5)
1800 MIPS_SYS(sys_rt_sigreturn
, 0)
1801 MIPS_SYS(sys_rt_sigaction
, 4)
1802 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1803 MIPS_SYS(sys_rt_sigpending
, 2)
1804 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1805 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1806 MIPS_SYS(sys_rt_sigsuspend
, 0)
1807 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1808 MIPS_SYS(sys_pwrite64
, 6)
1809 MIPS_SYS(sys_chown
, 3)
1810 MIPS_SYS(sys_getcwd
, 2)
1811 MIPS_SYS(sys_capget
, 2)
1812 MIPS_SYS(sys_capset
, 2) /* 4205 */
1813 MIPS_SYS(sys_sigaltstack
, 0)
1814 MIPS_SYS(sys_sendfile
, 4)
1815 MIPS_SYS(sys_ni_syscall
, 0)
1816 MIPS_SYS(sys_ni_syscall
, 0)
1817 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1818 MIPS_SYS(sys_truncate64
, 4)
1819 MIPS_SYS(sys_ftruncate64
, 4)
1820 MIPS_SYS(sys_stat64
, 2)
1821 MIPS_SYS(sys_lstat64
, 2)
1822 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1823 MIPS_SYS(sys_pivot_root
, 2)
1824 MIPS_SYS(sys_mincore
, 3)
1825 MIPS_SYS(sys_madvise
, 3)
1826 MIPS_SYS(sys_getdents64
, 3)
1827 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1828 MIPS_SYS(sys_ni_syscall
, 0)
1829 MIPS_SYS(sys_gettid
, 0)
1830 MIPS_SYS(sys_readahead
, 5)
1831 MIPS_SYS(sys_setxattr
, 5)
1832 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1833 MIPS_SYS(sys_fsetxattr
, 5)
1834 MIPS_SYS(sys_getxattr
, 4)
1835 MIPS_SYS(sys_lgetxattr
, 4)
1836 MIPS_SYS(sys_fgetxattr
, 4)
1837 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1838 MIPS_SYS(sys_llistxattr
, 3)
1839 MIPS_SYS(sys_flistxattr
, 3)
1840 MIPS_SYS(sys_removexattr
, 2)
1841 MIPS_SYS(sys_lremovexattr
, 2)
1842 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1843 MIPS_SYS(sys_tkill
, 2)
1844 MIPS_SYS(sys_sendfile64
, 5)
1845 MIPS_SYS(sys_futex
, 2)
1846 MIPS_SYS(sys_sched_setaffinity
, 3)
1847 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1848 MIPS_SYS(sys_io_setup
, 2)
1849 MIPS_SYS(sys_io_destroy
, 1)
1850 MIPS_SYS(sys_io_getevents
, 5)
1851 MIPS_SYS(sys_io_submit
, 3)
1852 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1853 MIPS_SYS(sys_exit_group
, 1)
1854 MIPS_SYS(sys_lookup_dcookie
, 3)
1855 MIPS_SYS(sys_epoll_create
, 1)
1856 MIPS_SYS(sys_epoll_ctl
, 4)
1857 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1858 MIPS_SYS(sys_remap_file_pages
, 5)
1859 MIPS_SYS(sys_set_tid_address
, 1)
1860 MIPS_SYS(sys_restart_syscall
, 0)
1861 MIPS_SYS(sys_fadvise64_64
, 7)
1862 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1863 MIPS_SYS(sys_fstatfs64
, 2)
1864 MIPS_SYS(sys_timer_create
, 3)
1865 MIPS_SYS(sys_timer_settime
, 4)
1866 MIPS_SYS(sys_timer_gettime
, 2)
1867 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1868 MIPS_SYS(sys_timer_delete
, 1)
1869 MIPS_SYS(sys_clock_settime
, 2)
1870 MIPS_SYS(sys_clock_gettime
, 2)
1871 MIPS_SYS(sys_clock_getres
, 2)
1872 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1873 MIPS_SYS(sys_tgkill
, 3)
1874 MIPS_SYS(sys_utimes
, 2)
1875 MIPS_SYS(sys_mbind
, 4)
1876 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1877 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1878 MIPS_SYS(sys_mq_open
, 4)
1879 MIPS_SYS(sys_mq_unlink
, 1)
1880 MIPS_SYS(sys_mq_timedsend
, 5)
1881 MIPS_SYS(sys_mq_timedreceive
, 5)
1882 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1883 MIPS_SYS(sys_mq_getsetattr
, 3)
1884 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1885 MIPS_SYS(sys_waitid
, 4)
1886 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1887 MIPS_SYS(sys_add_key
, 5)
1888 MIPS_SYS(sys_request_key
, 4)
1889 MIPS_SYS(sys_keyctl
, 5)
1890 MIPS_SYS(sys_set_thread_area
, 1)
1891 MIPS_SYS(sys_inotify_init
, 0)
1892 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1893 MIPS_SYS(sys_inotify_rm_watch
, 2)
1894 MIPS_SYS(sys_migrate_pages
, 4)
1895 MIPS_SYS(sys_openat
, 4)
1896 MIPS_SYS(sys_mkdirat
, 3)
1897 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1898 MIPS_SYS(sys_fchownat
, 5)
1899 MIPS_SYS(sys_futimesat
, 3)
1900 MIPS_SYS(sys_fstatat64
, 4)
1901 MIPS_SYS(sys_unlinkat
, 3)
1902 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1903 MIPS_SYS(sys_linkat
, 5)
1904 MIPS_SYS(sys_symlinkat
, 3)
1905 MIPS_SYS(sys_readlinkat
, 4)
1906 MIPS_SYS(sys_fchmodat
, 3)
1907 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1908 MIPS_SYS(sys_pselect6
, 6)
1909 MIPS_SYS(sys_ppoll
, 5)
1910 MIPS_SYS(sys_unshare
, 1)
1911 MIPS_SYS(sys_splice
, 4)
1912 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1913 MIPS_SYS(sys_tee
, 4)
1914 MIPS_SYS(sys_vmsplice
, 4)
1915 MIPS_SYS(sys_move_pages
, 6)
1916 MIPS_SYS(sys_set_robust_list
, 2)
1917 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1918 MIPS_SYS(sys_kexec_load
, 4)
1919 MIPS_SYS(sys_getcpu
, 3)
1920 MIPS_SYS(sys_epoll_pwait
, 6)
1921 MIPS_SYS(sys_ioprio_set
, 3)
1922 MIPS_SYS(sys_ioprio_get
, 2)
1927 static int do_store_exclusive(CPUMIPSState
*env
)
1930 target_ulong page_addr
;
1938 page_addr
= addr
& TARGET_PAGE_MASK
;
1941 flags
= page_get_flags(page_addr
);
1942 if ((flags
& PAGE_READ
) == 0) {
1945 reg
= env
->llreg
& 0x1f;
1946 d
= (env
->llreg
& 0x20) != 0;
1948 segv
= get_user_s64(val
, addr
);
1950 segv
= get_user_s32(val
, addr
);
1953 if (val
!= env
->llval
) {
1954 env
->active_tc
.gpr
[reg
] = 0;
1957 segv
= put_user_u64(env
->llnewval
, addr
);
1959 segv
= put_user_u32(env
->llnewval
, addr
);
1962 env
->active_tc
.gpr
[reg
] = 1;
1969 env
->active_tc
.PC
+= 4;
1976 void cpu_loop(CPUMIPSState
*env
)
1978 target_siginfo_t info
;
1980 unsigned int syscall_num
;
1983 cpu_exec_start(env
);
1984 trapnr
= cpu_mips_exec(env
);
1988 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
1989 env
->active_tc
.PC
+= 4;
1990 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1995 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1997 nb_args
= mips_syscall_args
[syscall_num
];
1998 sp_reg
= env
->active_tc
.gpr
[29];
2000 /* these arguments are taken from the stack */
2001 /* FIXME - what to do if get_user() fails? */
2002 case 8: get_user_ual(arg8
, sp_reg
+ 28);
2003 case 7: get_user_ual(arg7
, sp_reg
+ 24);
2004 case 6: get_user_ual(arg6
, sp_reg
+ 20);
2005 case 5: get_user_ual(arg5
, sp_reg
+ 16);
2009 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2010 env
->active_tc
.gpr
[4],
2011 env
->active_tc
.gpr
[5],
2012 env
->active_tc
.gpr
[6],
2013 env
->active_tc
.gpr
[7],
2014 arg5
, arg6
/*, arg7, arg8*/);
2016 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2017 /* Returning from a successful sigreturn syscall.
2018 Avoid clobbering register state. */
2021 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
2022 env
->active_tc
.gpr
[7] = 1; /* error flag */
2025 env
->active_tc
.gpr
[7] = 0; /* error flag */
2027 env
->active_tc
.gpr
[2] = ret
;
2031 info
.si_signo
= TARGET_SIGSEGV
;
2033 /* XXX: check env->error_code */
2034 info
.si_code
= TARGET_SEGV_MAPERR
;
2035 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2036 queue_signal(env
, info
.si_signo
, &info
);
2040 info
.si_signo
= TARGET_SIGILL
;
2043 queue_signal(env
, info
.si_signo
, &info
);
2045 case EXCP_INTERRUPT
:
2046 /* just indicate that signals should be handled asap */
2052 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2055 info
.si_signo
= sig
;
2057 info
.si_code
= TARGET_TRAP_BRKPT
;
2058 queue_signal(env
, info
.si_signo
, &info
);
2063 if (do_store_exclusive(env
)) {
2064 info
.si_signo
= TARGET_SIGSEGV
;
2066 info
.si_code
= TARGET_SEGV_MAPERR
;
2067 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2068 queue_signal(env
, info
.si_signo
, &info
);
2073 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2075 cpu_dump_state(env
, stderr
, fprintf
, 0);
2078 process_pending_signals(env
);
2084 void cpu_loop (CPUState
*env
)
2087 target_siginfo_t info
;
2090 trapnr
= cpu_sh4_exec (env
);
2095 ret
= do_syscall(env
,
2103 env
->gregs
[0] = ret
;
2105 case EXCP_INTERRUPT
:
2106 /* just indicate that signals should be handled asap */
2112 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2115 info
.si_signo
= sig
;
2117 info
.si_code
= TARGET_TRAP_BRKPT
;
2118 queue_signal(env
, info
.si_signo
, &info
);
2124 info
.si_signo
= SIGSEGV
;
2126 info
.si_code
= TARGET_SEGV_MAPERR
;
2127 info
._sifields
._sigfault
._addr
= env
->tea
;
2128 queue_signal(env
, info
.si_signo
, &info
);
2132 printf ("Unhandled trap: 0x%x\n", trapnr
);
2133 cpu_dump_state(env
, stderr
, fprintf
, 0);
2136 process_pending_signals (env
);
2142 void cpu_loop (CPUState
*env
)
2145 target_siginfo_t info
;
2148 trapnr
= cpu_cris_exec (env
);
2152 info
.si_signo
= SIGSEGV
;
2154 /* XXX: check env->error_code */
2155 info
.si_code
= TARGET_SEGV_MAPERR
;
2156 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2157 queue_signal(env
, info
.si_signo
, &info
);
2160 case EXCP_INTERRUPT
:
2161 /* just indicate that signals should be handled asap */
2164 ret
= do_syscall(env
,
2172 env
->regs
[10] = ret
;
2178 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2181 info
.si_signo
= sig
;
2183 info
.si_code
= TARGET_TRAP_BRKPT
;
2184 queue_signal(env
, info
.si_signo
, &info
);
2189 printf ("Unhandled trap: 0x%x\n", trapnr
);
2190 cpu_dump_state(env
, stderr
, fprintf
, 0);
2193 process_pending_signals (env
);
2198 #ifdef TARGET_MICROBLAZE
2199 void cpu_loop (CPUState
*env
)
2202 target_siginfo_t info
;
2205 trapnr
= cpu_mb_exec (env
);
2209 info
.si_signo
= SIGSEGV
;
2211 /* XXX: check env->error_code */
2212 info
.si_code
= TARGET_SEGV_MAPERR
;
2213 info
._sifields
._sigfault
._addr
= 0;
2214 queue_signal(env
, info
.si_signo
, &info
);
2217 case EXCP_INTERRUPT
:
2218 /* just indicate that signals should be handled asap */
2221 /* Return address is 4 bytes after the call. */
2223 ret
= do_syscall(env
,
2232 env
->sregs
[SR_PC
] = env
->regs
[14];
2238 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2241 info
.si_signo
= sig
;
2243 info
.si_code
= TARGET_TRAP_BRKPT
;
2244 queue_signal(env
, info
.si_signo
, &info
);
2249 printf ("Unhandled trap: 0x%x\n", trapnr
);
2250 cpu_dump_state(env
, stderr
, fprintf
, 0);
2253 process_pending_signals (env
);
2260 void cpu_loop(CPUM68KState
*env
)
2264 target_siginfo_t info
;
2265 TaskState
*ts
= env
->opaque
;
2268 trapnr
= cpu_m68k_exec(env
);
2272 if (ts
->sim_syscalls
) {
2274 nr
= lduw(env
->pc
+ 2);
2276 do_m68k_simcall(env
, nr
);
2282 case EXCP_HALT_INSN
:
2283 /* Semihosing syscall. */
2285 do_m68k_semihosting(env
, env
->dregs
[0]);
2289 case EXCP_UNSUPPORTED
:
2291 info
.si_signo
= SIGILL
;
2293 info
.si_code
= TARGET_ILL_ILLOPN
;
2294 info
._sifields
._sigfault
._addr
= env
->pc
;
2295 queue_signal(env
, info
.si_signo
, &info
);
2299 ts
->sim_syscalls
= 0;
2302 env
->dregs
[0] = do_syscall(env
,
2312 case EXCP_INTERRUPT
:
2313 /* just indicate that signals should be handled asap */
2317 info
.si_signo
= SIGSEGV
;
2319 /* XXX: check env->error_code */
2320 info
.si_code
= TARGET_SEGV_MAPERR
;
2321 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2322 queue_signal(env
, info
.si_signo
, &info
);
2329 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2332 info
.si_signo
= sig
;
2334 info
.si_code
= TARGET_TRAP_BRKPT
;
2335 queue_signal(env
, info
.si_signo
, &info
);
2340 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2342 cpu_dump_state(env
, stderr
, fprintf
, 0);
2345 process_pending_signals(env
);
2348 #endif /* TARGET_M68K */
2351 void cpu_loop (CPUState
*env
)
2354 target_siginfo_t info
;
2358 trapnr
= cpu_alpha_exec (env
);
2362 fprintf(stderr
, "Reset requested. Exit\n");
2366 fprintf(stderr
, "Machine check exception. Exit\n");
2370 info
.si_signo
= TARGET_SIGFPE
;
2372 info
.si_code
= TARGET_FPE_FLTINV
;
2373 info
._sifields
._sigfault
._addr
= env
->pc
;
2374 queue_signal(env
, info
.si_signo
, &info
);
2376 case EXCP_HW_INTERRUPT
:
2377 fprintf(stderr
, "External interrupt. Exit\n");
2381 info
.si_signo
= TARGET_SIGSEGV
;
2383 info
.si_code
= 0; /* ??? SEGV_MAPERR vs SEGV_ACCERR. */
2384 info
._sifields
._sigfault
._addr
= env
->pc
;
2385 queue_signal(env
, info
.si_signo
, &info
);
2387 case EXCP_DTB_MISS_PAL
:
2388 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2392 fprintf(stderr
, "MMU instruction TLB miss\n");
2396 fprintf(stderr
, "MMU instruction access violation\n");
2399 case EXCP_DTB_MISS_NATIVE
:
2400 fprintf(stderr
, "MMU data TLB miss\n");
2404 info
.si_signo
= TARGET_SIGBUS
;
2406 info
.si_code
= TARGET_BUS_ADRALN
;
2407 info
._sifields
._sigfault
._addr
= env
->pc
;
2408 queue_signal(env
, info
.si_signo
, &info
);
2412 info
.si_signo
= TARGET_SIGILL
;
2414 info
.si_code
= TARGET_ILL_ILLOPC
;
2415 info
._sifields
._sigfault
._addr
= env
->pc
;
2416 queue_signal(env
, info
.si_signo
, &info
);
2419 /* No-op. Linux simply re-enables the FPU. */
2421 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2422 switch ((trapnr
>> 6) | 0x80) {
2425 info
.si_signo
= TARGET_SIGTRAP
;
2427 info
.si_code
= TARGET_TRAP_BRKPT
;
2428 info
._sifields
._sigfault
._addr
= env
->pc
;
2429 queue_signal(env
, info
.si_signo
, &info
);
2433 info
.si_signo
= TARGET_SIGTRAP
;
2436 info
._sifields
._sigfault
._addr
= env
->pc
;
2437 queue_signal(env
, info
.si_signo
, &info
);
2441 trapnr
= env
->ir
[IR_V0
];
2442 sysret
= do_syscall(env
, trapnr
,
2443 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2444 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2445 env
->ir
[IR_A4
], env
->ir
[IR_A5
]);
2446 if (trapnr
!= TARGET_NR_sigreturn
2447 && trapnr
!= TARGET_NR_rt_sigreturn
) {
2448 env
->ir
[IR_V0
] = (sysret
< 0 ? -sysret
: sysret
);
2449 env
->ir
[IR_A3
] = (sysret
< 0);
2454 /* ??? We can probably elide the code using page_unprotect
2455 that is checking for self-modifying code. Instead we
2456 could simply call tb_flush here. Until we work out the
2457 changes required to turn off the extra write protection,
2458 this can be a no-op. */
2462 /* Handled in the translator for usermode. */
2466 /* Handled in the translator for usermode. */
2470 info
.si_signo
= TARGET_SIGFPE
;
2471 switch (env
->ir
[IR_A0
]) {
2472 case TARGET_GEN_INTOVF
:
2473 info
.si_code
= TARGET_FPE_INTOVF
;
2475 case TARGET_GEN_INTDIV
:
2476 info
.si_code
= TARGET_FPE_INTDIV
;
2478 case TARGET_GEN_FLTOVF
:
2479 info
.si_code
= TARGET_FPE_FLTOVF
;
2481 case TARGET_GEN_FLTUND
:
2482 info
.si_code
= TARGET_FPE_FLTUND
;
2484 case TARGET_GEN_FLTINV
:
2485 info
.si_code
= TARGET_FPE_FLTINV
;
2487 case TARGET_GEN_FLTINE
:
2488 info
.si_code
= TARGET_FPE_FLTRES
;
2490 case TARGET_GEN_ROPRAND
:
2494 info
.si_signo
= TARGET_SIGTRAP
;
2499 info
._sifields
._sigfault
._addr
= env
->pc
;
2500 queue_signal(env
, info
.si_signo
, &info
);
2506 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2509 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2510 if (info
.si_signo
) {
2512 info
.si_code
= TARGET_TRAP_BRKPT
;
2513 queue_signal(env
, info
.si_signo
, &info
);
2517 printf ("Unhandled trap: 0x%x\n", trapnr
);
2518 cpu_dump_state(env
, stderr
, fprintf
, 0);
2521 process_pending_signals (env
);
2524 #endif /* TARGET_ALPHA */
2526 static void usage(void)
2528 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2529 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2530 "Linux CPU emulator (compiled for %s emulation)\n"
2532 "Standard options:\n"
2533 "-h print this help\n"
2534 "-g port wait gdb connection to port\n"
2535 "-L path set the elf interpreter prefix (default=%s)\n"
2536 "-s size set the stack size in bytes (default=%ld)\n"
2537 "-cpu model select CPU (-cpu ? for list)\n"
2538 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2539 "-E var=value sets/modifies targets environment variable(s)\n"
2540 "-U var unsets targets environment variable(s)\n"
2541 "-0 argv0 forces target process argv[0] to be argv0\n"
2542 #if defined(CONFIG_USE_GUEST_BASE)
2543 "-B address set guest_base address to address\n"
2547 "-d options activate log (logfile=%s)\n"
2548 "-p pagesize set the host page size to 'pagesize'\n"
2549 "-singlestep always run in singlestep mode\n"
2550 "-strace log system calls\n"
2552 "Environment variables:\n"
2553 "QEMU_STRACE Print system calls and arguments similar to the\n"
2554 " 'strace' program. Enable by setting to any value.\n"
2555 "You can use -E and -U options to set/unset environment variables\n"
2556 "for target process. It is possible to provide several variables\n"
2557 "by repeating the option. For example:\n"
2558 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2559 "Note that if you provide several changes to single variable\n"
2560 "last change will stay in effect.\n"
2569 THREAD CPUState
*thread_env
;
2571 void task_settid(TaskState
*ts
)
2573 if (ts
->ts_tid
== 0) {
2574 #ifdef CONFIG_USE_NPTL
2575 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
2577 /* when no threads are used, tid becomes pid */
2578 ts
->ts_tid
= getpid();
2583 void stop_all_tasks(void)
2586 * We trust that when using NPTL, start_exclusive()
2587 * handles thread stopping correctly.
2592 /* Assumes contents are already zeroed. */
2593 void init_task_state(TaskState
*ts
)
2598 ts
->first_free
= ts
->sigqueue_table
;
2599 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2600 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2602 ts
->sigqueue_table
[i
].next
= NULL
;
2605 int main(int argc
, char **argv
, char **envp
)
2607 const char *filename
;
2608 const char *cpu_model
;
2609 struct target_pt_regs regs1
, *regs
= ®s1
;
2610 struct image_info info1
, *info
= &info1
;
2611 struct linux_binprm bprm
;
2612 TaskState ts1
, *ts
= &ts1
;
2616 int gdbstub_port
= 0;
2617 char **target_environ
, **wrk
;
2620 envlist_t
*envlist
= NULL
;
2621 const char *argv0
= NULL
;
2628 qemu_cache_utils_init(envp
);
2631 cpu_set_log_filename(DEBUG_LOGFILE
);
2633 if ((envlist
= envlist_create()) == NULL
) {
2634 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2638 /* add current environment into the list */
2639 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
2640 (void) envlist_setenv(envlist
, *wrk
);
2643 /* Read the stack limit from the kernel. If it's "unlimited",
2644 then we can do little else besides use the default. */
2647 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
2648 && lim
.rlim_cur
!= RLIM_INFINITY
) {
2649 guest_stack_size
= lim
.rlim_cur
;
2654 #if defined(cpudef_setup)
2655 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
2667 if (!strcmp(r
, "-")) {
2669 } else if (!strcmp(r
, "d")) {
2671 const CPULogItem
*item
;
2677 mask
= cpu_str_to_log_mask(r
);
2679 printf("Log items (comma separated):\n");
2680 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2681 printf("%-10s %s\n", item
->name
, item
->help
);
2686 } else if (!strcmp(r
, "E")) {
2688 if (envlist_setenv(envlist
, r
) != 0)
2690 } else if (!strcmp(r
, "U")) {
2692 if (envlist_unsetenv(envlist
, r
) != 0)
2694 } else if (!strcmp(r
, "0")) {
2697 } else if (!strcmp(r
, "s")) {
2701 guest_stack_size
= strtoul(r
, (char **)&r
, 0);
2702 if (guest_stack_size
== 0)
2705 guest_stack_size
*= 1024 * 1024;
2706 else if (*r
== 'k' || *r
== 'K')
2707 guest_stack_size
*= 1024;
2708 } else if (!strcmp(r
, "L")) {
2709 interp_prefix
= argv
[optind
++];
2710 } else if (!strcmp(r
, "p")) {
2713 qemu_host_page_size
= atoi(argv
[optind
++]);
2714 if (qemu_host_page_size
== 0 ||
2715 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2716 fprintf(stderr
, "page size must be a power of two\n");
2719 } else if (!strcmp(r
, "g")) {
2722 gdbstub_port
= atoi(argv
[optind
++]);
2723 } else if (!strcmp(r
, "r")) {
2724 qemu_uname_release
= argv
[optind
++];
2725 } else if (!strcmp(r
, "cpu")) {
2726 cpu_model
= argv
[optind
++];
2727 if (cpu_model
== NULL
|| strcmp(cpu_model
, "?") == 0) {
2728 /* XXX: implement xxx_cpu_list for targets that still miss it */
2729 #if defined(cpu_list_id)
2730 cpu_list_id(stdout
, &fprintf
, "");
2734 #if defined(CONFIG_USE_GUEST_BASE)
2735 } else if (!strcmp(r
, "B")) {
2736 guest_base
= strtol(argv
[optind
++], NULL
, 0);
2737 have_guest_base
= 1;
2739 } else if (!strcmp(r
, "drop-ld-preload")) {
2740 (void) envlist_unsetenv(envlist
, "LD_PRELOAD");
2741 } else if (!strcmp(r
, "singlestep")) {
2743 } else if (!strcmp(r
, "strace")) {
2752 filename
= argv
[optind
];
2753 exec_path
= argv
[optind
];
2756 memset(regs
, 0, sizeof(struct target_pt_regs
));
2758 /* Zero out image_info */
2759 memset(info
, 0, sizeof(struct image_info
));
2761 memset(&bprm
, 0, sizeof (bprm
));
2763 /* Scan interp_prefix dir for replacement files. */
2764 init_paths(interp_prefix
);
2766 if (cpu_model
== NULL
) {
2767 #if defined(TARGET_I386)
2768 #ifdef TARGET_X86_64
2769 cpu_model
= "qemu64";
2771 cpu_model
= "qemu32";
2773 #elif defined(TARGET_ARM)
2775 #elif defined(TARGET_M68K)
2777 #elif defined(TARGET_SPARC)
2778 #ifdef TARGET_SPARC64
2779 cpu_model
= "TI UltraSparc II";
2781 cpu_model
= "Fujitsu MB86904";
2783 #elif defined(TARGET_MIPS)
2784 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2789 #elif defined(TARGET_PPC)
2791 cpu_model
= "970fx";
2799 cpu_exec_init_all(0);
2800 /* NOTE: we need to init the CPU at this stage to get
2801 qemu_host_page_size */
2802 env
= cpu_init(cpu_model
);
2804 fprintf(stderr
, "Unable to find CPU definition\n");
2807 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
2813 if (getenv("QEMU_STRACE")) {
2817 target_environ
= envlist_to_environ(envlist
, NULL
);
2818 envlist_free(envlist
);
2820 #if defined(CONFIG_USE_GUEST_BASE)
2822 * Now that page sizes are configured in cpu_init() we can do
2823 * proper page alignment for guest_base.
2825 guest_base
= HOST_PAGE_ALIGN(guest_base
);
2826 #endif /* CONFIG_USE_GUEST_BASE */
2829 * Read in mmap_min_addr kernel parameter. This value is used
2830 * When loading the ELF image to determine whether guest_base
2831 * is needed. It is also used in mmap_find_vma.
2836 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
2838 if (fscanf(fp
, "%lu", &tmp
) == 1) {
2839 mmap_min_addr
= tmp
;
2840 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
2847 * Prepare copy of argv vector for target.
2849 target_argc
= argc
- optind
;
2850 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
2851 if (target_argv
== NULL
) {
2852 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
2857 * If argv0 is specified (using '-0' switch) we replace
2858 * argv[0] pointer with the given one.
2861 if (argv0
!= NULL
) {
2862 target_argv
[i
++] = strdup(argv0
);
2864 for (; i
< target_argc
; i
++) {
2865 target_argv
[i
] = strdup(argv
[optind
+ i
]);
2867 target_argv
[target_argc
] = NULL
;
2869 memset(ts
, 0, sizeof(TaskState
));
2870 init_task_state(ts
);
2871 /* build Task State */
2877 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
2880 printf("Error %d while loading %s\n", ret
, filename
);
2884 for (i
= 0; i
< target_argc
; i
++) {
2885 free(target_argv
[i
]);
2889 for (wrk
= target_environ
; *wrk
; wrk
++) {
2893 free(target_environ
);
2895 if (qemu_log_enabled()) {
2896 #if defined(CONFIG_USE_GUEST_BASE)
2897 qemu_log("guest_base 0x%lx\n", guest_base
);
2901 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2902 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2903 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
2905 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
2907 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2908 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2910 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2911 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2914 target_set_brk(info
->brk
);
2918 #if defined(TARGET_I386)
2919 cpu_x86_set_cpl(env
, 3);
2921 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2922 env
->hflags
|= HF_PE_MASK
;
2923 if (env
->cpuid_features
& CPUID_SSE
) {
2924 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2925 env
->hflags
|= HF_OSFXSR_MASK
;
2927 #ifndef TARGET_ABI32
2928 /* enable 64 bit mode if possible */
2929 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2930 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2933 env
->cr
[4] |= CR4_PAE_MASK
;
2934 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2935 env
->hflags
|= HF_LMA_MASK
;
2938 /* flags setup : we activate the IRQs by default as in user mode */
2939 env
->eflags
|= IF_MASK
;
2941 /* linux register setup */
2942 #ifndef TARGET_ABI32
2943 env
->regs
[R_EAX
] = regs
->rax
;
2944 env
->regs
[R_EBX
] = regs
->rbx
;
2945 env
->regs
[R_ECX
] = regs
->rcx
;
2946 env
->regs
[R_EDX
] = regs
->rdx
;
2947 env
->regs
[R_ESI
] = regs
->rsi
;
2948 env
->regs
[R_EDI
] = regs
->rdi
;
2949 env
->regs
[R_EBP
] = regs
->rbp
;
2950 env
->regs
[R_ESP
] = regs
->rsp
;
2951 env
->eip
= regs
->rip
;
2953 env
->regs
[R_EAX
] = regs
->eax
;
2954 env
->regs
[R_EBX
] = regs
->ebx
;
2955 env
->regs
[R_ECX
] = regs
->ecx
;
2956 env
->regs
[R_EDX
] = regs
->edx
;
2957 env
->regs
[R_ESI
] = regs
->esi
;
2958 env
->regs
[R_EDI
] = regs
->edi
;
2959 env
->regs
[R_EBP
] = regs
->ebp
;
2960 env
->regs
[R_ESP
] = regs
->esp
;
2961 env
->eip
= regs
->eip
;
2964 /* linux interrupt setup */
2965 #ifndef TARGET_ABI32
2966 env
->idt
.limit
= 511;
2968 env
->idt
.limit
= 255;
2970 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
2971 PROT_READ
|PROT_WRITE
,
2972 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2973 idt_table
= g2h(env
->idt
.base
);
2996 /* linux segment setup */
2998 uint64_t *gdt_table
;
2999 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3000 PROT_READ
|PROT_WRITE
,
3001 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3002 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3003 gdt_table
= g2h(env
->gdt
.base
);
3005 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3006 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3007 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3009 /* 64 bit code segment */
3010 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3011 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3013 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3015 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3016 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3017 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3019 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3020 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3022 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3023 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3024 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3025 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3026 /* This hack makes Wine work... */
3027 env
->segs
[R_FS
].selector
= 0;
3029 cpu_x86_load_seg(env
, R_DS
, 0);
3030 cpu_x86_load_seg(env
, R_ES
, 0);
3031 cpu_x86_load_seg(env
, R_FS
, 0);
3032 cpu_x86_load_seg(env
, R_GS
, 0);
3034 #elif defined(TARGET_ARM)
3037 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3038 for(i
= 0; i
< 16; i
++) {
3039 env
->regs
[i
] = regs
->uregs
[i
];
3042 #elif defined(TARGET_SPARC)
3046 env
->npc
= regs
->npc
;
3048 for(i
= 0; i
< 8; i
++)
3049 env
->gregs
[i
] = regs
->u_regs
[i
];
3050 for(i
= 0; i
< 8; i
++)
3051 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3053 #elif defined(TARGET_PPC)
3057 #if defined(TARGET_PPC64)
3058 #if defined(TARGET_ABI32)
3059 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3061 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3064 env
->nip
= regs
->nip
;
3065 for(i
= 0; i
< 32; i
++) {
3066 env
->gpr
[i
] = regs
->gpr
[i
];
3069 #elif defined(TARGET_M68K)
3072 env
->dregs
[0] = regs
->d0
;
3073 env
->dregs
[1] = regs
->d1
;
3074 env
->dregs
[2] = regs
->d2
;
3075 env
->dregs
[3] = regs
->d3
;
3076 env
->dregs
[4] = regs
->d4
;
3077 env
->dregs
[5] = regs
->d5
;
3078 env
->dregs
[6] = regs
->d6
;
3079 env
->dregs
[7] = regs
->d7
;
3080 env
->aregs
[0] = regs
->a0
;
3081 env
->aregs
[1] = regs
->a1
;
3082 env
->aregs
[2] = regs
->a2
;
3083 env
->aregs
[3] = regs
->a3
;
3084 env
->aregs
[4] = regs
->a4
;
3085 env
->aregs
[5] = regs
->a5
;
3086 env
->aregs
[6] = regs
->a6
;
3087 env
->aregs
[7] = regs
->usp
;
3089 ts
->sim_syscalls
= 1;
3091 #elif defined(TARGET_MICROBLAZE)
3093 env
->regs
[0] = regs
->r0
;
3094 env
->regs
[1] = regs
->r1
;
3095 env
->regs
[2] = regs
->r2
;
3096 env
->regs
[3] = regs
->r3
;
3097 env
->regs
[4] = regs
->r4
;
3098 env
->regs
[5] = regs
->r5
;
3099 env
->regs
[6] = regs
->r6
;
3100 env
->regs
[7] = regs
->r7
;
3101 env
->regs
[8] = regs
->r8
;
3102 env
->regs
[9] = regs
->r9
;
3103 env
->regs
[10] = regs
->r10
;
3104 env
->regs
[11] = regs
->r11
;
3105 env
->regs
[12] = regs
->r12
;
3106 env
->regs
[13] = regs
->r13
;
3107 env
->regs
[14] = regs
->r14
;
3108 env
->regs
[15] = regs
->r15
;
3109 env
->regs
[16] = regs
->r16
;
3110 env
->regs
[17] = regs
->r17
;
3111 env
->regs
[18] = regs
->r18
;
3112 env
->regs
[19] = regs
->r19
;
3113 env
->regs
[20] = regs
->r20
;
3114 env
->regs
[21] = regs
->r21
;
3115 env
->regs
[22] = regs
->r22
;
3116 env
->regs
[23] = regs
->r23
;
3117 env
->regs
[24] = regs
->r24
;
3118 env
->regs
[25] = regs
->r25
;
3119 env
->regs
[26] = regs
->r26
;
3120 env
->regs
[27] = regs
->r27
;
3121 env
->regs
[28] = regs
->r28
;
3122 env
->regs
[29] = regs
->r29
;
3123 env
->regs
[30] = regs
->r30
;
3124 env
->regs
[31] = regs
->r31
;
3125 env
->sregs
[SR_PC
] = regs
->pc
;
3127 #elif defined(TARGET_MIPS)
3131 for(i
= 0; i
< 32; i
++) {
3132 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3134 env
->active_tc
.PC
= regs
->cp0_epc
;
3136 #elif defined(TARGET_SH4)
3140 for(i
= 0; i
< 16; i
++) {
3141 env
->gregs
[i
] = regs
->regs
[i
];
3145 #elif defined(TARGET_ALPHA)
3149 for(i
= 0; i
< 28; i
++) {
3150 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3152 env
->ir
[IR_SP
] = regs
->usp
;
3155 #elif defined(TARGET_CRIS)
3157 env
->regs
[0] = regs
->r0
;
3158 env
->regs
[1] = regs
->r1
;
3159 env
->regs
[2] = regs
->r2
;
3160 env
->regs
[3] = regs
->r3
;
3161 env
->regs
[4] = regs
->r4
;
3162 env
->regs
[5] = regs
->r5
;
3163 env
->regs
[6] = regs
->r6
;
3164 env
->regs
[7] = regs
->r7
;
3165 env
->regs
[8] = regs
->r8
;
3166 env
->regs
[9] = regs
->r9
;
3167 env
->regs
[10] = regs
->r10
;
3168 env
->regs
[11] = regs
->r11
;
3169 env
->regs
[12] = regs
->r12
;
3170 env
->regs
[13] = regs
->r13
;
3171 env
->regs
[14] = info
->start_stack
;
3172 env
->regs
[15] = regs
->acr
;
3173 env
->pc
= regs
->erp
;
3176 #error unsupported target CPU
3179 #if defined(TARGET_ARM) || defined(TARGET_M68K)
3180 ts
->stack_base
= info
->start_stack
;
3181 ts
->heap_base
= info
->brk
;
3182 /* This will be filled in on the first SYS_HEAPINFO call. */
3187 gdbserver_start (gdbstub_port
);
3188 gdb_handlesig(env
, 0);