]> git.proxmox.com Git - mirror_qemu.git/blob - linux-user/main.c
projects / mirror_qemu.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Make signal queues per thread.
[mirror_qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29
30 #define DEBUG_LOGFILE "/tmp/qemu.log"
31
32 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
33 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
34
35 #if defined(__i386__) && !defined(CONFIG_STATIC)
36 /* Force usage of an ELF interpreter even if it is an ELF shared
37 object ! */
38 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
39 #endif
40
41 /* for recent libc, we add these dummy symbols which are not declared
42 when generating a linked object (bug in ld ?) */
43 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
44 asm(".globl __preinit_array_start\n"
45 ".globl __preinit_array_end\n"
46 ".globl __init_array_start\n"
47 ".globl __init_array_end\n"
48 ".globl __fini_array_start\n"
49 ".globl __fini_array_end\n"
50 ".section \".rodata\"\n"
51 "__preinit_array_start:\n"
52 "__preinit_array_end:\n"
53 "__init_array_start:\n"
54 "__init_array_end:\n"
55 "__fini_array_start:\n"
56 "__fini_array_end:\n"
57 ".long 0\n"
58 ".previous\n");
59 #endif
60
61 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
62 we allocate a bigger stack. Need a better solution, for example
63 by remapping the process stack directly at the right place */
64 unsigned long x86_stack_size = 512 * 1024;
65
66 void gemu_log(const char *fmt, ...)
67 {
68 va_list ap;
69
70 va_start(ap, fmt);
71 vfprintf(stderr, fmt, ap);
72 va_end(ap);
73 }
74
75 void cpu_outb(CPUState *env, int addr, int val)
76 {
77 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
78 }
79
80 void cpu_outw(CPUState *env, int addr, int val)
81 {
82 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
83 }
84
85 void cpu_outl(CPUState *env, int addr, int val)
86 {
87 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
88 }
89
90 int cpu_inb(CPUState *env, int addr)
91 {
92 fprintf(stderr, "inb: port=0x%04x\n", addr);
93 return 0;
94 }
95
96 int cpu_inw(CPUState *env, int addr)
97 {
98 fprintf(stderr, "inw: port=0x%04x\n", addr);
99 return 0;
100 }
101
102 int cpu_inl(CPUState *env, int addr)
103 {
104 fprintf(stderr, "inl: port=0x%04x\n", addr);
105 return 0;
106 }
107
108 int cpu_get_pic_interrupt(CPUState *env)
109 {
110 return -1;
111 }
112
113 /* timers for rdtsc */
114
115 #if 0
116
117 static uint64_t emu_time;
118
119 int64_t cpu_get_real_ticks(void)
120 {
121 return emu_time++;
122 }
123
124 #endif
125
126 #ifdef TARGET_I386
127 /***********************************************************/
128 /* CPUX86 core interface */
129
130 void cpu_smm_update(CPUState *env)
131 {
132 }
133
134 uint64_t cpu_get_tsc(CPUX86State *env)
135 {
136 return cpu_get_real_ticks();
137 }
138
139 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
140 int flags)
141 {
142 unsigned int e1, e2;
143 uint32_t *p;
144 e1 = (addr << 16) | (limit & 0xffff);
145 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
146 e2 |= flags;
147 p = ptr;
148 p[0] = tswapl(e1);
149 p[1] = tswapl(e2);
150 }
151
152 #if TARGET_X86_64
153 uint64_t idt_table[512];
154
155 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
156 uint64_t addr, unsigned int sel)
157 {
158 uint32_t *p, e1, e2;
159 e1 = (addr & 0xffff) | (sel << 16);
160 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
161 p = ptr;
162 p[0] = tswap32(e1);
163 p[1] = tswap32(e2);
164 p[2] = tswap32(addr >> 32);
165 p[3] = 0;
166 }
167 /* only dpl matters as we do only user space emulation */
168 static void set_idt(int n, unsigned int dpl)
169 {
170 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
171 }
172 #else
173 uint64_t idt_table[256];
174
175 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
176 uint32_t addr, unsigned int sel)
177 {
178 uint32_t *p, e1, e2;
179 e1 = (addr & 0xffff) | (sel << 16);
180 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
181 p = ptr;
182 p[0] = tswap32(e1);
183 p[1] = tswap32(e2);
184 }
185
186 /* only dpl matters as we do only user space emulation */
187 static void set_idt(int n, unsigned int dpl)
188 {
189 set_gate(idt_table + n, 0, dpl, 0, 0);
190 }
191 #endif
192
193 void cpu_loop(CPUX86State *env)
194 {
195 int trapnr;
196 abi_ulong pc;
197 target_siginfo_t info;
198
199 for(;;) {
200 trapnr = cpu_x86_exec(env);
201 switch(trapnr) {
202 case 0x80:
203 /* linux syscall from int $0x80 */
204 env->regs[R_EAX] = do_syscall(env,
205 env->regs[R_EAX],
206 env->regs[R_EBX],
207 env->regs[R_ECX],
208 env->regs[R_EDX],
209 env->regs[R_ESI],
210 env->regs[R_EDI],
211 env->regs[R_EBP]);
212 break;
213 #ifndef TARGET_ABI32
214 case EXCP_SYSCALL:
215 /* linux syscall from syscall intruction */
216 env->regs[R_EAX] = do_syscall(env,
217 env->regs[R_EAX],
218 env->regs[R_EDI],
219 env->regs[R_ESI],
220 env->regs[R_EDX],
221 env->regs[10],
222 env->regs[8],
223 env->regs[9]);
224 env->eip = env->exception_next_eip;
225 break;
226 #endif
227 case EXCP0B_NOSEG:
228 case EXCP0C_STACK:
229 info.si_signo = SIGBUS;
230 info.si_errno = 0;
231 info.si_code = TARGET_SI_KERNEL;
232 info._sifields._sigfault._addr = 0;
233 queue_signal(env, info.si_signo, &info);
234 break;
235 case EXCP0D_GPF:
236 /* XXX: potential problem if ABI32 */
237 #ifndef TARGET_X86_64
238 if (env->eflags & VM_MASK) {
239 handle_vm86_fault(env);
240 } else
241 #endif
242 {
243 info.si_signo = SIGSEGV;
244 info.si_errno = 0;
245 info.si_code = TARGET_SI_KERNEL;
246 info._sifields._sigfault._addr = 0;
247 queue_signal(env, info.si_signo, &info);
248 }
249 break;
250 case EXCP0E_PAGE:
251 info.si_signo = SIGSEGV;
252 info.si_errno = 0;
253 if (!(env->error_code & 1))
254 info.si_code = TARGET_SEGV_MAPERR;
255 else
256 info.si_code = TARGET_SEGV_ACCERR;
257 info._sifields._sigfault._addr = env->cr[2];
258 queue_signal(env, info.si_signo, &info);
259 break;
260 case EXCP00_DIVZ:
261 #ifndef TARGET_X86_64
262 if (env->eflags & VM_MASK) {
263 handle_vm86_trap(env, trapnr);
264 } else
265 #endif
266 {
267 /* division by zero */
268 info.si_signo = SIGFPE;
269 info.si_errno = 0;
270 info.si_code = TARGET_FPE_INTDIV;
271 info._sifields._sigfault._addr = env->eip;
272 queue_signal(env, info.si_signo, &info);
273 }
274 break;
275 case EXCP01_SSTP:
276 case EXCP03_INT3:
277 #ifndef TARGET_X86_64
278 if (env->eflags & VM_MASK) {
279 handle_vm86_trap(env, trapnr);
280 } else
281 #endif
282 {
283 info.si_signo = SIGTRAP;
284 info.si_errno = 0;
285 if (trapnr == EXCP01_SSTP) {
286 info.si_code = TARGET_TRAP_BRKPT;
287 info._sifields._sigfault._addr = env->eip;
288 } else {
289 info.si_code = TARGET_SI_KERNEL;
290 info._sifields._sigfault._addr = 0;
291 }
292 queue_signal(env, info.si_signo, &info);
293 }
294 break;
295 case EXCP04_INTO:
296 case EXCP05_BOUND:
297 #ifndef TARGET_X86_64
298 if (env->eflags & VM_MASK) {
299 handle_vm86_trap(env, trapnr);
300 } else
301 #endif
302 {
303 info.si_signo = SIGSEGV;
304 info.si_errno = 0;
305 info.si_code = TARGET_SI_KERNEL;
306 info._sifields._sigfault._addr = 0;
307 queue_signal(env, info.si_signo, &info);
308 }
309 break;
310 case EXCP06_ILLOP:
311 info.si_signo = SIGILL;
312 info.si_errno = 0;
313 info.si_code = TARGET_ILL_ILLOPN;
314 info._sifields._sigfault._addr = env->eip;
315 queue_signal(env, info.si_signo, &info);
316 break;
317 case EXCP_INTERRUPT:
318 /* just indicate that signals should be handled asap */
319 break;
320 case EXCP_DEBUG:
321 {
322 int sig;
323
324 sig = gdb_handlesig (env, TARGET_SIGTRAP);
325 if (sig)
326 {
327 info.si_signo = sig;
328 info.si_errno = 0;
329 info.si_code = TARGET_TRAP_BRKPT;
330 queue_signal(env, info.si_signo, &info);
331 }
332 }
333 break;
334 default:
335 pc = env->segs[R_CS].base + env->eip;
336 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
337 (long)pc, trapnr);
338 abort();
339 }
340 process_pending_signals(env);
341 }
342 }
343 #endif
344
345 #ifdef TARGET_ARM
346
347 /* XXX: find a better solution */
348 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
349
350 static void arm_cache_flush(abi_ulong start, abi_ulong last)
351 {
352 abi_ulong addr, last1;
353
354 if (last < start)
355 return;
356 addr = start;
357 for(;;) {
358 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
359 if (last1 > last)
360 last1 = last;
361 tb_invalidate_page_range(addr, last1 + 1);
362 if (last1 == last)
363 break;
364 addr = last1 + 1;
365 }
366 }
367
368 /* Handle a jump to the kernel code page. */
369 static int
370 do_kernel_trap(CPUARMState *env)
371 {
372 uint32_t addr;
373 uint32_t cpsr;
374 uint32_t val;
375
376 switch (env->regs[15]) {
377 case 0xffff0fa0: /* __kernel_memory_barrier */
378 /* ??? No-op. Will need to do better for SMP. */
379 break;
380 case 0xffff0fc0: /* __kernel_cmpxchg */
381 /* ??? This is not really atomic. However we don't support
382 threads anyway, so it doesn't realy matter. */
383 cpsr = cpsr_read(env);
384 addr = env->regs[2];
385 /* FIXME: This should SEGV if the access fails. */
386 if (get_user_u32(val, addr))
387 val = ~env->regs[0];
388 if (val == env->regs[0]) {
389 val = env->regs[1];
390 /* FIXME: Check for segfaults. */
391 put_user_u32(val, addr);
392 env->regs[0] = 0;
393 cpsr |= CPSR_C;
394 } else {
395 env->regs[0] = -1;
396 cpsr &= ~CPSR_C;
397 }
398 cpsr_write(env, cpsr, CPSR_C);
399 break;
400 case 0xffff0fe0: /* __kernel_get_tls */
401 env->regs[0] = env->cp15.c13_tls2;
402 break;
403 default:
404 return 1;
405 }
406 /* Jump back to the caller. */
407 addr = env->regs[14];
408 if (addr & 1) {
409 env->thumb = 1;
410 addr &= ~1;
411 }
412 env->regs[15] = addr;
413
414 return 0;
415 }
416
417 void cpu_loop(CPUARMState *env)
418 {
419 int trapnr;
420 unsigned int n, insn;
421 target_siginfo_t info;
422 uint32_t addr;
423
424 for(;;) {
425 trapnr = cpu_arm_exec(env);
426 switch(trapnr) {
427 case EXCP_UDEF:
428 {
429 TaskState *ts = env->opaque;
430 uint32_t opcode;
431 int rc;
432
433 /* we handle the FPU emulation here, as Linux */
434 /* we get the opcode */
435 /* FIXME - what to do if get_user() fails? */
436 get_user_u32(opcode, env->regs[15]);
437
438 rc = EmulateAll(opcode, &ts->fpa, env);
439 if (rc == 0) { /* illegal instruction */
440 info.si_signo = SIGILL;
441 info.si_errno = 0;
442 info.si_code = TARGET_ILL_ILLOPN;
443 info._sifields._sigfault._addr = env->regs[15];
444 queue_signal(env, info.si_signo, &info);
445 } else if (rc < 0) { /* FP exception */
446 int arm_fpe=0;
447
448 /* translate softfloat flags to FPSR flags */
449 if (-rc & float_flag_invalid)
450 arm_fpe |= BIT_IOC;
451 if (-rc & float_flag_divbyzero)
452 arm_fpe |= BIT_DZC;
453 if (-rc & float_flag_overflow)
454 arm_fpe |= BIT_OFC;
455 if (-rc & float_flag_underflow)
456 arm_fpe |= BIT_UFC;
457 if (-rc & float_flag_inexact)
458 arm_fpe |= BIT_IXC;
459
460 FPSR fpsr = ts->fpa.fpsr;
461 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
462
463 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
464 info.si_signo = SIGFPE;
465 info.si_errno = 0;
466
467 /* ordered by priority, least first */
468 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
469 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
470 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
471 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
472 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
473
474 info._sifields._sigfault._addr = env->regs[15];
475 queue_signal(env, info.si_signo, &info);
476 } else {
477 env->regs[15] += 4;
478 }
479
480 /* accumulate unenabled exceptions */
481 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
482 fpsr |= BIT_IXC;
483 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
484 fpsr |= BIT_UFC;
485 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
486 fpsr |= BIT_OFC;
487 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
488 fpsr |= BIT_DZC;
489 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
490 fpsr |= BIT_IOC;
491 ts->fpa.fpsr=fpsr;
492 } else { /* everything OK */
493 /* increment PC */
494 env->regs[15] += 4;
495 }
496 }
497 break;
498 case EXCP_SWI:
499 case EXCP_BKPT:
500 {
501 env->eabi = 1;
502 /* system call */
503 if (trapnr == EXCP_BKPT) {
504 if (env->thumb) {
505 /* FIXME - what to do if get_user() fails? */
506 get_user_u16(insn, env->regs[15]);
507 n = insn & 0xff;
508 env->regs[15] += 2;
509 } else {
510 /* FIXME - what to do if get_user() fails? */
511 get_user_u32(insn, env->regs[15]);
512 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
513 env->regs[15] += 4;
514 }
515 } else {
516 if (env->thumb) {
517 /* FIXME - what to do if get_user() fails? */
518 get_user_u16(insn, env->regs[15] - 2);
519 n = insn & 0xff;
520 } else {
521 /* FIXME - what to do if get_user() fails? */
522 get_user_u32(insn, env->regs[15] - 4);
523 n = insn & 0xffffff;
524 }
525 }
526
527 if (n == ARM_NR_cacheflush) {
528 arm_cache_flush(env->regs[0], env->regs[1]);
529 } else if (n == ARM_NR_semihosting
530 || n == ARM_NR_thumb_semihosting) {
531 env->regs[0] = do_arm_semihosting (env);
532 } else if (n == 0 || n >= ARM_SYSCALL_BASE
533 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
534 /* linux syscall */
535 if (env->thumb || n == 0) {
536 n = env->regs[7];
537 } else {
538 n -= ARM_SYSCALL_BASE;
539 env->eabi = 0;
540 }
541 if ( n > ARM_NR_BASE) {
542 switch (n) {
543 case ARM_NR_cacheflush:
544 arm_cache_flush(env->regs[0], env->regs[1]);
545 break;
546 case ARM_NR_set_tls:
547 cpu_set_tls(env, env->regs[0]);
548 env->regs[0] = 0;
549 break;
550 default:
551 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
552 n);
553 env->regs[0] = -TARGET_ENOSYS;
554 break;
555 }
556 } else {
557 env->regs[0] = do_syscall(env,
558 n,
559 env->regs[0],
560 env->regs[1],
561 env->regs[2],
562 env->regs[3],
563 env->regs[4],
564 env->regs[5]);
565 }
566 } else {
567 goto error;
568 }
569 }
570 break;
571 case EXCP_INTERRUPT:
572 /* just indicate that signals should be handled asap */
573 break;
574 case EXCP_PREFETCH_ABORT:
575 addr = env->cp15.c6_data;
576 goto do_segv;
577 case EXCP_DATA_ABORT:
578 addr = env->cp15.c6_insn;
579 goto do_segv;
580 do_segv:
581 {
582 info.si_signo = SIGSEGV;
583 info.si_errno = 0;
584 /* XXX: check env->error_code */
585 info.si_code = TARGET_SEGV_MAPERR;
586 info._sifields._sigfault._addr = addr;
587 queue_signal(env, info.si_signo, &info);
588 }
589 break;
590 case EXCP_DEBUG:
591 {
592 int sig;
593
594 sig = gdb_handlesig (env, TARGET_SIGTRAP);
595 if (sig)
596 {
597 info.si_signo = sig;
598 info.si_errno = 0;
599 info.si_code = TARGET_TRAP_BRKPT;
600 queue_signal(env, info.si_signo, &info);
601 }
602 }
603 break;
604 case EXCP_KERNEL_TRAP:
605 if (do_kernel_trap(env))
606 goto error;
607 break;
608 default:
609 error:
610 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
611 trapnr);
612 cpu_dump_state(env, stderr, fprintf, 0);
613 abort();
614 }
615 process_pending_signals(env);
616 }
617 }
618
619 #endif
620
621 #ifdef TARGET_SPARC
622
623 //#define DEBUG_WIN
624
625 /* WARNING: dealing with register windows _is_ complicated. More info
626 can be found at http://www.sics.se/~psm/sparcstack.html */
627 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
628 {
629 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
630 /* wrap handling : if cwp is on the last window, then we use the
631 registers 'after' the end */
632 if (index < 8 && env->cwp == (NWINDOWS - 1))
633 index += (16 * NWINDOWS);
634 return index;
635 }
636
637 /* save the register window 'cwp1' */
638 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
639 {
640 unsigned int i;
641 abi_ulong sp_ptr;
642
643 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
644 #if defined(DEBUG_WIN)
645 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
646 (int)sp_ptr, cwp1);
647 #endif
648 for(i = 0; i < 16; i++) {
649 /* FIXME - what to do if put_user() fails? */
650 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
651 sp_ptr += sizeof(abi_ulong);
652 }
653 }
654
655 static void save_window(CPUSPARCState *env)
656 {
657 #ifndef TARGET_SPARC64
658 unsigned int new_wim;
659 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
660 ((1LL << NWINDOWS) - 1);
661 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
662 env->wim = new_wim;
663 #else
664 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
665 env->cansave++;
666 env->canrestore--;
667 #endif
668 }
669
670 static void restore_window(CPUSPARCState *env)
671 {
672 unsigned int new_wim, i, cwp1;
673 abi_ulong sp_ptr;
674
675 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
676 ((1LL << NWINDOWS) - 1);
677
678 /* restore the invalid window */
679 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
680 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
681 #if defined(DEBUG_WIN)
682 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
683 (int)sp_ptr, cwp1);
684 #endif
685 for(i = 0; i < 16; i++) {
686 /* FIXME - what to do if get_user() fails? */
687 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
688 sp_ptr += sizeof(abi_ulong);
689 }
690 env->wim = new_wim;
691 #ifdef TARGET_SPARC64
692 env->canrestore++;
693 if (env->cleanwin < NWINDOWS - 1)
694 env->cleanwin++;
695 env->cansave--;
696 #endif
697 }
698
699 static void flush_windows(CPUSPARCState *env)
700 {
701 int offset, cwp1;
702
703 offset = 1;
704 for(;;) {
705 /* if restore would invoke restore_window(), then we can stop */
706 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
707 if (env->wim & (1 << cwp1))
708 break;
709 save_window_offset(env, cwp1);
710 offset++;
711 }
712 /* set wim so that restore will reload the registers */
713 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
714 env->wim = 1 << cwp1;
715 #if defined(DEBUG_WIN)
716 printf("flush_windows: nb=%d\n", offset - 1);
717 #endif
718 }
719
720 void cpu_loop (CPUSPARCState *env)
721 {
722 int trapnr, ret;
723 target_siginfo_t info;
724
725 while (1) {
726 trapnr = cpu_sparc_exec (env);
727
728 switch (trapnr) {
729 #ifndef TARGET_SPARC64
730 case 0x88:
731 case 0x90:
732 #else
733 case 0x110:
734 case 0x16d:
735 #endif
736 ret = do_syscall (env, env->gregs[1],
737 env->regwptr[0], env->regwptr[1],
738 env->regwptr[2], env->regwptr[3],
739 env->regwptr[4], env->regwptr[5]);
740 if ((unsigned int)ret >= (unsigned int)(-515)) {
741 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
742 env->xcc |= PSR_CARRY;
743 #else
744 env->psr |= PSR_CARRY;
745 #endif
746 ret = -ret;
747 } else {
748 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
749 env->xcc &= ~PSR_CARRY;
750 #else
751 env->psr &= ~PSR_CARRY;
752 #endif
753 }
754 env->regwptr[0] = ret;
755 /* next instruction */
756 env->pc = env->npc;
757 env->npc = env->npc + 4;
758 break;
759 case 0x83: /* flush windows */
760 #ifdef TARGET_ABI32
761 case 0x103:
762 #endif
763 flush_windows(env);
764 /* next instruction */
765 env->pc = env->npc;
766 env->npc = env->npc + 4;
767 break;
768 #ifndef TARGET_SPARC64
769 case TT_WIN_OVF: /* window overflow */
770 save_window(env);
771 break;
772 case TT_WIN_UNF: /* window underflow */
773 restore_window(env);
774 break;
775 case TT_TFAULT:
776 case TT_DFAULT:
777 {
778 info.si_signo = SIGSEGV;
779 info.si_errno = 0;
780 /* XXX: check env->error_code */
781 info.si_code = TARGET_SEGV_MAPERR;
782 info._sifields._sigfault._addr = env->mmuregs[4];
783 queue_signal(env, info.si_signo, &info);
784 }
785 break;
786 #else
787 case TT_SPILL: /* window overflow */
788 save_window(env);
789 break;
790 case TT_FILL: /* window underflow */
791 restore_window(env);
792 break;
793 case TT_TFAULT:
794 case TT_DFAULT:
795 {
796 info.si_signo = SIGSEGV;
797 info.si_errno = 0;
798 /* XXX: check env->error_code */
799 info.si_code = TARGET_SEGV_MAPERR;
800 if (trapnr == TT_DFAULT)
801 info._sifields._sigfault._addr = env->dmmuregs[4];
802 else
803 info._sifields._sigfault._addr = env->tsptr->tpc;
804 queue_signal(env, info.si_signo, &info);
805 }
806 break;
807 #ifndef TARGET_ABI32
808 case 0x16e:
809 flush_windows(env);
810 sparc64_get_context(env);
811 break;
812 case 0x16f:
813 flush_windows(env);
814 sparc64_set_context(env);
815 break;
816 #endif
817 #endif
818 case EXCP_INTERRUPT:
819 /* just indicate that signals should be handled asap */
820 break;
821 case EXCP_DEBUG:
822 {
823 int sig;
824
825 sig = gdb_handlesig (env, TARGET_SIGTRAP);
826 if (sig)
827 {
828 info.si_signo = sig;
829 info.si_errno = 0;
830 info.si_code = TARGET_TRAP_BRKPT;
831 queue_signal(env, info.si_signo, &info);
832 }
833 }
834 break;
835 default:
836 printf ("Unhandled trap: 0x%x\n", trapnr);
837 cpu_dump_state(env, stderr, fprintf, 0);
838 exit (1);
839 }
840 process_pending_signals (env);
841 }
842 }
843
844 #endif
845
846 #ifdef TARGET_PPC
847 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
848 {
849 /* TO FIX */
850 return 0;
851 }
852
853 uint32_t cpu_ppc_load_tbl (CPUState *env)
854 {
855 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
856 }
857
858 uint32_t cpu_ppc_load_tbu (CPUState *env)
859 {
860 return cpu_ppc_get_tb(env) >> 32;
861 }
862
863 uint32_t cpu_ppc_load_atbl (CPUState *env)
864 {
865 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
866 }
867
868 uint32_t cpu_ppc_load_atbu (CPUState *env)
869 {
870 return cpu_ppc_get_tb(env) >> 32;
871 }
872
873 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
874 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
875
876 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
877 {
878 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
879 }
880
881 /* XXX: to be fixed */
882 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
883 {
884 return -1;
885 }
886
887 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
888 {
889 return -1;
890 }
891
892 #define EXCP_DUMP(env, fmt, args...) \
893 do { \
894 fprintf(stderr, fmt , ##args); \
895 cpu_dump_state(env, stderr, fprintf, 0); \
896 if (loglevel != 0) { \
897 fprintf(logfile, fmt , ##args); \
898 cpu_dump_state(env, logfile, fprintf, 0); \
899 } \
900 } while (0)
901
902 void cpu_loop(CPUPPCState *env)
903 {
904 target_siginfo_t info;
905 int trapnr;
906 uint32_t ret;
907
908 for(;;) {
909 trapnr = cpu_ppc_exec(env);
910 switch(trapnr) {
911 case POWERPC_EXCP_NONE:
912 /* Just go on */
913 break;
914 case POWERPC_EXCP_CRITICAL: /* Critical input */
915 cpu_abort(env, "Critical interrupt while in user mode. "
916 "Aborting\n");
917 break;
918 case POWERPC_EXCP_MCHECK: /* Machine check exception */
919 cpu_abort(env, "Machine check exception while in user mode. "
920 "Aborting\n");
921 break;
922 case POWERPC_EXCP_DSI: /* Data storage exception */
923 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
924 env->spr[SPR_DAR]);
925 /* XXX: check this. Seems bugged */
926 switch (env->error_code & 0xFF000000) {
927 case 0x40000000:
928 info.si_signo = TARGET_SIGSEGV;
929 info.si_errno = 0;
930 info.si_code = TARGET_SEGV_MAPERR;
931 break;
932 case 0x04000000:
933 info.si_signo = TARGET_SIGILL;
934 info.si_errno = 0;
935 info.si_code = TARGET_ILL_ILLADR;
936 break;
937 case 0x08000000:
938 info.si_signo = TARGET_SIGSEGV;
939 info.si_errno = 0;
940 info.si_code = TARGET_SEGV_ACCERR;
941 break;
942 default:
943 /* Let's send a regular segfault... */
944 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
945 env->error_code);
946 info.si_signo = TARGET_SIGSEGV;
947 info.si_errno = 0;
948 info.si_code = TARGET_SEGV_MAPERR;
949 break;
950 }
951 info._sifields._sigfault._addr = env->nip;
952 queue_signal(env, info.si_signo, &info);
953 break;
954 case POWERPC_EXCP_ISI: /* Instruction storage exception */
955 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
956 env->spr[SPR_SRR0]);
957 /* XXX: check this */
958 switch (env->error_code & 0xFF000000) {
959 case 0x40000000:
960 info.si_signo = TARGET_SIGSEGV;
961 info.si_errno = 0;
962 info.si_code = TARGET_SEGV_MAPERR;
963 break;
964 case 0x10000000:
965 case 0x08000000:
966 info.si_signo = TARGET_SIGSEGV;
967 info.si_errno = 0;
968 info.si_code = TARGET_SEGV_ACCERR;
969 break;
970 default:
971 /* Let's send a regular segfault... */
972 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
973 env->error_code);
974 info.si_signo = TARGET_SIGSEGV;
975 info.si_errno = 0;
976 info.si_code = TARGET_SEGV_MAPERR;
977 break;
978 }
979 info._sifields._sigfault._addr = env->nip - 4;
980 queue_signal(env, info.si_signo, &info);
981 break;
982 case POWERPC_EXCP_EXTERNAL: /* External input */
983 cpu_abort(env, "External interrupt while in user mode. "
984 "Aborting\n");
985 break;
986 case POWERPC_EXCP_ALIGN: /* Alignment exception */
987 EXCP_DUMP(env, "Unaligned memory access\n");
988 /* XXX: check this */
989 info.si_signo = TARGET_SIGBUS;
990 info.si_errno = 0;
991 info.si_code = TARGET_BUS_ADRALN;
992 info._sifields._sigfault._addr = env->nip - 4;
993 queue_signal(env, info.si_signo, &info);
994 break;
995 case POWERPC_EXCP_PROGRAM: /* Program exception */
996 /* XXX: check this */
997 switch (env->error_code & ~0xF) {
998 case POWERPC_EXCP_FP:
999 EXCP_DUMP(env, "Floating point program exception\n");
1000 info.si_signo = TARGET_SIGFPE;
1001 info.si_errno = 0;
1002 switch (env->error_code & 0xF) {
1003 case POWERPC_EXCP_FP_OX:
1004 info.si_code = TARGET_FPE_FLTOVF;
1005 break;
1006 case POWERPC_EXCP_FP_UX:
1007 info.si_code = TARGET_FPE_FLTUND;
1008 break;
1009 case POWERPC_EXCP_FP_ZX:
1010 case POWERPC_EXCP_FP_VXZDZ:
1011 info.si_code = TARGET_FPE_FLTDIV;
1012 break;
1013 case POWERPC_EXCP_FP_XX:
1014 info.si_code = TARGET_FPE_FLTRES;
1015 break;
1016 case POWERPC_EXCP_FP_VXSOFT:
1017 info.si_code = TARGET_FPE_FLTINV;
1018 break;
1019 case POWERPC_EXCP_FP_VXSNAN:
1020 case POWERPC_EXCP_FP_VXISI:
1021 case POWERPC_EXCP_FP_VXIDI:
1022 case POWERPC_EXCP_FP_VXIMZ:
1023 case POWERPC_EXCP_FP_VXVC:
1024 case POWERPC_EXCP_FP_VXSQRT:
1025 case POWERPC_EXCP_FP_VXCVI:
1026 info.si_code = TARGET_FPE_FLTSUB;
1027 break;
1028 default:
1029 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1030 env->error_code);
1031 break;
1032 }
1033 break;
1034 case POWERPC_EXCP_INVAL:
1035 EXCP_DUMP(env, "Invalid instruction\n");
1036 info.si_signo = TARGET_SIGILL;
1037 info.si_errno = 0;
1038 switch (env->error_code & 0xF) {
1039 case POWERPC_EXCP_INVAL_INVAL:
1040 info.si_code = TARGET_ILL_ILLOPC;
1041 break;
1042 case POWERPC_EXCP_INVAL_LSWX:
1043 info.si_code = TARGET_ILL_ILLOPN;
1044 break;
1045 case POWERPC_EXCP_INVAL_SPR:
1046 info.si_code = TARGET_ILL_PRVREG;
1047 break;
1048 case POWERPC_EXCP_INVAL_FP:
1049 info.si_code = TARGET_ILL_COPROC;
1050 break;
1051 default:
1052 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1053 env->error_code & 0xF);
1054 info.si_code = TARGET_ILL_ILLADR;
1055 break;
1056 }
1057 break;
1058 case POWERPC_EXCP_PRIV:
1059 EXCP_DUMP(env, "Privilege violation\n");
1060 info.si_signo = TARGET_SIGILL;
1061 info.si_errno = 0;
1062 switch (env->error_code & 0xF) {
1063 case POWERPC_EXCP_PRIV_OPC:
1064 info.si_code = TARGET_ILL_PRVOPC;
1065 break;
1066 case POWERPC_EXCP_PRIV_REG:
1067 info.si_code = TARGET_ILL_PRVREG;
1068 break;
1069 default:
1070 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1071 env->error_code & 0xF);
1072 info.si_code = TARGET_ILL_PRVOPC;
1073 break;
1074 }
1075 break;
1076 case POWERPC_EXCP_TRAP:
1077 cpu_abort(env, "Tried to call a TRAP\n");
1078 break;
1079 default:
1080 /* Should not happen ! */
1081 cpu_abort(env, "Unknown program exception (%02x)\n",
1082 env->error_code);
1083 break;
1084 }
1085 info._sifields._sigfault._addr = env->nip - 4;
1086 queue_signal(env, info.si_signo, &info);
1087 break;
1088 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1089 EXCP_DUMP(env, "No floating point allowed\n");
1090 info.si_signo = TARGET_SIGILL;
1091 info.si_errno = 0;
1092 info.si_code = TARGET_ILL_COPROC;
1093 info._sifields._sigfault._addr = env->nip - 4;
1094 queue_signal(env, info.si_signo, &info);
1095 break;
1096 case POWERPC_EXCP_SYSCALL: /* System call exception */
1097 cpu_abort(env, "Syscall exception while in user mode. "
1098 "Aborting\n");
1099 break;
1100 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1101 EXCP_DUMP(env, "No APU instruction allowed\n");
1102 info.si_signo = TARGET_SIGILL;
1103 info.si_errno = 0;
1104 info.si_code = TARGET_ILL_COPROC;
1105 info._sifields._sigfault._addr = env->nip - 4;
1106 queue_signal(env, info.si_signo, &info);
1107 break;
1108 case POWERPC_EXCP_DECR: /* Decrementer exception */
1109 cpu_abort(env, "Decrementer interrupt while in user mode. "
1110 "Aborting\n");
1111 break;
1112 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1113 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1114 "Aborting\n");
1115 break;
1116 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1117 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1118 "Aborting\n");
1119 break;
1120 case POWERPC_EXCP_DTLB: /* Data TLB error */
1121 cpu_abort(env, "Data TLB exception while in user mode. "
1122 "Aborting\n");
1123 break;
1124 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1125 cpu_abort(env, "Instruction TLB exception while in user mode. "
1126 "Aborting\n");
1127 break;
1128 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1129 /* XXX: check this */
1130 {
1131 int sig;
1132
1133 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1134 if (sig) {
1135 info.si_signo = sig;
1136 info.si_errno = 0;
1137 info.si_code = TARGET_TRAP_BRKPT;
1138 queue_signal(env, info.si_signo, &info);
1139 }
1140 }
1141 break;
1142 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1143 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1144 info.si_signo = TARGET_SIGILL;
1145 info.si_errno = 0;
1146 info.si_code = TARGET_ILL_COPROC;
1147 info._sifields._sigfault._addr = env->nip - 4;
1148 queue_signal(env, info.si_signo, &info);
1149 break;
1150 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1151 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1152 break;
1153 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1154 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1155 break;
1156 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1157 cpu_abort(env, "Performance monitor exception not handled\n");
1158 break;
1159 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1160 cpu_abort(env, "Doorbell interrupt while in user mode. "
1161 "Aborting\n");
1162 break;
1163 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1164 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1165 "Aborting\n");
1166 break;
1167 case POWERPC_EXCP_RESET: /* System reset exception */
1168 cpu_abort(env, "Reset interrupt while in user mode. "
1169 "Aborting\n");
1170 break;
1171 case POWERPC_EXCP_DSEG: /* Data segment exception */
1172 cpu_abort(env, "Data segment exception while in user mode. "
1173 "Aborting\n");
1174 break;
1175 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1176 cpu_abort(env, "Instruction segment exception "
1177 "while in user mode. Aborting\n");
1178 break;
1179 /* PowerPC 64 with hypervisor mode support */
1180 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1181 cpu_abort(env, "Hypervisor decrementer interrupt "
1182 "while in user mode. Aborting\n");
1183 break;
1184 case POWERPC_EXCP_TRACE: /* Trace exception */
1185 /* Nothing to do:
1186 * we use this exception to emulate step-by-step execution mode.
1187 */
1188 break;
1189 /* PowerPC 64 with hypervisor mode support */
1190 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1191 cpu_abort(env, "Hypervisor data storage exception "
1192 "while in user mode. Aborting\n");
1193 break;
1194 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1195 cpu_abort(env, "Hypervisor instruction storage exception "
1196 "while in user mode. Aborting\n");
1197 break;
1198 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1199 cpu_abort(env, "Hypervisor data segment exception "
1200 "while in user mode. Aborting\n");
1201 break;
1202 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1203 cpu_abort(env, "Hypervisor instruction segment exception "
1204 "while in user mode. Aborting\n");
1205 break;
1206 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1207 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1208 info.si_signo = TARGET_SIGILL;
1209 info.si_errno = 0;
1210 info.si_code = TARGET_ILL_COPROC;
1211 info._sifields._sigfault._addr = env->nip - 4;
1212 queue_signal(env, info.si_signo, &info);
1213 break;
1214 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1215 cpu_abort(env, "Programable interval timer interrupt "
1216 "while in user mode. Aborting\n");
1217 break;
1218 case POWERPC_EXCP_IO: /* IO error exception */
1219 cpu_abort(env, "IO error exception while in user mode. "
1220 "Aborting\n");
1221 break;
1222 case POWERPC_EXCP_RUNM: /* Run mode exception */
1223 cpu_abort(env, "Run mode exception while in user mode. "
1224 "Aborting\n");
1225 break;
1226 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1227 cpu_abort(env, "Emulation trap exception not handled\n");
1228 break;
1229 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1230 cpu_abort(env, "Instruction fetch TLB exception "
1231 "while in user-mode. Aborting");
1232 break;
1233 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1234 cpu_abort(env, "Data load TLB exception while in user-mode. "
1235 "Aborting");
1236 break;
1237 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1238 cpu_abort(env, "Data store TLB exception while in user-mode. "
1239 "Aborting");
1240 break;
1241 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1242 cpu_abort(env, "Floating-point assist exception not handled\n");
1243 break;
1244 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1245 cpu_abort(env, "Instruction address breakpoint exception "
1246 "not handled\n");
1247 break;
1248 case POWERPC_EXCP_SMI: /* System management interrupt */
1249 cpu_abort(env, "System management interrupt while in user mode. "
1250 "Aborting\n");
1251 break;
1252 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1253 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1254 "Aborting\n");
1255 break;
1256 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1257 cpu_abort(env, "Performance monitor exception not handled\n");
1258 break;
1259 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1260 cpu_abort(env, "Vector assist exception not handled\n");
1261 break;
1262 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1263 cpu_abort(env, "Soft patch exception not handled\n");
1264 break;
1265 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1266 cpu_abort(env, "Maintenance exception while in user mode. "
1267 "Aborting\n");
1268 break;
1269 case POWERPC_EXCP_STOP: /* stop translation */
1270 /* We did invalidate the instruction cache. Go on */
1271 break;
1272 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1273 /* We just stopped because of a branch. Go on */
1274 break;
1275 case POWERPC_EXCP_SYSCALL_USER:
1276 /* system call in user-mode emulation */
1277 /* WARNING:
1278 * PPC ABI uses overflow flag in cr0 to signal an error
1279 * in syscalls.
1280 */
1281 #if 0
1282 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1283 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1284 #endif
1285 env->crf[0] &= ~0x1;
1286 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1287 env->gpr[5], env->gpr[6], env->gpr[7],
1288 env->gpr[8]);
1289 if (ret > (uint32_t)(-515)) {
1290 env->crf[0] |= 0x1;
1291 ret = -ret;
1292 }
1293 env->gpr[3] = ret;
1294 #if 0
1295 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1296 #endif
1297 break;
1298 case EXCP_INTERRUPT:
1299 /* just indicate that signals should be handled asap */
1300 break;
1301 default:
1302 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1303 break;
1304 }
1305 process_pending_signals(env);
1306 }
1307 }
1308 #endif
1309
1310 #ifdef TARGET_MIPS
1311
1312 #define MIPS_SYS(name, args) args,
1313
1314 static const uint8_t mips_syscall_args[] = {
1315 MIPS_SYS(sys_syscall , 0) /* 4000 */
1316 MIPS_SYS(sys_exit , 1)
1317 MIPS_SYS(sys_fork , 0)
1318 MIPS_SYS(sys_read , 3)
1319 MIPS_SYS(sys_write , 3)
1320 MIPS_SYS(sys_open , 3) /* 4005 */
1321 MIPS_SYS(sys_close , 1)
1322 MIPS_SYS(sys_waitpid , 3)
1323 MIPS_SYS(sys_creat , 2)
1324 MIPS_SYS(sys_link , 2)
1325 MIPS_SYS(sys_unlink , 1) /* 4010 */
1326 MIPS_SYS(sys_execve , 0)
1327 MIPS_SYS(sys_chdir , 1)
1328 MIPS_SYS(sys_time , 1)
1329 MIPS_SYS(sys_mknod , 3)
1330 MIPS_SYS(sys_chmod , 2) /* 4015 */
1331 MIPS_SYS(sys_lchown , 3)
1332 MIPS_SYS(sys_ni_syscall , 0)
1333 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1334 MIPS_SYS(sys_lseek , 3)
1335 MIPS_SYS(sys_getpid , 0) /* 4020 */
1336 MIPS_SYS(sys_mount , 5)
1337 MIPS_SYS(sys_oldumount , 1)
1338 MIPS_SYS(sys_setuid , 1)
1339 MIPS_SYS(sys_getuid , 0)
1340 MIPS_SYS(sys_stime , 1) /* 4025 */
1341 MIPS_SYS(sys_ptrace , 4)
1342 MIPS_SYS(sys_alarm , 1)
1343 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1344 MIPS_SYS(sys_pause , 0)
1345 MIPS_SYS(sys_utime , 2) /* 4030 */
1346 MIPS_SYS(sys_ni_syscall , 0)
1347 MIPS_SYS(sys_ni_syscall , 0)
1348 MIPS_SYS(sys_access , 2)
1349 MIPS_SYS(sys_nice , 1)
1350 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1351 MIPS_SYS(sys_sync , 0)
1352 MIPS_SYS(sys_kill , 2)
1353 MIPS_SYS(sys_rename , 2)
1354 MIPS_SYS(sys_mkdir , 2)
1355 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1356 MIPS_SYS(sys_dup , 1)
1357 MIPS_SYS(sys_pipe , 0)
1358 MIPS_SYS(sys_times , 1)
1359 MIPS_SYS(sys_ni_syscall , 0)
1360 MIPS_SYS(sys_brk , 1) /* 4045 */
1361 MIPS_SYS(sys_setgid , 1)
1362 MIPS_SYS(sys_getgid , 0)
1363 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1364 MIPS_SYS(sys_geteuid , 0)
1365 MIPS_SYS(sys_getegid , 0) /* 4050 */
1366 MIPS_SYS(sys_acct , 0)
1367 MIPS_SYS(sys_umount , 2)
1368 MIPS_SYS(sys_ni_syscall , 0)
1369 MIPS_SYS(sys_ioctl , 3)
1370 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1371 MIPS_SYS(sys_ni_syscall , 2)
1372 MIPS_SYS(sys_setpgid , 2)
1373 MIPS_SYS(sys_ni_syscall , 0)
1374 MIPS_SYS(sys_olduname , 1)
1375 MIPS_SYS(sys_umask , 1) /* 4060 */
1376 MIPS_SYS(sys_chroot , 1)
1377 MIPS_SYS(sys_ustat , 2)
1378 MIPS_SYS(sys_dup2 , 2)
1379 MIPS_SYS(sys_getppid , 0)
1380 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1381 MIPS_SYS(sys_setsid , 0)
1382 MIPS_SYS(sys_sigaction , 3)
1383 MIPS_SYS(sys_sgetmask , 0)
1384 MIPS_SYS(sys_ssetmask , 1)
1385 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1386 MIPS_SYS(sys_setregid , 2)
1387 MIPS_SYS(sys_sigsuspend , 0)
1388 MIPS_SYS(sys_sigpending , 1)
1389 MIPS_SYS(sys_sethostname , 2)
1390 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1391 MIPS_SYS(sys_getrlimit , 2)
1392 MIPS_SYS(sys_getrusage , 2)
1393 MIPS_SYS(sys_gettimeofday, 2)
1394 MIPS_SYS(sys_settimeofday, 2)
1395 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1396 MIPS_SYS(sys_setgroups , 2)
1397 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1398 MIPS_SYS(sys_symlink , 2)
1399 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1400 MIPS_SYS(sys_readlink , 3) /* 4085 */
1401 MIPS_SYS(sys_uselib , 1)
1402 MIPS_SYS(sys_swapon , 2)
1403 MIPS_SYS(sys_reboot , 3)
1404 MIPS_SYS(old_readdir , 3)
1405 MIPS_SYS(old_mmap , 6) /* 4090 */
1406 MIPS_SYS(sys_munmap , 2)
1407 MIPS_SYS(sys_truncate , 2)
1408 MIPS_SYS(sys_ftruncate , 2)
1409 MIPS_SYS(sys_fchmod , 2)
1410 MIPS_SYS(sys_fchown , 3) /* 4095 */
1411 MIPS_SYS(sys_getpriority , 2)
1412 MIPS_SYS(sys_setpriority , 3)
1413 MIPS_SYS(sys_ni_syscall , 0)
1414 MIPS_SYS(sys_statfs , 2)
1415 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1416 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1417 MIPS_SYS(sys_socketcall , 2)
1418 MIPS_SYS(sys_syslog , 3)
1419 MIPS_SYS(sys_setitimer , 3)
1420 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1421 MIPS_SYS(sys_newstat , 2)
1422 MIPS_SYS(sys_newlstat , 2)
1423 MIPS_SYS(sys_newfstat , 2)
1424 MIPS_SYS(sys_uname , 1)
1425 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1426 MIPS_SYS(sys_vhangup , 0)
1427 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1428 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1429 MIPS_SYS(sys_wait4 , 4)
1430 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1431 MIPS_SYS(sys_sysinfo , 1)
1432 MIPS_SYS(sys_ipc , 6)
1433 MIPS_SYS(sys_fsync , 1)
1434 MIPS_SYS(sys_sigreturn , 0)
1435 MIPS_SYS(sys_clone , 0) /* 4120 */
1436 MIPS_SYS(sys_setdomainname, 2)
1437 MIPS_SYS(sys_newuname , 1)
1438 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1439 MIPS_SYS(sys_adjtimex , 1)
1440 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1441 MIPS_SYS(sys_sigprocmask , 3)
1442 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1443 MIPS_SYS(sys_init_module , 5)
1444 MIPS_SYS(sys_delete_module, 1)
1445 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1446 MIPS_SYS(sys_quotactl , 0)
1447 MIPS_SYS(sys_getpgid , 1)
1448 MIPS_SYS(sys_fchdir , 1)
1449 MIPS_SYS(sys_bdflush , 2)
1450 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1451 MIPS_SYS(sys_personality , 1)
1452 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1453 MIPS_SYS(sys_setfsuid , 1)
1454 MIPS_SYS(sys_setfsgid , 1)
1455 MIPS_SYS(sys_llseek , 5) /* 4140 */
1456 MIPS_SYS(sys_getdents , 3)
1457 MIPS_SYS(sys_select , 5)
1458 MIPS_SYS(sys_flock , 2)
1459 MIPS_SYS(sys_msync , 3)
1460 MIPS_SYS(sys_readv , 3) /* 4145 */
1461 MIPS_SYS(sys_writev , 3)
1462 MIPS_SYS(sys_cacheflush , 3)
1463 MIPS_SYS(sys_cachectl , 3)
1464 MIPS_SYS(sys_sysmips , 4)
1465 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1466 MIPS_SYS(sys_getsid , 1)
1467 MIPS_SYS(sys_fdatasync , 0)
1468 MIPS_SYS(sys_sysctl , 1)
1469 MIPS_SYS(sys_mlock , 2)
1470 MIPS_SYS(sys_munlock , 2) /* 4155 */
1471 MIPS_SYS(sys_mlockall , 1)
1472 MIPS_SYS(sys_munlockall , 0)
1473 MIPS_SYS(sys_sched_setparam, 2)
1474 MIPS_SYS(sys_sched_getparam, 2)
1475 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1476 MIPS_SYS(sys_sched_getscheduler, 1)
1477 MIPS_SYS(sys_sched_yield , 0)
1478 MIPS_SYS(sys_sched_get_priority_max, 1)
1479 MIPS_SYS(sys_sched_get_priority_min, 1)
1480 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1481 MIPS_SYS(sys_nanosleep, 2)
1482 MIPS_SYS(sys_mremap , 4)
1483 MIPS_SYS(sys_accept , 3)
1484 MIPS_SYS(sys_bind , 3)
1485 MIPS_SYS(sys_connect , 3) /* 4170 */
1486 MIPS_SYS(sys_getpeername , 3)
1487 MIPS_SYS(sys_getsockname , 3)
1488 MIPS_SYS(sys_getsockopt , 5)
1489 MIPS_SYS(sys_listen , 2)
1490 MIPS_SYS(sys_recv , 4) /* 4175 */
1491 MIPS_SYS(sys_recvfrom , 6)
1492 MIPS_SYS(sys_recvmsg , 3)
1493 MIPS_SYS(sys_send , 4)
1494 MIPS_SYS(sys_sendmsg , 3)
1495 MIPS_SYS(sys_sendto , 6) /* 4180 */
1496 MIPS_SYS(sys_setsockopt , 5)
1497 MIPS_SYS(sys_shutdown , 2)
1498 MIPS_SYS(sys_socket , 3)
1499 MIPS_SYS(sys_socketpair , 4)
1500 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1501 MIPS_SYS(sys_getresuid , 3)
1502 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1503 MIPS_SYS(sys_poll , 3)
1504 MIPS_SYS(sys_nfsservctl , 3)
1505 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1506 MIPS_SYS(sys_getresgid , 3)
1507 MIPS_SYS(sys_prctl , 5)
1508 MIPS_SYS(sys_rt_sigreturn, 0)
1509 MIPS_SYS(sys_rt_sigaction, 4)
1510 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1511 MIPS_SYS(sys_rt_sigpending, 2)
1512 MIPS_SYS(sys_rt_sigtimedwait, 4)
1513 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1514 MIPS_SYS(sys_rt_sigsuspend, 0)
1515 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1516 MIPS_SYS(sys_pwrite64 , 6)
1517 MIPS_SYS(sys_chown , 3)
1518 MIPS_SYS(sys_getcwd , 2)
1519 MIPS_SYS(sys_capget , 2)
1520 MIPS_SYS(sys_capset , 2) /* 4205 */
1521 MIPS_SYS(sys_sigaltstack , 0)
1522 MIPS_SYS(sys_sendfile , 4)
1523 MIPS_SYS(sys_ni_syscall , 0)
1524 MIPS_SYS(sys_ni_syscall , 0)
1525 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1526 MIPS_SYS(sys_truncate64 , 4)
1527 MIPS_SYS(sys_ftruncate64 , 4)
1528 MIPS_SYS(sys_stat64 , 2)
1529 MIPS_SYS(sys_lstat64 , 2)
1530 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1531 MIPS_SYS(sys_pivot_root , 2)
1532 MIPS_SYS(sys_mincore , 3)
1533 MIPS_SYS(sys_madvise , 3)
1534 MIPS_SYS(sys_getdents64 , 3)
1535 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1536 MIPS_SYS(sys_ni_syscall , 0)
1537 MIPS_SYS(sys_gettid , 0)
1538 MIPS_SYS(sys_readahead , 5)
1539 MIPS_SYS(sys_setxattr , 5)
1540 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1541 MIPS_SYS(sys_fsetxattr , 5)
1542 MIPS_SYS(sys_getxattr , 4)
1543 MIPS_SYS(sys_lgetxattr , 4)
1544 MIPS_SYS(sys_fgetxattr , 4)
1545 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1546 MIPS_SYS(sys_llistxattr , 3)
1547 MIPS_SYS(sys_flistxattr , 3)
1548 MIPS_SYS(sys_removexattr , 2)
1549 MIPS_SYS(sys_lremovexattr, 2)
1550 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1551 MIPS_SYS(sys_tkill , 2)
1552 MIPS_SYS(sys_sendfile64 , 5)
1553 MIPS_SYS(sys_futex , 2)
1554 MIPS_SYS(sys_sched_setaffinity, 3)
1555 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1556 MIPS_SYS(sys_io_setup , 2)
1557 MIPS_SYS(sys_io_destroy , 1)
1558 MIPS_SYS(sys_io_getevents, 5)
1559 MIPS_SYS(sys_io_submit , 3)
1560 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1561 MIPS_SYS(sys_exit_group , 1)
1562 MIPS_SYS(sys_lookup_dcookie, 3)
1563 MIPS_SYS(sys_epoll_create, 1)
1564 MIPS_SYS(sys_epoll_ctl , 4)
1565 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1566 MIPS_SYS(sys_remap_file_pages, 5)
1567 MIPS_SYS(sys_set_tid_address, 1)
1568 MIPS_SYS(sys_restart_syscall, 0)
1569 MIPS_SYS(sys_fadvise64_64, 7)
1570 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1571 MIPS_SYS(sys_fstatfs64 , 2)
1572 MIPS_SYS(sys_timer_create, 3)
1573 MIPS_SYS(sys_timer_settime, 4)
1574 MIPS_SYS(sys_timer_gettime, 2)
1575 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1576 MIPS_SYS(sys_timer_delete, 1)
1577 MIPS_SYS(sys_clock_settime, 2)
1578 MIPS_SYS(sys_clock_gettime, 2)
1579 MIPS_SYS(sys_clock_getres, 2)
1580 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1581 MIPS_SYS(sys_tgkill , 3)
1582 MIPS_SYS(sys_utimes , 2)
1583 MIPS_SYS(sys_mbind , 4)
1584 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1585 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1586 MIPS_SYS(sys_mq_open , 4)
1587 MIPS_SYS(sys_mq_unlink , 1)
1588 MIPS_SYS(sys_mq_timedsend, 5)
1589 MIPS_SYS(sys_mq_timedreceive, 5)
1590 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1591 MIPS_SYS(sys_mq_getsetattr, 3)
1592 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1593 MIPS_SYS(sys_waitid , 4)
1594 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1595 MIPS_SYS(sys_add_key , 5)
1596 MIPS_SYS(sys_request_key, 4)
1597 MIPS_SYS(sys_keyctl , 5)
1598 MIPS_SYS(sys_set_thread_area, 1)
1599 MIPS_SYS(sys_inotify_init, 0)
1600 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1601 MIPS_SYS(sys_inotify_rm_watch, 2)
1602 MIPS_SYS(sys_migrate_pages, 4)
1603 MIPS_SYS(sys_openat, 4)
1604 MIPS_SYS(sys_mkdirat, 3)
1605 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1606 MIPS_SYS(sys_fchownat, 5)
1607 MIPS_SYS(sys_futimesat, 3)
1608 MIPS_SYS(sys_fstatat64, 4)
1609 MIPS_SYS(sys_unlinkat, 3)
1610 MIPS_SYS(sys_renameat, 4) /* 4295 */
1611 MIPS_SYS(sys_linkat, 5)
1612 MIPS_SYS(sys_symlinkat, 3)
1613 MIPS_SYS(sys_readlinkat, 4)
1614 MIPS_SYS(sys_fchmodat, 3)
1615 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1616 MIPS_SYS(sys_pselect6, 6)
1617 MIPS_SYS(sys_ppoll, 5)
1618 MIPS_SYS(sys_unshare, 1)
1619 MIPS_SYS(sys_splice, 4)
1620 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1621 MIPS_SYS(sys_tee, 4)
1622 MIPS_SYS(sys_vmsplice, 4)
1623 MIPS_SYS(sys_move_pages, 6)
1624 MIPS_SYS(sys_set_robust_list, 2)
1625 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1626 MIPS_SYS(sys_kexec_load, 4)
1627 MIPS_SYS(sys_getcpu, 3)
1628 MIPS_SYS(sys_epoll_pwait, 6)
1629 MIPS_SYS(sys_ioprio_set, 3)
1630 MIPS_SYS(sys_ioprio_get, 2)
1631 };
1632
1633 #undef MIPS_SYS
1634
1635 void cpu_loop(CPUMIPSState *env)
1636 {
1637 target_siginfo_t info;
1638 int trapnr, ret;
1639 unsigned int syscall_num;
1640
1641 for(;;) {
1642 trapnr = cpu_mips_exec(env);
1643 switch(trapnr) {
1644 case EXCP_SYSCALL:
1645 syscall_num = env->gpr[env->current_tc][2] - 4000;
1646 env->PC[env->current_tc] += 4;
1647 if (syscall_num >= sizeof(mips_syscall_args)) {
1648 ret = -ENOSYS;
1649 } else {
1650 int nb_args;
1651 abi_ulong sp_reg;
1652 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1653
1654 nb_args = mips_syscall_args[syscall_num];
1655 sp_reg = env->gpr[env->current_tc][29];
1656 switch (nb_args) {
1657 /* these arguments are taken from the stack */
1658 /* FIXME - what to do if get_user() fails? */
1659 case 8: get_user_ual(arg8, sp_reg + 28);
1660 case 7: get_user_ual(arg7, sp_reg + 24);
1661 case 6: get_user_ual(arg6, sp_reg + 20);
1662 case 5: get_user_ual(arg5, sp_reg + 16);
1663 default:
1664 break;
1665 }
1666 ret = do_syscall(env, env->gpr[env->current_tc][2],
1667 env->gpr[env->current_tc][4],
1668 env->gpr[env->current_tc][5],
1669 env->gpr[env->current_tc][6],
1670 env->gpr[env->current_tc][7],
1671 arg5, arg6/*, arg7, arg8*/);
1672 }
1673 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1674 env->gpr[env->current_tc][7] = 1; /* error flag */
1675 ret = -ret;
1676 } else {
1677 env->gpr[env->current_tc][7] = 0; /* error flag */
1678 }
1679 env->gpr[env->current_tc][2] = ret;
1680 break;
1681 case EXCP_TLBL:
1682 case EXCP_TLBS:
1683 case EXCP_CpU:
1684 case EXCP_RI:
1685 info.si_signo = TARGET_SIGILL;
1686 info.si_errno = 0;
1687 info.si_code = 0;
1688 queue_signal(env, info.si_signo, &info);
1689 break;
1690 case EXCP_INTERRUPT:
1691 /* just indicate that signals should be handled asap */
1692 break;
1693 case EXCP_DEBUG:
1694 {
1695 int sig;
1696
1697 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1698 if (sig)
1699 {
1700 info.si_signo = sig;
1701 info.si_errno = 0;
1702 info.si_code = TARGET_TRAP_BRKPT;
1703 queue_signal(env, info.si_signo, &info);
1704 }
1705 }
1706 break;
1707 default:
1708 // error:
1709 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1710 trapnr);
1711 cpu_dump_state(env, stderr, fprintf, 0);
1712 abort();
1713 }
1714 process_pending_signals(env);
1715 }
1716 }
1717 #endif
1718
1719 #ifdef TARGET_SH4
1720 void cpu_loop (CPUState *env)
1721 {
1722 int trapnr, ret;
1723 target_siginfo_t info;
1724
1725 while (1) {
1726 trapnr = cpu_sh4_exec (env);
1727
1728 switch (trapnr) {
1729 case 0x160:
1730 ret = do_syscall(env,
1731 env->gregs[3],
1732 env->gregs[4],
1733 env->gregs[5],
1734 env->gregs[6],
1735 env->gregs[7],
1736 env->gregs[0],
1737 env->gregs[1]);
1738 env->gregs[0] = ret;
1739 env->pc += 2;
1740 break;
1741 case EXCP_INTERRUPT:
1742 /* just indicate that signals should be handled asap */
1743 break;
1744 case EXCP_DEBUG:
1745 {
1746 int sig;
1747
1748 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1749 if (sig)
1750 {
1751 info.si_signo = sig;
1752 info.si_errno = 0;
1753 info.si_code = TARGET_TRAP_BRKPT;
1754 queue_signal(env, info.si_signo, &info);
1755 }
1756 }
1757 break;
1758 case 0xa0:
1759 case 0xc0:
1760 info.si_signo = SIGSEGV;
1761 info.si_errno = 0;
1762 info.si_code = TARGET_SEGV_MAPERR;
1763 info._sifields._sigfault._addr = env->tea;
1764 queue_signal(env, info.si_signo, &info);
1765 break;
1766
1767 default:
1768 printf ("Unhandled trap: 0x%x\n", trapnr);
1769 cpu_dump_state(env, stderr, fprintf, 0);
1770 exit (1);
1771 }
1772 process_pending_signals (env);
1773 }
1774 }
1775 #endif
1776
1777 #ifdef TARGET_CRIS
1778 void cpu_loop (CPUState *env)
1779 {
1780 int trapnr, ret;
1781 target_siginfo_t info;
1782
1783 while (1) {
1784 trapnr = cpu_cris_exec (env);
1785 switch (trapnr) {
1786 case 0xaa:
1787 {
1788 info.si_signo = SIGSEGV;
1789 info.si_errno = 0;
1790 /* XXX: check env->error_code */
1791 info.si_code = TARGET_SEGV_MAPERR;
1792 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1793 queue_signal(env, info.si_signo, &info);
1794 }
1795 break;
1796 case EXCP_INTERRUPT:
1797 /* just indicate that signals should be handled asap */
1798 break;
1799 case EXCP_BREAK:
1800 ret = do_syscall(env,
1801 env->regs[9],
1802 env->regs[10],
1803 env->regs[11],
1804 env->regs[12],
1805 env->regs[13],
1806 env->pregs[7],
1807 env->pregs[11]);
1808 env->regs[10] = ret;
1809 env->pc += 2;
1810 break;
1811 case EXCP_DEBUG:
1812 {
1813 int sig;
1814
1815 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1816 if (sig)
1817 {
1818 info.si_signo = sig;
1819 info.si_errno = 0;
1820 info.si_code = TARGET_TRAP_BRKPT;
1821 queue_signal(env, info.si_signo, &info);
1822 }
1823 }
1824 break;
1825 default:
1826 printf ("Unhandled trap: 0x%x\n", trapnr);
1827 cpu_dump_state(env, stderr, fprintf, 0);
1828 exit (1);
1829 }
1830 process_pending_signals (env);
1831 }
1832 }
1833 #endif
1834
1835 #ifdef TARGET_M68K
1836
1837 void cpu_loop(CPUM68KState *env)
1838 {
1839 int trapnr;
1840 unsigned int n;
1841 target_siginfo_t info;
1842 TaskState *ts = env->opaque;
1843
1844 for(;;) {
1845 trapnr = cpu_m68k_exec(env);
1846 switch(trapnr) {
1847 case EXCP_ILLEGAL:
1848 {
1849 if (ts->sim_syscalls) {
1850 uint16_t nr;
1851 nr = lduw(env->pc + 2);
1852 env->pc += 4;
1853 do_m68k_simcall(env, nr);
1854 } else {
1855 goto do_sigill;
1856 }
1857 }
1858 break;
1859 case EXCP_HALT_INSN:
1860 /* Semihosing syscall. */
1861 env->pc += 4;
1862 do_m68k_semihosting(env, env->dregs[0]);
1863 break;
1864 case EXCP_LINEA:
1865 case EXCP_LINEF:
1866 case EXCP_UNSUPPORTED:
1867 do_sigill:
1868 info.si_signo = SIGILL;
1869 info.si_errno = 0;
1870 info.si_code = TARGET_ILL_ILLOPN;
1871 info._sifields._sigfault._addr = env->pc;
1872 queue_signal(env, info.si_signo, &info);
1873 break;
1874 case EXCP_TRAP0:
1875 {
1876 ts->sim_syscalls = 0;
1877 n = env->dregs[0];
1878 env->pc += 2;
1879 env->dregs[0] = do_syscall(env,
1880 n,
1881 env->dregs[1],
1882 env->dregs[2],
1883 env->dregs[3],
1884 env->dregs[4],
1885 env->dregs[5],
1886 env->aregs[0]);
1887 }
1888 break;
1889 case EXCP_INTERRUPT:
1890 /* just indicate that signals should be handled asap */
1891 break;
1892 case EXCP_ACCESS:
1893 {
1894 info.si_signo = SIGSEGV;
1895 info.si_errno = 0;
1896 /* XXX: check env->error_code */
1897 info.si_code = TARGET_SEGV_MAPERR;
1898 info._sifields._sigfault._addr = env->mmu.ar;
1899 queue_signal(env, info.si_signo, &info);
1900 }
1901 break;
1902 case EXCP_DEBUG:
1903 {
1904 int sig;
1905
1906 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1907 if (sig)
1908 {
1909 info.si_signo = sig;
1910 info.si_errno = 0;
1911 info.si_code = TARGET_TRAP_BRKPT;
1912 queue_signal(env, info.si_signo, &info);
1913 }
1914 }
1915 break;
1916 default:
1917 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1918 trapnr);
1919 cpu_dump_state(env, stderr, fprintf, 0);
1920 abort();
1921 }
1922 process_pending_signals(env);
1923 }
1924 }
1925 #endif /* TARGET_M68K */
1926
1927 #ifdef TARGET_ALPHA
1928 void cpu_loop (CPUState *env)
1929 {
1930 int trapnr;
1931 target_siginfo_t info;
1932
1933 while (1) {
1934 trapnr = cpu_alpha_exec (env);
1935
1936 switch (trapnr) {
1937 case EXCP_RESET:
1938 fprintf(stderr, "Reset requested. Exit\n");
1939 exit(1);
1940 break;
1941 case EXCP_MCHK:
1942 fprintf(stderr, "Machine check exception. Exit\n");
1943 exit(1);
1944 break;
1945 case EXCP_ARITH:
1946 fprintf(stderr, "Arithmetic trap.\n");
1947 exit(1);
1948 break;
1949 case EXCP_HW_INTERRUPT:
1950 fprintf(stderr, "External interrupt. Exit\n");
1951 exit(1);
1952 break;
1953 case EXCP_DFAULT:
1954 fprintf(stderr, "MMU data fault\n");
1955 exit(1);
1956 break;
1957 case EXCP_DTB_MISS_PAL:
1958 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1959 exit(1);
1960 break;
1961 case EXCP_ITB_MISS:
1962 fprintf(stderr, "MMU instruction TLB miss\n");
1963 exit(1);
1964 break;
1965 case EXCP_ITB_ACV:
1966 fprintf(stderr, "MMU instruction access violation\n");
1967 exit(1);
1968 break;
1969 case EXCP_DTB_MISS_NATIVE:
1970 fprintf(stderr, "MMU data TLB miss\n");
1971 exit(1);
1972 break;
1973 case EXCP_UNALIGN:
1974 fprintf(stderr, "Unaligned access\n");
1975 exit(1);
1976 break;
1977 case EXCP_OPCDEC:
1978 fprintf(stderr, "Invalid instruction\n");
1979 exit(1);
1980 break;
1981 case EXCP_FEN:
1982 fprintf(stderr, "Floating-point not allowed\n");
1983 exit(1);
1984 break;
1985 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1986 fprintf(stderr, "Call to PALcode\n");
1987 call_pal(env, (trapnr >> 6) | 0x80);
1988 break;
1989 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1990 fprintf(stderr, "Privileged call to PALcode\n");
1991 exit(1);
1992 break;
1993 case EXCP_DEBUG:
1994 {
1995 int sig;
1996
1997 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1998 if (sig)
1999 {
2000 info.si_signo = sig;
2001 info.si_errno = 0;
2002 info.si_code = TARGET_TRAP_BRKPT;
2003 queue_signal(env, info.si_signo, &info);
2004 }
2005 }
2006 break;
2007 default:
2008 printf ("Unhandled trap: 0x%x\n", trapnr);
2009 cpu_dump_state(env, stderr, fprintf, 0);
2010 exit (1);
2011 }
2012 process_pending_signals (env);
2013 }
2014 }
2015 #endif /* TARGET_ALPHA */
2016
2017 void usage(void)
2018 {
2019 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2020 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2021 "Linux CPU emulator (compiled for %s emulation)\n"
2022 "\n"
2023 "Standard options:\n"
2024 "-h print this help\n"
2025 "-g port wait gdb connection to port\n"
2026 "-L path set the elf interpreter prefix (default=%s)\n"
2027 "-s size set the stack size in bytes (default=%ld)\n"
2028 "-cpu model select CPU (-cpu ? for list)\n"
2029 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2030 "\n"
2031 "Debug options:\n"
2032 "-d options activate log (logfile=%s)\n"
2033 "-p pagesize set the host page size to 'pagesize'\n"
2034 "-strace log system calls\n"
2035 "\n"
2036 "Environment variables:\n"
2037 "QEMU_STRACE Print system calls and arguments similar to the\n"
2038 " 'strace' program. Enable by setting to any value.\n"
2039 ,
2040 TARGET_ARCH,
2041 interp_prefix,
2042 x86_stack_size,
2043 DEBUG_LOGFILE);
2044 _exit(1);
2045 }
2046
2047 /* XXX: currently only used for async signals (see signal.c) */
2048 CPUState *global_env;
2049
2050 void init_task_state(TaskState *ts)
2051 {
2052 int i;
2053
2054 memset(ts, 0, sizeof(TaskState));
2055 ts->used = 1;
2056 ts->first_free = ts->sigqueue_table;
2057 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2058 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2059 }
2060 ts->sigqueue_table[i].next = NULL;
2061 }
2062
2063 int main(int argc, char **argv)
2064 {
2065 const char *filename;
2066 const char *cpu_model;
2067 struct target_pt_regs regs1, *regs = &regs1;
2068 struct image_info info1, *info = &info1;
2069 TaskState ts1, *ts = &ts1;
2070 CPUState *env;
2071 int optind;
2072 const char *r;
2073 int gdbstub_port = 0;
2074 int drop_ld_preload = 0, environ_count = 0;
2075 char **target_environ, **wrk, **dst;
2076
2077 if (argc <= 1)
2078 usage();
2079
2080 /* init debug */
2081 cpu_set_log_filename(DEBUG_LOGFILE);
2082
2083 cpu_model = NULL;
2084 optind = 1;
2085 for(;;) {
2086 if (optind >= argc)
2087 break;
2088 r = argv[optind];
2089 if (r[0] != '-')
2090 break;
2091 optind++;
2092 r++;
2093 if (!strcmp(r, "-")) {
2094 break;
2095 } else if (!strcmp(r, "d")) {
2096 int mask;
2097 CPULogItem *item;
2098
2099 if (optind >= argc)
2100 break;
2101
2102 r = argv[optind++];
2103 mask = cpu_str_to_log_mask(r);
2104 if (!mask) {
2105 printf("Log items (comma separated):\n");
2106 for(item = cpu_log_items; item->mask != 0; item++) {
2107 printf("%-10s %s\n", item->name, item->help);
2108 }
2109 exit(1);
2110 }
2111 cpu_set_log(mask);
2112 } else if (!strcmp(r, "s")) {
2113 r = argv[optind++];
2114 x86_stack_size = strtol(r, (char **)&r, 0);
2115 if (x86_stack_size <= 0)
2116 usage();
2117 if (*r == 'M')
2118 x86_stack_size *= 1024 * 1024;
2119 else if (*r == 'k' || *r == 'K')
2120 x86_stack_size *= 1024;
2121 } else if (!strcmp(r, "L")) {
2122 interp_prefix = argv[optind++];
2123 } else if (!strcmp(r, "p")) {
2124 qemu_host_page_size = atoi(argv[optind++]);
2125 if (qemu_host_page_size == 0 ||
2126 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2127 fprintf(stderr, "page size must be a power of two\n");
2128 exit(1);
2129 }
2130 } else if (!strcmp(r, "g")) {
2131 gdbstub_port = atoi(argv[optind++]);
2132 } else if (!strcmp(r, "r")) {
2133 qemu_uname_release = argv[optind++];
2134 } else if (!strcmp(r, "cpu")) {
2135 cpu_model = argv[optind++];
2136 if (strcmp(cpu_model, "?") == 0) {
2137 /* XXX: implement xxx_cpu_list for targets that still miss it */
2138 #if defined(cpu_list)
2139 cpu_list(stdout, &fprintf);
2140 #endif
2141 _exit(1);
2142 }
2143 } else if (!strcmp(r, "drop-ld-preload")) {
2144 drop_ld_preload = 1;
2145 } else if (!strcmp(r, "strace")) {
2146 do_strace = 1;
2147 } else
2148 {
2149 usage();
2150 }
2151 }
2152 if (optind >= argc)
2153 usage();
2154 filename = argv[optind];
2155
2156 /* Zero out regs */
2157 memset(regs, 0, sizeof(struct target_pt_regs));
2158
2159 /* Zero out image_info */
2160 memset(info, 0, sizeof(struct image_info));
2161
2162 /* Scan interp_prefix dir for replacement files. */
2163 init_paths(interp_prefix);
2164
2165 if (cpu_model == NULL) {
2166 #if defined(TARGET_I386)
2167 #ifdef TARGET_X86_64
2168 cpu_model = "qemu64";
2169 #else
2170 cpu_model = "qemu32";
2171 #endif
2172 #elif defined(TARGET_ARM)
2173 cpu_model = "arm926";
2174 #elif defined(TARGET_M68K)
2175 cpu_model = "any";
2176 #elif defined(TARGET_SPARC)
2177 #ifdef TARGET_SPARC64
2178 cpu_model = "TI UltraSparc II";
2179 #else
2180 cpu_model = "Fujitsu MB86904";
2181 #endif
2182 #elif defined(TARGET_MIPS)
2183 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2184 cpu_model = "20Kc";
2185 #else
2186 cpu_model = "24Kf";
2187 #endif
2188 #elif defined(TARGET_PPC)
2189 #ifdef TARGET_PPC64
2190 cpu_model = "970";
2191 #else
2192 cpu_model = "750";
2193 #endif
2194 #else
2195 cpu_model = "any";
2196 #endif
2197 }
2198 cpu_exec_init_all(0);
2199 /* NOTE: we need to init the CPU at this stage to get
2200 qemu_host_page_size */
2201 env = cpu_init(cpu_model);
2202 if (!env) {
2203 fprintf(stderr, "Unable to find CPU definition\n");
2204 exit(1);
2205 }
2206 global_env = env;
2207
2208 if (getenv("QEMU_STRACE")) {
2209 do_strace = 1;
2210 }
2211
2212 wrk = environ;
2213 while (*(wrk++))
2214 environ_count++;
2215
2216 target_environ = malloc((environ_count + 1) * sizeof(char *));
2217 if (!target_environ)
2218 abort();
2219 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2220 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2221 continue;
2222 *(dst++) = strdup(*wrk);
2223 }
2224 *dst = NULL; /* NULL terminate target_environ */
2225
2226 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2227 printf("Error loading %s\n", filename);
2228 _exit(1);
2229 }
2230
2231 for (wrk = target_environ; *wrk; wrk++) {
2232 free(*wrk);
2233 }
2234
2235 free(target_environ);
2236
2237 if (loglevel) {
2238 page_dump(logfile);
2239
2240 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2241 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2242 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2243 info->start_code);
2244 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2245 info->start_data);
2246 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2247 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2248 info->start_stack);
2249 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2250 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2251 }
2252
2253 target_set_brk(info->brk);
2254 syscall_init();
2255 signal_init();
2256
2257 /* build Task State */
2258 memset(ts, 0, sizeof(TaskState));
2259 init_task_state(ts);
2260 ts->info = info;
2261 env->opaque = ts;
2262 env->user_mode_only = 1;
2263
2264 #if defined(TARGET_I386)
2265 cpu_x86_set_cpl(env, 3);
2266
2267 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2268 env->hflags |= HF_PE_MASK;
2269 if (env->cpuid_features & CPUID_SSE) {
2270 env->cr[4] |= CR4_OSFXSR_MASK;
2271 env->hflags |= HF_OSFXSR_MASK;
2272 }
2273 #ifndef TARGET_ABI32
2274 /* enable 64 bit mode if possible */
2275 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2276 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2277 exit(1);
2278 }
2279 env->cr[4] |= CR4_PAE_MASK;
2280 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2281 env->hflags |= HF_LMA_MASK;
2282 #endif
2283
2284 /* flags setup : we activate the IRQs by default as in user mode */
2285 env->eflags |= IF_MASK;
2286
2287 /* linux register setup */
2288 #ifndef TARGET_ABI32
2289 env->regs[R_EAX] = regs->rax;
2290 env->regs[R_EBX] = regs->rbx;
2291 env->regs[R_ECX] = regs->rcx;
2292 env->regs[R_EDX] = regs->rdx;
2293 env->regs[R_ESI] = regs->rsi;
2294 env->regs[R_EDI] = regs->rdi;
2295 env->regs[R_EBP] = regs->rbp;
2296 env->regs[R_ESP] = regs->rsp;
2297 env->eip = regs->rip;
2298 #else
2299 env->regs[R_EAX] = regs->eax;
2300 env->regs[R_EBX] = regs->ebx;
2301 env->regs[R_ECX] = regs->ecx;
2302 env->regs[R_EDX] = regs->edx;
2303 env->regs[R_ESI] = regs->esi;
2304 env->regs[R_EDI] = regs->edi;
2305 env->regs[R_EBP] = regs->ebp;
2306 env->regs[R_ESP] = regs->esp;
2307 env->eip = regs->eip;
2308 #endif
2309
2310 /* linux interrupt setup */
2311 env->idt.base = h2g(idt_table);
2312 env->idt.limit = sizeof(idt_table) - 1;
2313 set_idt(0, 0);
2314 set_idt(1, 0);
2315 set_idt(2, 0);
2316 set_idt(3, 3);
2317 set_idt(4, 3);
2318 set_idt(5, 0);
2319 set_idt(6, 0);
2320 set_idt(7, 0);
2321 set_idt(8, 0);
2322 set_idt(9, 0);
2323 set_idt(10, 0);
2324 set_idt(11, 0);
2325 set_idt(12, 0);
2326 set_idt(13, 0);
2327 set_idt(14, 0);
2328 set_idt(15, 0);
2329 set_idt(16, 0);
2330 set_idt(17, 0);
2331 set_idt(18, 0);
2332 set_idt(19, 0);
2333 set_idt(0x80, 3);
2334
2335 /* linux segment setup */
2336 {
2337 uint64_t *gdt_table;
2338 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2339 env->gdt.base = h2g((unsigned long)gdt_table);
2340 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2341 #ifdef TARGET_ABI32
2342 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2343 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2344 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2345 #else
2346 /* 64 bit code segment */
2347 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2348 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2349 DESC_L_MASK |
2350 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2351 #endif
2352 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2353 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2354 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2355 }
2356 cpu_x86_load_seg(env, R_CS, __USER_CS);
2357 cpu_x86_load_seg(env, R_SS, __USER_DS);
2358 #ifdef TARGET_ABI32
2359 cpu_x86_load_seg(env, R_DS, __USER_DS);
2360 cpu_x86_load_seg(env, R_ES, __USER_DS);
2361 cpu_x86_load_seg(env, R_FS, __USER_DS);
2362 cpu_x86_load_seg(env, R_GS, __USER_DS);
2363 /* This hack makes Wine work... */
2364 env->segs[R_FS].selector = 0;
2365 #else
2366 cpu_x86_load_seg(env, R_DS, 0);
2367 cpu_x86_load_seg(env, R_ES, 0);
2368 cpu_x86_load_seg(env, R_FS, 0);
2369 cpu_x86_load_seg(env, R_GS, 0);
2370 #endif
2371 #elif defined(TARGET_ARM)
2372 {
2373 int i;
2374 cpsr_write(env, regs->uregs[16], 0xffffffff);
2375 for(i = 0; i < 16; i++) {
2376 env->regs[i] = regs->uregs[i];
2377 }
2378 }
2379 #elif defined(TARGET_SPARC)
2380 {
2381 int i;
2382 env->pc = regs->pc;
2383 env->npc = regs->npc;
2384 env->y = regs->y;
2385 for(i = 0; i < 8; i++)
2386 env->gregs[i] = regs->u_regs[i];
2387 for(i = 0; i < 8; i++)
2388 env->regwptr[i] = regs->u_regs[i + 8];
2389 }
2390 #elif defined(TARGET_PPC)
2391 {
2392 int i;
2393
2394 #if defined(TARGET_PPC64)
2395 #if defined(TARGET_ABI32)
2396 env->msr &= ~((target_ulong)1 << MSR_SF);
2397 #else
2398 env->msr |= (target_ulong)1 << MSR_SF;
2399 #endif
2400 #endif
2401 env->nip = regs->nip;
2402 for(i = 0; i < 32; i++) {
2403 env->gpr[i] = regs->gpr[i];
2404 }
2405 }
2406 #elif defined(TARGET_M68K)
2407 {
2408 env->pc = regs->pc;
2409 env->dregs[0] = regs->d0;
2410 env->dregs[1] = regs->d1;
2411 env->dregs[2] = regs->d2;
2412 env->dregs[3] = regs->d3;
2413 env->dregs[4] = regs->d4;
2414 env->dregs[5] = regs->d5;
2415 env->dregs[6] = regs->d6;
2416 env->dregs[7] = regs->d7;
2417 env->aregs[0] = regs->a0;
2418 env->aregs[1] = regs->a1;
2419 env->aregs[2] = regs->a2;
2420 env->aregs[3] = regs->a3;
2421 env->aregs[4] = regs->a4;
2422 env->aregs[5] = regs->a5;
2423 env->aregs[6] = regs->a6;
2424 env->aregs[7] = regs->usp;
2425 env->sr = regs->sr;
2426 ts->sim_syscalls = 1;
2427 }
2428 #elif defined(TARGET_MIPS)
2429 {
2430 int i;
2431
2432 for(i = 0; i < 32; i++) {
2433 env->gpr[env->current_tc][i] = regs->regs[i];
2434 }
2435 env->PC[env->current_tc] = regs->cp0_epc;
2436 }
2437 #elif defined(TARGET_SH4)
2438 {
2439 int i;
2440
2441 for(i = 0; i < 16; i++) {
2442 env->gregs[i] = regs->regs[i];
2443 }
2444 env->pc = regs->pc;
2445 }
2446 #elif defined(TARGET_ALPHA)
2447 {
2448 int i;
2449
2450 for(i = 0; i < 28; i++) {
2451 env->ir[i] = ((abi_ulong *)regs)[i];
2452 }
2453 env->ipr[IPR_USP] = regs->usp;
2454 env->ir[30] = regs->usp;
2455 env->pc = regs->pc;
2456 env->unique = regs->unique;
2457 }
2458 #elif defined(TARGET_CRIS)
2459 {
2460 env->regs[0] = regs->r0;
2461 env->regs[1] = regs->r1;
2462 env->regs[2] = regs->r2;
2463 env->regs[3] = regs->r3;
2464 env->regs[4] = regs->r4;
2465 env->regs[5] = regs->r5;
2466 env->regs[6] = regs->r6;
2467 env->regs[7] = regs->r7;
2468 env->regs[8] = regs->r8;
2469 env->regs[9] = regs->r9;
2470 env->regs[10] = regs->r10;
2471 env->regs[11] = regs->r11;
2472 env->regs[12] = regs->r12;
2473 env->regs[13] = regs->r13;
2474 env->regs[14] = info->start_stack;
2475 env->regs[15] = regs->acr;
2476 env->pc = regs->erp;
2477 }
2478 #else
2479 #error unsupported target CPU
2480 #endif
2481
2482 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2483 ts->stack_base = info->start_stack;
2484 ts->heap_base = info->brk;
2485 /* This will be filled in on the first SYS_HEAPINFO call. */
2486 ts->heap_limit = 0;
2487 #endif
2488
2489 if (gdbstub_port) {
2490 gdbserver_start (gdbstub_port);
2491 gdb_handlesig(env, 0);
2492 }
2493 cpu_loop(env);
2494 /* never exits */
2495 return 0;
2496 }
QEMU mirror