4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qemu-version.h"
21 #include <sys/syscall.h>
22 #include <sys/resource.h>
24 #include "qapi/error.h"
26 #include "qemu/path.h"
27 #include "qemu/config-file.h"
28 #include "qemu/cutils.h"
29 #include "qemu/help_option.h"
31 #include "exec/exec-all.h"
33 #include "qemu/timer.h"
34 #include "qemu/envlist.h"
37 #include "trace/control.h"
42 static const char *filename
;
43 static const char *argv0
;
44 static int gdbstub_port
;
45 static envlist_t
*envlist
;
46 static const char *cpu_model
;
47 unsigned long mmap_min_addr
;
48 unsigned long guest_base
;
51 #define EXCP_DUMP(env, fmt, ...) \
53 CPUState *cs = ENV_GET_CPU(env); \
54 fprintf(stderr, fmt , ## __VA_ARGS__); \
55 cpu_dump_state(cs, stderr, fprintf, 0); \
56 if (qemu_log_separate()) { \
57 qemu_log(fmt, ## __VA_ARGS__); \
58 log_cpu_state(cs, 0); \
63 * When running 32-on-64 we should make sure we can fit all of the possible
64 * guest address space into a contiguous chunk of virtual host memory.
66 * This way we will never overlap with our own libraries or binaries or stack
67 * or anything else that QEMU maps.
69 * Many cpus reserve the high bit (or more than one for some 64-bit cpus)
70 * of the address for the kernel. Some cpus rely on this and user space
71 * uses the high bit(s) for pointer tagging and the like. For them, we
72 * must preserve the expected address space.
74 #ifndef MAX_RESERVED_VA
75 # if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
76 # if TARGET_VIRT_ADDR_SPACE_BITS == 32 && \
77 (TARGET_LONG_BITS == 32 || defined(TARGET_ABI32))
78 /* There are a number of places where we assign reserved_va to a variable
79 of type abi_ulong and expect it to fit. Avoid the last page. */
80 # define MAX_RESERVED_VA (0xfffffffful & TARGET_PAGE_MASK)
82 # define MAX_RESERVED_VA (1ul << TARGET_VIRT_ADDR_SPACE_BITS)
85 # define MAX_RESERVED_VA 0
89 /* That said, reserving *too* much vm space via mmap can run into problems
90 with rlimits, oom due to page table creation, etc. We will still try it,
91 if directed by the command-line option, but not by default. */
92 #if HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32
93 unsigned long reserved_va
= MAX_RESERVED_VA
;
95 unsigned long reserved_va
;
98 static void usage(int exitcode
);
100 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
101 const char *qemu_uname_release
;
103 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
104 we allocate a bigger stack. Need a better solution, for example
105 by remapping the process stack directly at the right place */
106 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
108 void gemu_log(const char *fmt
, ...)
113 vfprintf(stderr
, fmt
, ap
);
117 #if defined(TARGET_I386)
118 int cpu_get_pic_interrupt(CPUX86State
*env
)
124 /***********************************************************/
125 /* Helper routines for implementing atomic operations. */
127 /* Make sure everything is in a consistent state for calling fork(). */
128 void fork_start(void)
131 qemu_mutex_lock(&tb_ctx
.tb_lock
);
135 void fork_end(int child
)
137 mmap_fork_end(child
);
139 CPUState
*cpu
, *next_cpu
;
140 /* Child processes created by fork() only have a single thread.
141 Discard information about the parent threads. */
142 CPU_FOREACH_SAFE(cpu
, next_cpu
) {
143 if (cpu
!= thread_cpu
) {
144 QTAILQ_REMOVE(&cpus
, cpu
, node
);
147 qemu_mutex_init(&tb_ctx
.tb_lock
);
148 qemu_init_cpu_list();
149 gdbserver_fork(thread_cpu
);
151 qemu_mutex_unlock(&tb_ctx
.tb_lock
);
157 /***********************************************************/
158 /* CPUX86 core interface */
160 uint64_t cpu_get_tsc(CPUX86State
*env
)
162 return cpu_get_host_ticks();
165 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
170 e1
= (addr
<< 16) | (limit
& 0xffff);
171 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
178 static uint64_t *idt_table
;
180 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
181 uint64_t addr
, unsigned int sel
)
184 e1
= (addr
& 0xffff) | (sel
<< 16);
185 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
189 p
[2] = tswap32(addr
>> 32);
192 /* only dpl matters as we do only user space emulation */
193 static void set_idt(int n
, unsigned int dpl
)
195 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
198 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
199 uint32_t addr
, unsigned int sel
)
202 e1
= (addr
& 0xffff) | (sel
<< 16);
203 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
209 /* only dpl matters as we do only user space emulation */
210 static void set_idt(int n
, unsigned int dpl
)
212 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
216 void cpu_loop(CPUX86State
*env
)
218 CPUState
*cs
= CPU(x86_env_get_cpu(env
));
222 target_siginfo_t info
;
226 trapnr
= cpu_exec(cs
);
228 process_queued_cpu_work(cs
);
232 /* linux syscall from int $0x80 */
233 ret
= do_syscall(env
,
242 if (ret
== -TARGET_ERESTARTSYS
) {
244 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
245 env
->regs
[R_EAX
] = ret
;
250 /* linux syscall from syscall instruction */
251 ret
= do_syscall(env
,
260 if (ret
== -TARGET_ERESTARTSYS
) {
262 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
263 env
->regs
[R_EAX
] = ret
;
269 info
.si_signo
= TARGET_SIGBUS
;
271 info
.si_code
= TARGET_SI_KERNEL
;
272 info
._sifields
._sigfault
._addr
= 0;
273 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
276 /* XXX: potential problem if ABI32 */
277 #ifndef TARGET_X86_64
278 if (env
->eflags
& VM_MASK
) {
279 handle_vm86_fault(env
);
283 info
.si_signo
= TARGET_SIGSEGV
;
285 info
.si_code
= TARGET_SI_KERNEL
;
286 info
._sifields
._sigfault
._addr
= 0;
287 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
291 info
.si_signo
= TARGET_SIGSEGV
;
293 if (!(env
->error_code
& 1))
294 info
.si_code
= TARGET_SEGV_MAPERR
;
296 info
.si_code
= TARGET_SEGV_ACCERR
;
297 info
._sifields
._sigfault
._addr
= env
->cr
[2];
298 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
301 #ifndef TARGET_X86_64
302 if (env
->eflags
& VM_MASK
) {
303 handle_vm86_trap(env
, trapnr
);
307 /* division by zero */
308 info
.si_signo
= TARGET_SIGFPE
;
310 info
.si_code
= TARGET_FPE_INTDIV
;
311 info
._sifields
._sigfault
._addr
= env
->eip
;
312 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
317 #ifndef TARGET_X86_64
318 if (env
->eflags
& VM_MASK
) {
319 handle_vm86_trap(env
, trapnr
);
323 info
.si_signo
= TARGET_SIGTRAP
;
325 if (trapnr
== EXCP01_DB
) {
326 info
.si_code
= TARGET_TRAP_BRKPT
;
327 info
._sifields
._sigfault
._addr
= env
->eip
;
329 info
.si_code
= TARGET_SI_KERNEL
;
330 info
._sifields
._sigfault
._addr
= 0;
332 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
337 #ifndef TARGET_X86_64
338 if (env
->eflags
& VM_MASK
) {
339 handle_vm86_trap(env
, trapnr
);
343 info
.si_signo
= TARGET_SIGSEGV
;
345 info
.si_code
= TARGET_SI_KERNEL
;
346 info
._sifields
._sigfault
._addr
= 0;
347 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
351 info
.si_signo
= TARGET_SIGILL
;
353 info
.si_code
= TARGET_ILL_ILLOPN
;
354 info
._sifields
._sigfault
._addr
= env
->eip
;
355 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
358 /* just indicate that signals should be handled asap */
364 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
369 info
.si_code
= TARGET_TRAP_BRKPT
;
370 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
375 cpu_exec_step_atomic(cs
);
378 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
379 EXCP_DUMP(env
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
383 process_pending_signals(env
);
390 #define get_user_code_u32(x, gaddr, env) \
391 ({ abi_long __r = get_user_u32((x), (gaddr)); \
392 if (!__r && bswap_code(arm_sctlr_b(env))) { \
398 #define get_user_code_u16(x, gaddr, env) \
399 ({ abi_long __r = get_user_u16((x), (gaddr)); \
400 if (!__r && bswap_code(arm_sctlr_b(env))) { \
406 #define get_user_data_u32(x, gaddr, env) \
407 ({ abi_long __r = get_user_u32((x), (gaddr)); \
408 if (!__r && arm_cpu_bswap_data(env)) { \
414 #define get_user_data_u16(x, gaddr, env) \
415 ({ abi_long __r = get_user_u16((x), (gaddr)); \
416 if (!__r && arm_cpu_bswap_data(env)) { \
422 #define put_user_data_u32(x, gaddr, env) \
423 ({ typeof(x) __x = (x); \
424 if (arm_cpu_bswap_data(env)) { \
425 __x = bswap32(__x); \
427 put_user_u32(__x, (gaddr)); \
430 #define put_user_data_u16(x, gaddr, env) \
431 ({ typeof(x) __x = (x); \
432 if (arm_cpu_bswap_data(env)) { \
433 __x = bswap16(__x); \
435 put_user_u16(__x, (gaddr)); \
439 /* Commpage handling -- there is no commpage for AArch64 */
442 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
444 * r0 = pointer to oldval
445 * r1 = pointer to newval
446 * r2 = pointer to target value
449 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
450 * C set if *ptr was changed, clear if no exchange happened
452 * Note segv's in kernel helpers are a bit tricky, we can set the
453 * data address sensibly but the PC address is just the entry point.
455 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
457 uint64_t oldval
, newval
, val
;
459 target_siginfo_t info
;
461 /* Based on the 32 bit code in do_kernel_trap */
463 /* XXX: This only works between threads, not between processes.
464 It's probably possible to implement this with native host
465 operations. However things like ldrex/strex are much harder so
466 there's not much point trying. */
468 cpsr
= cpsr_read(env
);
471 if (get_user_u64(oldval
, env
->regs
[0])) {
472 env
->exception
.vaddress
= env
->regs
[0];
476 if (get_user_u64(newval
, env
->regs
[1])) {
477 env
->exception
.vaddress
= env
->regs
[1];
481 if (get_user_u64(val
, addr
)) {
482 env
->exception
.vaddress
= addr
;
489 if (put_user_u64(val
, addr
)) {
490 env
->exception
.vaddress
= addr
;
500 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
506 /* We get the PC of the entry address - which is as good as anything,
507 on a real kernel what you get depends on which mode it uses. */
508 info
.si_signo
= TARGET_SIGSEGV
;
510 /* XXX: check env->error_code */
511 info
.si_code
= TARGET_SEGV_MAPERR
;
512 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
513 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
516 /* Handle a jump to the kernel code page. */
518 do_kernel_trap(CPUARMState
*env
)
524 switch (env
->regs
[15]) {
525 case 0xffff0fa0: /* __kernel_memory_barrier */
526 /* ??? No-op. Will need to do better for SMP. */
528 case 0xffff0fc0: /* __kernel_cmpxchg */
529 /* XXX: This only works between threads, not between processes.
530 It's probably possible to implement this with native host
531 operations. However things like ldrex/strex are much harder so
532 there's not much point trying. */
534 cpsr
= cpsr_read(env
);
536 /* FIXME: This should SEGV if the access fails. */
537 if (get_user_u32(val
, addr
))
539 if (val
== env
->regs
[0]) {
541 /* FIXME: Check for segfaults. */
542 put_user_u32(val
, addr
);
549 cpsr_write(env
, cpsr
, CPSR_C
, CPSRWriteByInstr
);
552 case 0xffff0fe0: /* __kernel_get_tls */
553 env
->regs
[0] = cpu_get_tls(env
);
555 case 0xffff0f60: /* __kernel_cmpxchg64 */
556 arm_kernel_cmpxchg64_helper(env
);
562 /* Jump back to the caller. */
563 addr
= env
->regs
[14];
568 env
->regs
[15] = addr
;
573 void cpu_loop(CPUARMState
*env
)
575 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
577 unsigned int n
, insn
;
578 target_siginfo_t info
;
584 trapnr
= cpu_exec(cs
);
586 process_queued_cpu_work(cs
);
593 TaskState
*ts
= cs
->opaque
;
597 /* we handle the FPU emulation here, as Linux */
598 /* we get the opcode */
599 /* FIXME - what to do if get_user() fails? */
600 get_user_code_u32(opcode
, env
->regs
[15], env
);
602 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
603 if (rc
== 0) { /* illegal instruction */
604 info
.si_signo
= TARGET_SIGILL
;
606 info
.si_code
= TARGET_ILL_ILLOPN
;
607 info
._sifields
._sigfault
._addr
= env
->regs
[15];
608 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
609 } else if (rc
< 0) { /* FP exception */
612 /* translate softfloat flags to FPSR flags */
613 if (-rc
& float_flag_invalid
)
615 if (-rc
& float_flag_divbyzero
)
617 if (-rc
& float_flag_overflow
)
619 if (-rc
& float_flag_underflow
)
621 if (-rc
& float_flag_inexact
)
624 FPSR fpsr
= ts
->fpa
.fpsr
;
625 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
627 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
628 info
.si_signo
= TARGET_SIGFPE
;
631 /* ordered by priority, least first */
632 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
633 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
634 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
635 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
636 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
638 info
._sifields
._sigfault
._addr
= env
->regs
[15];
639 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
644 /* accumulate unenabled exceptions */
645 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
647 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
649 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
651 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
653 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
656 } else { /* everything OK */
667 if (trapnr
== EXCP_BKPT
) {
669 /* FIXME - what to do if get_user() fails? */
670 get_user_code_u16(insn
, env
->regs
[15], env
);
674 /* FIXME - what to do if get_user() fails? */
675 get_user_code_u32(insn
, env
->regs
[15], env
);
676 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
681 /* FIXME - what to do if get_user() fails? */
682 get_user_code_u16(insn
, env
->regs
[15] - 2, env
);
685 /* FIXME - what to do if get_user() fails? */
686 get_user_code_u32(insn
, env
->regs
[15] - 4, env
);
691 if (n
== ARM_NR_cacheflush
) {
693 } else if (n
== ARM_NR_semihosting
694 || n
== ARM_NR_thumb_semihosting
) {
695 env
->regs
[0] = do_arm_semihosting (env
);
696 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
698 if (env
->thumb
|| n
== 0) {
701 n
-= ARM_SYSCALL_BASE
;
704 if ( n
> ARM_NR_BASE
) {
706 case ARM_NR_cacheflush
:
710 cpu_set_tls(env
, env
->regs
[0]);
713 case ARM_NR_breakpoint
:
714 env
->regs
[15] -= env
->thumb
? 2 : 4;
717 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
719 env
->regs
[0] = -TARGET_ENOSYS
;
723 ret
= do_syscall(env
,
732 if (ret
== -TARGET_ERESTARTSYS
) {
733 env
->regs
[15] -= env
->thumb
? 2 : 4;
734 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
744 env
->regs
[0] = do_arm_semihosting(env
);
747 /* just indicate that signals should be handled asap */
749 case EXCP_PREFETCH_ABORT
:
750 case EXCP_DATA_ABORT
:
751 addr
= env
->exception
.vaddress
;
753 info
.si_signo
= TARGET_SIGSEGV
;
755 /* XXX: check env->error_code */
756 info
.si_code
= TARGET_SEGV_MAPERR
;
757 info
._sifields
._sigfault
._addr
= addr
;
758 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
766 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
771 info
.si_code
= TARGET_TRAP_BRKPT
;
772 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
776 case EXCP_KERNEL_TRAP
:
777 if (do_kernel_trap(env
))
781 /* nothing to do here for user-mode, just resume guest code */
784 cpu_exec_step_atomic(cs
);
788 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
791 process_pending_signals(env
);
797 /* AArch64 main loop */
798 void cpu_loop(CPUARMState
*env
)
800 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
803 target_siginfo_t info
;
807 trapnr
= cpu_exec(cs
);
809 process_queued_cpu_work(cs
);
813 ret
= do_syscall(env
,
822 if (ret
== -TARGET_ERESTARTSYS
) {
824 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
829 /* just indicate that signals should be handled asap */
832 info
.si_signo
= TARGET_SIGILL
;
834 info
.si_code
= TARGET_ILL_ILLOPN
;
835 info
._sifields
._sigfault
._addr
= env
->pc
;
836 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
838 case EXCP_PREFETCH_ABORT
:
839 case EXCP_DATA_ABORT
:
840 info
.si_signo
= TARGET_SIGSEGV
;
842 /* XXX: check env->error_code */
843 info
.si_code
= TARGET_SEGV_MAPERR
;
844 info
._sifields
._sigfault
._addr
= env
->exception
.vaddress
;
845 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
849 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
853 info
.si_code
= TARGET_TRAP_BRKPT
;
854 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
858 env
->xregs
[0] = do_arm_semihosting(env
);
861 /* nothing to do here for user-mode, just resume guest code */
864 cpu_exec_step_atomic(cs
);
867 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
870 process_pending_signals(env
);
871 /* Exception return on AArch64 always clears the exclusive monitor,
872 * so any return to running guest code implies this.
874 env
->exclusive_addr
= -1;
877 #endif /* ndef TARGET_ABI32 */
881 #ifdef TARGET_UNICORE32
883 void cpu_loop(CPUUniCore32State
*env
)
885 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
887 unsigned int n
, insn
;
888 target_siginfo_t info
;
892 trapnr
= cpu_exec(cs
);
894 process_queued_cpu_work(cs
);
900 get_user_u32(insn
, env
->regs
[31] - 4);
903 if (n
>= UC32_SYSCALL_BASE
) {
905 n
-= UC32_SYSCALL_BASE
;
906 if (n
== UC32_SYSCALL_NR_set_tls
) {
907 cpu_set_tls(env
, env
->regs
[0]);
910 abi_long ret
= do_syscall(env
,
919 if (ret
== -TARGET_ERESTARTSYS
) {
921 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
930 case UC32_EXCP_DTRAP
:
931 case UC32_EXCP_ITRAP
:
932 info
.si_signo
= TARGET_SIGSEGV
;
934 /* XXX: check env->error_code */
935 info
.si_code
= TARGET_SEGV_MAPERR
;
936 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
937 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
940 /* just indicate that signals should be handled asap */
946 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
950 info
.si_code
= TARGET_TRAP_BRKPT
;
951 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
956 cpu_exec_step_atomic(cs
);
961 process_pending_signals(env
);
965 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
971 #define SPARC64_STACK_BIAS 2047
975 /* WARNING: dealing with register windows _is_ complicated. More info
976 can be found at http://www.sics.se/~psm/sparcstack.html */
977 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
979 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
980 /* wrap handling : if cwp is on the last window, then we use the
981 registers 'after' the end */
982 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
983 index
+= 16 * env
->nwindows
;
987 /* save the register window 'cwp1' */
988 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
993 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
994 #ifdef TARGET_SPARC64
996 sp_ptr
+= SPARC64_STACK_BIAS
;
998 #if defined(DEBUG_WIN)
999 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1002 for(i
= 0; i
< 16; i
++) {
1003 /* FIXME - what to do if put_user() fails? */
1004 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1005 sp_ptr
+= sizeof(abi_ulong
);
1009 static void save_window(CPUSPARCState
*env
)
1011 #ifndef TARGET_SPARC64
1012 unsigned int new_wim
;
1013 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1014 ((1LL << env
->nwindows
) - 1);
1015 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1018 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1024 static void restore_window(CPUSPARCState
*env
)
1026 #ifndef TARGET_SPARC64
1027 unsigned int new_wim
;
1029 unsigned int i
, cwp1
;
1032 #ifndef TARGET_SPARC64
1033 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1034 ((1LL << env
->nwindows
) - 1);
1037 /* restore the invalid window */
1038 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1039 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1040 #ifdef TARGET_SPARC64
1042 sp_ptr
+= SPARC64_STACK_BIAS
;
1044 #if defined(DEBUG_WIN)
1045 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1048 for(i
= 0; i
< 16; i
++) {
1049 /* FIXME - what to do if get_user() fails? */
1050 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1051 sp_ptr
+= sizeof(abi_ulong
);
1053 #ifdef TARGET_SPARC64
1055 if (env
->cleanwin
< env
->nwindows
- 1)
1063 static void flush_windows(CPUSPARCState
*env
)
1069 /* if restore would invoke restore_window(), then we can stop */
1070 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1071 #ifndef TARGET_SPARC64
1072 if (env
->wim
& (1 << cwp1
))
1075 if (env
->canrestore
== 0)
1080 save_window_offset(env
, cwp1
);
1083 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1084 #ifndef TARGET_SPARC64
1085 /* set wim so that restore will reload the registers */
1086 env
->wim
= 1 << cwp1
;
1088 #if defined(DEBUG_WIN)
1089 printf("flush_windows: nb=%d\n", offset
- 1);
1093 void cpu_loop (CPUSPARCState
*env
)
1095 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1098 target_siginfo_t info
;
1102 trapnr
= cpu_exec(cs
);
1104 process_queued_cpu_work(cs
);
1106 /* Compute PSR before exposing state. */
1107 if (env
->cc_op
!= CC_OP_FLAGS
) {
1112 #ifndef TARGET_SPARC64
1119 ret
= do_syscall (env
, env
->gregs
[1],
1120 env
->regwptr
[0], env
->regwptr
[1],
1121 env
->regwptr
[2], env
->regwptr
[3],
1122 env
->regwptr
[4], env
->regwptr
[5],
1124 if (ret
== -TARGET_ERESTARTSYS
|| ret
== -TARGET_QEMU_ESIGRETURN
) {
1127 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1128 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1129 env
->xcc
|= PSR_CARRY
;
1131 env
->psr
|= PSR_CARRY
;
1135 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1136 env
->xcc
&= ~PSR_CARRY
;
1138 env
->psr
&= ~PSR_CARRY
;
1141 env
->regwptr
[0] = ret
;
1142 /* next instruction */
1144 env
->npc
= env
->npc
+ 4;
1146 case 0x83: /* flush windows */
1151 /* next instruction */
1153 env
->npc
= env
->npc
+ 4;
1155 #ifndef TARGET_SPARC64
1156 case TT_WIN_OVF
: /* window overflow */
1159 case TT_WIN_UNF
: /* window underflow */
1160 restore_window(env
);
1165 info
.si_signo
= TARGET_SIGSEGV
;
1167 /* XXX: check env->error_code */
1168 info
.si_code
= TARGET_SEGV_MAPERR
;
1169 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1170 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1174 case TT_SPILL
: /* window overflow */
1177 case TT_FILL
: /* window underflow */
1178 restore_window(env
);
1183 info
.si_signo
= TARGET_SIGSEGV
;
1185 /* XXX: check env->error_code */
1186 info
.si_code
= TARGET_SEGV_MAPERR
;
1187 if (trapnr
== TT_DFAULT
)
1188 info
._sifields
._sigfault
._addr
= env
->dmmu
.mmuregs
[4];
1190 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1191 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1194 #ifndef TARGET_ABI32
1197 sparc64_get_context(env
);
1201 sparc64_set_context(env
);
1205 case EXCP_INTERRUPT
:
1206 /* just indicate that signals should be handled asap */
1210 info
.si_signo
= TARGET_SIGILL
;
1212 info
.si_code
= TARGET_ILL_ILLOPC
;
1213 info
._sifields
._sigfault
._addr
= env
->pc
;
1214 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1221 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1224 info
.si_signo
= sig
;
1226 info
.si_code
= TARGET_TRAP_BRKPT
;
1227 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1232 cpu_exec_step_atomic(cs
);
1235 printf ("Unhandled trap: 0x%x\n", trapnr
);
1236 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1239 process_pending_signals (env
);
1246 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1248 return cpu_get_host_ticks();
1251 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1253 return cpu_ppc_get_tb(env
);
1256 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1258 return cpu_ppc_get_tb(env
) >> 32;
1261 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1263 return cpu_ppc_get_tb(env
);
1266 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1268 return cpu_ppc_get_tb(env
) >> 32;
1271 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1272 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1274 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1276 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1279 /* XXX: to be fixed */
1280 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1285 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1290 static int do_store_exclusive(CPUPPCState
*env
)
1293 target_ulong page_addr
;
1294 target_ulong val
, val2
__attribute__((unused
)) = 0;
1298 addr
= env
->reserve_ea
;
1299 page_addr
= addr
& TARGET_PAGE_MASK
;
1302 flags
= page_get_flags(page_addr
);
1303 if ((flags
& PAGE_READ
) == 0) {
1306 int reg
= env
->reserve_info
& 0x1f;
1307 int size
= env
->reserve_info
>> 5;
1310 if (addr
== env
->reserve_addr
) {
1312 case 1: segv
= get_user_u8(val
, addr
); break;
1313 case 2: segv
= get_user_u16(val
, addr
); break;
1314 case 4: segv
= get_user_u32(val
, addr
); break;
1315 #if defined(TARGET_PPC64)
1316 case 8: segv
= get_user_u64(val
, addr
); break;
1318 segv
= get_user_u64(val
, addr
);
1320 segv
= get_user_u64(val2
, addr
+ 8);
1327 if (!segv
&& val
== env
->reserve_val
) {
1328 val
= env
->gpr
[reg
];
1330 case 1: segv
= put_user_u8(val
, addr
); break;
1331 case 2: segv
= put_user_u16(val
, addr
); break;
1332 case 4: segv
= put_user_u32(val
, addr
); break;
1333 #if defined(TARGET_PPC64)
1334 case 8: segv
= put_user_u64(val
, addr
); break;
1336 if (val2
== env
->reserve_val2
) {
1339 val
= env
->gpr
[reg
+1];
1341 val2
= env
->gpr
[reg
+1];
1343 segv
= put_user_u64(val
, addr
);
1345 segv
= put_user_u64(val2
, addr
+ 8);
1358 env
->crf
[0] = (stored
<< 1) | xer_so
;
1359 env
->reserve_addr
= (target_ulong
)-1;
1369 void cpu_loop(CPUPPCState
*env
)
1371 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1372 target_siginfo_t info
;
1378 trapnr
= cpu_exec(cs
);
1380 process_queued_cpu_work(cs
);
1383 case POWERPC_EXCP_NONE
:
1386 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1387 cpu_abort(cs
, "Critical interrupt while in user mode. "
1390 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1391 cpu_abort(cs
, "Machine check exception while in user mode. "
1394 case POWERPC_EXCP_DSI
: /* Data storage exception */
1395 /* XXX: check this. Seems bugged */
1396 switch (env
->error_code
& 0xFF000000) {
1399 info
.si_signo
= TARGET_SIGSEGV
;
1401 info
.si_code
= TARGET_SEGV_MAPERR
;
1404 info
.si_signo
= TARGET_SIGILL
;
1406 info
.si_code
= TARGET_ILL_ILLADR
;
1409 info
.si_signo
= TARGET_SIGSEGV
;
1411 info
.si_code
= TARGET_SEGV_ACCERR
;
1414 /* Let's send a regular segfault... */
1415 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1417 info
.si_signo
= TARGET_SIGSEGV
;
1419 info
.si_code
= TARGET_SEGV_MAPERR
;
1422 info
._sifields
._sigfault
._addr
= env
->spr
[SPR_DAR
];
1423 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1425 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1426 /* XXX: check this */
1427 switch (env
->error_code
& 0xFF000000) {
1429 info
.si_signo
= TARGET_SIGSEGV
;
1431 info
.si_code
= TARGET_SEGV_MAPERR
;
1435 info
.si_signo
= TARGET_SIGSEGV
;
1437 info
.si_code
= TARGET_SEGV_ACCERR
;
1440 /* Let's send a regular segfault... */
1441 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1443 info
.si_signo
= TARGET_SIGSEGV
;
1445 info
.si_code
= TARGET_SEGV_MAPERR
;
1448 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1449 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1451 case POWERPC_EXCP_EXTERNAL
: /* External input */
1452 cpu_abort(cs
, "External interrupt while in user mode. "
1455 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1456 /* XXX: check this */
1457 info
.si_signo
= TARGET_SIGBUS
;
1459 info
.si_code
= TARGET_BUS_ADRALN
;
1460 info
._sifields
._sigfault
._addr
= env
->nip
;
1461 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1463 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1464 case POWERPC_EXCP_HV_EMU
: /* HV emulation */
1465 /* XXX: check this */
1466 switch (env
->error_code
& ~0xF) {
1467 case POWERPC_EXCP_FP
:
1468 info
.si_signo
= TARGET_SIGFPE
;
1470 switch (env
->error_code
& 0xF) {
1471 case POWERPC_EXCP_FP_OX
:
1472 info
.si_code
= TARGET_FPE_FLTOVF
;
1474 case POWERPC_EXCP_FP_UX
:
1475 info
.si_code
= TARGET_FPE_FLTUND
;
1477 case POWERPC_EXCP_FP_ZX
:
1478 case POWERPC_EXCP_FP_VXZDZ
:
1479 info
.si_code
= TARGET_FPE_FLTDIV
;
1481 case POWERPC_EXCP_FP_XX
:
1482 info
.si_code
= TARGET_FPE_FLTRES
;
1484 case POWERPC_EXCP_FP_VXSOFT
:
1485 info
.si_code
= TARGET_FPE_FLTINV
;
1487 case POWERPC_EXCP_FP_VXSNAN
:
1488 case POWERPC_EXCP_FP_VXISI
:
1489 case POWERPC_EXCP_FP_VXIDI
:
1490 case POWERPC_EXCP_FP_VXIMZ
:
1491 case POWERPC_EXCP_FP_VXVC
:
1492 case POWERPC_EXCP_FP_VXSQRT
:
1493 case POWERPC_EXCP_FP_VXCVI
:
1494 info
.si_code
= TARGET_FPE_FLTSUB
;
1497 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1502 case POWERPC_EXCP_INVAL
:
1503 info
.si_signo
= TARGET_SIGILL
;
1505 switch (env
->error_code
& 0xF) {
1506 case POWERPC_EXCP_INVAL_INVAL
:
1507 info
.si_code
= TARGET_ILL_ILLOPC
;
1509 case POWERPC_EXCP_INVAL_LSWX
:
1510 info
.si_code
= TARGET_ILL_ILLOPN
;
1512 case POWERPC_EXCP_INVAL_SPR
:
1513 info
.si_code
= TARGET_ILL_PRVREG
;
1515 case POWERPC_EXCP_INVAL_FP
:
1516 info
.si_code
= TARGET_ILL_COPROC
;
1519 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1520 env
->error_code
& 0xF);
1521 info
.si_code
= TARGET_ILL_ILLADR
;
1525 case POWERPC_EXCP_PRIV
:
1526 info
.si_signo
= TARGET_SIGILL
;
1528 switch (env
->error_code
& 0xF) {
1529 case POWERPC_EXCP_PRIV_OPC
:
1530 info
.si_code
= TARGET_ILL_PRVOPC
;
1532 case POWERPC_EXCP_PRIV_REG
:
1533 info
.si_code
= TARGET_ILL_PRVREG
;
1536 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1537 env
->error_code
& 0xF);
1538 info
.si_code
= TARGET_ILL_PRVOPC
;
1542 case POWERPC_EXCP_TRAP
:
1543 cpu_abort(cs
, "Tried to call a TRAP\n");
1546 /* Should not happen ! */
1547 cpu_abort(cs
, "Unknown program exception (%02x)\n",
1551 info
._sifields
._sigfault
._addr
= env
->nip
;
1552 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1554 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1555 info
.si_signo
= TARGET_SIGILL
;
1557 info
.si_code
= TARGET_ILL_COPROC
;
1558 info
._sifields
._sigfault
._addr
= env
->nip
;
1559 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1561 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1562 cpu_abort(cs
, "Syscall exception while in user mode. "
1565 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1566 info
.si_signo
= TARGET_SIGILL
;
1568 info
.si_code
= TARGET_ILL_COPROC
;
1569 info
._sifields
._sigfault
._addr
= env
->nip
;
1570 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1572 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1573 cpu_abort(cs
, "Decrementer interrupt while in user mode. "
1576 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1577 cpu_abort(cs
, "Fix interval timer interrupt while in user mode. "
1580 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1581 cpu_abort(cs
, "Watchdog timer interrupt while in user mode. "
1584 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1585 cpu_abort(cs
, "Data TLB exception while in user mode. "
1588 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1589 cpu_abort(cs
, "Instruction TLB exception while in user mode. "
1592 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1593 info
.si_signo
= TARGET_SIGILL
;
1595 info
.si_code
= TARGET_ILL_COPROC
;
1596 info
._sifields
._sigfault
._addr
= env
->nip
;
1597 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1599 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1600 cpu_abort(cs
, "Embedded floating-point data IRQ not handled\n");
1602 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1603 cpu_abort(cs
, "Embedded floating-point round IRQ not handled\n");
1605 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1606 cpu_abort(cs
, "Performance monitor exception not handled\n");
1608 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1609 cpu_abort(cs
, "Doorbell interrupt while in user mode. "
1612 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1613 cpu_abort(cs
, "Doorbell critical interrupt while in user mode. "
1616 case POWERPC_EXCP_RESET
: /* System reset exception */
1617 cpu_abort(cs
, "Reset interrupt while in user mode. "
1620 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1621 cpu_abort(cs
, "Data segment exception while in user mode. "
1624 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1625 cpu_abort(cs
, "Instruction segment exception "
1626 "while in user mode. Aborting\n");
1628 /* PowerPC 64 with hypervisor mode support */
1629 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1630 cpu_abort(cs
, "Hypervisor decrementer interrupt "
1631 "while in user mode. Aborting\n");
1633 case POWERPC_EXCP_TRACE
: /* Trace exception */
1635 * we use this exception to emulate step-by-step execution mode.
1638 /* PowerPC 64 with hypervisor mode support */
1639 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1640 cpu_abort(cs
, "Hypervisor data storage exception "
1641 "while in user mode. Aborting\n");
1643 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1644 cpu_abort(cs
, "Hypervisor instruction storage exception "
1645 "while in user mode. Aborting\n");
1647 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1648 cpu_abort(cs
, "Hypervisor data segment exception "
1649 "while in user mode. Aborting\n");
1651 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1652 cpu_abort(cs
, "Hypervisor instruction segment exception "
1653 "while in user mode. Aborting\n");
1655 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1656 info
.si_signo
= TARGET_SIGILL
;
1658 info
.si_code
= TARGET_ILL_COPROC
;
1659 info
._sifields
._sigfault
._addr
= env
->nip
;
1660 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1662 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1663 cpu_abort(cs
, "Programmable interval timer interrupt "
1664 "while in user mode. Aborting\n");
1666 case POWERPC_EXCP_IO
: /* IO error exception */
1667 cpu_abort(cs
, "IO error exception while in user mode. "
1670 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1671 cpu_abort(cs
, "Run mode exception while in user mode. "
1674 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1675 cpu_abort(cs
, "Emulation trap exception not handled\n");
1677 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1678 cpu_abort(cs
, "Instruction fetch TLB exception "
1679 "while in user-mode. Aborting");
1681 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1682 cpu_abort(cs
, "Data load TLB exception while in user-mode. "
1685 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1686 cpu_abort(cs
, "Data store TLB exception while in user-mode. "
1689 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1690 cpu_abort(cs
, "Floating-point assist exception not handled\n");
1692 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1693 cpu_abort(cs
, "Instruction address breakpoint exception "
1696 case POWERPC_EXCP_SMI
: /* System management interrupt */
1697 cpu_abort(cs
, "System management interrupt while in user mode. "
1700 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1701 cpu_abort(cs
, "Thermal interrupt interrupt while in user mode. "
1704 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1705 cpu_abort(cs
, "Performance monitor exception not handled\n");
1707 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1708 cpu_abort(cs
, "Vector assist exception not handled\n");
1710 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1711 cpu_abort(cs
, "Soft patch exception not handled\n");
1713 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1714 cpu_abort(cs
, "Maintenance exception while in user mode. "
1717 case POWERPC_EXCP_STOP
: /* stop translation */
1718 /* We did invalidate the instruction cache. Go on */
1720 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1721 /* We just stopped because of a branch. Go on */
1723 case POWERPC_EXCP_SYSCALL_USER
:
1724 /* system call in user-mode emulation */
1726 * PPC ABI uses overflow flag in cr0 to signal an error
1729 env
->crf
[0] &= ~0x1;
1731 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1732 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1734 if (ret
== -TARGET_ERESTARTSYS
) {
1738 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1739 /* Returning from a successful sigreturn syscall.
1740 Avoid corrupting register state. */
1743 if (ret
> (target_ulong
)(-515)) {
1749 case POWERPC_EXCP_STCX
:
1750 if (do_store_exclusive(env
)) {
1751 info
.si_signo
= TARGET_SIGSEGV
;
1753 info
.si_code
= TARGET_SEGV_MAPERR
;
1754 info
._sifields
._sigfault
._addr
= env
->nip
;
1755 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1762 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
1764 info
.si_signo
= sig
;
1766 info
.si_code
= TARGET_TRAP_BRKPT
;
1767 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
1771 case EXCP_INTERRUPT
:
1772 /* just indicate that signals should be handled asap */
1775 cpu_exec_step_atomic(cs
);
1778 cpu_abort(cs
, "Unknown exception 0x%x. Aborting\n", trapnr
);
1781 process_pending_signals(env
);
1788 # ifdef TARGET_ABI_MIPSO32
1789 # define MIPS_SYS(name, args) args,
1790 static const uint8_t mips_syscall_args
[] = {
1791 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1792 MIPS_SYS(sys_exit
, 1)
1793 MIPS_SYS(sys_fork
, 0)
1794 MIPS_SYS(sys_read
, 3)
1795 MIPS_SYS(sys_write
, 3)
1796 MIPS_SYS(sys_open
, 3) /* 4005 */
1797 MIPS_SYS(sys_close
, 1)
1798 MIPS_SYS(sys_waitpid
, 3)
1799 MIPS_SYS(sys_creat
, 2)
1800 MIPS_SYS(sys_link
, 2)
1801 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1802 MIPS_SYS(sys_execve
, 0)
1803 MIPS_SYS(sys_chdir
, 1)
1804 MIPS_SYS(sys_time
, 1)
1805 MIPS_SYS(sys_mknod
, 3)
1806 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1807 MIPS_SYS(sys_lchown
, 3)
1808 MIPS_SYS(sys_ni_syscall
, 0)
1809 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1810 MIPS_SYS(sys_lseek
, 3)
1811 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1812 MIPS_SYS(sys_mount
, 5)
1813 MIPS_SYS(sys_umount
, 1)
1814 MIPS_SYS(sys_setuid
, 1)
1815 MIPS_SYS(sys_getuid
, 0)
1816 MIPS_SYS(sys_stime
, 1) /* 4025 */
1817 MIPS_SYS(sys_ptrace
, 4)
1818 MIPS_SYS(sys_alarm
, 1)
1819 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1820 MIPS_SYS(sys_pause
, 0)
1821 MIPS_SYS(sys_utime
, 2) /* 4030 */
1822 MIPS_SYS(sys_ni_syscall
, 0)
1823 MIPS_SYS(sys_ni_syscall
, 0)
1824 MIPS_SYS(sys_access
, 2)
1825 MIPS_SYS(sys_nice
, 1)
1826 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1827 MIPS_SYS(sys_sync
, 0)
1828 MIPS_SYS(sys_kill
, 2)
1829 MIPS_SYS(sys_rename
, 2)
1830 MIPS_SYS(sys_mkdir
, 2)
1831 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1832 MIPS_SYS(sys_dup
, 1)
1833 MIPS_SYS(sys_pipe
, 0)
1834 MIPS_SYS(sys_times
, 1)
1835 MIPS_SYS(sys_ni_syscall
, 0)
1836 MIPS_SYS(sys_brk
, 1) /* 4045 */
1837 MIPS_SYS(sys_setgid
, 1)
1838 MIPS_SYS(sys_getgid
, 0)
1839 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1840 MIPS_SYS(sys_geteuid
, 0)
1841 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1842 MIPS_SYS(sys_acct
, 0)
1843 MIPS_SYS(sys_umount2
, 2)
1844 MIPS_SYS(sys_ni_syscall
, 0)
1845 MIPS_SYS(sys_ioctl
, 3)
1846 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1847 MIPS_SYS(sys_ni_syscall
, 2)
1848 MIPS_SYS(sys_setpgid
, 2)
1849 MIPS_SYS(sys_ni_syscall
, 0)
1850 MIPS_SYS(sys_olduname
, 1)
1851 MIPS_SYS(sys_umask
, 1) /* 4060 */
1852 MIPS_SYS(sys_chroot
, 1)
1853 MIPS_SYS(sys_ustat
, 2)
1854 MIPS_SYS(sys_dup2
, 2)
1855 MIPS_SYS(sys_getppid
, 0)
1856 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1857 MIPS_SYS(sys_setsid
, 0)
1858 MIPS_SYS(sys_sigaction
, 3)
1859 MIPS_SYS(sys_sgetmask
, 0)
1860 MIPS_SYS(sys_ssetmask
, 1)
1861 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1862 MIPS_SYS(sys_setregid
, 2)
1863 MIPS_SYS(sys_sigsuspend
, 0)
1864 MIPS_SYS(sys_sigpending
, 1)
1865 MIPS_SYS(sys_sethostname
, 2)
1866 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1867 MIPS_SYS(sys_getrlimit
, 2)
1868 MIPS_SYS(sys_getrusage
, 2)
1869 MIPS_SYS(sys_gettimeofday
, 2)
1870 MIPS_SYS(sys_settimeofday
, 2)
1871 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1872 MIPS_SYS(sys_setgroups
, 2)
1873 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1874 MIPS_SYS(sys_symlink
, 2)
1875 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1876 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1877 MIPS_SYS(sys_uselib
, 1)
1878 MIPS_SYS(sys_swapon
, 2)
1879 MIPS_SYS(sys_reboot
, 3)
1880 MIPS_SYS(old_readdir
, 3)
1881 MIPS_SYS(old_mmap
, 6) /* 4090 */
1882 MIPS_SYS(sys_munmap
, 2)
1883 MIPS_SYS(sys_truncate
, 2)
1884 MIPS_SYS(sys_ftruncate
, 2)
1885 MIPS_SYS(sys_fchmod
, 2)
1886 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1887 MIPS_SYS(sys_getpriority
, 2)
1888 MIPS_SYS(sys_setpriority
, 3)
1889 MIPS_SYS(sys_ni_syscall
, 0)
1890 MIPS_SYS(sys_statfs
, 2)
1891 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1892 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1893 MIPS_SYS(sys_socketcall
, 2)
1894 MIPS_SYS(sys_syslog
, 3)
1895 MIPS_SYS(sys_setitimer
, 3)
1896 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1897 MIPS_SYS(sys_newstat
, 2)
1898 MIPS_SYS(sys_newlstat
, 2)
1899 MIPS_SYS(sys_newfstat
, 2)
1900 MIPS_SYS(sys_uname
, 1)
1901 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1902 MIPS_SYS(sys_vhangup
, 0)
1903 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1904 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1905 MIPS_SYS(sys_wait4
, 4)
1906 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1907 MIPS_SYS(sys_sysinfo
, 1)
1908 MIPS_SYS(sys_ipc
, 6)
1909 MIPS_SYS(sys_fsync
, 1)
1910 MIPS_SYS(sys_sigreturn
, 0)
1911 MIPS_SYS(sys_clone
, 6) /* 4120 */
1912 MIPS_SYS(sys_setdomainname
, 2)
1913 MIPS_SYS(sys_newuname
, 1)
1914 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1915 MIPS_SYS(sys_adjtimex
, 1)
1916 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1917 MIPS_SYS(sys_sigprocmask
, 3)
1918 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1919 MIPS_SYS(sys_init_module
, 5)
1920 MIPS_SYS(sys_delete_module
, 1)
1921 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1922 MIPS_SYS(sys_quotactl
, 0)
1923 MIPS_SYS(sys_getpgid
, 1)
1924 MIPS_SYS(sys_fchdir
, 1)
1925 MIPS_SYS(sys_bdflush
, 2)
1926 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1927 MIPS_SYS(sys_personality
, 1)
1928 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1929 MIPS_SYS(sys_setfsuid
, 1)
1930 MIPS_SYS(sys_setfsgid
, 1)
1931 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1932 MIPS_SYS(sys_getdents
, 3)
1933 MIPS_SYS(sys_select
, 5)
1934 MIPS_SYS(sys_flock
, 2)
1935 MIPS_SYS(sys_msync
, 3)
1936 MIPS_SYS(sys_readv
, 3) /* 4145 */
1937 MIPS_SYS(sys_writev
, 3)
1938 MIPS_SYS(sys_cacheflush
, 3)
1939 MIPS_SYS(sys_cachectl
, 3)
1940 MIPS_SYS(sys_sysmips
, 4)
1941 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1942 MIPS_SYS(sys_getsid
, 1)
1943 MIPS_SYS(sys_fdatasync
, 0)
1944 MIPS_SYS(sys_sysctl
, 1)
1945 MIPS_SYS(sys_mlock
, 2)
1946 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1947 MIPS_SYS(sys_mlockall
, 1)
1948 MIPS_SYS(sys_munlockall
, 0)
1949 MIPS_SYS(sys_sched_setparam
, 2)
1950 MIPS_SYS(sys_sched_getparam
, 2)
1951 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1952 MIPS_SYS(sys_sched_getscheduler
, 1)
1953 MIPS_SYS(sys_sched_yield
, 0)
1954 MIPS_SYS(sys_sched_get_priority_max
, 1)
1955 MIPS_SYS(sys_sched_get_priority_min
, 1)
1956 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1957 MIPS_SYS(sys_nanosleep
, 2)
1958 MIPS_SYS(sys_mremap
, 5)
1959 MIPS_SYS(sys_accept
, 3)
1960 MIPS_SYS(sys_bind
, 3)
1961 MIPS_SYS(sys_connect
, 3) /* 4170 */
1962 MIPS_SYS(sys_getpeername
, 3)
1963 MIPS_SYS(sys_getsockname
, 3)
1964 MIPS_SYS(sys_getsockopt
, 5)
1965 MIPS_SYS(sys_listen
, 2)
1966 MIPS_SYS(sys_recv
, 4) /* 4175 */
1967 MIPS_SYS(sys_recvfrom
, 6)
1968 MIPS_SYS(sys_recvmsg
, 3)
1969 MIPS_SYS(sys_send
, 4)
1970 MIPS_SYS(sys_sendmsg
, 3)
1971 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1972 MIPS_SYS(sys_setsockopt
, 5)
1973 MIPS_SYS(sys_shutdown
, 2)
1974 MIPS_SYS(sys_socket
, 3)
1975 MIPS_SYS(sys_socketpair
, 4)
1976 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1977 MIPS_SYS(sys_getresuid
, 3)
1978 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1979 MIPS_SYS(sys_poll
, 3)
1980 MIPS_SYS(sys_nfsservctl
, 3)
1981 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1982 MIPS_SYS(sys_getresgid
, 3)
1983 MIPS_SYS(sys_prctl
, 5)
1984 MIPS_SYS(sys_rt_sigreturn
, 0)
1985 MIPS_SYS(sys_rt_sigaction
, 4)
1986 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1987 MIPS_SYS(sys_rt_sigpending
, 2)
1988 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1989 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1990 MIPS_SYS(sys_rt_sigsuspend
, 0)
1991 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1992 MIPS_SYS(sys_pwrite64
, 6)
1993 MIPS_SYS(sys_chown
, 3)
1994 MIPS_SYS(sys_getcwd
, 2)
1995 MIPS_SYS(sys_capget
, 2)
1996 MIPS_SYS(sys_capset
, 2) /* 4205 */
1997 MIPS_SYS(sys_sigaltstack
, 2)
1998 MIPS_SYS(sys_sendfile
, 4)
1999 MIPS_SYS(sys_ni_syscall
, 0)
2000 MIPS_SYS(sys_ni_syscall
, 0)
2001 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
2002 MIPS_SYS(sys_truncate64
, 4)
2003 MIPS_SYS(sys_ftruncate64
, 4)
2004 MIPS_SYS(sys_stat64
, 2)
2005 MIPS_SYS(sys_lstat64
, 2)
2006 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2007 MIPS_SYS(sys_pivot_root
, 2)
2008 MIPS_SYS(sys_mincore
, 3)
2009 MIPS_SYS(sys_madvise
, 3)
2010 MIPS_SYS(sys_getdents64
, 3)
2011 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2012 MIPS_SYS(sys_ni_syscall
, 0)
2013 MIPS_SYS(sys_gettid
, 0)
2014 MIPS_SYS(sys_readahead
, 5)
2015 MIPS_SYS(sys_setxattr
, 5)
2016 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2017 MIPS_SYS(sys_fsetxattr
, 5)
2018 MIPS_SYS(sys_getxattr
, 4)
2019 MIPS_SYS(sys_lgetxattr
, 4)
2020 MIPS_SYS(sys_fgetxattr
, 4)
2021 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2022 MIPS_SYS(sys_llistxattr
, 3)
2023 MIPS_SYS(sys_flistxattr
, 3)
2024 MIPS_SYS(sys_removexattr
, 2)
2025 MIPS_SYS(sys_lremovexattr
, 2)
2026 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2027 MIPS_SYS(sys_tkill
, 2)
2028 MIPS_SYS(sys_sendfile64
, 5)
2029 MIPS_SYS(sys_futex
, 6)
2030 MIPS_SYS(sys_sched_setaffinity
, 3)
2031 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2032 MIPS_SYS(sys_io_setup
, 2)
2033 MIPS_SYS(sys_io_destroy
, 1)
2034 MIPS_SYS(sys_io_getevents
, 5)
2035 MIPS_SYS(sys_io_submit
, 3)
2036 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2037 MIPS_SYS(sys_exit_group
, 1)
2038 MIPS_SYS(sys_lookup_dcookie
, 3)
2039 MIPS_SYS(sys_epoll_create
, 1)
2040 MIPS_SYS(sys_epoll_ctl
, 4)
2041 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2042 MIPS_SYS(sys_remap_file_pages
, 5)
2043 MIPS_SYS(sys_set_tid_address
, 1)
2044 MIPS_SYS(sys_restart_syscall
, 0)
2045 MIPS_SYS(sys_fadvise64_64
, 7)
2046 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2047 MIPS_SYS(sys_fstatfs64
, 2)
2048 MIPS_SYS(sys_timer_create
, 3)
2049 MIPS_SYS(sys_timer_settime
, 4)
2050 MIPS_SYS(sys_timer_gettime
, 2)
2051 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2052 MIPS_SYS(sys_timer_delete
, 1)
2053 MIPS_SYS(sys_clock_settime
, 2)
2054 MIPS_SYS(sys_clock_gettime
, 2)
2055 MIPS_SYS(sys_clock_getres
, 2)
2056 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2057 MIPS_SYS(sys_tgkill
, 3)
2058 MIPS_SYS(sys_utimes
, 2)
2059 MIPS_SYS(sys_mbind
, 4)
2060 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2061 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2062 MIPS_SYS(sys_mq_open
, 4)
2063 MIPS_SYS(sys_mq_unlink
, 1)
2064 MIPS_SYS(sys_mq_timedsend
, 5)
2065 MIPS_SYS(sys_mq_timedreceive
, 5)
2066 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2067 MIPS_SYS(sys_mq_getsetattr
, 3)
2068 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2069 MIPS_SYS(sys_waitid
, 4)
2070 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2071 MIPS_SYS(sys_add_key
, 5)
2072 MIPS_SYS(sys_request_key
, 4)
2073 MIPS_SYS(sys_keyctl
, 5)
2074 MIPS_SYS(sys_set_thread_area
, 1)
2075 MIPS_SYS(sys_inotify_init
, 0)
2076 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2077 MIPS_SYS(sys_inotify_rm_watch
, 2)
2078 MIPS_SYS(sys_migrate_pages
, 4)
2079 MIPS_SYS(sys_openat
, 4)
2080 MIPS_SYS(sys_mkdirat
, 3)
2081 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2082 MIPS_SYS(sys_fchownat
, 5)
2083 MIPS_SYS(sys_futimesat
, 3)
2084 MIPS_SYS(sys_fstatat64
, 4)
2085 MIPS_SYS(sys_unlinkat
, 3)
2086 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2087 MIPS_SYS(sys_linkat
, 5)
2088 MIPS_SYS(sys_symlinkat
, 3)
2089 MIPS_SYS(sys_readlinkat
, 4)
2090 MIPS_SYS(sys_fchmodat
, 3)
2091 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2092 MIPS_SYS(sys_pselect6
, 6)
2093 MIPS_SYS(sys_ppoll
, 5)
2094 MIPS_SYS(sys_unshare
, 1)
2095 MIPS_SYS(sys_splice
, 6)
2096 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2097 MIPS_SYS(sys_tee
, 4)
2098 MIPS_SYS(sys_vmsplice
, 4)
2099 MIPS_SYS(sys_move_pages
, 6)
2100 MIPS_SYS(sys_set_robust_list
, 2)
2101 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2102 MIPS_SYS(sys_kexec_load
, 4)
2103 MIPS_SYS(sys_getcpu
, 3)
2104 MIPS_SYS(sys_epoll_pwait
, 6)
2105 MIPS_SYS(sys_ioprio_set
, 3)
2106 MIPS_SYS(sys_ioprio_get
, 2)
2107 MIPS_SYS(sys_utimensat
, 4)
2108 MIPS_SYS(sys_signalfd
, 3)
2109 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2110 MIPS_SYS(sys_eventfd
, 1)
2111 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2112 MIPS_SYS(sys_timerfd_create
, 2)
2113 MIPS_SYS(sys_timerfd_gettime
, 2)
2114 MIPS_SYS(sys_timerfd_settime
, 4)
2115 MIPS_SYS(sys_signalfd4
, 4)
2116 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2117 MIPS_SYS(sys_epoll_create1
, 1)
2118 MIPS_SYS(sys_dup3
, 3)
2119 MIPS_SYS(sys_pipe2
, 2)
2120 MIPS_SYS(sys_inotify_init1
, 1)
2121 MIPS_SYS(sys_preadv
, 5) /* 4330 */
2122 MIPS_SYS(sys_pwritev
, 5)
2123 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2124 MIPS_SYS(sys_perf_event_open
, 5)
2125 MIPS_SYS(sys_accept4
, 4)
2126 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2127 MIPS_SYS(sys_fanotify_init
, 2)
2128 MIPS_SYS(sys_fanotify_mark
, 6)
2129 MIPS_SYS(sys_prlimit64
, 4)
2130 MIPS_SYS(sys_name_to_handle_at
, 5)
2131 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2132 MIPS_SYS(sys_clock_adjtime
, 2)
2133 MIPS_SYS(sys_syncfs
, 1)
2134 MIPS_SYS(sys_sendmmsg
, 4)
2135 MIPS_SYS(sys_setns
, 2)
2136 MIPS_SYS(sys_process_vm_readv
, 6) /* 345 */
2137 MIPS_SYS(sys_process_vm_writev
, 6)
2138 MIPS_SYS(sys_kcmp
, 5)
2139 MIPS_SYS(sys_finit_module
, 3)
2140 MIPS_SYS(sys_sched_setattr
, 2)
2141 MIPS_SYS(sys_sched_getattr
, 3) /* 350 */
2142 MIPS_SYS(sys_renameat2
, 5)
2143 MIPS_SYS(sys_seccomp
, 3)
2144 MIPS_SYS(sys_getrandom
, 3)
2145 MIPS_SYS(sys_memfd_create
, 2)
2146 MIPS_SYS(sys_bpf
, 3) /* 355 */
2147 MIPS_SYS(sys_execveat
, 5)
2148 MIPS_SYS(sys_userfaultfd
, 1)
2149 MIPS_SYS(sys_membarrier
, 2)
2150 MIPS_SYS(sys_mlock2
, 3)
2151 MIPS_SYS(sys_copy_file_range
, 6) /* 360 */
2152 MIPS_SYS(sys_preadv2
, 6)
2153 MIPS_SYS(sys_pwritev2
, 6)
2158 static int do_store_exclusive(CPUMIPSState
*env
)
2161 target_ulong page_addr
;
2169 page_addr
= addr
& TARGET_PAGE_MASK
;
2172 flags
= page_get_flags(page_addr
);
2173 if ((flags
& PAGE_READ
) == 0) {
2176 reg
= env
->llreg
& 0x1f;
2177 d
= (env
->llreg
& 0x20) != 0;
2179 segv
= get_user_s64(val
, addr
);
2181 segv
= get_user_s32(val
, addr
);
2184 if (val
!= env
->llval
) {
2185 env
->active_tc
.gpr
[reg
] = 0;
2188 segv
= put_user_u64(env
->llnewval
, addr
);
2190 segv
= put_user_u32(env
->llnewval
, addr
);
2193 env
->active_tc
.gpr
[reg
] = 1;
2200 env
->active_tc
.PC
+= 4;
2213 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2221 info
->si_signo
= TARGET_SIGFPE
;
2223 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2224 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2228 info
->si_signo
= TARGET_SIGTRAP
;
2230 queue_signal(env
, info
->si_signo
, QEMU_SI_FAULT
, &*info
);
2238 void cpu_loop(CPUMIPSState
*env
)
2240 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2241 target_siginfo_t info
;
2244 # ifdef TARGET_ABI_MIPSO32
2245 unsigned int syscall_num
;
2250 trapnr
= cpu_exec(cs
);
2252 process_queued_cpu_work(cs
);
2256 env
->active_tc
.PC
+= 4;
2257 # ifdef TARGET_ABI_MIPSO32
2258 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2259 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2260 ret
= -TARGET_ENOSYS
;
2264 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2266 nb_args
= mips_syscall_args
[syscall_num
];
2267 sp_reg
= env
->active_tc
.gpr
[29];
2269 /* these arguments are taken from the stack */
2271 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2275 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2279 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2283 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2289 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2290 env
->active_tc
.gpr
[4],
2291 env
->active_tc
.gpr
[5],
2292 env
->active_tc
.gpr
[6],
2293 env
->active_tc
.gpr
[7],
2294 arg5
, arg6
, arg7
, arg8
);
2298 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2299 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2300 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2301 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2302 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2304 if (ret
== -TARGET_ERESTARTSYS
) {
2305 env
->active_tc
.PC
-= 4;
2308 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2309 /* Returning from a successful sigreturn syscall.
2310 Avoid clobbering register state. */
2313 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2314 env
->active_tc
.gpr
[7] = 1; /* error flag */
2317 env
->active_tc
.gpr
[7] = 0; /* error flag */
2319 env
->active_tc
.gpr
[2] = ret
;
2325 info
.si_signo
= TARGET_SIGSEGV
;
2327 /* XXX: check env->error_code */
2328 info
.si_code
= TARGET_SEGV_MAPERR
;
2329 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2330 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2334 info
.si_signo
= TARGET_SIGILL
;
2337 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2339 case EXCP_INTERRUPT
:
2340 /* just indicate that signals should be handled asap */
2346 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2349 info
.si_signo
= sig
;
2351 info
.si_code
= TARGET_TRAP_BRKPT
;
2352 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2357 if (do_store_exclusive(env
)) {
2358 info
.si_signo
= TARGET_SIGSEGV
;
2360 info
.si_code
= TARGET_SEGV_MAPERR
;
2361 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2362 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2366 info
.si_signo
= TARGET_SIGILL
;
2368 info
.si_code
= TARGET_ILL_ILLOPC
;
2369 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2371 /* The code below was inspired by the MIPS Linux kernel trap
2372 * handling code in arch/mips/kernel/traps.c.
2376 abi_ulong trap_instr
;
2379 if (env
->hflags
& MIPS_HFLAG_M16
) {
2380 if (env
->insn_flags
& ASE_MICROMIPS
) {
2381 /* microMIPS mode */
2382 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2387 if ((trap_instr
>> 10) == 0x11) {
2388 /* 16-bit instruction */
2389 code
= trap_instr
& 0xf;
2391 /* 32-bit instruction */
2394 ret
= get_user_u16(instr_lo
,
2395 env
->active_tc
.PC
+ 2);
2399 trap_instr
= (trap_instr
<< 16) | instr_lo
;
2400 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2401 /* Unfortunately, microMIPS also suffers from
2402 the old assembler bug... */
2403 if (code
>= (1 << 10)) {
2409 ret
= get_user_u16(trap_instr
, env
->active_tc
.PC
);
2413 code
= (trap_instr
>> 6) & 0x3f;
2416 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2421 /* As described in the original Linux kernel code, the
2422 * below checks on 'code' are to work around an old
2425 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2426 if (code
>= (1 << 10)) {
2431 if (do_break(env
, &info
, code
) != 0) {
2438 abi_ulong trap_instr
;
2439 unsigned int code
= 0;
2441 if (env
->hflags
& MIPS_HFLAG_M16
) {
2442 /* microMIPS mode */
2445 ret
= get_user_u16(instr
[0], env
->active_tc
.PC
) ||
2446 get_user_u16(instr
[1], env
->active_tc
.PC
+ 2);
2448 trap_instr
= (instr
[0] << 16) | instr
[1];
2450 ret
= get_user_u32(trap_instr
, env
->active_tc
.PC
);
2457 /* The immediate versions don't provide a code. */
2458 if (!(trap_instr
& 0xFC000000)) {
2459 if (env
->hflags
& MIPS_HFLAG_M16
) {
2460 /* microMIPS mode */
2461 code
= ((trap_instr
>> 12) & ((1 << 4) - 1));
2463 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2467 if (do_break(env
, &info
, code
) != 0) {
2473 cpu_exec_step_atomic(cs
);
2477 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
2480 process_pending_signals(env
);
2487 void cpu_loop(CPUNios2State
*env
)
2489 CPUState
*cs
= ENV_GET_CPU(env
);
2490 Nios2CPU
*cpu
= NIOS2_CPU(cs
);
2491 target_siginfo_t info
;
2492 int trapnr
, gdbsig
, ret
;
2496 trapnr
= cpu_exec(cs
);
2501 case EXCP_INTERRUPT
:
2502 /* just indicate that signals should be handled asap */
2505 if (env
->regs
[R_AT
] == 0) {
2507 qemu_log_mask(CPU_LOG_INT
, "\nSyscall\n");
2509 ret
= do_syscall(env
, env
->regs
[2],
2510 env
->regs
[4], env
->regs
[5], env
->regs
[6],
2511 env
->regs
[7], env
->regs
[8], env
->regs
[9],
2514 if (env
->regs
[2] == 0) { /* FIXME: syscall 0 workaround */
2518 env
->regs
[2] = abs(ret
);
2519 /* Return value is 0..4096 */
2520 env
->regs
[7] = (ret
> 0xfffffffffffff000ULL
);
2521 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2522 env
->regs
[CR_STATUS
] &= ~0x3;
2523 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2524 env
->regs
[R_PC
] += 4;
2527 qemu_log_mask(CPU_LOG_INT
, "\nTrap\n");
2529 env
->regs
[CR_ESTATUS
] = env
->regs
[CR_STATUS
];
2530 env
->regs
[CR_STATUS
] &= ~0x3;
2531 env
->regs
[R_EA
] = env
->regs
[R_PC
] + 4;
2532 env
->regs
[R_PC
] = cpu
->exception_addr
;
2534 gdbsig
= TARGET_SIGTRAP
;
2538 switch (env
->regs
[R_PC
]) {
2539 /*case 0x1000:*/ /* TODO:__kuser_helper_version */
2540 case 0x1004: /* __kuser_cmpxchg */
2542 if (env
->regs
[4] & 0x3) {
2545 ret
= get_user_u32(env
->regs
[2], env
->regs
[4]);
2550 env
->regs
[2] -= env
->regs
[5];
2551 if (env
->regs
[2] == 0) {
2552 put_user_u32(env
->regs
[6], env
->regs
[4]);
2555 env
->regs
[R_PC
] = env
->regs
[R_RA
];
2557 /*case 0x1040:*/ /* TODO:__kuser_sigtramp */
2561 info
.si_signo
= TARGET_SIGSEGV
;
2563 /* TODO: check env->error_code */
2564 info
.si_code
= TARGET_SEGV_MAPERR
;
2565 info
._sifields
._sigfault
._addr
= env
->regs
[R_PC
];
2566 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2570 EXCP_DUMP(env
, "\nqemu: unhandled CPU exception %#x - aborting\n",
2572 gdbsig
= TARGET_SIGILL
;
2576 gdb_handlesig(cs
, gdbsig
);
2577 if (gdbsig
!= TARGET_SIGTRAP
) {
2582 process_pending_signals(env
);
2586 #endif /* TARGET_NIOS2 */
2588 #ifdef TARGET_OPENRISC
2590 void cpu_loop(CPUOpenRISCState
*env
)
2592 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2595 target_siginfo_t info
;
2599 trapnr
= cpu_exec(cs
);
2601 process_queued_cpu_work(cs
);
2605 env
->pc
+= 4; /* 0xc00; */
2606 ret
= do_syscall(env
,
2607 cpu_get_gpr(env
, 11), /* return value */
2608 cpu_get_gpr(env
, 3), /* r3 - r7 are params */
2609 cpu_get_gpr(env
, 4),
2610 cpu_get_gpr(env
, 5),
2611 cpu_get_gpr(env
, 6),
2612 cpu_get_gpr(env
, 7),
2613 cpu_get_gpr(env
, 8), 0, 0);
2614 if (ret
== -TARGET_ERESTARTSYS
) {
2616 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2617 cpu_set_gpr(env
, 11, ret
);
2623 info
.si_signo
= TARGET_SIGSEGV
;
2625 info
.si_code
= TARGET_SEGV_MAPERR
;
2626 info
._sifields
._sigfault
._addr
= env
->pc
;
2627 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2630 info
.si_signo
= TARGET_SIGBUS
;
2632 info
.si_code
= TARGET_BUS_ADRALN
;
2633 info
._sifields
._sigfault
._addr
= env
->pc
;
2634 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2637 info
.si_signo
= TARGET_SIGILL
;
2639 info
.si_code
= TARGET_ILL_ILLOPC
;
2640 info
._sifields
._sigfault
._addr
= env
->pc
;
2641 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2644 info
.si_signo
= TARGET_SIGFPE
;
2647 info
._sifields
._sigfault
._addr
= env
->pc
;
2648 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2650 case EXCP_INTERRUPT
:
2651 /* We processed the pending cpu work above. */
2654 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2656 info
.si_signo
= trapnr
;
2658 info
.si_code
= TARGET_TRAP_BRKPT
;
2659 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2663 cpu_exec_step_atomic(cs
);
2666 g_assert_not_reached();
2668 process_pending_signals(env
);
2672 #endif /* TARGET_OPENRISC */
2675 void cpu_loop(CPUSH4State
*env
)
2677 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2679 target_siginfo_t info
;
2682 bool arch_interrupt
= true;
2685 trapnr
= cpu_exec(cs
);
2687 process_queued_cpu_work(cs
);
2692 ret
= do_syscall(env
,
2701 if (ret
== -TARGET_ERESTARTSYS
) {
2703 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2704 env
->gregs
[0] = ret
;
2707 case EXCP_INTERRUPT
:
2708 /* just indicate that signals should be handled asap */
2714 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2716 info
.si_signo
= sig
;
2718 info
.si_code
= TARGET_TRAP_BRKPT
;
2719 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2721 arch_interrupt
= false;
2727 info
.si_signo
= TARGET_SIGSEGV
;
2729 info
.si_code
= TARGET_SEGV_MAPERR
;
2730 info
._sifields
._sigfault
._addr
= env
->tea
;
2731 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2734 cpu_exec_step_atomic(cs
);
2735 arch_interrupt
= false;
2738 printf ("Unhandled trap: 0x%x\n", trapnr
);
2739 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2742 process_pending_signals (env
);
2744 /* Most of the traps imply an exception or interrupt, which
2745 implies an REI instruction has been executed. Which means
2746 that LDST (aka LOK_ADDR) should be cleared. But there are
2747 a few exceptions for traps internal to QEMU. */
2748 if (arch_interrupt
) {
2749 env
->lock_addr
= -1;
2756 void cpu_loop(CPUCRISState
*env
)
2758 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2760 target_siginfo_t info
;
2764 trapnr
= cpu_exec(cs
);
2766 process_queued_cpu_work(cs
);
2771 info
.si_signo
= TARGET_SIGSEGV
;
2773 /* XXX: check env->error_code */
2774 info
.si_code
= TARGET_SEGV_MAPERR
;
2775 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2776 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2779 case EXCP_INTERRUPT
:
2780 /* just indicate that signals should be handled asap */
2783 ret
= do_syscall(env
,
2792 if (ret
== -TARGET_ERESTARTSYS
) {
2794 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2795 env
->regs
[10] = ret
;
2802 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2805 info
.si_signo
= sig
;
2807 info
.si_code
= TARGET_TRAP_BRKPT
;
2808 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2813 cpu_exec_step_atomic(cs
);
2816 printf ("Unhandled trap: 0x%x\n", trapnr
);
2817 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2820 process_pending_signals (env
);
2825 #ifdef TARGET_MICROBLAZE
2826 void cpu_loop(CPUMBState
*env
)
2828 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2830 target_siginfo_t info
;
2834 trapnr
= cpu_exec(cs
);
2836 process_queued_cpu_work(cs
);
2841 info
.si_signo
= TARGET_SIGSEGV
;
2843 /* XXX: check env->error_code */
2844 info
.si_code
= TARGET_SEGV_MAPERR
;
2845 info
._sifields
._sigfault
._addr
= 0;
2846 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2849 case EXCP_INTERRUPT
:
2850 /* just indicate that signals should be handled asap */
2853 /* Return address is 4 bytes after the call. */
2855 env
->sregs
[SR_PC
] = env
->regs
[14];
2856 ret
= do_syscall(env
,
2865 if (ret
== -TARGET_ERESTARTSYS
) {
2866 /* Wind back to before the syscall. */
2867 env
->sregs
[SR_PC
] -= 4;
2868 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
2871 /* All syscall exits result in guest r14 being equal to the
2872 * PC we return to, because the kernel syscall exit "rtbd" does
2873 * this. (This is true even for sigreturn(); note that r14 is
2874 * not a userspace-usable register, as the kernel may clobber it
2877 env
->regs
[14] = env
->sregs
[SR_PC
];
2880 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2881 if (env
->iflags
& D_FLAG
) {
2882 env
->sregs
[SR_ESR
] |= 1 << 12;
2883 env
->sregs
[SR_PC
] -= 4;
2884 /* FIXME: if branch was immed, replay the imm as well. */
2887 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2889 switch (env
->sregs
[SR_ESR
] & 31) {
2890 case ESR_EC_DIVZERO
:
2891 info
.si_signo
= TARGET_SIGFPE
;
2893 info
.si_code
= TARGET_FPE_FLTDIV
;
2894 info
._sifields
._sigfault
._addr
= 0;
2895 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2898 info
.si_signo
= TARGET_SIGFPE
;
2900 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2901 info
.si_code
= TARGET_FPE_FLTINV
;
2903 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2904 info
.si_code
= TARGET_FPE_FLTDIV
;
2906 info
._sifields
._sigfault
._addr
= 0;
2907 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2910 printf ("Unhandled hw-exception: 0x%x\n",
2911 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2912 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2921 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
2924 info
.si_signo
= sig
;
2926 info
.si_code
= TARGET_TRAP_BRKPT
;
2927 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2932 cpu_exec_step_atomic(cs
);
2935 printf ("Unhandled trap: 0x%x\n", trapnr
);
2936 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2939 process_pending_signals (env
);
2946 void cpu_loop(CPUM68KState
*env
)
2948 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2951 target_siginfo_t info
;
2952 TaskState
*ts
= cs
->opaque
;
2956 trapnr
= cpu_exec(cs
);
2958 process_queued_cpu_work(cs
);
2963 if (ts
->sim_syscalls
) {
2965 get_user_u16(nr
, env
->pc
+ 2);
2967 do_m68k_simcall(env
, nr
);
2973 case EXCP_HALT_INSN
:
2974 /* Semihosing syscall. */
2976 do_m68k_semihosting(env
, env
->dregs
[0]);
2980 case EXCP_UNSUPPORTED
:
2982 info
.si_signo
= TARGET_SIGILL
;
2984 info
.si_code
= TARGET_ILL_ILLOPN
;
2985 info
._sifields
._sigfault
._addr
= env
->pc
;
2986 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2989 info
.si_signo
= TARGET_SIGFPE
;
2991 info
.si_code
= TARGET_FPE_INTOVF
;
2992 info
._sifields
._sigfault
._addr
= env
->pc
;
2993 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
2996 info
.si_signo
= TARGET_SIGFPE
;
2998 info
.si_code
= TARGET_FPE_INTDIV
;
2999 info
._sifields
._sigfault
._addr
= env
->pc
;
3000 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3005 ts
->sim_syscalls
= 0;
3008 ret
= do_syscall(env
,
3017 if (ret
== -TARGET_ERESTARTSYS
) {
3019 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3020 env
->dregs
[0] = ret
;
3024 case EXCP_INTERRUPT
:
3025 /* just indicate that signals should be handled asap */
3029 info
.si_signo
= TARGET_SIGSEGV
;
3031 /* XXX: check env->error_code */
3032 info
.si_code
= TARGET_SEGV_MAPERR
;
3033 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
3034 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3041 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3044 info
.si_signo
= sig
;
3046 info
.si_code
= TARGET_TRAP_BRKPT
;
3047 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3052 cpu_exec_step_atomic(cs
);
3055 EXCP_DUMP(env
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
3058 process_pending_signals(env
);
3061 #endif /* TARGET_M68K */
3064 void cpu_loop(CPUAlphaState
*env
)
3066 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
3068 target_siginfo_t info
;
3072 bool arch_interrupt
= true;
3075 trapnr
= cpu_exec(cs
);
3077 process_queued_cpu_work(cs
);
3081 fprintf(stderr
, "Reset requested. Exit\n");
3085 fprintf(stderr
, "Machine check exception. Exit\n");
3088 case EXCP_SMP_INTERRUPT
:
3089 case EXCP_CLK_INTERRUPT
:
3090 case EXCP_DEV_INTERRUPT
:
3091 fprintf(stderr
, "External interrupt. Exit\n");
3095 info
.si_signo
= TARGET_SIGSEGV
;
3097 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
3098 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
3099 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3100 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3103 info
.si_signo
= TARGET_SIGBUS
;
3105 info
.si_code
= TARGET_BUS_ADRALN
;
3106 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
3107 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3111 info
.si_signo
= TARGET_SIGILL
;
3113 info
.si_code
= TARGET_ILL_ILLOPC
;
3114 info
._sifields
._sigfault
._addr
= env
->pc
;
3115 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3118 info
.si_signo
= TARGET_SIGFPE
;
3120 info
.si_code
= TARGET_FPE_FLTINV
;
3121 info
._sifields
._sigfault
._addr
= env
->pc
;
3122 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3125 /* No-op. Linux simply re-enables the FPU. */
3128 switch (env
->error_code
) {
3131 info
.si_signo
= TARGET_SIGTRAP
;
3133 info
.si_code
= TARGET_TRAP_BRKPT
;
3134 info
._sifields
._sigfault
._addr
= env
->pc
;
3135 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3139 info
.si_signo
= TARGET_SIGTRAP
;
3142 info
._sifields
._sigfault
._addr
= env
->pc
;
3143 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3147 trapnr
= env
->ir
[IR_V0
];
3148 sysret
= do_syscall(env
, trapnr
,
3149 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
3150 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
3151 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
3153 if (sysret
== -TARGET_ERESTARTSYS
) {
3157 if (sysret
== -TARGET_QEMU_ESIGRETURN
) {
3160 /* Syscall writes 0 to V0 to bypass error check, similar
3161 to how this is handled internal to Linux kernel.
3162 (Ab)use trapnr temporarily as boolean indicating error. */
3163 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
3164 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
3165 env
->ir
[IR_A3
] = trapnr
;
3169 /* ??? We can probably elide the code using page_unprotect
3170 that is checking for self-modifying code. Instead we
3171 could simply call tb_flush here. Until we work out the
3172 changes required to turn off the extra write protection,
3173 this can be a no-op. */
3177 /* Handled in the translator for usermode. */
3181 /* Handled in the translator for usermode. */
3185 info
.si_signo
= TARGET_SIGFPE
;
3186 switch (env
->ir
[IR_A0
]) {
3187 case TARGET_GEN_INTOVF
:
3188 info
.si_code
= TARGET_FPE_INTOVF
;
3190 case TARGET_GEN_INTDIV
:
3191 info
.si_code
= TARGET_FPE_INTDIV
;
3193 case TARGET_GEN_FLTOVF
:
3194 info
.si_code
= TARGET_FPE_FLTOVF
;
3196 case TARGET_GEN_FLTUND
:
3197 info
.si_code
= TARGET_FPE_FLTUND
;
3199 case TARGET_GEN_FLTINV
:
3200 info
.si_code
= TARGET_FPE_FLTINV
;
3202 case TARGET_GEN_FLTINE
:
3203 info
.si_code
= TARGET_FPE_FLTRES
;
3205 case TARGET_GEN_ROPRAND
:
3209 info
.si_signo
= TARGET_SIGTRAP
;
3214 info
._sifields
._sigfault
._addr
= env
->pc
;
3215 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3222 info
.si_signo
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3223 if (info
.si_signo
) {
3225 info
.si_code
= TARGET_TRAP_BRKPT
;
3226 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3228 arch_interrupt
= false;
3231 case EXCP_INTERRUPT
:
3232 /* Just indicate that signals should be handled asap. */
3235 cpu_exec_step_atomic(cs
);
3236 arch_interrupt
= false;
3239 printf ("Unhandled trap: 0x%x\n", trapnr
);
3240 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3243 process_pending_signals (env
);
3245 /* Most of the traps imply a transition through PALcode, which
3246 implies an REI instruction has been executed. Which means
3247 that RX and LOCK_ADDR should be cleared. But there are a
3248 few exceptions for traps internal to QEMU. */
3249 if (arch_interrupt
) {
3250 env
->flags
&= ~ENV_FLAG_RX_FLAG
;
3251 env
->lock_addr
= -1;
3255 #endif /* TARGET_ALPHA */
3259 /* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */
3260 #define S390X_FAIL_ADDR_MASK -4096LL
3262 void cpu_loop(CPUS390XState
*env
)
3264 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3266 target_siginfo_t info
;
3272 trapnr
= cpu_exec(cs
);
3274 process_queued_cpu_work(cs
);
3277 case EXCP_INTERRUPT
:
3278 /* Just indicate that signals should be handled asap. */
3282 n
= env
->int_svc_code
;
3284 /* syscalls > 255 */
3287 env
->psw
.addr
+= env
->int_svc_ilen
;
3288 ret
= do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3289 env
->regs
[4], env
->regs
[5],
3290 env
->regs
[6], env
->regs
[7], 0, 0);
3291 if (ret
== -TARGET_ERESTARTSYS
) {
3292 env
->psw
.addr
-= env
->int_svc_ilen
;
3293 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3299 sig
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3301 n
= TARGET_TRAP_BRKPT
;
3306 n
= env
->int_pgm_code
;
3309 case PGM_PRIVILEGED
:
3310 sig
= TARGET_SIGILL
;
3311 n
= TARGET_ILL_ILLOPC
;
3313 case PGM_PROTECTION
:
3314 case PGM_ADDRESSING
:
3315 sig
= TARGET_SIGSEGV
;
3316 /* XXX: check env->error_code */
3317 n
= TARGET_SEGV_MAPERR
;
3318 addr
= env
->__excp_addr
& S390X_FAIL_ADDR_MASK
;
3321 case PGM_SPECIFICATION
:
3322 case PGM_SPECIAL_OP
:
3325 sig
= TARGET_SIGILL
;
3326 n
= TARGET_ILL_ILLOPN
;
3329 case PGM_FIXPT_OVERFLOW
:
3330 sig
= TARGET_SIGFPE
;
3331 n
= TARGET_FPE_INTOVF
;
3333 case PGM_FIXPT_DIVIDE
:
3334 sig
= TARGET_SIGFPE
;
3335 n
= TARGET_FPE_INTDIV
;
3339 n
= (env
->fpc
>> 8) & 0xff;
3341 /* compare-and-trap */
3344 /* An IEEE exception, simulated or otherwise. */
3346 n
= TARGET_FPE_FLTINV
;
3347 } else if (n
& 0x40) {
3348 n
= TARGET_FPE_FLTDIV
;
3349 } else if (n
& 0x20) {
3350 n
= TARGET_FPE_FLTOVF
;
3351 } else if (n
& 0x10) {
3352 n
= TARGET_FPE_FLTUND
;
3353 } else if (n
& 0x08) {
3354 n
= TARGET_FPE_FLTRES
;
3356 /* ??? Quantum exception; BFP, DFP error. */
3359 sig
= TARGET_SIGFPE
;
3364 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3365 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3371 addr
= env
->psw
.addr
;
3373 info
.si_signo
= sig
;
3376 info
._sifields
._sigfault
._addr
= addr
;
3377 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3381 cpu_exec_step_atomic(cs
);
3384 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3385 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3388 process_pending_signals (env
);
3392 #endif /* TARGET_S390X */
3394 #ifdef TARGET_TILEGX
3396 static void gen_sigill_reg(CPUTLGState
*env
)
3398 target_siginfo_t info
;
3400 info
.si_signo
= TARGET_SIGILL
;
3402 info
.si_code
= TARGET_ILL_PRVREG
;
3403 info
._sifields
._sigfault
._addr
= env
->pc
;
3404 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3407 static void do_signal(CPUTLGState
*env
, int signo
, int sigcode
)
3409 target_siginfo_t info
;
3411 info
.si_signo
= signo
;
3413 info
._sifields
._sigfault
._addr
= env
->pc
;
3415 if (signo
== TARGET_SIGSEGV
) {
3416 /* The passed in sigcode is a dummy; check for a page mapping
3417 and pass either MAPERR or ACCERR. */
3418 target_ulong addr
= env
->excaddr
;
3419 info
._sifields
._sigfault
._addr
= addr
;
3420 if (page_check_range(addr
, 1, PAGE_VALID
) < 0) {
3421 sigcode
= TARGET_SEGV_MAPERR
;
3423 sigcode
= TARGET_SEGV_ACCERR
;
3426 info
.si_code
= sigcode
;
3428 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3431 static void gen_sigsegv_maperr(CPUTLGState
*env
, target_ulong addr
)
3433 env
->excaddr
= addr
;
3434 do_signal(env
, TARGET_SIGSEGV
, 0);
3437 static void set_regval(CPUTLGState
*env
, uint8_t reg
, uint64_t val
)
3439 if (unlikely(reg
>= TILEGX_R_COUNT
)) {
3450 gen_sigill_reg(env
);
3453 g_assert_not_reached();
3456 env
->regs
[reg
] = val
;
3460 * Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
3461 * memory at the address held in the first source register. If the values are
3462 * not equal, then no memory operation is performed. If the values are equal,
3463 * the 8-byte quantity from the second source register is written into memory
3464 * at the address held in the first source register. In either case, the result
3465 * of the instruction is the value read from memory. The compare and write to
3466 * memory are atomic and thus can be used for synchronization purposes. This
3467 * instruction only operates for addresses aligned to a 8-byte boundary.
3468 * Unaligned memory access causes an Unaligned Data Reference interrupt.
3470 * Functional Description (64-bit)
3471 * uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
3472 * rf[Dest] = memVal;
3473 * if (memVal == SPR[CmpValueSPR])
3474 * memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
3476 * Functional Description (32-bit)
3477 * uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
3478 * rf[Dest] = memVal;
3479 * if (memVal == signExtend32 (SPR[CmpValueSPR]))
3480 * memoryWriteWord (rf[SrcA], rf[SrcB]);
3483 * This function also processes exch and exch4 which need not process SPR.
3485 static void do_exch(CPUTLGState
*env
, bool quad
, bool cmp
)
3488 target_long val
, sprval
;
3492 addr
= env
->atomic_srca
;
3493 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3494 goto sigsegv_maperr
;
3499 sprval
= env
->spregs
[TILEGX_SPR_CMPEXCH
];
3501 sprval
= sextract64(env
->spregs
[TILEGX_SPR_CMPEXCH
], 0, 32);
3505 if (!cmp
|| val
== sprval
) {
3506 target_long valb
= env
->atomic_srcb
;
3507 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3508 goto sigsegv_maperr
;
3512 set_regval(env
, env
->atomic_dstr
, val
);
3518 gen_sigsegv_maperr(env
, addr
);
3521 static void do_fetch(CPUTLGState
*env
, int trapnr
, bool quad
)
3525 target_long val
, valb
;
3529 addr
= env
->atomic_srca
;
3530 valb
= env
->atomic_srcb
;
3531 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
3532 goto sigsegv_maperr
;
3536 case TILEGX_EXCP_OPCODE_FETCHADD
:
3537 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3540 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3546 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3548 if ((int32_t)valb
< 0) {
3552 case TILEGX_EXCP_OPCODE_FETCHAND
:
3553 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3556 case TILEGX_EXCP_OPCODE_FETCHOR
:
3557 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3561 g_assert_not_reached();
3565 if (quad
? put_user_u64(valb
, addr
) : put_user_u32(valb
, addr
)) {
3566 goto sigsegv_maperr
;
3570 set_regval(env
, env
->atomic_dstr
, val
);
3576 gen_sigsegv_maperr(env
, addr
);
3579 void cpu_loop(CPUTLGState
*env
)
3581 CPUState
*cs
= CPU(tilegx_env_get_cpu(env
));
3586 trapnr
= cpu_exec(cs
);
3588 process_queued_cpu_work(cs
);
3591 case TILEGX_EXCP_SYSCALL
:
3593 abi_ulong ret
= do_syscall(env
, env
->regs
[TILEGX_R_NR
],
3594 env
->regs
[0], env
->regs
[1],
3595 env
->regs
[2], env
->regs
[3],
3596 env
->regs
[4], env
->regs
[5],
3597 env
->regs
[6], env
->regs
[7]);
3598 if (ret
== -TARGET_ERESTARTSYS
) {
3600 } else if (ret
!= -TARGET_QEMU_ESIGRETURN
) {
3601 env
->regs
[TILEGX_R_RE
] = ret
;
3602 env
->regs
[TILEGX_R_ERR
] = TILEGX_IS_ERRNO(ret
) ? -ret
: 0;
3606 case TILEGX_EXCP_OPCODE_EXCH
:
3607 do_exch(env
, true, false);
3609 case TILEGX_EXCP_OPCODE_EXCH4
:
3610 do_exch(env
, false, false);
3612 case TILEGX_EXCP_OPCODE_CMPEXCH
:
3613 do_exch(env
, true, true);
3615 case TILEGX_EXCP_OPCODE_CMPEXCH4
:
3616 do_exch(env
, false, true);
3618 case TILEGX_EXCP_OPCODE_FETCHADD
:
3619 case TILEGX_EXCP_OPCODE_FETCHADDGEZ
:
3620 case TILEGX_EXCP_OPCODE_FETCHAND
:
3621 case TILEGX_EXCP_OPCODE_FETCHOR
:
3622 do_fetch(env
, trapnr
, true);
3624 case TILEGX_EXCP_OPCODE_FETCHADD4
:
3625 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4
:
3626 case TILEGX_EXCP_OPCODE_FETCHAND4
:
3627 case TILEGX_EXCP_OPCODE_FETCHOR4
:
3628 do_fetch(env
, trapnr
, false);
3630 case TILEGX_EXCP_SIGNAL
:
3631 do_signal(env
, env
->signo
, env
->sigcode
);
3633 case TILEGX_EXCP_REG_IDN_ACCESS
:
3634 case TILEGX_EXCP_REG_UDN_ACCESS
:
3635 gen_sigill_reg(env
);
3638 cpu_exec_step_atomic(cs
);
3641 fprintf(stderr
, "trapnr is %d[0x%x].\n", trapnr
, trapnr
);
3642 g_assert_not_reached();
3644 process_pending_signals(env
);
3652 static abi_ulong
hppa_lws(CPUHPPAState
*env
)
3654 uint32_t which
= env
->gr
[20];
3655 abi_ulong addr
= env
->gr
[26];
3656 abi_ulong old
= env
->gr
[25];
3657 abi_ulong
new = env
->gr
[24];
3658 abi_ulong size
, ret
;
3662 return -TARGET_ENOSYS
;
3664 case 0: /* elf32 atomic 32bit cmpxchg */
3665 if ((addr
& 3) || !access_ok(VERIFY_WRITE
, addr
, 4)) {
3666 return -TARGET_EFAULT
;
3670 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3674 case 2: /* elf32 atomic "new" cmpxchg */
3677 return -TARGET_ENOSYS
;
3679 if (((addr
| old
| new) & ((1 << size
) - 1))
3680 || !access_ok(VERIFY_WRITE
, addr
, 1 << size
)
3681 || !access_ok(VERIFY_READ
, old
, 1 << size
)
3682 || !access_ok(VERIFY_READ
, new, 1 << size
)) {
3683 return -TARGET_EFAULT
;
3685 /* Note that below we use host-endian loads so that the cmpxchg
3686 can be host-endian as well. */
3689 old
= *(uint8_t *)g2h(old
);
3690 new = *(uint8_t *)g2h(new);
3691 ret
= atomic_cmpxchg((uint8_t *)g2h(addr
), old
, new);
3695 old
= *(uint16_t *)g2h(old
);
3696 new = *(uint16_t *)g2h(new);
3697 ret
= atomic_cmpxchg((uint16_t *)g2h(addr
), old
, new);
3701 old
= *(uint32_t *)g2h(old
);
3702 new = *(uint32_t *)g2h(new);
3703 ret
= atomic_cmpxchg((uint32_t *)g2h(addr
), old
, new);
3708 uint64_t o64
, n64
, r64
;
3709 o64
= *(uint64_t *)g2h(old
);
3710 n64
= *(uint64_t *)g2h(new);
3711 #ifdef CONFIG_ATOMIC64
3712 r64
= atomic_cmpxchg__nocheck((uint64_t *)g2h(addr
), o64
, n64
);
3716 r64
= *(uint64_t *)g2h(addr
);
3719 *(uint64_t *)g2h(addr
) = n64
;
3734 void cpu_loop(CPUHPPAState
*env
)
3736 CPUState
*cs
= CPU(hppa_env_get_cpu(env
));
3737 target_siginfo_t info
;
3743 trapnr
= cpu_exec(cs
);
3745 process_queued_cpu_work(cs
);
3749 ret
= do_syscall(env
, env
->gr
[20],
3750 env
->gr
[26], env
->gr
[25],
3751 env
->gr
[24], env
->gr
[23],
3752 env
->gr
[22], env
->gr
[21], 0, 0);
3756 /* We arrived here by faking the gateway page. Return. */
3757 env
->iaoq_f
= env
->gr
[31];
3758 env
->iaoq_b
= env
->gr
[31] + 4;
3760 case -TARGET_ERESTARTSYS
:
3761 case -TARGET_QEMU_ESIGRETURN
:
3765 case EXCP_SYSCALL_LWS
:
3766 env
->gr
[21] = hppa_lws(env
);
3767 /* We arrived here by faking the gateway page. Return. */
3768 env
->iaoq_f
= env
->gr
[31];
3769 env
->iaoq_b
= env
->gr
[31] + 4;
3772 info
.si_signo
= TARGET_SIGSEGV
;
3774 info
.si_code
= TARGET_SEGV_ACCERR
;
3775 info
._sifields
._sigfault
._addr
= env
->ior
;
3776 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3779 info
.si_signo
= TARGET_SIGILL
;
3781 info
.si_code
= TARGET_ILL_ILLOPN
;
3782 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3783 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3786 info
.si_signo
= TARGET_SIGFPE
;
3789 info
._sifields
._sigfault
._addr
= env
->iaoq_f
;
3790 queue_signal(env
, info
.si_signo
, QEMU_SI_FAULT
, &info
);
3793 trapnr
= gdb_handlesig(cs
, TARGET_SIGTRAP
);
3795 info
.si_signo
= trapnr
;
3797 info
.si_code
= TARGET_TRAP_BRKPT
;
3798 queue_signal(env
, trapnr
, QEMU_SI_FAULT
, &info
);
3801 case EXCP_INTERRUPT
:
3802 /* just indicate that signals should be handled asap */
3805 g_assert_not_reached();
3807 process_pending_signals(env
);
3811 #endif /* TARGET_HPPA */
3813 THREAD CPUState
*thread_cpu
;
3815 bool qemu_cpu_is_self(CPUState
*cpu
)
3817 return thread_cpu
== cpu
;
3820 void qemu_cpu_kick(CPUState
*cpu
)
3825 void task_settid(TaskState
*ts
)
3827 if (ts
->ts_tid
== 0) {
3828 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3832 void stop_all_tasks(void)
3835 * We trust that when using NPTL, start_exclusive()
3836 * handles thread stopping correctly.
3841 /* Assumes contents are already zeroed. */
3842 void init_task_state(TaskState
*ts
)
3847 CPUArchState
*cpu_copy(CPUArchState
*env
)
3849 CPUState
*cpu
= ENV_GET_CPU(env
);
3850 CPUState
*new_cpu
= cpu_init(cpu_model
);
3851 CPUArchState
*new_env
= new_cpu
->env_ptr
;
3855 /* Reset non arch specific state */
3858 memcpy(new_env
, env
, sizeof(CPUArchState
));
3860 /* Clone all break/watchpoints.
3861 Note: Once we support ptrace with hw-debug register access, make sure
3862 BP_CPU break/watchpoints are handled correctly on clone. */
3863 QTAILQ_INIT(&new_cpu
->breakpoints
);
3864 QTAILQ_INIT(&new_cpu
->watchpoints
);
3865 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
3866 cpu_breakpoint_insert(new_cpu
, bp
->pc
, bp
->flags
, NULL
);
3868 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
3869 cpu_watchpoint_insert(new_cpu
, wp
->vaddr
, wp
->len
, wp
->flags
, NULL
);
3875 static void handle_arg_help(const char *arg
)
3877 usage(EXIT_SUCCESS
);
3880 static void handle_arg_log(const char *arg
)
3884 mask
= qemu_str_to_log_mask(arg
);
3886 qemu_print_log_usage(stdout
);
3889 qemu_log_needs_buffers();
3893 static void handle_arg_dfilter(const char *arg
)
3895 qemu_set_dfilter_ranges(arg
, NULL
);
3898 static void handle_arg_log_filename(const char *arg
)
3900 qemu_set_log_filename(arg
, &error_fatal
);
3903 static void handle_arg_set_env(const char *arg
)
3905 char *r
, *p
, *token
;
3906 r
= p
= strdup(arg
);
3907 while ((token
= strsep(&p
, ",")) != NULL
) {
3908 if (envlist_setenv(envlist
, token
) != 0) {
3909 usage(EXIT_FAILURE
);
3915 static void handle_arg_unset_env(const char *arg
)
3917 char *r
, *p
, *token
;
3918 r
= p
= strdup(arg
);
3919 while ((token
= strsep(&p
, ",")) != NULL
) {
3920 if (envlist_unsetenv(envlist
, token
) != 0) {
3921 usage(EXIT_FAILURE
);
3927 static void handle_arg_argv0(const char *arg
)
3929 argv0
= strdup(arg
);
3932 static void handle_arg_stack_size(const char *arg
)
3935 guest_stack_size
= strtoul(arg
, &p
, 0);
3936 if (guest_stack_size
== 0) {
3937 usage(EXIT_FAILURE
);
3941 guest_stack_size
*= 1024 * 1024;
3942 } else if (*p
== 'k' || *p
== 'K') {
3943 guest_stack_size
*= 1024;
3947 static void handle_arg_ld_prefix(const char *arg
)
3949 interp_prefix
= strdup(arg
);
3952 static void handle_arg_pagesize(const char *arg
)
3954 qemu_host_page_size
= atoi(arg
);
3955 if (qemu_host_page_size
== 0 ||
3956 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3957 fprintf(stderr
, "page size must be a power of two\n");
3962 static void handle_arg_randseed(const char *arg
)
3964 unsigned long long seed
;
3966 if (parse_uint_full(arg
, &seed
, 0) != 0 || seed
> UINT_MAX
) {
3967 fprintf(stderr
, "Invalid seed number: %s\n", arg
);
3973 static void handle_arg_gdb(const char *arg
)
3975 gdbstub_port
= atoi(arg
);
3978 static void handle_arg_uname(const char *arg
)
3980 qemu_uname_release
= strdup(arg
);
3983 static void handle_arg_cpu(const char *arg
)
3985 cpu_model
= strdup(arg
);
3986 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3987 /* XXX: implement xxx_cpu_list for targets that still miss it */
3988 #if defined(cpu_list)
3989 cpu_list(stdout
, &fprintf
);
3995 static void handle_arg_guest_base(const char *arg
)
3997 guest_base
= strtol(arg
, NULL
, 0);
3998 have_guest_base
= 1;
4001 static void handle_arg_reserved_va(const char *arg
)
4005 reserved_va
= strtoul(arg
, &p
, 0);
4019 unsigned long unshifted
= reserved_va
;
4021 reserved_va
<<= shift
;
4022 if (reserved_va
>> shift
!= unshifted
4023 || (MAX_RESERVED_VA
&& reserved_va
> MAX_RESERVED_VA
)) {
4024 fprintf(stderr
, "Reserved virtual address too big\n");
4029 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
4034 static void handle_arg_singlestep(const char *arg
)
4039 static void handle_arg_strace(const char *arg
)
4044 static void handle_arg_version(const char *arg
)
4046 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
4047 "\n" QEMU_COPYRIGHT
"\n");
4051 static char *trace_file
;
4052 static void handle_arg_trace(const char *arg
)
4055 trace_file
= trace_opt_parse(arg
);
4058 struct qemu_argument
{
4062 void (*handle_opt
)(const char *arg
);
4063 const char *example
;
4067 static const struct qemu_argument arg_table
[] = {
4068 {"h", "", false, handle_arg_help
,
4069 "", "print this help"},
4070 {"help", "", false, handle_arg_help
,
4072 {"g", "QEMU_GDB", true, handle_arg_gdb
,
4073 "port", "wait gdb connection to 'port'"},
4074 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
4075 "path", "set the elf interpreter prefix to 'path'"},
4076 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
4077 "size", "set the stack size to 'size' bytes"},
4078 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
4079 "model", "select CPU (-cpu help for list)"},
4080 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
4081 "var=value", "sets targets environment variable (see below)"},
4082 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
4083 "var", "unsets targets environment variable (see below)"},
4084 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
4085 "argv0", "forces target process argv[0] to be 'argv0'"},
4086 {"r", "QEMU_UNAME", true, handle_arg_uname
,
4087 "uname", "set qemu uname release string to 'uname'"},
4088 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
4089 "address", "set guest_base address to 'address'"},
4090 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
4091 "size", "reserve 'size' bytes for guest virtual address space"},
4092 {"d", "QEMU_LOG", true, handle_arg_log
,
4093 "item[,...]", "enable logging of specified items "
4094 "(use '-d help' for a list of items)"},
4095 {"dfilter", "QEMU_DFILTER", true, handle_arg_dfilter
,
4096 "range[,...]","filter logging based on address range"},
4097 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
4098 "logfile", "write logs to 'logfile' (default stderr)"},
4099 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
4100 "pagesize", "set the host page size to 'pagesize'"},
4101 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
4102 "", "run in singlestep mode"},
4103 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
4104 "", "log system calls"},
4105 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed
,
4106 "", "Seed for pseudo-random number generator"},
4107 {"trace", "QEMU_TRACE", true, handle_arg_trace
,
4108 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
4109 {"version", "QEMU_VERSION", false, handle_arg_version
,
4110 "", "display version information and exit"},
4111 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
4114 static void usage(int exitcode
)
4116 const struct qemu_argument
*arginfo
;
4120 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
4121 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
4123 "Options and associated environment variables:\n"
4126 /* Calculate column widths. We must always have at least enough space
4127 * for the column header.
4129 maxarglen
= strlen("Argument");
4130 maxenvlen
= strlen("Env-variable");
4132 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4133 int arglen
= strlen(arginfo
->argv
);
4134 if (arginfo
->has_arg
) {
4135 arglen
+= strlen(arginfo
->example
) + 1;
4137 if (strlen(arginfo
->env
) > maxenvlen
) {
4138 maxenvlen
= strlen(arginfo
->env
);
4140 if (arglen
> maxarglen
) {
4145 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
4146 maxenvlen
, "Env-variable");
4148 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4149 if (arginfo
->has_arg
) {
4150 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
4151 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
4152 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
4154 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
4155 maxenvlen
, arginfo
->env
,
4162 "QEMU_LD_PREFIX = %s\n"
4163 "QEMU_STACK_SIZE = %ld byte\n",
4168 "You can use -E and -U options or the QEMU_SET_ENV and\n"
4169 "QEMU_UNSET_ENV environment variables to set and unset\n"
4170 "environment variables for the target process.\n"
4171 "It is possible to provide several variables by separating them\n"
4172 "by commas in getsubopt(3) style. Additionally it is possible to\n"
4173 "provide the -E and -U options multiple times.\n"
4174 "The following lines are equivalent:\n"
4175 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
4176 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
4177 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
4178 "Note that if you provide several changes to a single variable\n"
4179 "the last change will stay in effect.\n"
4181 QEMU_HELP_BOTTOM
"\n");
4186 static int parse_args(int argc
, char **argv
)
4190 const struct qemu_argument
*arginfo
;
4192 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4193 if (arginfo
->env
== NULL
) {
4197 r
= getenv(arginfo
->env
);
4199 arginfo
->handle_opt(r
);
4205 if (optind
>= argc
) {
4214 if (!strcmp(r
, "-")) {
4217 /* Treat --foo the same as -foo. */
4222 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
4223 if (!strcmp(r
, arginfo
->argv
)) {
4224 if (arginfo
->has_arg
) {
4225 if (optind
>= argc
) {
4226 (void) fprintf(stderr
,
4227 "qemu: missing argument for option '%s'\n", r
);
4230 arginfo
->handle_opt(argv
[optind
]);
4233 arginfo
->handle_opt(NULL
);
4239 /* no option matched the current argv */
4240 if (arginfo
->handle_opt
== NULL
) {
4241 (void) fprintf(stderr
, "qemu: unknown option '%s'\n", r
);
4246 if (optind
>= argc
) {
4247 (void) fprintf(stderr
, "qemu: no user program specified\n");
4251 filename
= argv
[optind
];
4252 exec_path
= argv
[optind
];
4257 int main(int argc
, char **argv
, char **envp
)
4259 struct target_pt_regs regs1
, *regs
= ®s1
;
4260 struct image_info info1
, *info
= &info1
;
4261 struct linux_binprm bprm
;
4266 char **target_environ
, **wrk
;
4273 module_call_init(MODULE_INIT_TRACE
);
4274 qemu_init_cpu_list();
4275 module_call_init(MODULE_INIT_QOM
);
4277 envlist
= envlist_create();
4279 /* add current environment into the list */
4280 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
4281 (void) envlist_setenv(envlist
, *wrk
);
4284 /* Read the stack limit from the kernel. If it's "unlimited",
4285 then we can do little else besides use the default. */
4288 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
4289 && lim
.rlim_cur
!= RLIM_INFINITY
4290 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
4291 guest_stack_size
= lim
.rlim_cur
;
4299 qemu_add_opts(&qemu_trace_opts
);
4301 optind
= parse_args(argc
, argv
);
4303 if (!trace_init_backends()) {
4306 trace_init_file(trace_file
);
4309 memset(regs
, 0, sizeof(struct target_pt_regs
));
4311 /* Zero out image_info */
4312 memset(info
, 0, sizeof(struct image_info
));
4314 memset(&bprm
, 0, sizeof (bprm
));
4316 /* Scan interp_prefix dir for replacement files. */
4317 init_paths(interp_prefix
);
4319 init_qemu_uname_release();
4321 if (cpu_model
== NULL
) {
4322 #if defined(TARGET_I386)
4323 #ifdef TARGET_X86_64
4324 cpu_model
= "qemu64";
4326 cpu_model
= "qemu32";
4328 #elif defined(TARGET_ARM)
4330 #elif defined(TARGET_UNICORE32)
4332 #elif defined(TARGET_M68K)
4334 #elif defined(TARGET_SPARC)
4335 #ifdef TARGET_SPARC64
4336 cpu_model
= "TI UltraSparc II";
4338 cpu_model
= "Fujitsu MB86904";
4340 #elif defined(TARGET_MIPS)
4341 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
4346 #elif defined TARGET_OPENRISC
4347 cpu_model
= "or1200";
4348 #elif defined(TARGET_PPC)
4349 # ifdef TARGET_PPC64
4350 cpu_model
= "POWER8";
4354 #elif defined TARGET_SH4
4355 cpu_model
= "sh7785";
4356 #elif defined TARGET_S390X
4363 /* NOTE: we need to init the CPU at this stage to get
4364 qemu_host_page_size */
4365 cpu
= cpu_init(cpu_model
);
4371 if (getenv("QEMU_STRACE")) {
4375 if (getenv("QEMU_RAND_SEED")) {
4376 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4379 target_environ
= envlist_to_environ(envlist
, NULL
);
4380 envlist_free(envlist
);
4383 * Now that page sizes are configured in cpu_init() we can do
4384 * proper page alignment for guest_base.
4386 guest_base
= HOST_PAGE_ALIGN(guest_base
);
4388 if (reserved_va
|| have_guest_base
) {
4389 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
4391 if (guest_base
== (unsigned long)-1) {
4392 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
4393 "space for use as guest address space (check your virtual "
4394 "memory ulimit setting or reserve less using -R option)\n",
4400 mmap_next_start
= reserved_va
;
4405 * Read in mmap_min_addr kernel parameter. This value is used
4406 * When loading the ELF image to determine whether guest_base
4407 * is needed. It is also used in mmap_find_vma.
4412 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
4414 if (fscanf(fp
, "%lu", &tmp
) == 1) {
4415 mmap_min_addr
= tmp
;
4416 qemu_log_mask(CPU_LOG_PAGE
, "host mmap_min_addr=0x%lx\n", mmap_min_addr
);
4423 * Prepare copy of argv vector for target.
4425 target_argc
= argc
- optind
;
4426 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
4427 if (target_argv
== NULL
) {
4428 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
4433 * If argv0 is specified (using '-0' switch) we replace
4434 * argv[0] pointer with the given one.
4437 if (argv0
!= NULL
) {
4438 target_argv
[i
++] = strdup(argv0
);
4440 for (; i
< target_argc
; i
++) {
4441 target_argv
[i
] = strdup(argv
[optind
+ i
]);
4443 target_argv
[target_argc
] = NULL
;
4445 ts
= g_new0(TaskState
, 1);
4446 init_task_state(ts
);
4447 /* build Task State */
4453 execfd
= qemu_getauxval(AT_EXECFD
);
4455 execfd
= open(filename
, O_RDONLY
);
4457 printf("Error while loading %s: %s\n", filename
, strerror(errno
));
4458 _exit(EXIT_FAILURE
);
4462 ret
= loader_exec(execfd
, filename
, target_argv
, target_environ
, regs
,
4465 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
4466 _exit(EXIT_FAILURE
);
4469 for (wrk
= target_environ
; *wrk
; wrk
++) {
4473 g_free(target_environ
);
4475 if (qemu_loglevel_mask(CPU_LOG_PAGE
)) {
4476 qemu_log("guest_base 0x%lx\n", guest_base
);
4479 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
4480 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
4481 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n", info
->start_code
);
4482 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n", info
->start_data
);
4483 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
4484 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n", info
->start_stack
);
4485 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
4486 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
4487 qemu_log("argv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->arg_start
);
4488 qemu_log("env_start 0x" TARGET_ABI_FMT_lx
"\n",
4489 info
->arg_end
+ (abi_ulong
)sizeof(abi_ulong
));
4490 qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx
"\n", info
->saved_auxv
);
4493 target_set_brk(info
->brk
);
4497 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
4498 generating the prologue until now so that the prologue can take
4499 the real value of GUEST_BASE into account. */
4500 tcg_prologue_init(tcg_ctx
);
4503 #if defined(TARGET_I386)
4504 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
4505 env
->hflags
|= HF_PE_MASK
| HF_CPL_MASK
;
4506 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
4507 env
->cr
[4] |= CR4_OSFXSR_MASK
;
4508 env
->hflags
|= HF_OSFXSR_MASK
;
4510 #ifndef TARGET_ABI32
4511 /* enable 64 bit mode if possible */
4512 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
4513 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
4516 env
->cr
[4] |= CR4_PAE_MASK
;
4517 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
4518 env
->hflags
|= HF_LMA_MASK
;
4521 /* flags setup : we activate the IRQs by default as in user mode */
4522 env
->eflags
|= IF_MASK
;
4524 /* linux register setup */
4525 #ifndef TARGET_ABI32
4526 env
->regs
[R_EAX
] = regs
->rax
;
4527 env
->regs
[R_EBX
] = regs
->rbx
;
4528 env
->regs
[R_ECX
] = regs
->rcx
;
4529 env
->regs
[R_EDX
] = regs
->rdx
;
4530 env
->regs
[R_ESI
] = regs
->rsi
;
4531 env
->regs
[R_EDI
] = regs
->rdi
;
4532 env
->regs
[R_EBP
] = regs
->rbp
;
4533 env
->regs
[R_ESP
] = regs
->rsp
;
4534 env
->eip
= regs
->rip
;
4536 env
->regs
[R_EAX
] = regs
->eax
;
4537 env
->regs
[R_EBX
] = regs
->ebx
;
4538 env
->regs
[R_ECX
] = regs
->ecx
;
4539 env
->regs
[R_EDX
] = regs
->edx
;
4540 env
->regs
[R_ESI
] = regs
->esi
;
4541 env
->regs
[R_EDI
] = regs
->edi
;
4542 env
->regs
[R_EBP
] = regs
->ebp
;
4543 env
->regs
[R_ESP
] = regs
->esp
;
4544 env
->eip
= regs
->eip
;
4547 /* linux interrupt setup */
4548 #ifndef TARGET_ABI32
4549 env
->idt
.limit
= 511;
4551 env
->idt
.limit
= 255;
4553 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
4554 PROT_READ
|PROT_WRITE
,
4555 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4556 idt_table
= g2h(env
->idt
.base
);
4579 /* linux segment setup */
4581 uint64_t *gdt_table
;
4582 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
4583 PROT_READ
|PROT_WRITE
,
4584 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
4585 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
4586 gdt_table
= g2h(env
->gdt
.base
);
4588 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4589 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4590 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4592 /* 64 bit code segment */
4593 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
4594 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4596 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
4598 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
4599 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
4600 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
4602 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
4603 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
4605 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
4606 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
4607 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
4608 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
4609 /* This hack makes Wine work... */
4610 env
->segs
[R_FS
].selector
= 0;
4612 cpu_x86_load_seg(env
, R_DS
, 0);
4613 cpu_x86_load_seg(env
, R_ES
, 0);
4614 cpu_x86_load_seg(env
, R_FS
, 0);
4615 cpu_x86_load_seg(env
, R_GS
, 0);
4617 #elif defined(TARGET_AARCH64)
4621 if (!(arm_feature(env
, ARM_FEATURE_AARCH64
))) {
4623 "The selected ARM CPU does not support 64 bit mode\n");
4627 for (i
= 0; i
< 31; i
++) {
4628 env
->xregs
[i
] = regs
->regs
[i
];
4631 env
->xregs
[31] = regs
->sp
;
4632 #ifdef TARGET_WORDS_BIGENDIAN
4633 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4634 for (i
= 1; i
< 4; ++i
) {
4635 env
->cp15
.sctlr_el
[i
] |= SCTLR_EE
;
4639 #elif defined(TARGET_ARM)
4642 cpsr_write(env
, regs
->uregs
[16], CPSR_USER
| CPSR_EXEC
,
4644 for(i
= 0; i
< 16; i
++) {
4645 env
->regs
[i
] = regs
->uregs
[i
];
4647 #ifdef TARGET_WORDS_BIGENDIAN
4649 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
4650 && (info
->elf_flags
& EF_ARM_BE8
)) {
4651 env
->uncached_cpsr
|= CPSR_E
;
4652 env
->cp15
.sctlr_el
[1] |= SCTLR_E0E
;
4654 env
->cp15
.sctlr_el
[1] |= SCTLR_B
;
4658 #elif defined(TARGET_UNICORE32)
4661 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
4662 for (i
= 0; i
< 32; i
++) {
4663 env
->regs
[i
] = regs
->uregs
[i
];
4666 #elif defined(TARGET_SPARC)
4670 env
->npc
= regs
->npc
;
4672 for(i
= 0; i
< 8; i
++)
4673 env
->gregs
[i
] = regs
->u_regs
[i
];
4674 for(i
= 0; i
< 8; i
++)
4675 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
4677 #elif defined(TARGET_PPC)
4681 #if defined(TARGET_PPC64)
4682 int flag
= (env
->insns_flags2
& PPC2_BOOKE206
) ? MSR_CM
: MSR_SF
;
4683 #if defined(TARGET_ABI32)
4684 env
->msr
&= ~((target_ulong
)1 << flag
);
4686 env
->msr
|= (target_ulong
)1 << flag
;
4689 env
->nip
= regs
->nip
;
4690 for(i
= 0; i
< 32; i
++) {
4691 env
->gpr
[i
] = regs
->gpr
[i
];
4694 #elif defined(TARGET_M68K)
4697 env
->dregs
[0] = regs
->d0
;
4698 env
->dregs
[1] = regs
->d1
;
4699 env
->dregs
[2] = regs
->d2
;
4700 env
->dregs
[3] = regs
->d3
;
4701 env
->dregs
[4] = regs
->d4
;
4702 env
->dregs
[5] = regs
->d5
;
4703 env
->dregs
[6] = regs
->d6
;
4704 env
->dregs
[7] = regs
->d7
;
4705 env
->aregs
[0] = regs
->a0
;
4706 env
->aregs
[1] = regs
->a1
;
4707 env
->aregs
[2] = regs
->a2
;
4708 env
->aregs
[3] = regs
->a3
;
4709 env
->aregs
[4] = regs
->a4
;
4710 env
->aregs
[5] = regs
->a5
;
4711 env
->aregs
[6] = regs
->a6
;
4712 env
->aregs
[7] = regs
->usp
;
4714 ts
->sim_syscalls
= 1;
4716 #elif defined(TARGET_MICROBLAZE)
4718 env
->regs
[0] = regs
->r0
;
4719 env
->regs
[1] = regs
->r1
;
4720 env
->regs
[2] = regs
->r2
;
4721 env
->regs
[3] = regs
->r3
;
4722 env
->regs
[4] = regs
->r4
;
4723 env
->regs
[5] = regs
->r5
;
4724 env
->regs
[6] = regs
->r6
;
4725 env
->regs
[7] = regs
->r7
;
4726 env
->regs
[8] = regs
->r8
;
4727 env
->regs
[9] = regs
->r9
;
4728 env
->regs
[10] = regs
->r10
;
4729 env
->regs
[11] = regs
->r11
;
4730 env
->regs
[12] = regs
->r12
;
4731 env
->regs
[13] = regs
->r13
;
4732 env
->regs
[14] = regs
->r14
;
4733 env
->regs
[15] = regs
->r15
;
4734 env
->regs
[16] = regs
->r16
;
4735 env
->regs
[17] = regs
->r17
;
4736 env
->regs
[18] = regs
->r18
;
4737 env
->regs
[19] = regs
->r19
;
4738 env
->regs
[20] = regs
->r20
;
4739 env
->regs
[21] = regs
->r21
;
4740 env
->regs
[22] = regs
->r22
;
4741 env
->regs
[23] = regs
->r23
;
4742 env
->regs
[24] = regs
->r24
;
4743 env
->regs
[25] = regs
->r25
;
4744 env
->regs
[26] = regs
->r26
;
4745 env
->regs
[27] = regs
->r27
;
4746 env
->regs
[28] = regs
->r28
;
4747 env
->regs
[29] = regs
->r29
;
4748 env
->regs
[30] = regs
->r30
;
4749 env
->regs
[31] = regs
->r31
;
4750 env
->sregs
[SR_PC
] = regs
->pc
;
4752 #elif defined(TARGET_MIPS)
4756 for(i
= 0; i
< 32; i
++) {
4757 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
4759 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
4760 if (regs
->cp0_epc
& 1) {
4761 env
->hflags
|= MIPS_HFLAG_M16
;
4763 if (((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) !=
4764 ((env
->active_fpu
.fcr31
& (1 << FCR31_NAN2008
)) != 0)) {
4765 if ((env
->active_fpu
.fcr31_rw_bitmask
&
4766 (1 << FCR31_NAN2008
)) == 0) {
4767 fprintf(stderr
, "ELF binary's NaN mode not supported by CPU\n");
4770 if ((info
->elf_flags
& EF_MIPS_NAN2008
) != 0) {
4771 env
->active_fpu
.fcr31
|= (1 << FCR31_NAN2008
);
4773 env
->active_fpu
.fcr31
&= ~(1 << FCR31_NAN2008
);
4775 restore_snan_bit_mode(env
);
4778 #elif defined(TARGET_NIOS2)
4781 env
->regs
[1] = regs
->r1
;
4782 env
->regs
[2] = regs
->r2
;
4783 env
->regs
[3] = regs
->r3
;
4784 env
->regs
[4] = regs
->r4
;
4785 env
->regs
[5] = regs
->r5
;
4786 env
->regs
[6] = regs
->r6
;
4787 env
->regs
[7] = regs
->r7
;
4788 env
->regs
[8] = regs
->r8
;
4789 env
->regs
[9] = regs
->r9
;
4790 env
->regs
[10] = regs
->r10
;
4791 env
->regs
[11] = regs
->r11
;
4792 env
->regs
[12] = regs
->r12
;
4793 env
->regs
[13] = regs
->r13
;
4794 env
->regs
[14] = regs
->r14
;
4795 env
->regs
[15] = regs
->r15
;
4796 /* TODO: unsigned long orig_r2; */
4797 env
->regs
[R_RA
] = regs
->ra
;
4798 env
->regs
[R_FP
] = regs
->fp
;
4799 env
->regs
[R_SP
] = regs
->sp
;
4800 env
->regs
[R_GP
] = regs
->gp
;
4801 env
->regs
[CR_ESTATUS
] = regs
->estatus
;
4802 env
->regs
[R_EA
] = regs
->ea
;
4803 /* TODO: unsigned long orig_r7; */
4805 /* Emulate eret when starting thread. */
4806 env
->regs
[R_PC
] = regs
->ea
;
4808 #elif defined(TARGET_OPENRISC)
4812 for (i
= 0; i
< 32; i
++) {
4813 cpu_set_gpr(env
, i
, regs
->gpr
[i
]);
4816 cpu_set_sr(env
, regs
->sr
);
4818 #elif defined(TARGET_SH4)
4822 for(i
= 0; i
< 16; i
++) {
4823 env
->gregs
[i
] = regs
->regs
[i
];
4827 #elif defined(TARGET_ALPHA)
4831 for(i
= 0; i
< 28; i
++) {
4832 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4834 env
->ir
[IR_SP
] = regs
->usp
;
4837 #elif defined(TARGET_CRIS)
4839 env
->regs
[0] = regs
->r0
;
4840 env
->regs
[1] = regs
->r1
;
4841 env
->regs
[2] = regs
->r2
;
4842 env
->regs
[3] = regs
->r3
;
4843 env
->regs
[4] = regs
->r4
;
4844 env
->regs
[5] = regs
->r5
;
4845 env
->regs
[6] = regs
->r6
;
4846 env
->regs
[7] = regs
->r7
;
4847 env
->regs
[8] = regs
->r8
;
4848 env
->regs
[9] = regs
->r9
;
4849 env
->regs
[10] = regs
->r10
;
4850 env
->regs
[11] = regs
->r11
;
4851 env
->regs
[12] = regs
->r12
;
4852 env
->regs
[13] = regs
->r13
;
4853 env
->regs
[14] = info
->start_stack
;
4854 env
->regs
[15] = regs
->acr
;
4855 env
->pc
= regs
->erp
;
4857 #elif defined(TARGET_S390X)
4860 for (i
= 0; i
< 16; i
++) {
4861 env
->regs
[i
] = regs
->gprs
[i
];
4863 env
->psw
.mask
= regs
->psw
.mask
;
4864 env
->psw
.addr
= regs
->psw
.addr
;
4866 #elif defined(TARGET_TILEGX)
4869 for (i
= 0; i
< TILEGX_R_COUNT
; i
++) {
4870 env
->regs
[i
] = regs
->regs
[i
];
4872 for (i
= 0; i
< TILEGX_SPR_COUNT
; i
++) {
4877 #elif defined(TARGET_HPPA)
4880 for (i
= 1; i
< 32; i
++) {
4881 env
->gr
[i
] = regs
->gr
[i
];
4883 env
->iaoq_f
= regs
->iaoq
[0];
4884 env
->iaoq_b
= regs
->iaoq
[1];
4887 #error unsupported target CPU
4890 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4891 ts
->stack_base
= info
->start_stack
;
4892 ts
->heap_base
= info
->brk
;
4893 /* This will be filled in on the first SYS_HEAPINFO call. */
4898 if (gdbserver_start(gdbstub_port
) < 0) {
4899 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4903 gdb_handlesig(cpu
, 0);