linux-user/microblaze/cpu_loop.c

   1 /*
   2  *  qemu user cpu loop
   3  *
   4  *  Copyright (c) 2003-2008 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu.h"
  22 #include "cpu_loop-common.h"
  23
  24 void cpu_loop(CPUMBState *env)
  25 {
  26     CPUState *cs = CPU(mb_env_get_cpu(env));
  27     int trapnr, ret;
  28     target_siginfo_t info;
  29
  30     while (1) {
  31         cpu_exec_start(cs);
  32         trapnr = cpu_exec(cs);
  33         cpu_exec_end(cs);
  34         process_queued_cpu_work(cs);
  35
  36         switch (trapnr) {
  37         case 0xaa:
  38             {
  39                 info.si_signo = TARGET_SIGSEGV;
  40                 info.si_errno = 0;
  41                 /* XXX: check env->error_code */
  42                 info.si_code = TARGET_SEGV_MAPERR;
  43                 info._sifields._sigfault._addr = 0;
  44                 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
  45             }
  46             break;
  47         case EXCP_INTERRUPT:
  48           /* just indicate that signals should be handled asap */
  49           break;
  50         case EXCP_BREAK:
  51             /* Return address is 4 bytes after the call.  */
  52             env->regs[14] += 4;
  53             env->sregs[SR_PC] = env->regs[14];
  54             ret = do_syscall(env,
  55                              env->regs[12],
  56                              env->regs[5],
  57                              env->regs[6],
  58                              env->regs[7],
  59                              env->regs[8],
  60                              env->regs[9],
  61                              env->regs[10],
  62                              0, 0);
  63             if (ret == -TARGET_ERESTARTSYS) {
  64                 /* Wind back to before the syscall. */
  65                 env->sregs[SR_PC] -= 4;
  66             } else if (ret != -TARGET_QEMU_ESIGRETURN) {
  67                 env->regs[3] = ret;
  68             }
  69             /* All syscall exits result in guest r14 being equal to the
  70              * PC we return to, because the kernel syscall exit "rtbd" does
  71              * this. (This is true even for sigreturn(); note that r14 is
  72              * not a userspace-usable register, as the kernel may clobber it
  73              * at any point.)
  74              */
  75             env->regs[14] = env->sregs[SR_PC];
  76             break;
  77         case EXCP_HW_EXCP:
  78             env->regs[17] = env->sregs[SR_PC] + 4;
  79             if (env->iflags & D_FLAG) {
  80                 env->sregs[SR_ESR] |= 1 << 12;
  81                 env->sregs[SR_PC] -= 4;
  82                 /* FIXME: if branch was immed, replay the imm as well.  */
  83             }
  84
  85             env->iflags &= ~(IMM_FLAG | D_FLAG);
  86
  87             switch (env->sregs[SR_ESR] & 31) {
  88                 case ESR_EC_DIVZERO:
  89                     info.si_signo = TARGET_SIGFPE;
  90                     info.si_errno = 0;
  91                     info.si_code = TARGET_FPE_FLTDIV;
  92                     info._sifields._sigfault._addr = 0;
  93                     queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
  94                     break;
  95                 case ESR_EC_FPU:
  96                     info.si_signo = TARGET_SIGFPE;
  97                     info.si_errno = 0;
  98                     if (env->sregs[SR_FSR] & FSR_IO) {
  99                         info.si_code = TARGET_FPE_FLTINV;
 100                     }
 101                     if (env->sregs[SR_FSR] & FSR_DZ) {
 102                         info.si_code = TARGET_FPE_FLTDIV;
 103                     }
 104                     info._sifields._sigfault._addr = 0;
 105                     queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
 106                     break;
 107                 default:
 108                     fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n",
 109                             env->sregs[SR_ESR] & ESR_EC_MASK);
 110                     cpu_dump_state(cs, stderr, fprintf, 0);
 111                     exit(EXIT_FAILURE);
 112                     break;
 113             }
 114             break;
 115         case EXCP_DEBUG:
 116             {
 117                 int sig;
 118
 119                 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
 120                 if (sig)
 121                   {
 122                     info.si_signo = sig;
 123                     info.si_errno = 0;
 124                     info.si_code = TARGET_TRAP_BRKPT;
 125                     queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
 126                   }
 127             }
 128             break;
 129         case EXCP_ATOMIC:
 130             cpu_exec_step_atomic(cs);
 131             break;
 132         default:
 133             fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
 134             cpu_dump_state(cs, stderr, fprintf, 0);
 135             exit(EXIT_FAILURE);
 136         }
 137         process_pending_signals (env);
 138     }
 139 }
 140
 141 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
 142 {
 143     env->regs[0] = regs->r0;
 144     env->regs[1] = regs->r1;
 145     env->regs[2] = regs->r2;
 146     env->regs[3] = regs->r3;
 147     env->regs[4] = regs->r4;
 148     env->regs[5] = regs->r5;
 149     env->regs[6] = regs->r6;
 150     env->regs[7] = regs->r7;
 151     env->regs[8] = regs->r8;
 152     env->regs[9] = regs->r9;
 153     env->regs[10] = regs->r10;
 154     env->regs[11] = regs->r11;
 155     env->regs[12] = regs->r12;
 156     env->regs[13] = regs->r13;
 157     env->regs[14] = regs->r14;
 158     env->regs[15] = regs->r15;
 159     env->regs[16] = regs->r16;
 160     env->regs[17] = regs->r17;
 161     env->regs[18] = regs->r18;
 162     env->regs[19] = regs->r19;
 163     env->regs[20] = regs->r20;
 164     env->regs[21] = regs->r21;
 165     env->regs[22] = regs->r22;
 166     env->regs[23] = regs->r23;
 167     env->regs[24] = regs->r24;
 168     env->regs[25] = regs->r25;
 169     env->regs[26] = regs->r26;
 170     env->regs[27] = regs->r27;
 171     env->regs[28] = regs->r28;
 172     env->regs[29] = regs->r29;
 173     env->regs[30] = regs->r30;
 174     env->regs[31] = regs->r31;
 175     env->sregs[SR_PC] = regs->pc;
 176 }