linux-user/vm86.c

   1 /*
   2  *  vm86 linux syscall support
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20 #include <stdlib.h>
  21 #include <stdio.h>
  22 #include <stdarg.h>
  23 #include <string.h>
  24 #include <errno.h>
  25 #include <unistd.h>
  26
  27 #include "qemu.h"
  28
  29 //#define DEBUG_VM86
  30
  31 #define set_flags(X,new,mask) \
  32 ((X) = ((X) & ~(mask)) | ((new) & (mask)))
  33
  34 #define SAFE_MASK       (0xDD5)
  35 #define RETURN_MASK     (0xDFF)
  36
  37 static inline int is_revectored(int nr, struct target_revectored_struct *bitmap)
  38 {
  39     return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1;
  40 }
  41
  42 static inline void vm_putw(uint8_t *segptr, unsigned int reg16, unsigned int val)
  43 {
  44     stw(segptr + (reg16 & 0xffff), val);
  45 }
  46
  47 static inline void vm_putl(uint8_t *segptr, unsigned int reg16, unsigned int val)
  48 {
  49     stl(segptr + (reg16 & 0xffff), val);
  50 }
  51
  52 static inline unsigned int vm_getw(uint8_t *segptr, unsigned int reg16)
  53 {
  54     return lduw(segptr + (reg16 & 0xffff));
  55 }
  56
  57 static inline unsigned int vm_getl(uint8_t *segptr, unsigned int reg16)
  58 {
  59     return ldl(segptr + (reg16 & 0xffff));
  60 }
  61
  62 void save_v86_state(CPUX86State *env)
  63 {
  64     TaskState *ts = env->opaque;
  65     struct target_vm86plus_struct * target_v86;
  66
  67     if (!lock_user_struct(VERIFY_WRITE, target_v86, ts->target_v86, 0))
  68         /* FIXME - should return an error */
  69         return;
  70     /* put the VM86 registers in the userspace register structure */
  71     target_v86->regs.eax = tswap32(env->regs[R_EAX]);
  72     target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
  73     target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
  74     target_v86->regs.edx = tswap32(env->regs[R_EDX]);
  75     target_v86->regs.esi = tswap32(env->regs[R_ESI]);
  76     target_v86->regs.edi = tswap32(env->regs[R_EDI]);
  77     target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
  78     target_v86->regs.esp = tswap32(env->regs[R_ESP]);
  79     target_v86->regs.eip = tswap32(env->eip);
  80     target_v86->regs.cs = tswap16(env->segs[R_CS].selector);
  81     target_v86->regs.ss = tswap16(env->segs[R_SS].selector);
  82     target_v86->regs.ds = tswap16(env->segs[R_DS].selector);
  83     target_v86->regs.es = tswap16(env->segs[R_ES].selector);
  84     target_v86->regs.fs = tswap16(env->segs[R_FS].selector);
  85     target_v86->regs.gs = tswap16(env->segs[R_GS].selector);
  86     set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask);
  87     target_v86->regs.eflags = tswap32(env->eflags);
  88     unlock_user_struct(target_v86, ts->target_v86, 1);
  89 #ifdef DEBUG_VM86
  90     fprintf(logfile, "save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
  91             env->eflags, env->segs[R_CS].selector, env->eip);
  92 #endif
  93
  94     /* restore 32 bit registers */
  95     env->regs[R_EAX] = ts->vm86_saved_regs.eax;
  96     env->regs[R_EBX] = ts->vm86_saved_regs.ebx;
  97     env->regs[R_ECX] = ts->vm86_saved_regs.ecx;
  98     env->regs[R_EDX] = ts->vm86_saved_regs.edx;
  99     env->regs[R_ESI] = ts->vm86_saved_regs.esi;
 100     env->regs[R_EDI] = ts->vm86_saved_regs.edi;
 101     env->regs[R_EBP] = ts->vm86_saved_regs.ebp;
 102     env->regs[R_ESP] = ts->vm86_saved_regs.esp;
 103     env->eflags = ts->vm86_saved_regs.eflags;
 104     env->eip = ts->vm86_saved_regs.eip;
 105
 106     cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs);
 107     cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss);
 108     cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds);
 109     cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es);
 110     cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs);
 111     cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs);
 112 }
 113
 114 /* return from vm86 mode to 32 bit. The vm86() syscall will return
 115    'retval' */
 116 static inline void return_to_32bit(CPUX86State *env, int retval)
 117 {
 118 #ifdef DEBUG_VM86
 119     fprintf(logfile, "return_to_32bit: ret=0x%x\n", retval);
 120 #endif
 121     save_v86_state(env);
 122     env->regs[R_EAX] = retval;
 123 }
 124
 125 static inline int set_IF(CPUX86State *env)
 126 {
 127     TaskState *ts = env->opaque;
 128
 129     ts->v86flags |= VIF_MASK;
 130     if (ts->v86flags & VIP_MASK) {
 131         return_to_32bit(env, TARGET_VM86_STI);
 132         return 1;
 133     }
 134     return 0;
 135 }
 136
 137 static inline void clear_IF(CPUX86State *env)
 138 {
 139     TaskState *ts = env->opaque;
 140
 141     ts->v86flags &= ~VIF_MASK;
 142 }
 143
 144 static inline void clear_TF(CPUX86State *env)
 145 {
 146     env->eflags &= ~TF_MASK;
 147 }
 148
 149 static inline void clear_AC(CPUX86State *env)
 150 {
 151     env->eflags &= ~AC_MASK;
 152 }
 153
 154 static inline int set_vflags_long(unsigned long eflags, CPUX86State *env)
 155 {
 156     TaskState *ts = env->opaque;
 157
 158     set_flags(ts->v86flags, eflags, ts->v86mask);
 159     set_flags(env->eflags, eflags, SAFE_MASK);
 160     if (eflags & IF_MASK)
 161         return set_IF(env);
 162     else
 163         clear_IF(env);
 164     return 0;
 165 }
 166
 167 static inline int set_vflags_short(unsigned short flags, CPUX86State *env)
 168 {
 169     TaskState *ts = env->opaque;
 170
 171     set_flags(ts->v86flags, flags, ts->v86mask & 0xffff);
 172     set_flags(env->eflags, flags, SAFE_MASK);
 173     if (flags & IF_MASK)
 174         return set_IF(env);
 175     else
 176         clear_IF(env);
 177     return 0;
 178 }
 179
 180 static inline unsigned int get_vflags(CPUX86State *env)
 181 {
 182     TaskState *ts = env->opaque;
 183     unsigned int flags;
 184
 185     flags = env->eflags & RETURN_MASK;
 186     if (ts->v86flags & VIF_MASK)
 187         flags |= IF_MASK;
 188     flags |= IOPL_MASK;
 189     return flags | (ts->v86flags & ts->v86mask);
 190 }
 191
 192 #define ADD16(reg, val) reg = (reg & ~0xffff) | ((reg + (val)) & 0xffff)
 193
 194 /* handle VM86 interrupt (NOTE: the CPU core currently does not
 195    support TSS interrupt revectoring, so this code is always executed) */
 196 static void do_int(CPUX86State *env, int intno)
 197 {
 198     TaskState *ts = env->opaque;
 199     uint32_t *int_ptr, segoffs;
 200     uint8_t *ssp;
 201     unsigned int sp;
 202
 203     if (env->segs[R_CS].selector == TARGET_BIOSSEG)
 204         goto cannot_handle;
 205     if (is_revectored(intno, &ts->vm86plus.int_revectored))
 206         goto cannot_handle;
 207     if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff,
 208                                        &ts->vm86plus.int21_revectored))
 209         goto cannot_handle;
 210     int_ptr = (uint32_t *)(intno << 2);
 211     segoffs = tswap32(*int_ptr);
 212     if ((segoffs >> 16) == TARGET_BIOSSEG)
 213         goto cannot_handle;
 214 #if defined(DEBUG_VM86)
 215     fprintf(logfile, "VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
 216             intno, segoffs >> 16, segoffs & 0xffff);
 217 #endif
 218     /* save old state */
 219     ssp = (uint8_t *)(env->segs[R_SS].selector << 4);
 220     sp = env->regs[R_ESP] & 0xffff;
 221     vm_putw(ssp, sp - 2, get_vflags(env));
 222     vm_putw(ssp, sp - 4, env->segs[R_CS].selector);
 223     vm_putw(ssp, sp - 6, env->eip);
 224     ADD16(env->regs[R_ESP], -6);
 225     /* goto interrupt handler */
 226     env->eip = segoffs & 0xffff;
 227     cpu_x86_load_seg(env, R_CS, segoffs >> 16);
 228     clear_TF(env);
 229     clear_IF(env);
 230     clear_AC(env);
 231     return;
 232  cannot_handle:
 233 #if defined(DEBUG_VM86)
 234     fprintf(logfile, "VM86: return to 32 bits int 0x%x\n", intno);
 235 #endif
 236     return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
 237 }
 238
 239 void handle_vm86_trap(CPUX86State *env, int trapno)
 240 {
 241     if (trapno == 1 || trapno == 3) {
 242         return_to_32bit(env, TARGET_VM86_TRAP + (trapno << 8));
 243     } else {
 244         do_int(env, trapno);
 245     }
 246 }
 247
 248 #define CHECK_IF_IN_TRAP() \
 249       if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \
 250           (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \
 251                 newflags |= TF_MASK
 252
 253 #define VM86_FAULT_RETURN \
 254         if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \
 255             (ts->v86flags & (IF_MASK | VIF_MASK))) \
 256             return_to_32bit(env, TARGET_VM86_PICRETURN); \
 257         return
 258
 259 void handle_vm86_fault(CPUX86State *env)
 260 {
 261     TaskState *ts = env->opaque;
 262     uint8_t *csp, *pc, *ssp;
 263     unsigned int ip, sp, newflags, newip, newcs, opcode, intno;
 264     int data32, pref_done;
 265
 266     csp = (uint8_t *)(env->segs[R_CS].selector << 4);
 267     ip = env->eip & 0xffff;
 268     pc = csp + ip;
 269
 270     ssp = (uint8_t *)(env->segs[R_SS].selector << 4);
 271     sp = env->regs[R_ESP] & 0xffff;
 272
 273 #if defined(DEBUG_VM86)
 274     fprintf(logfile, "VM86 exception %04x:%08x %02x %02x\n",
 275             env->segs[R_CS].selector, env->eip, pc[0], pc[1]);
 276 #endif
 277
 278     data32 = 0;
 279     pref_done = 0;
 280     do {
 281         opcode = csp[ip];
 282         ADD16(ip, 1);
 283         switch (opcode) {
 284         case 0x66:      /* 32-bit data */     data32=1; break;
 285         case 0x67:      /* 32-bit address */  break;
 286         case 0x2e:      /* CS */              break;
 287         case 0x3e:      /* DS */              break;
 288         case 0x26:      /* ES */              break;
 289         case 0x36:      /* SS */              break;
 290         case 0x65:      /* GS */              break;
 291         case 0x64:      /* FS */              break;
 292         case 0xf2:      /* repnz */           break;
 293         case 0xf3:      /* rep */             break;
 294         default: pref_done = 1;
 295         }
 296     } while (!pref_done);
 297
 298     /* VM86 mode */
 299     switch(opcode) {
 300     case 0x9c: /* pushf */
 301         if (data32) {
 302             vm_putl(ssp, sp - 4, get_vflags(env));
 303             ADD16(env->regs[R_ESP], -4);
 304         } else {
 305             vm_putw(ssp, sp - 2, get_vflags(env));
 306             ADD16(env->regs[R_ESP], -2);
 307         }
 308         env->eip = ip;
 309         VM86_FAULT_RETURN;
 310
 311     case 0x9d: /* popf */
 312         if (data32) {
 313             newflags = vm_getl(ssp, sp);
 314             ADD16(env->regs[R_ESP], 4);
 315         } else {
 316             newflags = vm_getw(ssp, sp);
 317             ADD16(env->regs[R_ESP], 2);
 318         }
 319         env->eip = ip;
 320         CHECK_IF_IN_TRAP();
 321         if (data32) {
 322             if (set_vflags_long(newflags, env))
 323                 return;
 324         } else {
 325             if (set_vflags_short(newflags, env))
 326                 return;
 327         }
 328         VM86_FAULT_RETURN;
 329
 330     case 0xcd: /* int */
 331         intno = csp[ip];
 332         ADD16(ip, 1);
 333         env->eip = ip;
 334         if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) {
 335             if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >>
 336                   (intno &7)) & 1) {
 337                 return_to_32bit(env, TARGET_VM86_INTx + (intno << 8));
 338                 return;
 339             }
 340         }
 341         do_int(env, intno);
 342         break;
 343
 344     case 0xcf: /* iret */
 345         if (data32) {
 346             newip = vm_getl(ssp, sp) & 0xffff;
 347             newcs = vm_getl(ssp, sp + 4) & 0xffff;
 348             newflags = vm_getl(ssp, sp + 8);
 349             ADD16(env->regs[R_ESP], 12);
 350         } else {
 351             newip = vm_getw(ssp, sp);
 352             newcs = vm_getw(ssp, sp + 2);
 353             newflags = vm_getw(ssp, sp + 4);
 354             ADD16(env->regs[R_ESP], 6);
 355         }
 356         env->eip = newip;
 357         cpu_x86_load_seg(env, R_CS, newcs);
 358         CHECK_IF_IN_TRAP();
 359         if (data32) {
 360             if (set_vflags_long(newflags, env))
 361                 return;
 362         } else {
 363             if (set_vflags_short(newflags, env))
 364                 return;
 365         }
 366         VM86_FAULT_RETURN;
 367
 368     case 0xfa: /* cli */
 369         env->eip = ip;
 370         clear_IF(env);
 371         VM86_FAULT_RETURN;
 372
 373     case 0xfb: /* sti */
 374         env->eip = ip;
 375         if (set_IF(env))
 376             return;
 377         VM86_FAULT_RETURN;
 378
 379     default:
 380         /* real VM86 GPF exception */
 381         return_to_32bit(env, TARGET_VM86_UNKNOWN);
 382         break;
 383     }
 384 }
 385
 386 int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr)
 387 {
 388     TaskState *ts = env->opaque;
 389     struct target_vm86plus_struct * target_v86;
 390     int ret;
 391
 392     switch (subfunction) {
 393     case TARGET_VM86_REQUEST_IRQ:
 394     case TARGET_VM86_FREE_IRQ:
 395     case TARGET_VM86_GET_IRQ_BITS:
 396     case TARGET_VM86_GET_AND_RESET_IRQ:
 397         gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction);
 398         ret = -EINVAL;
 399         goto out;
 400     case TARGET_VM86_PLUS_INSTALL_CHECK:
 401         /* NOTE: on old vm86 stuff this will return the error
 402            from verify_area(), because the subfunction is
 403            interpreted as (invalid) address to vm86_struct.
 404            So the installation check works.
 405             */
 406         ret = 0;
 407         goto out;
 408     }
 409
 410     /* save current CPU regs */
 411     ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */
 412     ts->vm86_saved_regs.ebx = env->regs[R_EBX];
 413     ts->vm86_saved_regs.ecx = env->regs[R_ECX];
 414     ts->vm86_saved_regs.edx = env->regs[R_EDX];
 415     ts->vm86_saved_regs.esi = env->regs[R_ESI];
 416     ts->vm86_saved_regs.edi = env->regs[R_EDI];
 417     ts->vm86_saved_regs.ebp = env->regs[R_EBP];
 418     ts->vm86_saved_regs.esp = env->regs[R_ESP];
 419     ts->vm86_saved_regs.eflags = env->eflags;
 420     ts->vm86_saved_regs.eip  = env->eip;
 421     ts->vm86_saved_regs.cs = env->segs[R_CS].selector;
 422     ts->vm86_saved_regs.ss = env->segs[R_SS].selector;
 423     ts->vm86_saved_regs.ds = env->segs[R_DS].selector;
 424     ts->vm86_saved_regs.es = env->segs[R_ES].selector;
 425     ts->vm86_saved_regs.fs = env->segs[R_FS].selector;
 426     ts->vm86_saved_regs.gs = env->segs[R_GS].selector;
 427
 428     ts->target_v86 = vm86_addr;
 429     if (!lock_user_struct(VERIFY_READ, target_v86, vm86_addr, 1))
 430         return -EFAULT;
 431     /* build vm86 CPU state */
 432     ts->v86flags = tswap32(target_v86->regs.eflags);
 433     env->eflags = (env->eflags & ~SAFE_MASK) |
 434         (tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK;
 435
 436     ts->vm86plus.cpu_type = tswapl(target_v86->cpu_type);
 437     switch (ts->vm86plus.cpu_type) {
 438     case TARGET_CPU_286:
 439         ts->v86mask = 0;
 440         break;
 441     case TARGET_CPU_386:
 442         ts->v86mask = NT_MASK | IOPL_MASK;
 443         break;
 444     case TARGET_CPU_486:
 445         ts->v86mask = AC_MASK | NT_MASK | IOPL_MASK;
 446         break;
 447     default:
 448         ts->v86mask = ID_MASK | AC_MASK | NT_MASK | IOPL_MASK;
 449         break;
 450     }
 451
 452     env->regs[R_EBX] = tswap32(target_v86->regs.ebx);
 453     env->regs[R_ECX] = tswap32(target_v86->regs.ecx);
 454     env->regs[R_EDX] = tswap32(target_v86->regs.edx);
 455     env->regs[R_ESI] = tswap32(target_v86->regs.esi);
 456     env->regs[R_EDI] = tswap32(target_v86->regs.edi);
 457     env->regs[R_EBP] = tswap32(target_v86->regs.ebp);
 458     env->regs[R_ESP] = tswap32(target_v86->regs.esp);
 459     env->eip = tswap32(target_v86->regs.eip);
 460     cpu_x86_load_seg(env, R_CS, tswap16(target_v86->regs.cs));
 461     cpu_x86_load_seg(env, R_SS, tswap16(target_v86->regs.ss));
 462     cpu_x86_load_seg(env, R_DS, tswap16(target_v86->regs.ds));
 463     cpu_x86_load_seg(env, R_ES, tswap16(target_v86->regs.es));
 464     cpu_x86_load_seg(env, R_FS, tswap16(target_v86->regs.fs));
 465     cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs));
 466     ret = tswap32(target_v86->regs.eax); /* eax will be restored at
 467                                             the end of the syscall */
 468     memcpy(&ts->vm86plus.int_revectored,
 469            &target_v86->int_revectored, 32);
 470     memcpy(&ts->vm86plus.int21_revectored,
 471            &target_v86->int21_revectored, 32);
 472     ts->vm86plus.vm86plus.flags = tswapl(target_v86->vm86plus.flags);
 473     memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab,
 474            target_v86->vm86plus.vm86dbg_intxxtab, 32);
 475     unlock_user_struct(target_v86, vm86_addr, 0);
 476
 477 #ifdef DEBUG_VM86
 478     fprintf(logfile, "do_vm86: cs:ip=%04x:%04x\n",
 479             env->segs[R_CS].selector, env->eip);
 480 #endif
 481     /* now the virtual CPU is ready for vm86 execution ! */
 482  out:
 483     return ret;
 484 }
 485