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1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #include "memory-internal.h"
24
25 unsigned memory_region_transaction_depth = 0;
26 static bool global_dirty_log = false;
27
28 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
29 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
30
31 typedef struct AddrRange AddrRange;
32
33 /*
34 * Note using signed integers limits us to physical addresses at most
35 * 63 bits wide. They are needed for negative offsetting in aliases
36 * (large MemoryRegion::alias_offset).
37 */
38 struct AddrRange {
39 Int128 start;
40 Int128 size;
41 };
42
43 static AddrRange addrrange_make(Int128 start, Int128 size)
44 {
45 return (AddrRange) { start, size };
46 }
47
48 static bool addrrange_equal(AddrRange r1, AddrRange r2)
49 {
50 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
51 }
52
53 static Int128 addrrange_end(AddrRange r)
54 {
55 return int128_add(r.start, r.size);
56 }
57
58 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
59 {
60 int128_addto(&range.start, delta);
61 return range;
62 }
63
64 static bool addrrange_contains(AddrRange range, Int128 addr)
65 {
66 return int128_ge(addr, range.start)
67 && int128_lt(addr, addrrange_end(range));
68 }
69
70 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
71 {
72 return addrrange_contains(r1, r2.start)
73 || addrrange_contains(r2, r1.start);
74 }
75
76 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
77 {
78 Int128 start = int128_max(r1.start, r2.start);
79 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
80 return addrrange_make(start, int128_sub(end, start));
81 }
82
83 enum ListenerDirection { Forward, Reverse };
84
85 static bool memory_listener_match(MemoryListener *listener,
86 MemoryRegionSection *section)
87 {
88 return !listener->address_space_filter
89 || listener->address_space_filter == section->address_space;
90 }
91
92 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
93 do { \
94 MemoryListener *_listener; \
95 \
96 switch (_direction) { \
97 case Forward: \
98 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
99 _listener->_callback(_listener, ##_args); \
100 } \
101 break; \
102 case Reverse: \
103 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
104 memory_listeners, link) { \
105 _listener->_callback(_listener, ##_args); \
106 } \
107 break; \
108 default: \
109 abort(); \
110 } \
111 } while (0)
112
113 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
120 if (memory_listener_match(_listener, _section)) { \
121 _listener->_callback(_listener, _section, ##_args); \
122 } \
123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
128 if (memory_listener_match(_listener, _section)) { \
129 _listener->_callback(_listener, _section, ##_args); \
130 } \
131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
138 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
139 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
140 .mr = (fr)->mr, \
141 .address_space = (as)->root, \
142 .offset_within_region = (fr)->offset_in_region, \
143 .size = int128_get64((fr)->addr.size), \
144 .offset_within_address_space = int128_get64((fr)->addr.start), \
145 .readonly = (fr)->readonly, \
146 }))
147
148 struct CoalescedMemoryRange {
149 AddrRange addr;
150 QTAILQ_ENTRY(CoalescedMemoryRange) link;
151 };
152
153 struct MemoryRegionIoeventfd {
154 AddrRange addr;
155 bool match_data;
156 uint64_t data;
157 EventNotifier *e;
158 };
159
160 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
161 MemoryRegionIoeventfd b)
162 {
163 if (int128_lt(a.addr.start, b.addr.start)) {
164 return true;
165 } else if (int128_gt(a.addr.start, b.addr.start)) {
166 return false;
167 } else if (int128_lt(a.addr.size, b.addr.size)) {
168 return true;
169 } else if (int128_gt(a.addr.size, b.addr.size)) {
170 return false;
171 } else if (a.match_data < b.match_data) {
172 return true;
173 } else if (a.match_data > b.match_data) {
174 return false;
175 } else if (a.match_data) {
176 if (a.data < b.data) {
177 return true;
178 } else if (a.data > b.data) {
179 return false;
180 }
181 }
182 if (a.e < b.e) {
183 return true;
184 } else if (a.e > b.e) {
185 return false;
186 }
187 return false;
188 }
189
190 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
191 MemoryRegionIoeventfd b)
192 {
193 return !memory_region_ioeventfd_before(a, b)
194 && !memory_region_ioeventfd_before(b, a);
195 }
196
197 typedef struct FlatRange FlatRange;
198 typedef struct FlatView FlatView;
199
200 /* Range of memory in the global map. Addresses are absolute. */
201 struct FlatRange {
202 MemoryRegion *mr;
203 target_phys_addr_t offset_in_region;
204 AddrRange addr;
205 uint8_t dirty_log_mask;
206 bool readable;
207 bool readonly;
208 };
209
210 /* Flattened global view of current active memory hierarchy. Kept in sorted
211 * order.
212 */
213 struct FlatView {
214 FlatRange *ranges;
215 unsigned nr;
216 unsigned nr_allocated;
217 };
218
219 typedef struct AddressSpaceOps AddressSpaceOps;
220
221 #define FOR_EACH_FLAT_RANGE(var, view) \
222 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
223
224 static bool flatrange_equal(FlatRange *a, FlatRange *b)
225 {
226 return a->mr == b->mr
227 && addrrange_equal(a->addr, b->addr)
228 && a->offset_in_region == b->offset_in_region
229 && a->readable == b->readable
230 && a->readonly == b->readonly;
231 }
232
233 static void flatview_init(FlatView *view)
234 {
235 view->ranges = NULL;
236 view->nr = 0;
237 view->nr_allocated = 0;
238 }
239
240 /* Insert a range into a given position. Caller is responsible for maintaining
241 * sorting order.
242 */
243 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
244 {
245 if (view->nr == view->nr_allocated) {
246 view->nr_allocated = MAX(2 * view->nr, 10);
247 view->ranges = g_realloc(view->ranges,
248 view->nr_allocated * sizeof(*view->ranges));
249 }
250 memmove(view->ranges + pos + 1, view->ranges + pos,
251 (view->nr - pos) * sizeof(FlatRange));
252 view->ranges[pos] = *range;
253 ++view->nr;
254 }
255
256 static void flatview_destroy(FlatView *view)
257 {
258 g_free(view->ranges);
259 }
260
261 static bool can_merge(FlatRange *r1, FlatRange *r2)
262 {
263 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
264 && r1->mr == r2->mr
265 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
266 r1->addr.size),
267 int128_make64(r2->offset_in_region))
268 && r1->dirty_log_mask == r2->dirty_log_mask
269 && r1->readable == r2->readable
270 && r1->readonly == r2->readonly;
271 }
272
273 /* Attempt to simplify a view by merging ajacent ranges */
274 static void flatview_simplify(FlatView *view)
275 {
276 unsigned i, j;
277
278 i = 0;
279 while (i < view->nr) {
280 j = i + 1;
281 while (j < view->nr
282 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
283 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
284 ++j;
285 }
286 ++i;
287 memmove(&view->ranges[i], &view->ranges[j],
288 (view->nr - j) * sizeof(view->ranges[j]));
289 view->nr -= j - i;
290 }
291 }
292
293 static void memory_region_read_accessor(void *opaque,
294 target_phys_addr_t addr,
295 uint64_t *value,
296 unsigned size,
297 unsigned shift,
298 uint64_t mask)
299 {
300 MemoryRegion *mr = opaque;
301 uint64_t tmp;
302
303 if (mr->flush_coalesced_mmio) {
304 qemu_flush_coalesced_mmio_buffer();
305 }
306 tmp = mr->ops->read(mr->opaque, addr, size);
307 *value |= (tmp & mask) << shift;
308 }
309
310 static void memory_region_write_accessor(void *opaque,
311 target_phys_addr_t addr,
312 uint64_t *value,
313 unsigned size,
314 unsigned shift,
315 uint64_t mask)
316 {
317 MemoryRegion *mr = opaque;
318 uint64_t tmp;
319
320 if (mr->flush_coalesced_mmio) {
321 qemu_flush_coalesced_mmio_buffer();
322 }
323 tmp = (*value >> shift) & mask;
324 mr->ops->write(mr->opaque, addr, tmp, size);
325 }
326
327 static void access_with_adjusted_size(target_phys_addr_t addr,
328 uint64_t *value,
329 unsigned size,
330 unsigned access_size_min,
331 unsigned access_size_max,
332 void (*access)(void *opaque,
333 target_phys_addr_t addr,
334 uint64_t *value,
335 unsigned size,
336 unsigned shift,
337 uint64_t mask),
338 void *opaque)
339 {
340 uint64_t access_mask;
341 unsigned access_size;
342 unsigned i;
343
344 if (!access_size_min) {
345 access_size_min = 1;
346 }
347 if (!access_size_max) {
348 access_size_max = 4;
349 }
350 access_size = MAX(MIN(size, access_size_max), access_size_min);
351 access_mask = -1ULL >> (64 - access_size * 8);
352 for (i = 0; i < size; i += access_size) {
353 /* FIXME: big-endian support */
354 access(opaque, addr + i, value, access_size, i * 8, access_mask);
355 }
356 }
357
358 static AddressSpace address_space_memory;
359
360 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
361 unsigned width, bool write)
362 {
363 const MemoryRegionPortio *mrp;
364
365 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
366 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
367 && width == mrp->size
368 && (write ? (bool)mrp->write : (bool)mrp->read)) {
369 return mrp;
370 }
371 }
372 return NULL;
373 }
374
375 static void memory_region_iorange_read(IORange *iorange,
376 uint64_t offset,
377 unsigned width,
378 uint64_t *data)
379 {
380 MemoryRegionIORange *mrio
381 = container_of(iorange, MemoryRegionIORange, iorange);
382 MemoryRegion *mr = mrio->mr;
383
384 offset += mrio->offset;
385 if (mr->ops->old_portio) {
386 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
387 width, false);
388
389 *data = ((uint64_t)1 << (width * 8)) - 1;
390 if (mrp) {
391 *data = mrp->read(mr->opaque, offset);
392 } else if (width == 2) {
393 mrp = find_portio(mr, offset - mrio->offset, 1, false);
394 assert(mrp);
395 *data = mrp->read(mr->opaque, offset) |
396 (mrp->read(mr->opaque, offset + 1) << 8);
397 }
398 return;
399 }
400 *data = 0;
401 access_with_adjusted_size(offset, data, width,
402 mr->ops->impl.min_access_size,
403 mr->ops->impl.max_access_size,
404 memory_region_read_accessor, mr);
405 }
406
407 static void memory_region_iorange_write(IORange *iorange,
408 uint64_t offset,
409 unsigned width,
410 uint64_t data)
411 {
412 MemoryRegionIORange *mrio
413 = container_of(iorange, MemoryRegionIORange, iorange);
414 MemoryRegion *mr = mrio->mr;
415
416 offset += mrio->offset;
417 if (mr->ops->old_portio) {
418 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
419 width, true);
420
421 if (mrp) {
422 mrp->write(mr->opaque, offset, data);
423 } else if (width == 2) {
424 mrp = find_portio(mr, offset - mrio->offset, 1, true);
425 assert(mrp);
426 mrp->write(mr->opaque, offset, data & 0xff);
427 mrp->write(mr->opaque, offset + 1, data >> 8);
428 }
429 return;
430 }
431 access_with_adjusted_size(offset, &data, width,
432 mr->ops->impl.min_access_size,
433 mr->ops->impl.max_access_size,
434 memory_region_write_accessor, mr);
435 }
436
437 static void memory_region_iorange_destructor(IORange *iorange)
438 {
439 g_free(container_of(iorange, MemoryRegionIORange, iorange));
440 }
441
442 const IORangeOps memory_region_iorange_ops = {
443 .read = memory_region_iorange_read,
444 .write = memory_region_iorange_write,
445 .destructor = memory_region_iorange_destructor,
446 };
447
448 static AddressSpace address_space_io;
449
450 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
451 {
452 while (mr->parent) {
453 mr = mr->parent;
454 }
455 if (mr == address_space_memory.root) {
456 return &address_space_memory;
457 }
458 if (mr == address_space_io.root) {
459 return &address_space_io;
460 }
461 abort();
462 }
463
464 /* Render a memory region into the global view. Ranges in @view obscure
465 * ranges in @mr.
466 */
467 static void render_memory_region(FlatView *view,
468 MemoryRegion *mr,
469 Int128 base,
470 AddrRange clip,
471 bool readonly)
472 {
473 MemoryRegion *subregion;
474 unsigned i;
475 target_phys_addr_t offset_in_region;
476 Int128 remain;
477 Int128 now;
478 FlatRange fr;
479 AddrRange tmp;
480
481 if (!mr->enabled) {
482 return;
483 }
484
485 int128_addto(&base, int128_make64(mr->addr));
486 readonly |= mr->readonly;
487
488 tmp = addrrange_make(base, mr->size);
489
490 if (!addrrange_intersects(tmp, clip)) {
491 return;
492 }
493
494 clip = addrrange_intersection(tmp, clip);
495
496 if (mr->alias) {
497 int128_subfrom(&base, int128_make64(mr->alias->addr));
498 int128_subfrom(&base, int128_make64(mr->alias_offset));
499 render_memory_region(view, mr->alias, base, clip, readonly);
500 return;
501 }
502
503 /* Render subregions in priority order. */
504 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
505 render_memory_region(view, subregion, base, clip, readonly);
506 }
507
508 if (!mr->terminates) {
509 return;
510 }
511
512 offset_in_region = int128_get64(int128_sub(clip.start, base));
513 base = clip.start;
514 remain = clip.size;
515
516 /* Render the region itself into any gaps left by the current view. */
517 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
518 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
519 continue;
520 }
521 if (int128_lt(base, view->ranges[i].addr.start)) {
522 now = int128_min(remain,
523 int128_sub(view->ranges[i].addr.start, base));
524 fr.mr = mr;
525 fr.offset_in_region = offset_in_region;
526 fr.addr = addrrange_make(base, now);
527 fr.dirty_log_mask = mr->dirty_log_mask;
528 fr.readable = mr->readable;
529 fr.readonly = readonly;
530 flatview_insert(view, i, &fr);
531 ++i;
532 int128_addto(&base, now);
533 offset_in_region += int128_get64(now);
534 int128_subfrom(&remain, now);
535 }
536 if (int128_eq(base, view->ranges[i].addr.start)) {
537 now = int128_min(remain, view->ranges[i].addr.size);
538 int128_addto(&base, now);
539 offset_in_region += int128_get64(now);
540 int128_subfrom(&remain, now);
541 }
542 }
543 if (int128_nz(remain)) {
544 fr.mr = mr;
545 fr.offset_in_region = offset_in_region;
546 fr.addr = addrrange_make(base, remain);
547 fr.dirty_log_mask = mr->dirty_log_mask;
548 fr.readable = mr->readable;
549 fr.readonly = readonly;
550 flatview_insert(view, i, &fr);
551 }
552 }
553
554 /* Render a memory topology into a list of disjoint absolute ranges. */
555 static FlatView generate_memory_topology(MemoryRegion *mr)
556 {
557 FlatView view;
558
559 flatview_init(&view);
560
561 render_memory_region(&view, mr, int128_zero(),
562 addrrange_make(int128_zero(), int128_2_64()), false);
563 flatview_simplify(&view);
564
565 return view;
566 }
567
568 static void address_space_add_del_ioeventfds(AddressSpace *as,
569 MemoryRegionIoeventfd *fds_new,
570 unsigned fds_new_nb,
571 MemoryRegionIoeventfd *fds_old,
572 unsigned fds_old_nb)
573 {
574 unsigned iold, inew;
575 MemoryRegionIoeventfd *fd;
576 MemoryRegionSection section;
577
578 /* Generate a symmetric difference of the old and new fd sets, adding
579 * and deleting as necessary.
580 */
581
582 iold = inew = 0;
583 while (iold < fds_old_nb || inew < fds_new_nb) {
584 if (iold < fds_old_nb
585 && (inew == fds_new_nb
586 || memory_region_ioeventfd_before(fds_old[iold],
587 fds_new[inew]))) {
588 fd = &fds_old[iold];
589 section = (MemoryRegionSection) {
590 .address_space = as->root,
591 .offset_within_address_space = int128_get64(fd->addr.start),
592 .size = int128_get64(fd->addr.size),
593 };
594 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
595 fd->match_data, fd->data, fd->e);
596 ++iold;
597 } else if (inew < fds_new_nb
598 && (iold == fds_old_nb
599 || memory_region_ioeventfd_before(fds_new[inew],
600 fds_old[iold]))) {
601 fd = &fds_new[inew];
602 section = (MemoryRegionSection) {
603 .address_space = as->root,
604 .offset_within_address_space = int128_get64(fd->addr.start),
605 .size = int128_get64(fd->addr.size),
606 };
607 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
608 fd->match_data, fd->data, fd->e);
609 ++inew;
610 } else {
611 ++iold;
612 ++inew;
613 }
614 }
615 }
616
617 static void address_space_update_ioeventfds(AddressSpace *as)
618 {
619 FlatRange *fr;
620 unsigned ioeventfd_nb = 0;
621 MemoryRegionIoeventfd *ioeventfds = NULL;
622 AddrRange tmp;
623 unsigned i;
624
625 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
626 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
627 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
628 int128_sub(fr->addr.start,
629 int128_make64(fr->offset_in_region)));
630 if (addrrange_intersects(fr->addr, tmp)) {
631 ++ioeventfd_nb;
632 ioeventfds = g_realloc(ioeventfds,
633 ioeventfd_nb * sizeof(*ioeventfds));
634 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
635 ioeventfds[ioeventfd_nb-1].addr = tmp;
636 }
637 }
638 }
639
640 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
641 as->ioeventfds, as->ioeventfd_nb);
642
643 g_free(as->ioeventfds);
644 as->ioeventfds = ioeventfds;
645 as->ioeventfd_nb = ioeventfd_nb;
646 }
647
648 static void address_space_update_topology_pass(AddressSpace *as,
649 FlatView old_view,
650 FlatView new_view,
651 bool adding)
652 {
653 unsigned iold, inew;
654 FlatRange *frold, *frnew;
655
656 /* Generate a symmetric difference of the old and new memory maps.
657 * Kill ranges in the old map, and instantiate ranges in the new map.
658 */
659 iold = inew = 0;
660 while (iold < old_view.nr || inew < new_view.nr) {
661 if (iold < old_view.nr) {
662 frold = &old_view.ranges[iold];
663 } else {
664 frold = NULL;
665 }
666 if (inew < new_view.nr) {
667 frnew = &new_view.ranges[inew];
668 } else {
669 frnew = NULL;
670 }
671
672 if (frold
673 && (!frnew
674 || int128_lt(frold->addr.start, frnew->addr.start)
675 || (int128_eq(frold->addr.start, frnew->addr.start)
676 && !flatrange_equal(frold, frnew)))) {
677 /* In old, but (not in new, or in new but attributes changed). */
678
679 if (!adding) {
680 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
681 }
682
683 ++iold;
684 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
685 /* In both (logging may have changed) */
686
687 if (adding) {
688 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
689 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
690 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
691 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
692 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
693 }
694 }
695
696 ++iold;
697 ++inew;
698 } else {
699 /* In new */
700
701 if (adding) {
702 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
703 }
704
705 ++inew;
706 }
707 }
708 }
709
710
711 static void address_space_update_topology(AddressSpace *as)
712 {
713 FlatView old_view = *as->current_map;
714 FlatView new_view = generate_memory_topology(as->root);
715
716 address_space_update_topology_pass(as, old_view, new_view, false);
717 address_space_update_topology_pass(as, old_view, new_view, true);
718
719 *as->current_map = new_view;
720 flatview_destroy(&old_view);
721 address_space_update_ioeventfds(as);
722 }
723
724 void memory_region_transaction_begin(void)
725 {
726 qemu_flush_coalesced_mmio_buffer();
727 ++memory_region_transaction_depth;
728 }
729
730 void memory_region_transaction_commit(void)
731 {
732 assert(memory_region_transaction_depth);
733 --memory_region_transaction_depth;
734 if (!memory_region_transaction_depth) {
735 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
736
737 if (address_space_memory.root) {
738 address_space_update_topology(&address_space_memory);
739 }
740 if (address_space_io.root) {
741 address_space_update_topology(&address_space_io);
742 }
743
744 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
745 }
746 }
747
748 static void memory_region_destructor_none(MemoryRegion *mr)
749 {
750 }
751
752 static void memory_region_destructor_ram(MemoryRegion *mr)
753 {
754 qemu_ram_free(mr->ram_addr);
755 }
756
757 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
758 {
759 qemu_ram_free_from_ptr(mr->ram_addr);
760 }
761
762 static void memory_region_destructor_iomem(MemoryRegion *mr)
763 {
764 }
765
766 static void memory_region_destructor_rom_device(MemoryRegion *mr)
767 {
768 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
769 }
770
771 static bool memory_region_wrong_endianness(MemoryRegion *mr)
772 {
773 #ifdef TARGET_WORDS_BIGENDIAN
774 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
775 #else
776 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
777 #endif
778 }
779
780 void memory_region_init(MemoryRegion *mr,
781 const char *name,
782 uint64_t size)
783 {
784 mr->ops = NULL;
785 mr->parent = NULL;
786 mr->size = int128_make64(size);
787 if (size == UINT64_MAX) {
788 mr->size = int128_2_64();
789 }
790 mr->addr = 0;
791 mr->subpage = false;
792 mr->enabled = true;
793 mr->terminates = false;
794 mr->ram = false;
795 mr->readable = true;
796 mr->readonly = false;
797 mr->rom_device = false;
798 mr->destructor = memory_region_destructor_none;
799 mr->priority = 0;
800 mr->may_overlap = false;
801 mr->alias = NULL;
802 QTAILQ_INIT(&mr->subregions);
803 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
804 QTAILQ_INIT(&mr->coalesced);
805 mr->name = g_strdup(name);
806 mr->dirty_log_mask = 0;
807 mr->ioeventfd_nb = 0;
808 mr->ioeventfds = NULL;
809 mr->flush_coalesced_mmio = false;
810 }
811
812 static bool memory_region_access_valid(MemoryRegion *mr,
813 target_phys_addr_t addr,
814 unsigned size,
815 bool is_write)
816 {
817 if (mr->ops->valid.accepts
818 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
819 return false;
820 }
821
822 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
823 return false;
824 }
825
826 /* Treat zero as compatibility all valid */
827 if (!mr->ops->valid.max_access_size) {
828 return true;
829 }
830
831 if (size > mr->ops->valid.max_access_size
832 || size < mr->ops->valid.min_access_size) {
833 return false;
834 }
835 return true;
836 }
837
838 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
839 target_phys_addr_t addr,
840 unsigned size)
841 {
842 uint64_t data = 0;
843
844 if (!memory_region_access_valid(mr, addr, size, false)) {
845 return -1U; /* FIXME: better signalling */
846 }
847
848 if (!mr->ops->read) {
849 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
850 }
851
852 /* FIXME: support unaligned access */
853 access_with_adjusted_size(addr, &data, size,
854 mr->ops->impl.min_access_size,
855 mr->ops->impl.max_access_size,
856 memory_region_read_accessor, mr);
857
858 return data;
859 }
860
861 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
862 {
863 if (memory_region_wrong_endianness(mr)) {
864 switch (size) {
865 case 1:
866 break;
867 case 2:
868 *data = bswap16(*data);
869 break;
870 case 4:
871 *data = bswap32(*data);
872 break;
873 default:
874 abort();
875 }
876 }
877 }
878
879 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
880 target_phys_addr_t addr,
881 unsigned size)
882 {
883 uint64_t ret;
884
885 ret = memory_region_dispatch_read1(mr, addr, size);
886 adjust_endianness(mr, &ret, size);
887 return ret;
888 }
889
890 static void memory_region_dispatch_write(MemoryRegion *mr,
891 target_phys_addr_t addr,
892 uint64_t data,
893 unsigned size)
894 {
895 if (!memory_region_access_valid(mr, addr, size, true)) {
896 return; /* FIXME: better signalling */
897 }
898
899 adjust_endianness(mr, &data, size);
900
901 if (!mr->ops->write) {
902 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
903 return;
904 }
905
906 /* FIXME: support unaligned access */
907 access_with_adjusted_size(addr, &data, size,
908 mr->ops->impl.min_access_size,
909 mr->ops->impl.max_access_size,
910 memory_region_write_accessor, mr);
911 }
912
913 void memory_region_init_io(MemoryRegion *mr,
914 const MemoryRegionOps *ops,
915 void *opaque,
916 const char *name,
917 uint64_t size)
918 {
919 memory_region_init(mr, name, size);
920 mr->ops = ops;
921 mr->opaque = opaque;
922 mr->terminates = true;
923 mr->destructor = memory_region_destructor_iomem;
924 mr->ram_addr = ~(ram_addr_t)0;
925 }
926
927 void memory_region_init_ram(MemoryRegion *mr,
928 const char *name,
929 uint64_t size)
930 {
931 memory_region_init(mr, name, size);
932 mr->ram = true;
933 mr->terminates = true;
934 mr->destructor = memory_region_destructor_ram;
935 mr->ram_addr = qemu_ram_alloc(size, mr);
936 }
937
938 void memory_region_init_ram_ptr(MemoryRegion *mr,
939 const char *name,
940 uint64_t size,
941 void *ptr)
942 {
943 memory_region_init(mr, name, size);
944 mr->ram = true;
945 mr->terminates = true;
946 mr->destructor = memory_region_destructor_ram_from_ptr;
947 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
948 }
949
950 void memory_region_init_alias(MemoryRegion *mr,
951 const char *name,
952 MemoryRegion *orig,
953 target_phys_addr_t offset,
954 uint64_t size)
955 {
956 memory_region_init(mr, name, size);
957 mr->alias = orig;
958 mr->alias_offset = offset;
959 }
960
961 void memory_region_init_rom_device(MemoryRegion *mr,
962 const MemoryRegionOps *ops,
963 void *opaque,
964 const char *name,
965 uint64_t size)
966 {
967 memory_region_init(mr, name, size);
968 mr->ops = ops;
969 mr->opaque = opaque;
970 mr->terminates = true;
971 mr->rom_device = true;
972 mr->destructor = memory_region_destructor_rom_device;
973 mr->ram_addr = qemu_ram_alloc(size, mr);
974 }
975
976 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
977 unsigned size)
978 {
979 MemoryRegion *mr = opaque;
980
981 if (!mr->warning_printed) {
982 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
983 mr->warning_printed = true;
984 }
985 return -1U;
986 }
987
988 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
989 unsigned size)
990 {
991 MemoryRegion *mr = opaque;
992
993 if (!mr->warning_printed) {
994 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
995 mr->warning_printed = true;
996 }
997 }
998
999 static const MemoryRegionOps reservation_ops = {
1000 .read = invalid_read,
1001 .write = invalid_write,
1002 .endianness = DEVICE_NATIVE_ENDIAN,
1003 };
1004
1005 void memory_region_init_reservation(MemoryRegion *mr,
1006 const char *name,
1007 uint64_t size)
1008 {
1009 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1010 }
1011
1012 void memory_region_destroy(MemoryRegion *mr)
1013 {
1014 assert(QTAILQ_EMPTY(&mr->subregions));
1015 mr->destructor(mr);
1016 memory_region_clear_coalescing(mr);
1017 g_free((char *)mr->name);
1018 g_free(mr->ioeventfds);
1019 }
1020
1021 uint64_t memory_region_size(MemoryRegion *mr)
1022 {
1023 if (int128_eq(mr->size, int128_2_64())) {
1024 return UINT64_MAX;
1025 }
1026 return int128_get64(mr->size);
1027 }
1028
1029 const char *memory_region_name(MemoryRegion *mr)
1030 {
1031 return mr->name;
1032 }
1033
1034 bool memory_region_is_ram(MemoryRegion *mr)
1035 {
1036 return mr->ram;
1037 }
1038
1039 bool memory_region_is_logging(MemoryRegion *mr)
1040 {
1041 return mr->dirty_log_mask;
1042 }
1043
1044 bool memory_region_is_rom(MemoryRegion *mr)
1045 {
1046 return mr->ram && mr->readonly;
1047 }
1048
1049 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1050 {
1051 uint8_t mask = 1 << client;
1052
1053 memory_region_transaction_begin();
1054 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1055 memory_region_transaction_commit();
1056 }
1057
1058 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1059 target_phys_addr_t size, unsigned client)
1060 {
1061 assert(mr->terminates);
1062 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1063 1 << client);
1064 }
1065
1066 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1067 target_phys_addr_t size)
1068 {
1069 assert(mr->terminates);
1070 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1071 }
1072
1073 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1074 {
1075 FlatRange *fr;
1076
1077 FOR_EACH_FLAT_RANGE(fr, address_space_memory.current_map) {
1078 if (fr->mr == mr) {
1079 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory,
1080 Forward, log_sync);
1081 }
1082 }
1083 }
1084
1085 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1086 {
1087 if (mr->readonly != readonly) {
1088 memory_region_transaction_begin();
1089 mr->readonly = readonly;
1090 memory_region_transaction_commit();
1091 }
1092 }
1093
1094 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1095 {
1096 if (mr->readable != readable) {
1097 memory_region_transaction_begin();
1098 mr->readable = readable;
1099 memory_region_transaction_commit();
1100 }
1101 }
1102
1103 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1104 target_phys_addr_t size, unsigned client)
1105 {
1106 assert(mr->terminates);
1107 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1108 mr->ram_addr + addr + size,
1109 1 << client);
1110 }
1111
1112 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1113 {
1114 if (mr->alias) {
1115 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1116 }
1117
1118 assert(mr->terminates);
1119
1120 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1121 }
1122
1123 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1124 {
1125 FlatRange *fr;
1126 CoalescedMemoryRange *cmr;
1127 AddrRange tmp;
1128
1129 FOR_EACH_FLAT_RANGE(fr, address_space_memory.current_map) {
1130 if (fr->mr == mr) {
1131 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1132 int128_get64(fr->addr.size));
1133 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1134 tmp = addrrange_shift(cmr->addr,
1135 int128_sub(fr->addr.start,
1136 int128_make64(fr->offset_in_region)));
1137 if (!addrrange_intersects(tmp, fr->addr)) {
1138 continue;
1139 }
1140 tmp = addrrange_intersection(tmp, fr->addr);
1141 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1142 int128_get64(tmp.size));
1143 }
1144 }
1145 }
1146 }
1147
1148 void memory_region_set_coalescing(MemoryRegion *mr)
1149 {
1150 memory_region_clear_coalescing(mr);
1151 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1152 }
1153
1154 void memory_region_add_coalescing(MemoryRegion *mr,
1155 target_phys_addr_t offset,
1156 uint64_t size)
1157 {
1158 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1159
1160 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1161 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1162 memory_region_update_coalesced_range(mr);
1163 memory_region_set_flush_coalesced(mr);
1164 }
1165
1166 void memory_region_clear_coalescing(MemoryRegion *mr)
1167 {
1168 CoalescedMemoryRange *cmr;
1169
1170 qemu_flush_coalesced_mmio_buffer();
1171 mr->flush_coalesced_mmio = false;
1172
1173 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1174 cmr = QTAILQ_FIRST(&mr->coalesced);
1175 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1176 g_free(cmr);
1177 }
1178 memory_region_update_coalesced_range(mr);
1179 }
1180
1181 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1182 {
1183 mr->flush_coalesced_mmio = true;
1184 }
1185
1186 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1187 {
1188 qemu_flush_coalesced_mmio_buffer();
1189 if (QTAILQ_EMPTY(&mr->coalesced)) {
1190 mr->flush_coalesced_mmio = false;
1191 }
1192 }
1193
1194 void memory_region_add_eventfd(MemoryRegion *mr,
1195 target_phys_addr_t addr,
1196 unsigned size,
1197 bool match_data,
1198 uint64_t data,
1199 EventNotifier *e)
1200 {
1201 MemoryRegionIoeventfd mrfd = {
1202 .addr.start = int128_make64(addr),
1203 .addr.size = int128_make64(size),
1204 .match_data = match_data,
1205 .data = data,
1206 .e = e,
1207 };
1208 unsigned i;
1209
1210 memory_region_transaction_begin();
1211 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1212 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1213 break;
1214 }
1215 }
1216 ++mr->ioeventfd_nb;
1217 mr->ioeventfds = g_realloc(mr->ioeventfds,
1218 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1219 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1220 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1221 mr->ioeventfds[i] = mrfd;
1222 memory_region_transaction_commit();
1223 }
1224
1225 void memory_region_del_eventfd(MemoryRegion *mr,
1226 target_phys_addr_t addr,
1227 unsigned size,
1228 bool match_data,
1229 uint64_t data,
1230 EventNotifier *e)
1231 {
1232 MemoryRegionIoeventfd mrfd = {
1233 .addr.start = int128_make64(addr),
1234 .addr.size = int128_make64(size),
1235 .match_data = match_data,
1236 .data = data,
1237 .e = e,
1238 };
1239 unsigned i;
1240
1241 memory_region_transaction_begin();
1242 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1243 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1244 break;
1245 }
1246 }
1247 assert(i != mr->ioeventfd_nb);
1248 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1249 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1250 --mr->ioeventfd_nb;
1251 mr->ioeventfds = g_realloc(mr->ioeventfds,
1252 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1253 memory_region_transaction_commit();
1254 }
1255
1256 static void memory_region_add_subregion_common(MemoryRegion *mr,
1257 target_phys_addr_t offset,
1258 MemoryRegion *subregion)
1259 {
1260 MemoryRegion *other;
1261
1262 memory_region_transaction_begin();
1263
1264 assert(!subregion->parent);
1265 subregion->parent = mr;
1266 subregion->addr = offset;
1267 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1268 if (subregion->may_overlap || other->may_overlap) {
1269 continue;
1270 }
1271 if (int128_gt(int128_make64(offset),
1272 int128_add(int128_make64(other->addr), other->size))
1273 || int128_le(int128_add(int128_make64(offset), subregion->size),
1274 int128_make64(other->addr))) {
1275 continue;
1276 }
1277 #if 0
1278 printf("warning: subregion collision %llx/%llx (%s) "
1279 "vs %llx/%llx (%s)\n",
1280 (unsigned long long)offset,
1281 (unsigned long long)int128_get64(subregion->size),
1282 subregion->name,
1283 (unsigned long long)other->addr,
1284 (unsigned long long)int128_get64(other->size),
1285 other->name);
1286 #endif
1287 }
1288 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1289 if (subregion->priority >= other->priority) {
1290 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1291 goto done;
1292 }
1293 }
1294 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1295 done:
1296 memory_region_transaction_commit();
1297 }
1298
1299
1300 void memory_region_add_subregion(MemoryRegion *mr,
1301 target_phys_addr_t offset,
1302 MemoryRegion *subregion)
1303 {
1304 subregion->may_overlap = false;
1305 subregion->priority = 0;
1306 memory_region_add_subregion_common(mr, offset, subregion);
1307 }
1308
1309 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1310 target_phys_addr_t offset,
1311 MemoryRegion *subregion,
1312 unsigned priority)
1313 {
1314 subregion->may_overlap = true;
1315 subregion->priority = priority;
1316 memory_region_add_subregion_common(mr, offset, subregion);
1317 }
1318
1319 void memory_region_del_subregion(MemoryRegion *mr,
1320 MemoryRegion *subregion)
1321 {
1322 memory_region_transaction_begin();
1323 assert(subregion->parent == mr);
1324 subregion->parent = NULL;
1325 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1326 memory_region_transaction_commit();
1327 }
1328
1329 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1330 {
1331 if (enabled == mr->enabled) {
1332 return;
1333 }
1334 memory_region_transaction_begin();
1335 mr->enabled = enabled;
1336 memory_region_transaction_commit();
1337 }
1338
1339 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1340 {
1341 MemoryRegion *parent = mr->parent;
1342 unsigned priority = mr->priority;
1343 bool may_overlap = mr->may_overlap;
1344
1345 if (addr == mr->addr || !parent) {
1346 mr->addr = addr;
1347 return;
1348 }
1349
1350 memory_region_transaction_begin();
1351 memory_region_del_subregion(parent, mr);
1352 if (may_overlap) {
1353 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1354 } else {
1355 memory_region_add_subregion(parent, addr, mr);
1356 }
1357 memory_region_transaction_commit();
1358 }
1359
1360 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1361 {
1362 assert(mr->alias);
1363
1364 if (offset == mr->alias_offset) {
1365 return;
1366 }
1367
1368 memory_region_transaction_begin();
1369 mr->alias_offset = offset;
1370 memory_region_transaction_commit();
1371 }
1372
1373 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1374 {
1375 return mr->ram_addr;
1376 }
1377
1378 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1379 {
1380 const AddrRange *addr = addr_;
1381 const FlatRange *fr = fr_;
1382
1383 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1384 return -1;
1385 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1386 return 1;
1387 }
1388 return 0;
1389 }
1390
1391 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1392 {
1393 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1394 sizeof(FlatRange), cmp_flatrange_addr);
1395 }
1396
1397 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1398 target_phys_addr_t addr, uint64_t size)
1399 {
1400 AddressSpace *as = memory_region_to_address_space(address_space);
1401 AddrRange range = addrrange_make(int128_make64(addr),
1402 int128_make64(size));
1403 FlatRange *fr = address_space_lookup(as, range);
1404 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1405
1406 if (!fr) {
1407 return ret;
1408 }
1409
1410 while (fr > as->current_map->ranges
1411 && addrrange_intersects(fr[-1].addr, range)) {
1412 --fr;
1413 }
1414
1415 ret.mr = fr->mr;
1416 range = addrrange_intersection(range, fr->addr);
1417 ret.offset_within_region = fr->offset_in_region;
1418 ret.offset_within_region += int128_get64(int128_sub(range.start,
1419 fr->addr.start));
1420 ret.size = int128_get64(range.size);
1421 ret.offset_within_address_space = int128_get64(range.start);
1422 ret.readonly = fr->readonly;
1423 return ret;
1424 }
1425
1426 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1427 {
1428 AddressSpace *as = memory_region_to_address_space(address_space);
1429 FlatRange *fr;
1430
1431 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1432 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1433 }
1434 }
1435
1436 void memory_global_dirty_log_start(void)
1437 {
1438 global_dirty_log = true;
1439 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1440 }
1441
1442 void memory_global_dirty_log_stop(void)
1443 {
1444 global_dirty_log = false;
1445 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1446 }
1447
1448 static void listener_add_address_space(MemoryListener *listener,
1449 AddressSpace *as)
1450 {
1451 FlatRange *fr;
1452
1453 if (!as->root) {
1454 return;
1455 }
1456
1457 if (listener->address_space_filter
1458 && listener->address_space_filter != as->root) {
1459 return;
1460 }
1461
1462 if (global_dirty_log) {
1463 listener->log_global_start(listener);
1464 }
1465 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1466 MemoryRegionSection section = {
1467 .mr = fr->mr,
1468 .address_space = as->root,
1469 .offset_within_region = fr->offset_in_region,
1470 .size = int128_get64(fr->addr.size),
1471 .offset_within_address_space = int128_get64(fr->addr.start),
1472 .readonly = fr->readonly,
1473 };
1474 listener->region_add(listener, &section);
1475 }
1476 }
1477
1478 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1479 {
1480 MemoryListener *other = NULL;
1481
1482 listener->address_space_filter = filter;
1483 if (QTAILQ_EMPTY(&memory_listeners)
1484 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1485 memory_listeners)->priority) {
1486 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1487 } else {
1488 QTAILQ_FOREACH(other, &memory_listeners, link) {
1489 if (listener->priority < other->priority) {
1490 break;
1491 }
1492 }
1493 QTAILQ_INSERT_BEFORE(other, listener, link);
1494 }
1495 listener_add_address_space(listener, &address_space_memory);
1496 listener_add_address_space(listener, &address_space_io);
1497 }
1498
1499 void memory_listener_unregister(MemoryListener *listener)
1500 {
1501 QTAILQ_REMOVE(&memory_listeners, listener, link);
1502 }
1503
1504 void address_space_init(AddressSpace *as, MemoryRegion *root)
1505 {
1506 memory_region_transaction_begin();
1507 as->root = root;
1508 as->current_map = g_new(FlatView, 1);
1509 flatview_init(as->current_map);
1510 memory_region_transaction_commit();
1511 }
1512
1513 void set_system_memory_map(MemoryRegion *mr)
1514 {
1515 address_space_init(&address_space_memory, mr);
1516 }
1517
1518 void set_system_io_map(MemoryRegion *mr)
1519 {
1520 address_space_init(&address_space_io, mr);
1521 }
1522
1523 uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
1524 {
1525 return memory_region_dispatch_read(mr, addr, size);
1526 }
1527
1528 void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
1529 uint64_t val, unsigned size)
1530 {
1531 memory_region_dispatch_write(mr, addr, val, size);
1532 }
1533
1534 typedef struct MemoryRegionList MemoryRegionList;
1535
1536 struct MemoryRegionList {
1537 const MemoryRegion *mr;
1538 bool printed;
1539 QTAILQ_ENTRY(MemoryRegionList) queue;
1540 };
1541
1542 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1543
1544 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1545 const MemoryRegion *mr, unsigned int level,
1546 target_phys_addr_t base,
1547 MemoryRegionListHead *alias_print_queue)
1548 {
1549 MemoryRegionList *new_ml, *ml, *next_ml;
1550 MemoryRegionListHead submr_print_queue;
1551 const MemoryRegion *submr;
1552 unsigned int i;
1553
1554 if (!mr) {
1555 return;
1556 }
1557
1558 for (i = 0; i < level; i++) {
1559 mon_printf(f, " ");
1560 }
1561
1562 if (mr->alias) {
1563 MemoryRegionList *ml;
1564 bool found = false;
1565
1566 /* check if the alias is already in the queue */
1567 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1568 if (ml->mr == mr->alias && !ml->printed) {
1569 found = true;
1570 }
1571 }
1572
1573 if (!found) {
1574 ml = g_new(MemoryRegionList, 1);
1575 ml->mr = mr->alias;
1576 ml->printed = false;
1577 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1578 }
1579 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1580 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1581 "-" TARGET_FMT_plx "\n",
1582 base + mr->addr,
1583 base + mr->addr
1584 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1585 mr->priority,
1586 mr->readable ? 'R' : '-',
1587 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1588 : '-',
1589 mr->name,
1590 mr->alias->name,
1591 mr->alias_offset,
1592 mr->alias_offset
1593 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1594 } else {
1595 mon_printf(f,
1596 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1597 base + mr->addr,
1598 base + mr->addr
1599 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1600 mr->priority,
1601 mr->readable ? 'R' : '-',
1602 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1603 : '-',
1604 mr->name);
1605 }
1606
1607 QTAILQ_INIT(&submr_print_queue);
1608
1609 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1610 new_ml = g_new(MemoryRegionList, 1);
1611 new_ml->mr = submr;
1612 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1613 if (new_ml->mr->addr < ml->mr->addr ||
1614 (new_ml->mr->addr == ml->mr->addr &&
1615 new_ml->mr->priority > ml->mr->priority)) {
1616 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1617 new_ml = NULL;
1618 break;
1619 }
1620 }
1621 if (new_ml) {
1622 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1623 }
1624 }
1625
1626 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1627 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1628 alias_print_queue);
1629 }
1630
1631 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1632 g_free(ml);
1633 }
1634 }
1635
1636 void mtree_info(fprintf_function mon_printf, void *f)
1637 {
1638 MemoryRegionListHead ml_head;
1639 MemoryRegionList *ml, *ml2;
1640
1641 QTAILQ_INIT(&ml_head);
1642
1643 mon_printf(f, "memory\n");
1644 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1645
1646 if (address_space_io.root &&
1647 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1648 mon_printf(f, "I/O\n");
1649 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1650 }
1651
1652 mon_printf(f, "aliases\n");
1653 /* print aliased regions */
1654 QTAILQ_FOREACH(ml, &ml_head, queue) {
1655 if (!ml->printed) {
1656 mon_printf(f, "%s\n", ml->mr->name);
1657 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1658 }
1659 }
1660
1661 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1662 g_free(ml);
1663 }
1664 }
Qemu copy for testing