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[qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = int128_get64((fr)->addr.size), \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging ajacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 if (mr->flush_coalesced_mmio) {
316 qemu_flush_coalesced_mmio_buffer();
317 }
318 tmp = mr->ops->read(mr->opaque, addr, size);
319 *value |= (tmp & mask) << shift;
320 }
321
322 static void memory_region_write_accessor(void *opaque,
323 hwaddr addr,
324 uint64_t *value,
325 unsigned size,
326 unsigned shift,
327 uint64_t mask)
328 {
329 MemoryRegion *mr = opaque;
330 uint64_t tmp;
331
332 if (mr->flush_coalesced_mmio) {
333 qemu_flush_coalesced_mmio_buffer();
334 }
335 tmp = (*value >> shift) & mask;
336 mr->ops->write(mr->opaque, addr, tmp, size);
337 }
338
339 static void access_with_adjusted_size(hwaddr addr,
340 uint64_t *value,
341 unsigned size,
342 unsigned access_size_min,
343 unsigned access_size_max,
344 void (*access)(void *opaque,
345 hwaddr addr,
346 uint64_t *value,
347 unsigned size,
348 unsigned shift,
349 uint64_t mask),
350 void *opaque)
351 {
352 uint64_t access_mask;
353 unsigned access_size;
354 unsigned i;
355
356 if (!access_size_min) {
357 access_size_min = 1;
358 }
359 if (!access_size_max) {
360 access_size_max = 4;
361 }
362 access_size = MAX(MIN(size, access_size_max), access_size_min);
363 access_mask = -1ULL >> (64 - access_size * 8);
364 for (i = 0; i < size; i += access_size) {
365 /* FIXME: big-endian support */
366 access(opaque, addr + i, value, access_size, i * 8, access_mask);
367 }
368 }
369
370 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
371 unsigned width, bool write)
372 {
373 const MemoryRegionPortio *mrp;
374
375 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
376 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
377 && width == mrp->size
378 && (write ? (bool)mrp->write : (bool)mrp->read)) {
379 return mrp;
380 }
381 }
382 return NULL;
383 }
384
385 static void memory_region_iorange_read(IORange *iorange,
386 uint64_t offset,
387 unsigned width,
388 uint64_t *data)
389 {
390 MemoryRegionIORange *mrio
391 = container_of(iorange, MemoryRegionIORange, iorange);
392 MemoryRegion *mr = mrio->mr;
393
394 offset += mrio->offset;
395 if (mr->ops->old_portio) {
396 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
397 width, false);
398
399 *data = ((uint64_t)1 << (width * 8)) - 1;
400 if (mrp) {
401 *data = mrp->read(mr->opaque, offset);
402 } else if (width == 2) {
403 mrp = find_portio(mr, offset - mrio->offset, 1, false);
404 assert(mrp);
405 *data = mrp->read(mr->opaque, offset) |
406 (mrp->read(mr->opaque, offset + 1) << 8);
407 }
408 return;
409 }
410 *data = 0;
411 access_with_adjusted_size(offset, data, width,
412 mr->ops->impl.min_access_size,
413 mr->ops->impl.max_access_size,
414 memory_region_read_accessor, mr);
415 }
416
417 static void memory_region_iorange_write(IORange *iorange,
418 uint64_t offset,
419 unsigned width,
420 uint64_t data)
421 {
422 MemoryRegionIORange *mrio
423 = container_of(iorange, MemoryRegionIORange, iorange);
424 MemoryRegion *mr = mrio->mr;
425
426 offset += mrio->offset;
427 if (mr->ops->old_portio) {
428 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
429 width, true);
430
431 if (mrp) {
432 mrp->write(mr->opaque, offset, data);
433 } else if (width == 2) {
434 mrp = find_portio(mr, offset - mrio->offset, 1, true);
435 assert(mrp);
436 mrp->write(mr->opaque, offset, data & 0xff);
437 mrp->write(mr->opaque, offset + 1, data >> 8);
438 }
439 return;
440 }
441 access_with_adjusted_size(offset, &data, width,
442 mr->ops->impl.min_access_size,
443 mr->ops->impl.max_access_size,
444 memory_region_write_accessor, mr);
445 }
446
447 static void memory_region_iorange_destructor(IORange *iorange)
448 {
449 g_free(container_of(iorange, MemoryRegionIORange, iorange));
450 }
451
452 const IORangeOps memory_region_iorange_ops = {
453 .read = memory_region_iorange_read,
454 .write = memory_region_iorange_write,
455 .destructor = memory_region_iorange_destructor,
456 };
457
458 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
459 {
460 AddressSpace *as;
461
462 while (mr->parent) {
463 mr = mr->parent;
464 }
465 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
466 if (mr == as->root) {
467 return as;
468 }
469 }
470 abort();
471 }
472
473 /* Render a memory region into the global view. Ranges in @view obscure
474 * ranges in @mr.
475 */
476 static void render_memory_region(FlatView *view,
477 MemoryRegion *mr,
478 Int128 base,
479 AddrRange clip,
480 bool readonly)
481 {
482 MemoryRegion *subregion;
483 unsigned i;
484 hwaddr offset_in_region;
485 Int128 remain;
486 Int128 now;
487 FlatRange fr;
488 AddrRange tmp;
489
490 if (!mr->enabled) {
491 return;
492 }
493
494 int128_addto(&base, int128_make64(mr->addr));
495 readonly |= mr->readonly;
496
497 tmp = addrrange_make(base, mr->size);
498
499 if (!addrrange_intersects(tmp, clip)) {
500 return;
501 }
502
503 clip = addrrange_intersection(tmp, clip);
504
505 if (mr->alias) {
506 int128_subfrom(&base, int128_make64(mr->alias->addr));
507 int128_subfrom(&base, int128_make64(mr->alias_offset));
508 render_memory_region(view, mr->alias, base, clip, readonly);
509 return;
510 }
511
512 /* Render subregions in priority order. */
513 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
514 render_memory_region(view, subregion, base, clip, readonly);
515 }
516
517 if (!mr->terminates) {
518 return;
519 }
520
521 offset_in_region = int128_get64(int128_sub(clip.start, base));
522 base = clip.start;
523 remain = clip.size;
524
525 /* Render the region itself into any gaps left by the current view. */
526 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
527 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
528 continue;
529 }
530 if (int128_lt(base, view->ranges[i].addr.start)) {
531 now = int128_min(remain,
532 int128_sub(view->ranges[i].addr.start, base));
533 fr.mr = mr;
534 fr.offset_in_region = offset_in_region;
535 fr.addr = addrrange_make(base, now);
536 fr.dirty_log_mask = mr->dirty_log_mask;
537 fr.romd_mode = mr->romd_mode;
538 fr.readonly = readonly;
539 flatview_insert(view, i, &fr);
540 ++i;
541 int128_addto(&base, now);
542 offset_in_region += int128_get64(now);
543 int128_subfrom(&remain, now);
544 }
545 now = int128_sub(int128_min(int128_add(base, remain),
546 addrrange_end(view->ranges[i].addr)),
547 base);
548 int128_addto(&base, now);
549 offset_in_region += int128_get64(now);
550 int128_subfrom(&remain, now);
551 }
552 if (int128_nz(remain)) {
553 fr.mr = mr;
554 fr.offset_in_region = offset_in_region;
555 fr.addr = addrrange_make(base, remain);
556 fr.dirty_log_mask = mr->dirty_log_mask;
557 fr.romd_mode = mr->romd_mode;
558 fr.readonly = readonly;
559 flatview_insert(view, i, &fr);
560 }
561 }
562
563 /* Render a memory topology into a list of disjoint absolute ranges. */
564 static FlatView generate_memory_topology(MemoryRegion *mr)
565 {
566 FlatView view;
567
568 flatview_init(&view);
569
570 if (mr) {
571 render_memory_region(&view, mr, int128_zero(),
572 addrrange_make(int128_zero(), int128_2_64()), false);
573 }
574 flatview_simplify(&view);
575
576 return view;
577 }
578
579 static void address_space_add_del_ioeventfds(AddressSpace *as,
580 MemoryRegionIoeventfd *fds_new,
581 unsigned fds_new_nb,
582 MemoryRegionIoeventfd *fds_old,
583 unsigned fds_old_nb)
584 {
585 unsigned iold, inew;
586 MemoryRegionIoeventfd *fd;
587 MemoryRegionSection section;
588
589 /* Generate a symmetric difference of the old and new fd sets, adding
590 * and deleting as necessary.
591 */
592
593 iold = inew = 0;
594 while (iold < fds_old_nb || inew < fds_new_nb) {
595 if (iold < fds_old_nb
596 && (inew == fds_new_nb
597 || memory_region_ioeventfd_before(fds_old[iold],
598 fds_new[inew]))) {
599 fd = &fds_old[iold];
600 section = (MemoryRegionSection) {
601 .address_space = as,
602 .offset_within_address_space = int128_get64(fd->addr.start),
603 .size = int128_get64(fd->addr.size),
604 };
605 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
606 fd->match_data, fd->data, fd->e);
607 ++iold;
608 } else if (inew < fds_new_nb
609 && (iold == fds_old_nb
610 || memory_region_ioeventfd_before(fds_new[inew],
611 fds_old[iold]))) {
612 fd = &fds_new[inew];
613 section = (MemoryRegionSection) {
614 .address_space = as,
615 .offset_within_address_space = int128_get64(fd->addr.start),
616 .size = int128_get64(fd->addr.size),
617 };
618 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
619 fd->match_data, fd->data, fd->e);
620 ++inew;
621 } else {
622 ++iold;
623 ++inew;
624 }
625 }
626 }
627
628 static void address_space_update_ioeventfds(AddressSpace *as)
629 {
630 FlatRange *fr;
631 unsigned ioeventfd_nb = 0;
632 MemoryRegionIoeventfd *ioeventfds = NULL;
633 AddrRange tmp;
634 unsigned i;
635
636 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
637 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
638 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
639 int128_sub(fr->addr.start,
640 int128_make64(fr->offset_in_region)));
641 if (addrrange_intersects(fr->addr, tmp)) {
642 ++ioeventfd_nb;
643 ioeventfds = g_realloc(ioeventfds,
644 ioeventfd_nb * sizeof(*ioeventfds));
645 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
646 ioeventfds[ioeventfd_nb-1].addr = tmp;
647 }
648 }
649 }
650
651 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
652 as->ioeventfds, as->ioeventfd_nb);
653
654 g_free(as->ioeventfds);
655 as->ioeventfds = ioeventfds;
656 as->ioeventfd_nb = ioeventfd_nb;
657 }
658
659 static void address_space_update_topology_pass(AddressSpace *as,
660 FlatView old_view,
661 FlatView new_view,
662 bool adding)
663 {
664 unsigned iold, inew;
665 FlatRange *frold, *frnew;
666
667 /* Generate a symmetric difference of the old and new memory maps.
668 * Kill ranges in the old map, and instantiate ranges in the new map.
669 */
670 iold = inew = 0;
671 while (iold < old_view.nr || inew < new_view.nr) {
672 if (iold < old_view.nr) {
673 frold = &old_view.ranges[iold];
674 } else {
675 frold = NULL;
676 }
677 if (inew < new_view.nr) {
678 frnew = &new_view.ranges[inew];
679 } else {
680 frnew = NULL;
681 }
682
683 if (frold
684 && (!frnew
685 || int128_lt(frold->addr.start, frnew->addr.start)
686 || (int128_eq(frold->addr.start, frnew->addr.start)
687 && !flatrange_equal(frold, frnew)))) {
688 /* In old, but (not in new, or in new but attributes changed). */
689
690 if (!adding) {
691 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
692 }
693
694 ++iold;
695 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
696 /* In both (logging may have changed) */
697
698 if (adding) {
699 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
700 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
701 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
702 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
703 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
704 }
705 }
706
707 ++iold;
708 ++inew;
709 } else {
710 /* In new */
711
712 if (adding) {
713 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
714 }
715
716 ++inew;
717 }
718 }
719 }
720
721
722 static void address_space_update_topology(AddressSpace *as)
723 {
724 FlatView old_view = *as->current_map;
725 FlatView new_view = generate_memory_topology(as->root);
726
727 address_space_update_topology_pass(as, old_view, new_view, false);
728 address_space_update_topology_pass(as, old_view, new_view, true);
729
730 *as->current_map = new_view;
731 flatview_destroy(&old_view);
732 address_space_update_ioeventfds(as);
733 }
734
735 void memory_region_transaction_begin(void)
736 {
737 qemu_flush_coalesced_mmio_buffer();
738 ++memory_region_transaction_depth;
739 }
740
741 void memory_region_transaction_commit(void)
742 {
743 AddressSpace *as;
744
745 assert(memory_region_transaction_depth);
746 --memory_region_transaction_depth;
747 if (!memory_region_transaction_depth && memory_region_update_pending) {
748 memory_region_update_pending = false;
749 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
750
751 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
752 address_space_update_topology(as);
753 }
754
755 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
756 }
757 }
758
759 static void memory_region_destructor_none(MemoryRegion *mr)
760 {
761 }
762
763 static void memory_region_destructor_ram(MemoryRegion *mr)
764 {
765 qemu_ram_free(mr->ram_addr);
766 }
767
768 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
769 {
770 qemu_ram_free_from_ptr(mr->ram_addr);
771 }
772
773 static void memory_region_destructor_rom_device(MemoryRegion *mr)
774 {
775 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
776 }
777
778 static bool memory_region_wrong_endianness(MemoryRegion *mr)
779 {
780 #ifdef TARGET_WORDS_BIGENDIAN
781 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
782 #else
783 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
784 #endif
785 }
786
787 void memory_region_init(MemoryRegion *mr,
788 const char *name,
789 uint64_t size)
790 {
791 mr->ops = &unassigned_mem_ops;
792 mr->opaque = NULL;
793 mr->parent = NULL;
794 mr->size = int128_make64(size);
795 if (size == UINT64_MAX) {
796 mr->size = int128_2_64();
797 }
798 mr->addr = 0;
799 mr->subpage = false;
800 mr->enabled = true;
801 mr->terminates = false;
802 mr->ram = false;
803 mr->romd_mode = true;
804 mr->readonly = false;
805 mr->rom_device = false;
806 mr->destructor = memory_region_destructor_none;
807 mr->priority = 0;
808 mr->may_overlap = false;
809 mr->alias = NULL;
810 QTAILQ_INIT(&mr->subregions);
811 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
812 QTAILQ_INIT(&mr->coalesced);
813 mr->name = g_strdup(name);
814 mr->dirty_log_mask = 0;
815 mr->ioeventfd_nb = 0;
816 mr->ioeventfds = NULL;
817 mr->flush_coalesced_mmio = false;
818 }
819
820 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
821 unsigned size)
822 {
823 #ifdef DEBUG_UNASSIGNED
824 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
825 #endif
826 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
827 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
828 #endif
829 return 0;
830 }
831
832 static void unassigned_mem_write(void *opaque, hwaddr addr,
833 uint64_t val, unsigned size)
834 {
835 #ifdef DEBUG_UNASSIGNED
836 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
837 #endif
838 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
839 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
840 #endif
841 }
842
843 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
844 unsigned size, bool is_write)
845 {
846 return false;
847 }
848
849 const MemoryRegionOps unassigned_mem_ops = {
850 .valid.accepts = unassigned_mem_accepts,
851 .endianness = DEVICE_NATIVE_ENDIAN,
852 };
853
854 bool memory_region_access_valid(MemoryRegion *mr,
855 hwaddr addr,
856 unsigned size,
857 bool is_write)
858 {
859 int access_size_min, access_size_max;
860 int access_size, i;
861
862 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
863 return false;
864 }
865
866 if (!mr->ops->valid.accepts) {
867 return true;
868 }
869
870 access_size_min = mr->ops->valid.min_access_size;
871 if (!mr->ops->valid.min_access_size) {
872 access_size_min = 1;
873 }
874
875 access_size_max = mr->ops->valid.max_access_size;
876 if (!mr->ops->valid.max_access_size) {
877 access_size_max = 4;
878 }
879
880 access_size = MAX(MIN(size, access_size_max), access_size_min);
881 for (i = 0; i < size; i += access_size) {
882 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
883 is_write)) {
884 return false;
885 }
886 }
887
888 return true;
889 }
890
891 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
892 hwaddr addr,
893 unsigned size)
894 {
895 uint64_t data = 0;
896
897 if (!memory_region_access_valid(mr, addr, size, false)) {
898 return unassigned_mem_read(mr, addr, size);
899 }
900
901 if (!mr->ops->read) {
902 return mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
903 }
904
905 /* FIXME: support unaligned access */
906 access_with_adjusted_size(addr, &data, size,
907 mr->ops->impl.min_access_size,
908 mr->ops->impl.max_access_size,
909 memory_region_read_accessor, mr);
910
911 return data;
912 }
913
914 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
915 {
916 if (memory_region_wrong_endianness(mr)) {
917 switch (size) {
918 case 1:
919 break;
920 case 2:
921 *data = bswap16(*data);
922 break;
923 case 4:
924 *data = bswap32(*data);
925 break;
926 default:
927 abort();
928 }
929 }
930 }
931
932 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
933 hwaddr addr,
934 unsigned size)
935 {
936 uint64_t ret;
937
938 ret = memory_region_dispatch_read1(mr, addr, size);
939 adjust_endianness(mr, &ret, size);
940 return ret;
941 }
942
943 static void memory_region_dispatch_write(MemoryRegion *mr,
944 hwaddr addr,
945 uint64_t data,
946 unsigned size)
947 {
948 if (!memory_region_access_valid(mr, addr, size, true)) {
949 unassigned_mem_write(mr, addr, data, size);
950 return;
951 }
952
953 adjust_endianness(mr, &data, size);
954
955 if (!mr->ops->write) {
956 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data);
957 return;
958 }
959
960 /* FIXME: support unaligned access */
961 access_with_adjusted_size(addr, &data, size,
962 mr->ops->impl.min_access_size,
963 mr->ops->impl.max_access_size,
964 memory_region_write_accessor, mr);
965 }
966
967 void memory_region_init_io(MemoryRegion *mr,
968 const MemoryRegionOps *ops,
969 void *opaque,
970 const char *name,
971 uint64_t size)
972 {
973 memory_region_init(mr, name, size);
974 mr->ops = ops;
975 mr->opaque = opaque;
976 mr->terminates = true;
977 mr->ram_addr = ~(ram_addr_t)0;
978 }
979
980 void memory_region_init_ram(MemoryRegion *mr,
981 const char *name,
982 uint64_t size)
983 {
984 memory_region_init(mr, name, size);
985 mr->ram = true;
986 mr->terminates = true;
987 mr->destructor = memory_region_destructor_ram;
988 mr->ram_addr = qemu_ram_alloc(size, mr);
989 }
990
991 void memory_region_init_ram_ptr(MemoryRegion *mr,
992 const char *name,
993 uint64_t size,
994 void *ptr)
995 {
996 memory_region_init(mr, name, size);
997 mr->ram = true;
998 mr->terminates = true;
999 mr->destructor = memory_region_destructor_ram_from_ptr;
1000 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1001 }
1002
1003 void memory_region_init_alias(MemoryRegion *mr,
1004 const char *name,
1005 MemoryRegion *orig,
1006 hwaddr offset,
1007 uint64_t size)
1008 {
1009 memory_region_init(mr, name, size);
1010 mr->alias = orig;
1011 mr->alias_offset = offset;
1012 }
1013
1014 void memory_region_init_rom_device(MemoryRegion *mr,
1015 const MemoryRegionOps *ops,
1016 void *opaque,
1017 const char *name,
1018 uint64_t size)
1019 {
1020 memory_region_init(mr, name, size);
1021 mr->ops = ops;
1022 mr->opaque = opaque;
1023 mr->terminates = true;
1024 mr->rom_device = true;
1025 mr->destructor = memory_region_destructor_rom_device;
1026 mr->ram_addr = qemu_ram_alloc(size, mr);
1027 }
1028
1029 void memory_region_init_reservation(MemoryRegion *mr,
1030 const char *name,
1031 uint64_t size)
1032 {
1033 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1034 }
1035
1036 void memory_region_destroy(MemoryRegion *mr)
1037 {
1038 assert(QTAILQ_EMPTY(&mr->subregions));
1039 assert(memory_region_transaction_depth == 0);
1040 mr->destructor(mr);
1041 memory_region_clear_coalescing(mr);
1042 g_free((char *)mr->name);
1043 g_free(mr->ioeventfds);
1044 }
1045
1046 uint64_t memory_region_size(MemoryRegion *mr)
1047 {
1048 if (int128_eq(mr->size, int128_2_64())) {
1049 return UINT64_MAX;
1050 }
1051 return int128_get64(mr->size);
1052 }
1053
1054 const char *memory_region_name(MemoryRegion *mr)
1055 {
1056 return mr->name;
1057 }
1058
1059 bool memory_region_is_ram(MemoryRegion *mr)
1060 {
1061 return mr->ram;
1062 }
1063
1064 bool memory_region_is_logging(MemoryRegion *mr)
1065 {
1066 return mr->dirty_log_mask;
1067 }
1068
1069 bool memory_region_is_rom(MemoryRegion *mr)
1070 {
1071 return mr->ram && mr->readonly;
1072 }
1073
1074 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1075 {
1076 uint8_t mask = 1 << client;
1077
1078 memory_region_transaction_begin();
1079 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1080 memory_region_update_pending |= mr->enabled;
1081 memory_region_transaction_commit();
1082 }
1083
1084 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1085 hwaddr size, unsigned client)
1086 {
1087 assert(mr->terminates);
1088 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1089 1 << client);
1090 }
1091
1092 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1093 hwaddr size)
1094 {
1095 assert(mr->terminates);
1096 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1097 }
1098
1099 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1100 hwaddr size, unsigned client)
1101 {
1102 bool ret;
1103 assert(mr->terminates);
1104 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1105 1 << client);
1106 if (ret) {
1107 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1108 mr->ram_addr + addr + size,
1109 1 << client);
1110 }
1111 return ret;
1112 }
1113
1114
1115 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1116 {
1117 AddressSpace *as;
1118 FlatRange *fr;
1119
1120 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1121 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1122 if (fr->mr == mr) {
1123 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1124 }
1125 }
1126 }
1127 }
1128
1129 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1130 {
1131 if (mr->readonly != readonly) {
1132 memory_region_transaction_begin();
1133 mr->readonly = readonly;
1134 memory_region_update_pending |= mr->enabled;
1135 memory_region_transaction_commit();
1136 }
1137 }
1138
1139 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1140 {
1141 if (mr->romd_mode != romd_mode) {
1142 memory_region_transaction_begin();
1143 mr->romd_mode = romd_mode;
1144 memory_region_update_pending |= mr->enabled;
1145 memory_region_transaction_commit();
1146 }
1147 }
1148
1149 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1150 hwaddr size, unsigned client)
1151 {
1152 assert(mr->terminates);
1153 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1154 mr->ram_addr + addr + size,
1155 1 << client);
1156 }
1157
1158 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1159 {
1160 if (mr->alias) {
1161 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1162 }
1163
1164 assert(mr->terminates);
1165
1166 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1167 }
1168
1169 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1170 {
1171 FlatRange *fr;
1172 CoalescedMemoryRange *cmr;
1173 AddrRange tmp;
1174 MemoryRegionSection section;
1175
1176 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1177 if (fr->mr == mr) {
1178 section = (MemoryRegionSection) {
1179 .address_space = as,
1180 .offset_within_address_space = int128_get64(fr->addr.start),
1181 .size = int128_get64(fr->addr.size),
1182 };
1183
1184 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1185 int128_get64(fr->addr.start),
1186 int128_get64(fr->addr.size));
1187 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1188 tmp = addrrange_shift(cmr->addr,
1189 int128_sub(fr->addr.start,
1190 int128_make64(fr->offset_in_region)));
1191 if (!addrrange_intersects(tmp, fr->addr)) {
1192 continue;
1193 }
1194 tmp = addrrange_intersection(tmp, fr->addr);
1195 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1196 int128_get64(tmp.start),
1197 int128_get64(tmp.size));
1198 }
1199 }
1200 }
1201 }
1202
1203 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1204 {
1205 AddressSpace *as;
1206
1207 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1208 memory_region_update_coalesced_range_as(mr, as);
1209 }
1210 }
1211
1212 void memory_region_set_coalescing(MemoryRegion *mr)
1213 {
1214 memory_region_clear_coalescing(mr);
1215 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1216 }
1217
1218 void memory_region_add_coalescing(MemoryRegion *mr,
1219 hwaddr offset,
1220 uint64_t size)
1221 {
1222 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1223
1224 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1225 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1226 memory_region_update_coalesced_range(mr);
1227 memory_region_set_flush_coalesced(mr);
1228 }
1229
1230 void memory_region_clear_coalescing(MemoryRegion *mr)
1231 {
1232 CoalescedMemoryRange *cmr;
1233
1234 qemu_flush_coalesced_mmio_buffer();
1235 mr->flush_coalesced_mmio = false;
1236
1237 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1238 cmr = QTAILQ_FIRST(&mr->coalesced);
1239 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1240 g_free(cmr);
1241 }
1242 memory_region_update_coalesced_range(mr);
1243 }
1244
1245 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1246 {
1247 mr->flush_coalesced_mmio = true;
1248 }
1249
1250 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1251 {
1252 qemu_flush_coalesced_mmio_buffer();
1253 if (QTAILQ_EMPTY(&mr->coalesced)) {
1254 mr->flush_coalesced_mmio = false;
1255 }
1256 }
1257
1258 void memory_region_add_eventfd(MemoryRegion *mr,
1259 hwaddr addr,
1260 unsigned size,
1261 bool match_data,
1262 uint64_t data,
1263 EventNotifier *e)
1264 {
1265 MemoryRegionIoeventfd mrfd = {
1266 .addr.start = int128_make64(addr),
1267 .addr.size = int128_make64(size),
1268 .match_data = match_data,
1269 .data = data,
1270 .e = e,
1271 };
1272 unsigned i;
1273
1274 adjust_endianness(mr, &mrfd.data, size);
1275 memory_region_transaction_begin();
1276 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1277 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1278 break;
1279 }
1280 }
1281 ++mr->ioeventfd_nb;
1282 mr->ioeventfds = g_realloc(mr->ioeventfds,
1283 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1284 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1285 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1286 mr->ioeventfds[i] = mrfd;
1287 memory_region_update_pending |= mr->enabled;
1288 memory_region_transaction_commit();
1289 }
1290
1291 void memory_region_del_eventfd(MemoryRegion *mr,
1292 hwaddr addr,
1293 unsigned size,
1294 bool match_data,
1295 uint64_t data,
1296 EventNotifier *e)
1297 {
1298 MemoryRegionIoeventfd mrfd = {
1299 .addr.start = int128_make64(addr),
1300 .addr.size = int128_make64(size),
1301 .match_data = match_data,
1302 .data = data,
1303 .e = e,
1304 };
1305 unsigned i;
1306
1307 adjust_endianness(mr, &mrfd.data, size);
1308 memory_region_transaction_begin();
1309 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1310 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1311 break;
1312 }
1313 }
1314 assert(i != mr->ioeventfd_nb);
1315 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1316 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1317 --mr->ioeventfd_nb;
1318 mr->ioeventfds = g_realloc(mr->ioeventfds,
1319 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1320 memory_region_update_pending |= mr->enabled;
1321 memory_region_transaction_commit();
1322 }
1323
1324 static void memory_region_add_subregion_common(MemoryRegion *mr,
1325 hwaddr offset,
1326 MemoryRegion *subregion)
1327 {
1328 MemoryRegion *other;
1329
1330 memory_region_transaction_begin();
1331
1332 assert(!subregion->parent);
1333 subregion->parent = mr;
1334 subregion->addr = offset;
1335 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1336 if (subregion->may_overlap || other->may_overlap) {
1337 continue;
1338 }
1339 if (int128_ge(int128_make64(offset),
1340 int128_add(int128_make64(other->addr), other->size))
1341 || int128_le(int128_add(int128_make64(offset), subregion->size),
1342 int128_make64(other->addr))) {
1343 continue;
1344 }
1345 #if 0
1346 printf("warning: subregion collision %llx/%llx (%s) "
1347 "vs %llx/%llx (%s)\n",
1348 (unsigned long long)offset,
1349 (unsigned long long)int128_get64(subregion->size),
1350 subregion->name,
1351 (unsigned long long)other->addr,
1352 (unsigned long long)int128_get64(other->size),
1353 other->name);
1354 #endif
1355 }
1356 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1357 if (subregion->priority >= other->priority) {
1358 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1359 goto done;
1360 }
1361 }
1362 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1363 done:
1364 memory_region_update_pending |= mr->enabled && subregion->enabled;
1365 memory_region_transaction_commit();
1366 }
1367
1368
1369 void memory_region_add_subregion(MemoryRegion *mr,
1370 hwaddr offset,
1371 MemoryRegion *subregion)
1372 {
1373 subregion->may_overlap = false;
1374 subregion->priority = 0;
1375 memory_region_add_subregion_common(mr, offset, subregion);
1376 }
1377
1378 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1379 hwaddr offset,
1380 MemoryRegion *subregion,
1381 unsigned priority)
1382 {
1383 subregion->may_overlap = true;
1384 subregion->priority = priority;
1385 memory_region_add_subregion_common(mr, offset, subregion);
1386 }
1387
1388 void memory_region_del_subregion(MemoryRegion *mr,
1389 MemoryRegion *subregion)
1390 {
1391 memory_region_transaction_begin();
1392 assert(subregion->parent == mr);
1393 subregion->parent = NULL;
1394 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1395 memory_region_update_pending |= mr->enabled && subregion->enabled;
1396 memory_region_transaction_commit();
1397 }
1398
1399 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1400 {
1401 if (enabled == mr->enabled) {
1402 return;
1403 }
1404 memory_region_transaction_begin();
1405 mr->enabled = enabled;
1406 memory_region_update_pending = true;
1407 memory_region_transaction_commit();
1408 }
1409
1410 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1411 {
1412 MemoryRegion *parent = mr->parent;
1413 unsigned priority = mr->priority;
1414 bool may_overlap = mr->may_overlap;
1415
1416 if (addr == mr->addr || !parent) {
1417 mr->addr = addr;
1418 return;
1419 }
1420
1421 memory_region_transaction_begin();
1422 memory_region_del_subregion(parent, mr);
1423 if (may_overlap) {
1424 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1425 } else {
1426 memory_region_add_subregion(parent, addr, mr);
1427 }
1428 memory_region_transaction_commit();
1429 }
1430
1431 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1432 {
1433 assert(mr->alias);
1434
1435 if (offset == mr->alias_offset) {
1436 return;
1437 }
1438
1439 memory_region_transaction_begin();
1440 mr->alias_offset = offset;
1441 memory_region_update_pending |= mr->enabled;
1442 memory_region_transaction_commit();
1443 }
1444
1445 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1446 {
1447 return mr->ram_addr;
1448 }
1449
1450 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1451 {
1452 const AddrRange *addr = addr_;
1453 const FlatRange *fr = fr_;
1454
1455 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1456 return -1;
1457 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1458 return 1;
1459 }
1460 return 0;
1461 }
1462
1463 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1464 {
1465 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1466 sizeof(FlatRange), cmp_flatrange_addr);
1467 }
1468
1469 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1470 hwaddr addr, uint64_t size)
1471 {
1472 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1473 MemoryRegion *root;
1474 AddressSpace *as;
1475 AddrRange range;
1476 FlatRange *fr;
1477
1478 addr += mr->addr;
1479 for (root = mr; root->parent; ) {
1480 root = root->parent;
1481 addr += root->addr;
1482 }
1483
1484 as = memory_region_to_address_space(root);
1485 range = addrrange_make(int128_make64(addr), int128_make64(size));
1486 fr = address_space_lookup(as, range);
1487 if (!fr) {
1488 return ret;
1489 }
1490
1491 while (fr > as->current_map->ranges
1492 && addrrange_intersects(fr[-1].addr, range)) {
1493 --fr;
1494 }
1495
1496 ret.mr = fr->mr;
1497 ret.address_space = as;
1498 range = addrrange_intersection(range, fr->addr);
1499 ret.offset_within_region = fr->offset_in_region;
1500 ret.offset_within_region += int128_get64(int128_sub(range.start,
1501 fr->addr.start));
1502 ret.size = int128_get64(range.size);
1503 ret.offset_within_address_space = int128_get64(range.start);
1504 ret.readonly = fr->readonly;
1505 return ret;
1506 }
1507
1508 void address_space_sync_dirty_bitmap(AddressSpace *as)
1509 {
1510 FlatRange *fr;
1511
1512 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1513 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1514 }
1515 }
1516
1517 void memory_global_dirty_log_start(void)
1518 {
1519 global_dirty_log = true;
1520 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1521 }
1522
1523 void memory_global_dirty_log_stop(void)
1524 {
1525 global_dirty_log = false;
1526 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1527 }
1528
1529 static void listener_add_address_space(MemoryListener *listener,
1530 AddressSpace *as)
1531 {
1532 FlatRange *fr;
1533
1534 if (listener->address_space_filter
1535 && listener->address_space_filter != as) {
1536 return;
1537 }
1538
1539 if (global_dirty_log) {
1540 if (listener->log_global_start) {
1541 listener->log_global_start(listener);
1542 }
1543 }
1544
1545 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1546 MemoryRegionSection section = {
1547 .mr = fr->mr,
1548 .address_space = as,
1549 .offset_within_region = fr->offset_in_region,
1550 .size = int128_get64(fr->addr.size),
1551 .offset_within_address_space = int128_get64(fr->addr.start),
1552 .readonly = fr->readonly,
1553 };
1554 if (listener->region_add) {
1555 listener->region_add(listener, &section);
1556 }
1557 }
1558 }
1559
1560 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1561 {
1562 MemoryListener *other = NULL;
1563 AddressSpace *as;
1564
1565 listener->address_space_filter = filter;
1566 if (QTAILQ_EMPTY(&memory_listeners)
1567 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1568 memory_listeners)->priority) {
1569 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1570 } else {
1571 QTAILQ_FOREACH(other, &memory_listeners, link) {
1572 if (listener->priority < other->priority) {
1573 break;
1574 }
1575 }
1576 QTAILQ_INSERT_BEFORE(other, listener, link);
1577 }
1578
1579 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1580 listener_add_address_space(listener, as);
1581 }
1582 }
1583
1584 void memory_listener_unregister(MemoryListener *listener)
1585 {
1586 QTAILQ_REMOVE(&memory_listeners, listener, link);
1587 }
1588
1589 void address_space_init(AddressSpace *as, MemoryRegion *root)
1590 {
1591 memory_region_transaction_begin();
1592 as->root = root;
1593 as->current_map = g_new(FlatView, 1);
1594 flatview_init(as->current_map);
1595 as->ioeventfd_nb = 0;
1596 as->ioeventfds = NULL;
1597 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1598 as->name = NULL;
1599 address_space_init_dispatch(as);
1600 memory_region_update_pending |= root->enabled;
1601 memory_region_transaction_commit();
1602 }
1603
1604 void address_space_destroy(AddressSpace *as)
1605 {
1606 /* Flush out anything from MemoryListeners listening in on this */
1607 memory_region_transaction_begin();
1608 as->root = NULL;
1609 memory_region_transaction_commit();
1610 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1611 address_space_destroy_dispatch(as);
1612 flatview_destroy(as->current_map);
1613 g_free(as->current_map);
1614 g_free(as->ioeventfds);
1615 }
1616
1617 uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
1618 {
1619 return memory_region_dispatch_read(mr, addr, size);
1620 }
1621
1622 void io_mem_write(MemoryRegion *mr, hwaddr addr,
1623 uint64_t val, unsigned size)
1624 {
1625 memory_region_dispatch_write(mr, addr, val, size);
1626 }
1627
1628 typedef struct MemoryRegionList MemoryRegionList;
1629
1630 struct MemoryRegionList {
1631 const MemoryRegion *mr;
1632 bool printed;
1633 QTAILQ_ENTRY(MemoryRegionList) queue;
1634 };
1635
1636 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1637
1638 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1639 const MemoryRegion *mr, unsigned int level,
1640 hwaddr base,
1641 MemoryRegionListHead *alias_print_queue)
1642 {
1643 MemoryRegionList *new_ml, *ml, *next_ml;
1644 MemoryRegionListHead submr_print_queue;
1645 const MemoryRegion *submr;
1646 unsigned int i;
1647
1648 if (!mr || !mr->enabled) {
1649 return;
1650 }
1651
1652 for (i = 0; i < level; i++) {
1653 mon_printf(f, " ");
1654 }
1655
1656 if (mr->alias) {
1657 MemoryRegionList *ml;
1658 bool found = false;
1659
1660 /* check if the alias is already in the queue */
1661 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1662 if (ml->mr == mr->alias && !ml->printed) {
1663 found = true;
1664 }
1665 }
1666
1667 if (!found) {
1668 ml = g_new(MemoryRegionList, 1);
1669 ml->mr = mr->alias;
1670 ml->printed = false;
1671 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1672 }
1673 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1674 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1675 "-" TARGET_FMT_plx "\n",
1676 base + mr->addr,
1677 base + mr->addr
1678 + (hwaddr)int128_get64(mr->size) - 1,
1679 mr->priority,
1680 mr->romd_mode ? 'R' : '-',
1681 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1682 : '-',
1683 mr->name,
1684 mr->alias->name,
1685 mr->alias_offset,
1686 mr->alias_offset
1687 + (hwaddr)int128_get64(mr->size) - 1);
1688 } else {
1689 mon_printf(f,
1690 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1691 base + mr->addr,
1692 base + mr->addr
1693 + (hwaddr)int128_get64(mr->size) - 1,
1694 mr->priority,
1695 mr->romd_mode ? 'R' : '-',
1696 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1697 : '-',
1698 mr->name);
1699 }
1700
1701 QTAILQ_INIT(&submr_print_queue);
1702
1703 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1704 new_ml = g_new(MemoryRegionList, 1);
1705 new_ml->mr = submr;
1706 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1707 if (new_ml->mr->addr < ml->mr->addr ||
1708 (new_ml->mr->addr == ml->mr->addr &&
1709 new_ml->mr->priority > ml->mr->priority)) {
1710 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1711 new_ml = NULL;
1712 break;
1713 }
1714 }
1715 if (new_ml) {
1716 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1717 }
1718 }
1719
1720 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1721 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1722 alias_print_queue);
1723 }
1724
1725 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1726 g_free(ml);
1727 }
1728 }
1729
1730 void mtree_info(fprintf_function mon_printf, void *f)
1731 {
1732 MemoryRegionListHead ml_head;
1733 MemoryRegionList *ml, *ml2;
1734 AddressSpace *as;
1735
1736 QTAILQ_INIT(&ml_head);
1737
1738 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1739 if (!as->name) {
1740 continue;
1741 }
1742 mon_printf(f, "%s\n", as->name);
1743 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1744 }
1745
1746 mon_printf(f, "aliases\n");
1747 /* print aliased regions */
1748 QTAILQ_FOREACH(ml, &ml_head, queue) {
1749 if (!ml->printed) {
1750 mon_printf(f, "%s\n", ml->mr->name);
1751 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1752 }
1753 }
1754
1755 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1756 g_free(ml);
1757 }
1758 }
Qemu copy for testing