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memory: avoid "resurrection" of dead FlatViews
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/misc/mmio_interface.h"
34 #include "hw/qdev-properties.h"
35 #include "migration/vmstate.h"
36
37 //#define DEBUG_UNASSIGNED
38
39 static unsigned memory_region_transaction_depth;
40 static bool memory_region_update_pending;
41 static bool ioeventfd_update_pending;
42 static bool global_dirty_log = false;
43
44 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 typedef struct AddrRange AddrRange;
51
52 /*
53 * Note that signed integers are needed for negative offsetting in aliases
54 * (large MemoryRegion::alias_offset).
55 */
56 struct AddrRange {
57 Int128 start;
58 Int128 size;
59 };
60
61 static AddrRange addrrange_make(Int128 start, Int128 size)
62 {
63 return (AddrRange) { start, size };
64 }
65
66 static bool addrrange_equal(AddrRange r1, AddrRange r2)
67 {
68 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
69 }
70
71 static Int128 addrrange_end(AddrRange r)
72 {
73 return int128_add(r.start, r.size);
74 }
75
76 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
77 {
78 int128_addto(&range.start, delta);
79 return range;
80 }
81
82 static bool addrrange_contains(AddrRange range, Int128 addr)
83 {
84 return int128_ge(addr, range.start)
85 && int128_lt(addr, addrrange_end(range));
86 }
87
88 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
89 {
90 return addrrange_contains(r1, r2.start)
91 || addrrange_contains(r2, r1.start);
92 }
93
94 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
95 {
96 Int128 start = int128_max(r1.start, r2.start);
97 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
98 return addrrange_make(start, int128_sub(end, start));
99 }
100
101 enum ListenerDirection { Forward, Reverse };
102
103 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
104 do { \
105 MemoryListener *_listener; \
106 \
107 switch (_direction) { \
108 case Forward: \
109 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
110 if (_listener->_callback) { \
111 _listener->_callback(_listener, ##_args); \
112 } \
113 } \
114 break; \
115 case Reverse: \
116 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
117 memory_listeners, link) { \
118 if (_listener->_callback) { \
119 _listener->_callback(_listener, ##_args); \
120 } \
121 } \
122 break; \
123 default: \
124 abort(); \
125 } \
126 } while (0)
127
128 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
129 do { \
130 MemoryListener *_listener; \
131 struct memory_listeners_as *list = &(_as)->listeners; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, list, link_as) { \
136 if (_listener->_callback) { \
137 _listener->_callback(_listener, _section, ##_args); \
138 } \
139 } \
140 break; \
141 case Reverse: \
142 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
143 link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, as); \
158 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
159 } while(0)
160
161 struct CoalescedMemoryRange {
162 AddrRange addr;
163 QTAILQ_ENTRY(CoalescedMemoryRange) link;
164 };
165
166 struct MemoryRegionIoeventfd {
167 AddrRange addr;
168 bool match_data;
169 uint64_t data;
170 EventNotifier *e;
171 };
172
173 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
174 MemoryRegionIoeventfd b)
175 {
176 if (int128_lt(a.addr.start, b.addr.start)) {
177 return true;
178 } else if (int128_gt(a.addr.start, b.addr.start)) {
179 return false;
180 } else if (int128_lt(a.addr.size, b.addr.size)) {
181 return true;
182 } else if (int128_gt(a.addr.size, b.addr.size)) {
183 return false;
184 } else if (a.match_data < b.match_data) {
185 return true;
186 } else if (a.match_data > b.match_data) {
187 return false;
188 } else if (a.match_data) {
189 if (a.data < b.data) {
190 return true;
191 } else if (a.data > b.data) {
192 return false;
193 }
194 }
195 if (a.e < b.e) {
196 return true;
197 } else if (a.e > b.e) {
198 return false;
199 }
200 return false;
201 }
202
203 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
204 MemoryRegionIoeventfd b)
205 {
206 return !memory_region_ioeventfd_before(a, b)
207 && !memory_region_ioeventfd_before(b, a);
208 }
209
210 typedef struct FlatRange FlatRange;
211 typedef struct FlatView FlatView;
212
213 /* Range of memory in the global map. Addresses are absolute. */
214 struct FlatRange {
215 MemoryRegion *mr;
216 hwaddr offset_in_region;
217 AddrRange addr;
218 uint8_t dirty_log_mask;
219 bool romd_mode;
220 bool readonly;
221 };
222
223 /* Flattened global view of current active memory hierarchy. Kept in sorted
224 * order.
225 */
226 struct FlatView {
227 struct rcu_head rcu;
228 unsigned ref;
229 FlatRange *ranges;
230 unsigned nr;
231 unsigned nr_allocated;
232 };
233
234 typedef struct AddressSpaceOps AddressSpaceOps;
235
236 #define FOR_EACH_FLAT_RANGE(var, view) \
237 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
238
239 static inline MemoryRegionSection
240 section_from_flat_range(FlatRange *fr, AddressSpace *as)
241 {
242 return (MemoryRegionSection) {
243 .mr = fr->mr,
244 .address_space = as,
245 .offset_within_region = fr->offset_in_region,
246 .size = fr->addr.size,
247 .offset_within_address_space = int128_get64(fr->addr.start),
248 .readonly = fr->readonly,
249 };
250 }
251
252 static bool flatrange_equal(FlatRange *a, FlatRange *b)
253 {
254 return a->mr == b->mr
255 && addrrange_equal(a->addr, b->addr)
256 && a->offset_in_region == b->offset_in_region
257 && a->romd_mode == b->romd_mode
258 && a->readonly == b->readonly;
259 }
260
261 static void flatview_init(FlatView *view)
262 {
263 view->ref = 1;
264 view->ranges = NULL;
265 view->nr = 0;
266 view->nr_allocated = 0;
267 }
268
269 /* Insert a range into a given position. Caller is responsible for maintaining
270 * sorting order.
271 */
272 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
273 {
274 if (view->nr == view->nr_allocated) {
275 view->nr_allocated = MAX(2 * view->nr, 10);
276 view->ranges = g_realloc(view->ranges,
277 view->nr_allocated * sizeof(*view->ranges));
278 }
279 memmove(view->ranges + pos + 1, view->ranges + pos,
280 (view->nr - pos) * sizeof(FlatRange));
281 view->ranges[pos] = *range;
282 memory_region_ref(range->mr);
283 ++view->nr;
284 }
285
286 static void flatview_destroy(FlatView *view)
287 {
288 int i;
289
290 for (i = 0; i < view->nr; i++) {
291 memory_region_unref(view->ranges[i].mr);
292 }
293 g_free(view->ranges);
294 g_free(view);
295 }
296
297 static bool flatview_ref(FlatView *view)
298 {
299 return atomic_fetch_inc_nonzero(&view->ref) > 0;
300 }
301
302 static void flatview_unref(FlatView *view)
303 {
304 if (atomic_fetch_dec(&view->ref) == 1) {
305 flatview_destroy(view);
306 }
307 }
308
309 static bool can_merge(FlatRange *r1, FlatRange *r2)
310 {
311 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
312 && r1->mr == r2->mr
313 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
314 r1->addr.size),
315 int128_make64(r2->offset_in_region))
316 && r1->dirty_log_mask == r2->dirty_log_mask
317 && r1->romd_mode == r2->romd_mode
318 && r1->readonly == r2->readonly;
319 }
320
321 /* Attempt to simplify a view by merging adjacent ranges */
322 static void flatview_simplify(FlatView *view)
323 {
324 unsigned i, j;
325
326 i = 0;
327 while (i < view->nr) {
328 j = i + 1;
329 while (j < view->nr
330 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
331 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
332 ++j;
333 }
334 ++i;
335 memmove(&view->ranges[i], &view->ranges[j],
336 (view->nr - j) * sizeof(view->ranges[j]));
337 view->nr -= j - i;
338 }
339 }
340
341 static bool memory_region_big_endian(MemoryRegion *mr)
342 {
343 #ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
345 #else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347 #endif
348 }
349
350 static bool memory_region_wrong_endianness(MemoryRegion *mr)
351 {
352 #ifdef TARGET_WORDS_BIGENDIAN
353 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
354 #else
355 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
356 #endif
357 }
358
359 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
360 {
361 if (memory_region_wrong_endianness(mr)) {
362 switch (size) {
363 case 1:
364 break;
365 case 2:
366 *data = bswap16(*data);
367 break;
368 case 4:
369 *data = bswap32(*data);
370 break;
371 case 8:
372 *data = bswap64(*data);
373 break;
374 default:
375 abort();
376 }
377 }
378 }
379
380 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
381 {
382 MemoryRegion *root;
383 hwaddr abs_addr = offset;
384
385 abs_addr += mr->addr;
386 for (root = mr; root->container; ) {
387 root = root->container;
388 abs_addr += root->addr;
389 }
390
391 return abs_addr;
392 }
393
394 static int get_cpu_index(void)
395 {
396 if (current_cpu) {
397 return current_cpu->cpu_index;
398 }
399 return -1;
400 }
401
402 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
403 hwaddr addr,
404 uint64_t *value,
405 unsigned size,
406 unsigned shift,
407 uint64_t mask,
408 MemTxAttrs attrs)
409 {
410 uint64_t tmp;
411
412 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
413 if (mr->subpage) {
414 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
415 } else if (mr == &io_mem_notdirty) {
416 /* Accesses to code which has previously been translated into a TB show
417 * up in the MMIO path, as accesses to the io_mem_notdirty
418 * MemoryRegion. */
419 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
420 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
421 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
422 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
423 }
424 *value |= (tmp & mask) << shift;
425 return MEMTX_OK;
426 }
427
428 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
429 hwaddr addr,
430 uint64_t *value,
431 unsigned size,
432 unsigned shift,
433 uint64_t mask,
434 MemTxAttrs attrs)
435 {
436 uint64_t tmp;
437
438 tmp = mr->ops->read(mr->opaque, addr, size);
439 if (mr->subpage) {
440 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
441 } else if (mr == &io_mem_notdirty) {
442 /* Accesses to code which has previously been translated into a TB show
443 * up in the MMIO path, as accesses to the io_mem_notdirty
444 * MemoryRegion. */
445 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
446 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
447 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
448 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
449 }
450 *value |= (tmp & mask) << shift;
451 return MEMTX_OK;
452 }
453
454 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
455 hwaddr addr,
456 uint64_t *value,
457 unsigned size,
458 unsigned shift,
459 uint64_t mask,
460 MemTxAttrs attrs)
461 {
462 uint64_t tmp = 0;
463 MemTxResult r;
464
465 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
466 if (mr->subpage) {
467 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
468 } else if (mr == &io_mem_notdirty) {
469 /* Accesses to code which has previously been translated into a TB show
470 * up in the MMIO path, as accesses to the io_mem_notdirty
471 * MemoryRegion. */
472 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
473 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
474 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
475 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
476 }
477 *value |= (tmp & mask) << shift;
478 return r;
479 }
480
481 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
482 hwaddr addr,
483 uint64_t *value,
484 unsigned size,
485 unsigned shift,
486 uint64_t mask,
487 MemTxAttrs attrs)
488 {
489 uint64_t tmp;
490
491 tmp = (*value >> shift) & mask;
492 if (mr->subpage) {
493 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
494 } else if (mr == &io_mem_notdirty) {
495 /* Accesses to code which has previously been translated into a TB show
496 * up in the MMIO path, as accesses to the io_mem_notdirty
497 * MemoryRegion. */
498 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
499 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
500 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
501 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
502 }
503 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
504 return MEMTX_OK;
505 }
506
507 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
508 hwaddr addr,
509 uint64_t *value,
510 unsigned size,
511 unsigned shift,
512 uint64_t mask,
513 MemTxAttrs attrs)
514 {
515 uint64_t tmp;
516
517 tmp = (*value >> shift) & mask;
518 if (mr->subpage) {
519 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
520 } else if (mr == &io_mem_notdirty) {
521 /* Accesses to code which has previously been translated into a TB show
522 * up in the MMIO path, as accesses to the io_mem_notdirty
523 * MemoryRegion. */
524 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
525 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
526 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
527 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
528 }
529 mr->ops->write(mr->opaque, addr, tmp, size);
530 return MEMTX_OK;
531 }
532
533 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
534 hwaddr addr,
535 uint64_t *value,
536 unsigned size,
537 unsigned shift,
538 uint64_t mask,
539 MemTxAttrs attrs)
540 {
541 uint64_t tmp;
542
543 tmp = (*value >> shift) & mask;
544 if (mr->subpage) {
545 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
546 } else if (mr == &io_mem_notdirty) {
547 /* Accesses to code which has previously been translated into a TB show
548 * up in the MMIO path, as accesses to the io_mem_notdirty
549 * MemoryRegion. */
550 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
551 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
552 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
553 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
554 }
555 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
556 }
557
558 static MemTxResult access_with_adjusted_size(hwaddr addr,
559 uint64_t *value,
560 unsigned size,
561 unsigned access_size_min,
562 unsigned access_size_max,
563 MemTxResult (*access_fn)
564 (MemoryRegion *mr,
565 hwaddr addr,
566 uint64_t *value,
567 unsigned size,
568 unsigned shift,
569 uint64_t mask,
570 MemTxAttrs attrs),
571 MemoryRegion *mr,
572 MemTxAttrs attrs)
573 {
574 uint64_t access_mask;
575 unsigned access_size;
576 unsigned i;
577 MemTxResult r = MEMTX_OK;
578
579 if (!access_size_min) {
580 access_size_min = 1;
581 }
582 if (!access_size_max) {
583 access_size_max = 4;
584 }
585
586 /* FIXME: support unaligned access? */
587 access_size = MAX(MIN(size, access_size_max), access_size_min);
588 access_mask = -1ULL >> (64 - access_size * 8);
589 if (memory_region_big_endian(mr)) {
590 for (i = 0; i < size; i += access_size) {
591 r |= access_fn(mr, addr + i, value, access_size,
592 (size - access_size - i) * 8, access_mask, attrs);
593 }
594 } else {
595 for (i = 0; i < size; i += access_size) {
596 r |= access_fn(mr, addr + i, value, access_size, i * 8,
597 access_mask, attrs);
598 }
599 }
600 return r;
601 }
602
603 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
604 {
605 AddressSpace *as;
606
607 while (mr->container) {
608 mr = mr->container;
609 }
610 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
611 if (mr == as->root) {
612 return as;
613 }
614 }
615 return NULL;
616 }
617
618 /* Render a memory region into the global view. Ranges in @view obscure
619 * ranges in @mr.
620 */
621 static void render_memory_region(FlatView *view,
622 MemoryRegion *mr,
623 Int128 base,
624 AddrRange clip,
625 bool readonly)
626 {
627 MemoryRegion *subregion;
628 unsigned i;
629 hwaddr offset_in_region;
630 Int128 remain;
631 Int128 now;
632 FlatRange fr;
633 AddrRange tmp;
634
635 if (!mr->enabled) {
636 return;
637 }
638
639 int128_addto(&base, int128_make64(mr->addr));
640 readonly |= mr->readonly;
641
642 tmp = addrrange_make(base, mr->size);
643
644 if (!addrrange_intersects(tmp, clip)) {
645 return;
646 }
647
648 clip = addrrange_intersection(tmp, clip);
649
650 if (mr->alias) {
651 int128_subfrom(&base, int128_make64(mr->alias->addr));
652 int128_subfrom(&base, int128_make64(mr->alias_offset));
653 render_memory_region(view, mr->alias, base, clip, readonly);
654 return;
655 }
656
657 /* Render subregions in priority order. */
658 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
659 render_memory_region(view, subregion, base, clip, readonly);
660 }
661
662 if (!mr->terminates) {
663 return;
664 }
665
666 offset_in_region = int128_get64(int128_sub(clip.start, base));
667 base = clip.start;
668 remain = clip.size;
669
670 fr.mr = mr;
671 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
672 fr.romd_mode = mr->romd_mode;
673 fr.readonly = readonly;
674
675 /* Render the region itself into any gaps left by the current view. */
676 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
677 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
678 continue;
679 }
680 if (int128_lt(base, view->ranges[i].addr.start)) {
681 now = int128_min(remain,
682 int128_sub(view->ranges[i].addr.start, base));
683 fr.offset_in_region = offset_in_region;
684 fr.addr = addrrange_make(base, now);
685 flatview_insert(view, i, &fr);
686 ++i;
687 int128_addto(&base, now);
688 offset_in_region += int128_get64(now);
689 int128_subfrom(&remain, now);
690 }
691 now = int128_sub(int128_min(int128_add(base, remain),
692 addrrange_end(view->ranges[i].addr)),
693 base);
694 int128_addto(&base, now);
695 offset_in_region += int128_get64(now);
696 int128_subfrom(&remain, now);
697 }
698 if (int128_nz(remain)) {
699 fr.offset_in_region = offset_in_region;
700 fr.addr = addrrange_make(base, remain);
701 flatview_insert(view, i, &fr);
702 }
703 }
704
705 /* Render a memory topology into a list of disjoint absolute ranges. */
706 static FlatView *generate_memory_topology(MemoryRegion *mr)
707 {
708 FlatView *view;
709
710 view = g_new(FlatView, 1);
711 flatview_init(view);
712
713 if (mr) {
714 render_memory_region(view, mr, int128_zero(),
715 addrrange_make(int128_zero(), int128_2_64()), false);
716 }
717 flatview_simplify(view);
718
719 return view;
720 }
721
722 static void address_space_add_del_ioeventfds(AddressSpace *as,
723 MemoryRegionIoeventfd *fds_new,
724 unsigned fds_new_nb,
725 MemoryRegionIoeventfd *fds_old,
726 unsigned fds_old_nb)
727 {
728 unsigned iold, inew;
729 MemoryRegionIoeventfd *fd;
730 MemoryRegionSection section;
731
732 /* Generate a symmetric difference of the old and new fd sets, adding
733 * and deleting as necessary.
734 */
735
736 iold = inew = 0;
737 while (iold < fds_old_nb || inew < fds_new_nb) {
738 if (iold < fds_old_nb
739 && (inew == fds_new_nb
740 || memory_region_ioeventfd_before(fds_old[iold],
741 fds_new[inew]))) {
742 fd = &fds_old[iold];
743 section = (MemoryRegionSection) {
744 .address_space = as,
745 .offset_within_address_space = int128_get64(fd->addr.start),
746 .size = fd->addr.size,
747 };
748 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
749 fd->match_data, fd->data, fd->e);
750 ++iold;
751 } else if (inew < fds_new_nb
752 && (iold == fds_old_nb
753 || memory_region_ioeventfd_before(fds_new[inew],
754 fds_old[iold]))) {
755 fd = &fds_new[inew];
756 section = (MemoryRegionSection) {
757 .address_space = as,
758 .offset_within_address_space = int128_get64(fd->addr.start),
759 .size = fd->addr.size,
760 };
761 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
762 fd->match_data, fd->data, fd->e);
763 ++inew;
764 } else {
765 ++iold;
766 ++inew;
767 }
768 }
769 }
770
771 static FlatView *address_space_get_flatview(AddressSpace *as)
772 {
773 FlatView *view;
774
775 rcu_read_lock();
776 do {
777 view = atomic_rcu_read(&as->current_map);
778 /* If somebody has replaced as->current_map concurrently,
779 * flatview_ref returns false.
780 */
781 } while (!flatview_ref(view));
782 rcu_read_unlock();
783 return view;
784 }
785
786 static void address_space_update_ioeventfds(AddressSpace *as)
787 {
788 FlatView *view;
789 FlatRange *fr;
790 unsigned ioeventfd_nb = 0;
791 MemoryRegionIoeventfd *ioeventfds = NULL;
792 AddrRange tmp;
793 unsigned i;
794
795 view = address_space_get_flatview(as);
796 FOR_EACH_FLAT_RANGE(fr, view) {
797 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
798 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
799 int128_sub(fr->addr.start,
800 int128_make64(fr->offset_in_region)));
801 if (addrrange_intersects(fr->addr, tmp)) {
802 ++ioeventfd_nb;
803 ioeventfds = g_realloc(ioeventfds,
804 ioeventfd_nb * sizeof(*ioeventfds));
805 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
806 ioeventfds[ioeventfd_nb-1].addr = tmp;
807 }
808 }
809 }
810
811 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
812 as->ioeventfds, as->ioeventfd_nb);
813
814 g_free(as->ioeventfds);
815 as->ioeventfds = ioeventfds;
816 as->ioeventfd_nb = ioeventfd_nb;
817 flatview_unref(view);
818 }
819
820 static void address_space_update_topology_pass(AddressSpace *as,
821 const FlatView *old_view,
822 const FlatView *new_view,
823 bool adding)
824 {
825 unsigned iold, inew;
826 FlatRange *frold, *frnew;
827
828 /* Generate a symmetric difference of the old and new memory maps.
829 * Kill ranges in the old map, and instantiate ranges in the new map.
830 */
831 iold = inew = 0;
832 while (iold < old_view->nr || inew < new_view->nr) {
833 if (iold < old_view->nr) {
834 frold = &old_view->ranges[iold];
835 } else {
836 frold = NULL;
837 }
838 if (inew < new_view->nr) {
839 frnew = &new_view->ranges[inew];
840 } else {
841 frnew = NULL;
842 }
843
844 if (frold
845 && (!frnew
846 || int128_lt(frold->addr.start, frnew->addr.start)
847 || (int128_eq(frold->addr.start, frnew->addr.start)
848 && !flatrange_equal(frold, frnew)))) {
849 /* In old but not in new, or in both but attributes changed. */
850
851 if (!adding) {
852 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
853 }
854
855 ++iold;
856 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
857 /* In both and unchanged (except logging may have changed) */
858
859 if (adding) {
860 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
861 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
862 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
863 frold->dirty_log_mask,
864 frnew->dirty_log_mask);
865 }
866 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
867 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
868 frold->dirty_log_mask,
869 frnew->dirty_log_mask);
870 }
871 }
872
873 ++iold;
874 ++inew;
875 } else {
876 /* In new */
877
878 if (adding) {
879 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
880 }
881
882 ++inew;
883 }
884 }
885 }
886
887
888 static void address_space_update_topology(AddressSpace *as)
889 {
890 FlatView *old_view = address_space_get_flatview(as);
891 FlatView *new_view = generate_memory_topology(as->root);
892
893 address_space_update_topology_pass(as, old_view, new_view, false);
894 address_space_update_topology_pass(as, old_view, new_view, true);
895
896 /* Writes are protected by the BQL. */
897 atomic_rcu_set(&as->current_map, new_view);
898 call_rcu(old_view, flatview_unref, rcu);
899
900 /* Note that all the old MemoryRegions are still alive up to this
901 * point. This relieves most MemoryListeners from the need to
902 * ref/unref the MemoryRegions they get---unless they use them
903 * outside the iothread mutex, in which case precise reference
904 * counting is necessary.
905 */
906 flatview_unref(old_view);
907
908 address_space_update_ioeventfds(as);
909 }
910
911 void memory_region_transaction_begin(void)
912 {
913 qemu_flush_coalesced_mmio_buffer();
914 ++memory_region_transaction_depth;
915 }
916
917 void memory_region_transaction_commit(void)
918 {
919 AddressSpace *as;
920
921 assert(memory_region_transaction_depth);
922 assert(qemu_mutex_iothread_locked());
923
924 --memory_region_transaction_depth;
925 if (!memory_region_transaction_depth) {
926 if (memory_region_update_pending) {
927 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
928
929 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
930 address_space_update_topology(as);
931 }
932 memory_region_update_pending = false;
933 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
934 } else if (ioeventfd_update_pending) {
935 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
936 address_space_update_ioeventfds(as);
937 }
938 ioeventfd_update_pending = false;
939 }
940 }
941 }
942
943 static void memory_region_destructor_none(MemoryRegion *mr)
944 {
945 }
946
947 static void memory_region_destructor_ram(MemoryRegion *mr)
948 {
949 qemu_ram_free(mr->ram_block);
950 }
951
952 static bool memory_region_need_escape(char c)
953 {
954 return c == '/' || c == '[' || c == '\\' || c == ']';
955 }
956
957 static char *memory_region_escape_name(const char *name)
958 {
959 const char *p;
960 char *escaped, *q;
961 uint8_t c;
962 size_t bytes = 0;
963
964 for (p = name; *p; p++) {
965 bytes += memory_region_need_escape(*p) ? 4 : 1;
966 }
967 if (bytes == p - name) {
968 return g_memdup(name, bytes + 1);
969 }
970
971 escaped = g_malloc(bytes + 1);
972 for (p = name, q = escaped; *p; p++) {
973 c = *p;
974 if (unlikely(memory_region_need_escape(c))) {
975 *q++ = '\\';
976 *q++ = 'x';
977 *q++ = "0123456789abcdef"[c >> 4];
978 c = "0123456789abcdef"[c & 15];
979 }
980 *q++ = c;
981 }
982 *q = 0;
983 return escaped;
984 }
985
986 static void memory_region_do_init(MemoryRegion *mr,
987 Object *owner,
988 const char *name,
989 uint64_t size)
990 {
991 mr->size = int128_make64(size);
992 if (size == UINT64_MAX) {
993 mr->size = int128_2_64();
994 }
995 mr->name = g_strdup(name);
996 mr->owner = owner;
997 mr->ram_block = NULL;
998
999 if (name) {
1000 char *escaped_name = memory_region_escape_name(name);
1001 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1002
1003 if (!owner) {
1004 owner = container_get(qdev_get_machine(), "/unattached");
1005 }
1006
1007 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1008 object_unref(OBJECT(mr));
1009 g_free(name_array);
1010 g_free(escaped_name);
1011 }
1012 }
1013
1014 void memory_region_init(MemoryRegion *mr,
1015 Object *owner,
1016 const char *name,
1017 uint64_t size)
1018 {
1019 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1020 memory_region_do_init(mr, owner, name, size);
1021 }
1022
1023 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1024 void *opaque, Error **errp)
1025 {
1026 MemoryRegion *mr = MEMORY_REGION(obj);
1027 uint64_t value = mr->addr;
1028
1029 visit_type_uint64(v, name, &value, errp);
1030 }
1031
1032 static void memory_region_get_container(Object *obj, Visitor *v,
1033 const char *name, void *opaque,
1034 Error **errp)
1035 {
1036 MemoryRegion *mr = MEMORY_REGION(obj);
1037 gchar *path = (gchar *)"";
1038
1039 if (mr->container) {
1040 path = object_get_canonical_path(OBJECT(mr->container));
1041 }
1042 visit_type_str(v, name, &path, errp);
1043 if (mr->container) {
1044 g_free(path);
1045 }
1046 }
1047
1048 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1049 const char *part)
1050 {
1051 MemoryRegion *mr = MEMORY_REGION(obj);
1052
1053 return OBJECT(mr->container);
1054 }
1055
1056 static void memory_region_get_priority(Object *obj, Visitor *v,
1057 const char *name, void *opaque,
1058 Error **errp)
1059 {
1060 MemoryRegion *mr = MEMORY_REGION(obj);
1061 int32_t value = mr->priority;
1062
1063 visit_type_int32(v, name, &value, errp);
1064 }
1065
1066 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1067 void *opaque, Error **errp)
1068 {
1069 MemoryRegion *mr = MEMORY_REGION(obj);
1070 uint64_t value = memory_region_size(mr);
1071
1072 visit_type_uint64(v, name, &value, errp);
1073 }
1074
1075 static void memory_region_initfn(Object *obj)
1076 {
1077 MemoryRegion *mr = MEMORY_REGION(obj);
1078 ObjectProperty *op;
1079
1080 mr->ops = &unassigned_mem_ops;
1081 mr->enabled = true;
1082 mr->romd_mode = true;
1083 mr->global_locking = true;
1084 mr->destructor = memory_region_destructor_none;
1085 QTAILQ_INIT(&mr->subregions);
1086 QTAILQ_INIT(&mr->coalesced);
1087
1088 op = object_property_add(OBJECT(mr), "container",
1089 "link<" TYPE_MEMORY_REGION ">",
1090 memory_region_get_container,
1091 NULL, /* memory_region_set_container */
1092 NULL, NULL, &error_abort);
1093 op->resolve = memory_region_resolve_container;
1094
1095 object_property_add(OBJECT(mr), "addr", "uint64",
1096 memory_region_get_addr,
1097 NULL, /* memory_region_set_addr */
1098 NULL, NULL, &error_abort);
1099 object_property_add(OBJECT(mr), "priority", "uint32",
1100 memory_region_get_priority,
1101 NULL, /* memory_region_set_priority */
1102 NULL, NULL, &error_abort);
1103 object_property_add(OBJECT(mr), "size", "uint64",
1104 memory_region_get_size,
1105 NULL, /* memory_region_set_size, */
1106 NULL, NULL, &error_abort);
1107 }
1108
1109 static void iommu_memory_region_initfn(Object *obj)
1110 {
1111 MemoryRegion *mr = MEMORY_REGION(obj);
1112
1113 mr->is_iommu = true;
1114 }
1115
1116 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1117 unsigned size)
1118 {
1119 #ifdef DEBUG_UNASSIGNED
1120 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1121 #endif
1122 if (current_cpu != NULL) {
1123 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1124 }
1125 return 0;
1126 }
1127
1128 static void unassigned_mem_write(void *opaque, hwaddr addr,
1129 uint64_t val, unsigned size)
1130 {
1131 #ifdef DEBUG_UNASSIGNED
1132 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1133 #endif
1134 if (current_cpu != NULL) {
1135 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1136 }
1137 }
1138
1139 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1140 unsigned size, bool is_write)
1141 {
1142 return false;
1143 }
1144
1145 const MemoryRegionOps unassigned_mem_ops = {
1146 .valid.accepts = unassigned_mem_accepts,
1147 .endianness = DEVICE_NATIVE_ENDIAN,
1148 };
1149
1150 static uint64_t memory_region_ram_device_read(void *opaque,
1151 hwaddr addr, unsigned size)
1152 {
1153 MemoryRegion *mr = opaque;
1154 uint64_t data = (uint64_t)~0;
1155
1156 switch (size) {
1157 case 1:
1158 data = *(uint8_t *)(mr->ram_block->host + addr);
1159 break;
1160 case 2:
1161 data = *(uint16_t *)(mr->ram_block->host + addr);
1162 break;
1163 case 4:
1164 data = *(uint32_t *)(mr->ram_block->host + addr);
1165 break;
1166 case 8:
1167 data = *(uint64_t *)(mr->ram_block->host + addr);
1168 break;
1169 }
1170
1171 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1172
1173 return data;
1174 }
1175
1176 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1177 uint64_t data, unsigned size)
1178 {
1179 MemoryRegion *mr = opaque;
1180
1181 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1182
1183 switch (size) {
1184 case 1:
1185 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1186 break;
1187 case 2:
1188 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1189 break;
1190 case 4:
1191 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1192 break;
1193 case 8:
1194 *(uint64_t *)(mr->ram_block->host + addr) = data;
1195 break;
1196 }
1197 }
1198
1199 static const MemoryRegionOps ram_device_mem_ops = {
1200 .read = memory_region_ram_device_read,
1201 .write = memory_region_ram_device_write,
1202 .endianness = DEVICE_HOST_ENDIAN,
1203 .valid = {
1204 .min_access_size = 1,
1205 .max_access_size = 8,
1206 .unaligned = true,
1207 },
1208 .impl = {
1209 .min_access_size = 1,
1210 .max_access_size = 8,
1211 .unaligned = true,
1212 },
1213 };
1214
1215 bool memory_region_access_valid(MemoryRegion *mr,
1216 hwaddr addr,
1217 unsigned size,
1218 bool is_write)
1219 {
1220 int access_size_min, access_size_max;
1221 int access_size, i;
1222
1223 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1224 return false;
1225 }
1226
1227 if (!mr->ops->valid.accepts) {
1228 return true;
1229 }
1230
1231 access_size_min = mr->ops->valid.min_access_size;
1232 if (!mr->ops->valid.min_access_size) {
1233 access_size_min = 1;
1234 }
1235
1236 access_size_max = mr->ops->valid.max_access_size;
1237 if (!mr->ops->valid.max_access_size) {
1238 access_size_max = 4;
1239 }
1240
1241 access_size = MAX(MIN(size, access_size_max), access_size_min);
1242 for (i = 0; i < size; i += access_size) {
1243 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1244 is_write)) {
1245 return false;
1246 }
1247 }
1248
1249 return true;
1250 }
1251
1252 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1253 hwaddr addr,
1254 uint64_t *pval,
1255 unsigned size,
1256 MemTxAttrs attrs)
1257 {
1258 *pval = 0;
1259
1260 if (mr->ops->read) {
1261 return access_with_adjusted_size(addr, pval, size,
1262 mr->ops->impl.min_access_size,
1263 mr->ops->impl.max_access_size,
1264 memory_region_read_accessor,
1265 mr, attrs);
1266 } else if (mr->ops->read_with_attrs) {
1267 return access_with_adjusted_size(addr, pval, size,
1268 mr->ops->impl.min_access_size,
1269 mr->ops->impl.max_access_size,
1270 memory_region_read_with_attrs_accessor,
1271 mr, attrs);
1272 } else {
1273 return access_with_adjusted_size(addr, pval, size, 1, 4,
1274 memory_region_oldmmio_read_accessor,
1275 mr, attrs);
1276 }
1277 }
1278
1279 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1280 hwaddr addr,
1281 uint64_t *pval,
1282 unsigned size,
1283 MemTxAttrs attrs)
1284 {
1285 MemTxResult r;
1286
1287 if (!memory_region_access_valid(mr, addr, size, false)) {
1288 *pval = unassigned_mem_read(mr, addr, size);
1289 return MEMTX_DECODE_ERROR;
1290 }
1291
1292 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1293 adjust_endianness(mr, pval, size);
1294 return r;
1295 }
1296
1297 /* Return true if an eventfd was signalled */
1298 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1299 hwaddr addr,
1300 uint64_t data,
1301 unsigned size,
1302 MemTxAttrs attrs)
1303 {
1304 MemoryRegionIoeventfd ioeventfd = {
1305 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1306 .data = data,
1307 };
1308 unsigned i;
1309
1310 for (i = 0; i < mr->ioeventfd_nb; i++) {
1311 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1312 ioeventfd.e = mr->ioeventfds[i].e;
1313
1314 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1315 event_notifier_set(ioeventfd.e);
1316 return true;
1317 }
1318 }
1319
1320 return false;
1321 }
1322
1323 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1324 hwaddr addr,
1325 uint64_t data,
1326 unsigned size,
1327 MemTxAttrs attrs)
1328 {
1329 if (!memory_region_access_valid(mr, addr, size, true)) {
1330 unassigned_mem_write(mr, addr, data, size);
1331 return MEMTX_DECODE_ERROR;
1332 }
1333
1334 adjust_endianness(mr, &data, size);
1335
1336 if ((!kvm_eventfds_enabled()) &&
1337 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1338 return MEMTX_OK;
1339 }
1340
1341 if (mr->ops->write) {
1342 return access_with_adjusted_size(addr, &data, size,
1343 mr->ops->impl.min_access_size,
1344 mr->ops->impl.max_access_size,
1345 memory_region_write_accessor, mr,
1346 attrs);
1347 } else if (mr->ops->write_with_attrs) {
1348 return
1349 access_with_adjusted_size(addr, &data, size,
1350 mr->ops->impl.min_access_size,
1351 mr->ops->impl.max_access_size,
1352 memory_region_write_with_attrs_accessor,
1353 mr, attrs);
1354 } else {
1355 return access_with_adjusted_size(addr, &data, size, 1, 4,
1356 memory_region_oldmmio_write_accessor,
1357 mr, attrs);
1358 }
1359 }
1360
1361 void memory_region_init_io(MemoryRegion *mr,
1362 Object *owner,
1363 const MemoryRegionOps *ops,
1364 void *opaque,
1365 const char *name,
1366 uint64_t size)
1367 {
1368 memory_region_init(mr, owner, name, size);
1369 mr->ops = ops ? ops : &unassigned_mem_ops;
1370 mr->opaque = opaque;
1371 mr->terminates = true;
1372 }
1373
1374 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1375 Object *owner,
1376 const char *name,
1377 uint64_t size,
1378 Error **errp)
1379 {
1380 memory_region_init(mr, owner, name, size);
1381 mr->ram = true;
1382 mr->terminates = true;
1383 mr->destructor = memory_region_destructor_ram;
1384 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1385 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1386 }
1387
1388 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1389 Object *owner,
1390 const char *name,
1391 uint64_t size,
1392 uint64_t max_size,
1393 void (*resized)(const char*,
1394 uint64_t length,
1395 void *host),
1396 Error **errp)
1397 {
1398 memory_region_init(mr, owner, name, size);
1399 mr->ram = true;
1400 mr->terminates = true;
1401 mr->destructor = memory_region_destructor_ram;
1402 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1403 mr, errp);
1404 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1405 }
1406
1407 #ifdef __linux__
1408 void memory_region_init_ram_from_file(MemoryRegion *mr,
1409 struct Object *owner,
1410 const char *name,
1411 uint64_t size,
1412 bool share,
1413 const char *path,
1414 Error **errp)
1415 {
1416 memory_region_init(mr, owner, name, size);
1417 mr->ram = true;
1418 mr->terminates = true;
1419 mr->destructor = memory_region_destructor_ram;
1420 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1421 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1422 }
1423
1424 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1425 struct Object *owner,
1426 const char *name,
1427 uint64_t size,
1428 bool share,
1429 int fd,
1430 Error **errp)
1431 {
1432 memory_region_init(mr, owner, name, size);
1433 mr->ram = true;
1434 mr->terminates = true;
1435 mr->destructor = memory_region_destructor_ram;
1436 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1437 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1438 }
1439 #endif
1440
1441 void memory_region_init_ram_ptr(MemoryRegion *mr,
1442 Object *owner,
1443 const char *name,
1444 uint64_t size,
1445 void *ptr)
1446 {
1447 memory_region_init(mr, owner, name, size);
1448 mr->ram = true;
1449 mr->terminates = true;
1450 mr->destructor = memory_region_destructor_ram;
1451 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1452
1453 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1454 assert(ptr != NULL);
1455 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1456 }
1457
1458 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1459 Object *owner,
1460 const char *name,
1461 uint64_t size,
1462 void *ptr)
1463 {
1464 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1465 mr->ram_device = true;
1466 mr->ops = &ram_device_mem_ops;
1467 mr->opaque = mr;
1468 }
1469
1470 void memory_region_init_alias(MemoryRegion *mr,
1471 Object *owner,
1472 const char *name,
1473 MemoryRegion *orig,
1474 hwaddr offset,
1475 uint64_t size)
1476 {
1477 memory_region_init(mr, owner, name, size);
1478 mr->alias = orig;
1479 mr->alias_offset = offset;
1480 }
1481
1482 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1483 struct Object *owner,
1484 const char *name,
1485 uint64_t size,
1486 Error **errp)
1487 {
1488 memory_region_init(mr, owner, name, size);
1489 mr->ram = true;
1490 mr->readonly = true;
1491 mr->terminates = true;
1492 mr->destructor = memory_region_destructor_ram;
1493 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1494 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1495 }
1496
1497 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1498 Object *owner,
1499 const MemoryRegionOps *ops,
1500 void *opaque,
1501 const char *name,
1502 uint64_t size,
1503 Error **errp)
1504 {
1505 assert(ops);
1506 memory_region_init(mr, owner, name, size);
1507 mr->ops = ops;
1508 mr->opaque = opaque;
1509 mr->terminates = true;
1510 mr->rom_device = true;
1511 mr->destructor = memory_region_destructor_ram;
1512 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1513 }
1514
1515 void memory_region_init_iommu(void *_iommu_mr,
1516 size_t instance_size,
1517 const char *mrtypename,
1518 Object *owner,
1519 const char *name,
1520 uint64_t size)
1521 {
1522 struct IOMMUMemoryRegion *iommu_mr;
1523 struct MemoryRegion *mr;
1524
1525 object_initialize(_iommu_mr, instance_size, mrtypename);
1526 mr = MEMORY_REGION(_iommu_mr);
1527 memory_region_do_init(mr, owner, name, size);
1528 iommu_mr = IOMMU_MEMORY_REGION(mr);
1529 mr->terminates = true; /* then re-forwards */
1530 QLIST_INIT(&iommu_mr->iommu_notify);
1531 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1532 }
1533
1534 static void memory_region_finalize(Object *obj)
1535 {
1536 MemoryRegion *mr = MEMORY_REGION(obj);
1537
1538 assert(!mr->container);
1539
1540 /* We know the region is not visible in any address space (it
1541 * does not have a container and cannot be a root either because
1542 * it has no references, so we can blindly clear mr->enabled.
1543 * memory_region_set_enabled instead could trigger a transaction
1544 * and cause an infinite loop.
1545 */
1546 mr->enabled = false;
1547 memory_region_transaction_begin();
1548 while (!QTAILQ_EMPTY(&mr->subregions)) {
1549 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1550 memory_region_del_subregion(mr, subregion);
1551 }
1552 memory_region_transaction_commit();
1553
1554 mr->destructor(mr);
1555 memory_region_clear_coalescing(mr);
1556 g_free((char *)mr->name);
1557 g_free(mr->ioeventfds);
1558 }
1559
1560 Object *memory_region_owner(MemoryRegion *mr)
1561 {
1562 Object *obj = OBJECT(mr);
1563 return obj->parent;
1564 }
1565
1566 void memory_region_ref(MemoryRegion *mr)
1567 {
1568 /* MMIO callbacks most likely will access data that belongs
1569 * to the owner, hence the need to ref/unref the owner whenever
1570 * the memory region is in use.
1571 *
1572 * The memory region is a child of its owner. As long as the
1573 * owner doesn't call unparent itself on the memory region,
1574 * ref-ing the owner will also keep the memory region alive.
1575 * Memory regions without an owner are supposed to never go away;
1576 * we do not ref/unref them because it slows down DMA sensibly.
1577 */
1578 if (mr && mr->owner) {
1579 object_ref(mr->owner);
1580 }
1581 }
1582
1583 void memory_region_unref(MemoryRegion *mr)
1584 {
1585 if (mr && mr->owner) {
1586 object_unref(mr->owner);
1587 }
1588 }
1589
1590 uint64_t memory_region_size(MemoryRegion *mr)
1591 {
1592 if (int128_eq(mr->size, int128_2_64())) {
1593 return UINT64_MAX;
1594 }
1595 return int128_get64(mr->size);
1596 }
1597
1598 const char *memory_region_name(const MemoryRegion *mr)
1599 {
1600 if (!mr->name) {
1601 ((MemoryRegion *)mr)->name =
1602 object_get_canonical_path_component(OBJECT(mr));
1603 }
1604 return mr->name;
1605 }
1606
1607 bool memory_region_is_ram_device(MemoryRegion *mr)
1608 {
1609 return mr->ram_device;
1610 }
1611
1612 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1613 {
1614 uint8_t mask = mr->dirty_log_mask;
1615 if (global_dirty_log && mr->ram_block) {
1616 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1617 }
1618 return mask;
1619 }
1620
1621 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1622 {
1623 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1624 }
1625
1626 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1627 {
1628 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1629 IOMMUNotifier *iommu_notifier;
1630 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1631
1632 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1633 flags |= iommu_notifier->notifier_flags;
1634 }
1635
1636 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1637 imrc->notify_flag_changed(iommu_mr,
1638 iommu_mr->iommu_notify_flags,
1639 flags);
1640 }
1641
1642 iommu_mr->iommu_notify_flags = flags;
1643 }
1644
1645 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1646 IOMMUNotifier *n)
1647 {
1648 IOMMUMemoryRegion *iommu_mr;
1649
1650 if (mr->alias) {
1651 memory_region_register_iommu_notifier(mr->alias, n);
1652 return;
1653 }
1654
1655 /* We need to register for at least one bitfield */
1656 iommu_mr = IOMMU_MEMORY_REGION(mr);
1657 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1658 assert(n->start <= n->end);
1659 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1660 memory_region_update_iommu_notify_flags(iommu_mr);
1661 }
1662
1663 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1664 {
1665 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1666
1667 if (imrc->get_min_page_size) {
1668 return imrc->get_min_page_size(iommu_mr);
1669 }
1670 return TARGET_PAGE_SIZE;
1671 }
1672
1673 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1674 {
1675 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1676 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1677 hwaddr addr, granularity;
1678 IOMMUTLBEntry iotlb;
1679
1680 /* If the IOMMU has its own replay callback, override */
1681 if (imrc->replay) {
1682 imrc->replay(iommu_mr, n);
1683 return;
1684 }
1685
1686 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1687
1688 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1689 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1690 if (iotlb.perm != IOMMU_NONE) {
1691 n->notify(n, &iotlb);
1692 }
1693
1694 /* if (2^64 - MR size) < granularity, it's possible to get an
1695 * infinite loop here. This should catch such a wraparound */
1696 if ((addr + granularity) < addr) {
1697 break;
1698 }
1699 }
1700 }
1701
1702 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1703 {
1704 IOMMUNotifier *notifier;
1705
1706 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1707 memory_region_iommu_replay(iommu_mr, notifier);
1708 }
1709 }
1710
1711 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1712 IOMMUNotifier *n)
1713 {
1714 IOMMUMemoryRegion *iommu_mr;
1715
1716 if (mr->alias) {
1717 memory_region_unregister_iommu_notifier(mr->alias, n);
1718 return;
1719 }
1720 QLIST_REMOVE(n, node);
1721 iommu_mr = IOMMU_MEMORY_REGION(mr);
1722 memory_region_update_iommu_notify_flags(iommu_mr);
1723 }
1724
1725 void memory_region_notify_one(IOMMUNotifier *notifier,
1726 IOMMUTLBEntry *entry)
1727 {
1728 IOMMUNotifierFlag request_flags;
1729
1730 /*
1731 * Skip the notification if the notification does not overlap
1732 * with registered range.
1733 */
1734 if (notifier->start > entry->iova + entry->addr_mask + 1 ||
1735 notifier->end < entry->iova) {
1736 return;
1737 }
1738
1739 if (entry->perm & IOMMU_RW) {
1740 request_flags = IOMMU_NOTIFIER_MAP;
1741 } else {
1742 request_flags = IOMMU_NOTIFIER_UNMAP;
1743 }
1744
1745 if (notifier->notifier_flags & request_flags) {
1746 notifier->notify(notifier, entry);
1747 }
1748 }
1749
1750 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1751 IOMMUTLBEntry entry)
1752 {
1753 IOMMUNotifier *iommu_notifier;
1754
1755 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1756
1757 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1758 memory_region_notify_one(iommu_notifier, &entry);
1759 }
1760 }
1761
1762 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1763 {
1764 uint8_t mask = 1 << client;
1765 uint8_t old_logging;
1766
1767 assert(client == DIRTY_MEMORY_VGA);
1768 old_logging = mr->vga_logging_count;
1769 mr->vga_logging_count += log ? 1 : -1;
1770 if (!!old_logging == !!mr->vga_logging_count) {
1771 return;
1772 }
1773
1774 memory_region_transaction_begin();
1775 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1776 memory_region_update_pending |= mr->enabled;
1777 memory_region_transaction_commit();
1778 }
1779
1780 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1781 hwaddr size, unsigned client)
1782 {
1783 assert(mr->ram_block);
1784 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1785 size, client);
1786 }
1787
1788 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1789 hwaddr size)
1790 {
1791 assert(mr->ram_block);
1792 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1793 size,
1794 memory_region_get_dirty_log_mask(mr));
1795 }
1796
1797 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1798 hwaddr size, unsigned client)
1799 {
1800 assert(mr->ram_block);
1801 return cpu_physical_memory_test_and_clear_dirty(
1802 memory_region_get_ram_addr(mr) + addr, size, client);
1803 }
1804
1805 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1806 hwaddr addr,
1807 hwaddr size,
1808 unsigned client)
1809 {
1810 assert(mr->ram_block);
1811 return cpu_physical_memory_snapshot_and_clear_dirty(
1812 memory_region_get_ram_addr(mr) + addr, size, client);
1813 }
1814
1815 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1816 hwaddr addr, hwaddr size)
1817 {
1818 assert(mr->ram_block);
1819 return cpu_physical_memory_snapshot_get_dirty(snap,
1820 memory_region_get_ram_addr(mr) + addr, size);
1821 }
1822
1823 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1824 {
1825 MemoryListener *listener;
1826 AddressSpace *as;
1827 FlatView *view;
1828 FlatRange *fr;
1829
1830 /* If the same address space has multiple log_sync listeners, we
1831 * visit that address space's FlatView multiple times. But because
1832 * log_sync listeners are rare, it's still cheaper than walking each
1833 * address space once.
1834 */
1835 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1836 if (!listener->log_sync) {
1837 continue;
1838 }
1839 as = listener->address_space;
1840 view = address_space_get_flatview(as);
1841 FOR_EACH_FLAT_RANGE(fr, view) {
1842 if (fr->mr == mr) {
1843 MemoryRegionSection mrs = section_from_flat_range(fr, as);
1844 listener->log_sync(listener, &mrs);
1845 }
1846 }
1847 flatview_unref(view);
1848 }
1849 }
1850
1851 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1852 {
1853 if (mr->readonly != readonly) {
1854 memory_region_transaction_begin();
1855 mr->readonly = readonly;
1856 memory_region_update_pending |= mr->enabled;
1857 memory_region_transaction_commit();
1858 }
1859 }
1860
1861 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1862 {
1863 if (mr->romd_mode != romd_mode) {
1864 memory_region_transaction_begin();
1865 mr->romd_mode = romd_mode;
1866 memory_region_update_pending |= mr->enabled;
1867 memory_region_transaction_commit();
1868 }
1869 }
1870
1871 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1872 hwaddr size, unsigned client)
1873 {
1874 assert(mr->ram_block);
1875 cpu_physical_memory_test_and_clear_dirty(
1876 memory_region_get_ram_addr(mr) + addr, size, client);
1877 }
1878
1879 int memory_region_get_fd(MemoryRegion *mr)
1880 {
1881 int fd;
1882
1883 rcu_read_lock();
1884 while (mr->alias) {
1885 mr = mr->alias;
1886 }
1887 fd = mr->ram_block->fd;
1888 rcu_read_unlock();
1889
1890 return fd;
1891 }
1892
1893 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1894 {
1895 void *ptr;
1896 uint64_t offset = 0;
1897
1898 rcu_read_lock();
1899 while (mr->alias) {
1900 offset += mr->alias_offset;
1901 mr = mr->alias;
1902 }
1903 assert(mr->ram_block);
1904 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1905 rcu_read_unlock();
1906
1907 return ptr;
1908 }
1909
1910 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1911 {
1912 RAMBlock *block;
1913
1914 block = qemu_ram_block_from_host(ptr, false, offset);
1915 if (!block) {
1916 return NULL;
1917 }
1918
1919 return block->mr;
1920 }
1921
1922 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1923 {
1924 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1925 }
1926
1927 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1928 {
1929 assert(mr->ram_block);
1930
1931 qemu_ram_resize(mr->ram_block, newsize, errp);
1932 }
1933
1934 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1935 {
1936 FlatView *view;
1937 FlatRange *fr;
1938 CoalescedMemoryRange *cmr;
1939 AddrRange tmp;
1940 MemoryRegionSection section;
1941
1942 view = address_space_get_flatview(as);
1943 FOR_EACH_FLAT_RANGE(fr, view) {
1944 if (fr->mr == mr) {
1945 section = (MemoryRegionSection) {
1946 .address_space = as,
1947 .offset_within_address_space = int128_get64(fr->addr.start),
1948 .size = fr->addr.size,
1949 };
1950
1951 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
1952 int128_get64(fr->addr.start),
1953 int128_get64(fr->addr.size));
1954 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1955 tmp = addrrange_shift(cmr->addr,
1956 int128_sub(fr->addr.start,
1957 int128_make64(fr->offset_in_region)));
1958 if (!addrrange_intersects(tmp, fr->addr)) {
1959 continue;
1960 }
1961 tmp = addrrange_intersection(tmp, fr->addr);
1962 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
1963 int128_get64(tmp.start),
1964 int128_get64(tmp.size));
1965 }
1966 }
1967 }
1968 flatview_unref(view);
1969 }
1970
1971 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1972 {
1973 AddressSpace *as;
1974
1975 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1976 memory_region_update_coalesced_range_as(mr, as);
1977 }
1978 }
1979
1980 void memory_region_set_coalescing(MemoryRegion *mr)
1981 {
1982 memory_region_clear_coalescing(mr);
1983 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1984 }
1985
1986 void memory_region_add_coalescing(MemoryRegion *mr,
1987 hwaddr offset,
1988 uint64_t size)
1989 {
1990 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1991
1992 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1993 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1994 memory_region_update_coalesced_range(mr);
1995 memory_region_set_flush_coalesced(mr);
1996 }
1997
1998 void memory_region_clear_coalescing(MemoryRegion *mr)
1999 {
2000 CoalescedMemoryRange *cmr;
2001 bool updated = false;
2002
2003 qemu_flush_coalesced_mmio_buffer();
2004 mr->flush_coalesced_mmio = false;
2005
2006 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2007 cmr = QTAILQ_FIRST(&mr->coalesced);
2008 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2009 g_free(cmr);
2010 updated = true;
2011 }
2012
2013 if (updated) {
2014 memory_region_update_coalesced_range(mr);
2015 }
2016 }
2017
2018 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2019 {
2020 mr->flush_coalesced_mmio = true;
2021 }
2022
2023 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2024 {
2025 qemu_flush_coalesced_mmio_buffer();
2026 if (QTAILQ_EMPTY(&mr->coalesced)) {
2027 mr->flush_coalesced_mmio = false;
2028 }
2029 }
2030
2031 void memory_region_set_global_locking(MemoryRegion *mr)
2032 {
2033 mr->global_locking = true;
2034 }
2035
2036 void memory_region_clear_global_locking(MemoryRegion *mr)
2037 {
2038 mr->global_locking = false;
2039 }
2040
2041 static bool userspace_eventfd_warning;
2042
2043 void memory_region_add_eventfd(MemoryRegion *mr,
2044 hwaddr addr,
2045 unsigned size,
2046 bool match_data,
2047 uint64_t data,
2048 EventNotifier *e)
2049 {
2050 MemoryRegionIoeventfd mrfd = {
2051 .addr.start = int128_make64(addr),
2052 .addr.size = int128_make64(size),
2053 .match_data = match_data,
2054 .data = data,
2055 .e = e,
2056 };
2057 unsigned i;
2058
2059 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2060 userspace_eventfd_warning))) {
2061 userspace_eventfd_warning = true;
2062 error_report("Using eventfd without MMIO binding in KVM. "
2063 "Suboptimal performance expected");
2064 }
2065
2066 if (size) {
2067 adjust_endianness(mr, &mrfd.data, size);
2068 }
2069 memory_region_transaction_begin();
2070 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2071 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2072 break;
2073 }
2074 }
2075 ++mr->ioeventfd_nb;
2076 mr->ioeventfds = g_realloc(mr->ioeventfds,
2077 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2078 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2079 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2080 mr->ioeventfds[i] = mrfd;
2081 ioeventfd_update_pending |= mr->enabled;
2082 memory_region_transaction_commit();
2083 }
2084
2085 void memory_region_del_eventfd(MemoryRegion *mr,
2086 hwaddr addr,
2087 unsigned size,
2088 bool match_data,
2089 uint64_t data,
2090 EventNotifier *e)
2091 {
2092 MemoryRegionIoeventfd mrfd = {
2093 .addr.start = int128_make64(addr),
2094 .addr.size = int128_make64(size),
2095 .match_data = match_data,
2096 .data = data,
2097 .e = e,
2098 };
2099 unsigned i;
2100
2101 if (size) {
2102 adjust_endianness(mr, &mrfd.data, size);
2103 }
2104 memory_region_transaction_begin();
2105 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2106 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2107 break;
2108 }
2109 }
2110 assert(i != mr->ioeventfd_nb);
2111 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2112 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2113 --mr->ioeventfd_nb;
2114 mr->ioeventfds = g_realloc(mr->ioeventfds,
2115 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2116 ioeventfd_update_pending |= mr->enabled;
2117 memory_region_transaction_commit();
2118 }
2119
2120 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2121 {
2122 MemoryRegion *mr = subregion->container;
2123 MemoryRegion *other;
2124
2125 memory_region_transaction_begin();
2126
2127 memory_region_ref(subregion);
2128 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2129 if (subregion->priority >= other->priority) {
2130 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2131 goto done;
2132 }
2133 }
2134 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2135 done:
2136 memory_region_update_pending |= mr->enabled && subregion->enabled;
2137 memory_region_transaction_commit();
2138 }
2139
2140 static void memory_region_add_subregion_common(MemoryRegion *mr,
2141 hwaddr offset,
2142 MemoryRegion *subregion)
2143 {
2144 assert(!subregion->container);
2145 subregion->container = mr;
2146 subregion->addr = offset;
2147 memory_region_update_container_subregions(subregion);
2148 }
2149
2150 void memory_region_add_subregion(MemoryRegion *mr,
2151 hwaddr offset,
2152 MemoryRegion *subregion)
2153 {
2154 subregion->priority = 0;
2155 memory_region_add_subregion_common(mr, offset, subregion);
2156 }
2157
2158 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2159 hwaddr offset,
2160 MemoryRegion *subregion,
2161 int priority)
2162 {
2163 subregion->priority = priority;
2164 memory_region_add_subregion_common(mr, offset, subregion);
2165 }
2166
2167 void memory_region_del_subregion(MemoryRegion *mr,
2168 MemoryRegion *subregion)
2169 {
2170 memory_region_transaction_begin();
2171 assert(subregion->container == mr);
2172 subregion->container = NULL;
2173 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2174 memory_region_unref(subregion);
2175 memory_region_update_pending |= mr->enabled && subregion->enabled;
2176 memory_region_transaction_commit();
2177 }
2178
2179 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2180 {
2181 if (enabled == mr->enabled) {
2182 return;
2183 }
2184 memory_region_transaction_begin();
2185 mr->enabled = enabled;
2186 memory_region_update_pending = true;
2187 memory_region_transaction_commit();
2188 }
2189
2190 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2191 {
2192 Int128 s = int128_make64(size);
2193
2194 if (size == UINT64_MAX) {
2195 s = int128_2_64();
2196 }
2197 if (int128_eq(s, mr->size)) {
2198 return;
2199 }
2200 memory_region_transaction_begin();
2201 mr->size = s;
2202 memory_region_update_pending = true;
2203 memory_region_transaction_commit();
2204 }
2205
2206 static void memory_region_readd_subregion(MemoryRegion *mr)
2207 {
2208 MemoryRegion *container = mr->container;
2209
2210 if (container) {
2211 memory_region_transaction_begin();
2212 memory_region_ref(mr);
2213 memory_region_del_subregion(container, mr);
2214 mr->container = container;
2215 memory_region_update_container_subregions(mr);
2216 memory_region_unref(mr);
2217 memory_region_transaction_commit();
2218 }
2219 }
2220
2221 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2222 {
2223 if (addr != mr->addr) {
2224 mr->addr = addr;
2225 memory_region_readd_subregion(mr);
2226 }
2227 }
2228
2229 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2230 {
2231 assert(mr->alias);
2232
2233 if (offset == mr->alias_offset) {
2234 return;
2235 }
2236
2237 memory_region_transaction_begin();
2238 mr->alias_offset = offset;
2239 memory_region_update_pending |= mr->enabled;
2240 memory_region_transaction_commit();
2241 }
2242
2243 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2244 {
2245 return mr->align;
2246 }
2247
2248 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2249 {
2250 const AddrRange *addr = addr_;
2251 const FlatRange *fr = fr_;
2252
2253 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2254 return -1;
2255 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2256 return 1;
2257 }
2258 return 0;
2259 }
2260
2261 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2262 {
2263 return bsearch(&addr, view->ranges, view->nr,
2264 sizeof(FlatRange), cmp_flatrange_addr);
2265 }
2266
2267 bool memory_region_is_mapped(MemoryRegion *mr)
2268 {
2269 return mr->container ? true : false;
2270 }
2271
2272 /* Same as memory_region_find, but it does not add a reference to the
2273 * returned region. It must be called from an RCU critical section.
2274 */
2275 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2276 hwaddr addr, uint64_t size)
2277 {
2278 MemoryRegionSection ret = { .mr = NULL };
2279 MemoryRegion *root;
2280 AddressSpace *as;
2281 AddrRange range;
2282 FlatView *view;
2283 FlatRange *fr;
2284
2285 addr += mr->addr;
2286 for (root = mr; root->container; ) {
2287 root = root->container;
2288 addr += root->addr;
2289 }
2290
2291 as = memory_region_to_address_space(root);
2292 if (!as) {
2293 return ret;
2294 }
2295 range = addrrange_make(int128_make64(addr), int128_make64(size));
2296
2297 view = atomic_rcu_read(&as->current_map);
2298 fr = flatview_lookup(view, range);
2299 if (!fr) {
2300 return ret;
2301 }
2302
2303 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2304 --fr;
2305 }
2306
2307 ret.mr = fr->mr;
2308 ret.address_space = as;
2309 range = addrrange_intersection(range, fr->addr);
2310 ret.offset_within_region = fr->offset_in_region;
2311 ret.offset_within_region += int128_get64(int128_sub(range.start,
2312 fr->addr.start));
2313 ret.size = range.size;
2314 ret.offset_within_address_space = int128_get64(range.start);
2315 ret.readonly = fr->readonly;
2316 return ret;
2317 }
2318
2319 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2320 hwaddr addr, uint64_t size)
2321 {
2322 MemoryRegionSection ret;
2323 rcu_read_lock();
2324 ret = memory_region_find_rcu(mr, addr, size);
2325 if (ret.mr) {
2326 memory_region_ref(ret.mr);
2327 }
2328 rcu_read_unlock();
2329 return ret;
2330 }
2331
2332 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2333 {
2334 MemoryRegion *mr;
2335
2336 rcu_read_lock();
2337 mr = memory_region_find_rcu(container, addr, 1).mr;
2338 rcu_read_unlock();
2339 return mr && mr != container;
2340 }
2341
2342 void memory_global_dirty_log_sync(void)
2343 {
2344 MemoryListener *listener;
2345 AddressSpace *as;
2346 FlatView *view;
2347 FlatRange *fr;
2348
2349 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2350 if (!listener->log_sync) {
2351 continue;
2352 }
2353 as = listener->address_space;
2354 view = address_space_get_flatview(as);
2355 FOR_EACH_FLAT_RANGE(fr, view) {
2356 if (fr->dirty_log_mask) {
2357 MemoryRegionSection mrs = section_from_flat_range(fr, as);
2358 listener->log_sync(listener, &mrs);
2359 }
2360 }
2361 flatview_unref(view);
2362 }
2363 }
2364
2365 static VMChangeStateEntry *vmstate_change;
2366
2367 void memory_global_dirty_log_start(void)
2368 {
2369 if (vmstate_change) {
2370 qemu_del_vm_change_state_handler(vmstate_change);
2371 vmstate_change = NULL;
2372 }
2373
2374 global_dirty_log = true;
2375
2376 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2377
2378 /* Refresh DIRTY_LOG_MIGRATION bit. */
2379 memory_region_transaction_begin();
2380 memory_region_update_pending = true;
2381 memory_region_transaction_commit();
2382 }
2383
2384 static void memory_global_dirty_log_do_stop(void)
2385 {
2386 global_dirty_log = false;
2387
2388 /* Refresh DIRTY_LOG_MIGRATION bit. */
2389 memory_region_transaction_begin();
2390 memory_region_update_pending = true;
2391 memory_region_transaction_commit();
2392
2393 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2394 }
2395
2396 static void memory_vm_change_state_handler(void *opaque, int running,
2397 RunState state)
2398 {
2399 if (running) {
2400 memory_global_dirty_log_do_stop();
2401
2402 if (vmstate_change) {
2403 qemu_del_vm_change_state_handler(vmstate_change);
2404 vmstate_change = NULL;
2405 }
2406 }
2407 }
2408
2409 void memory_global_dirty_log_stop(void)
2410 {
2411 if (!runstate_is_running()) {
2412 if (vmstate_change) {
2413 return;
2414 }
2415 vmstate_change = qemu_add_vm_change_state_handler(
2416 memory_vm_change_state_handler, NULL);
2417 return;
2418 }
2419
2420 memory_global_dirty_log_do_stop();
2421 }
2422
2423 static void listener_add_address_space(MemoryListener *listener,
2424 AddressSpace *as)
2425 {
2426 FlatView *view;
2427 FlatRange *fr;
2428
2429 if (listener->begin) {
2430 listener->begin(listener);
2431 }
2432 if (global_dirty_log) {
2433 if (listener->log_global_start) {
2434 listener->log_global_start(listener);
2435 }
2436 }
2437
2438 view = address_space_get_flatview(as);
2439 FOR_EACH_FLAT_RANGE(fr, view) {
2440 MemoryRegionSection section = {
2441 .mr = fr->mr,
2442 .address_space = as,
2443 .offset_within_region = fr->offset_in_region,
2444 .size = fr->addr.size,
2445 .offset_within_address_space = int128_get64(fr->addr.start),
2446 .readonly = fr->readonly,
2447 };
2448 if (fr->dirty_log_mask && listener->log_start) {
2449 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2450 }
2451 if (listener->region_add) {
2452 listener->region_add(listener, &section);
2453 }
2454 }
2455 if (listener->commit) {
2456 listener->commit(listener);
2457 }
2458 flatview_unref(view);
2459 }
2460
2461 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2462 {
2463 MemoryListener *other = NULL;
2464
2465 listener->address_space = as;
2466 if (QTAILQ_EMPTY(&memory_listeners)
2467 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2468 memory_listeners)->priority) {
2469 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2470 } else {
2471 QTAILQ_FOREACH(other, &memory_listeners, link) {
2472 if (listener->priority < other->priority) {
2473 break;
2474 }
2475 }
2476 QTAILQ_INSERT_BEFORE(other, listener, link);
2477 }
2478
2479 if (QTAILQ_EMPTY(&as->listeners)
2480 || listener->priority >= QTAILQ_LAST(&as->listeners,
2481 memory_listeners)->priority) {
2482 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2483 } else {
2484 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2485 if (listener->priority < other->priority) {
2486 break;
2487 }
2488 }
2489 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2490 }
2491
2492 listener_add_address_space(listener, as);
2493 }
2494
2495 void memory_listener_unregister(MemoryListener *listener)
2496 {
2497 if (!listener->address_space) {
2498 return;
2499 }
2500
2501 QTAILQ_REMOVE(&memory_listeners, listener, link);
2502 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2503 listener->address_space = NULL;
2504 }
2505
2506 bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2507 {
2508 void *host;
2509 unsigned size = 0;
2510 unsigned offset = 0;
2511 Object *new_interface;
2512
2513 if (!mr || !mr->ops->request_ptr) {
2514 return false;
2515 }
2516
2517 /*
2518 * Avoid an update if the request_ptr call
2519 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2520 * a cache.
2521 */
2522 memory_region_transaction_begin();
2523
2524 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2525
2526 if (!host || !size) {
2527 memory_region_transaction_commit();
2528 return false;
2529 }
2530
2531 new_interface = object_new("mmio_interface");
2532 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2533 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2534 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2535 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2536 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2537 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2538
2539 memory_region_transaction_commit();
2540 return true;
2541 }
2542
2543 typedef struct MMIOPtrInvalidate {
2544 MemoryRegion *mr;
2545 hwaddr offset;
2546 unsigned size;
2547 int busy;
2548 int allocated;
2549 } MMIOPtrInvalidate;
2550
2551 #define MAX_MMIO_INVALIDATE 10
2552 static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2553
2554 static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2555 run_on_cpu_data data)
2556 {
2557 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2558 MemoryRegion *mr = invalidate_data->mr;
2559 hwaddr offset = invalidate_data->offset;
2560 unsigned size = invalidate_data->size;
2561 MemoryRegionSection section = memory_region_find(mr, offset, size);
2562
2563 qemu_mutex_lock_iothread();
2564
2565 /* Reset dirty so this doesn't happen later. */
2566 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2567
2568 if (section.mr != mr) {
2569 /* memory_region_find add a ref on section.mr */
2570 memory_region_unref(section.mr);
2571 if (MMIO_INTERFACE(section.mr->owner)) {
2572 /* We found the interface just drop it. */
2573 object_property_set_bool(section.mr->owner, false, "realized",
2574 NULL);
2575 object_unref(section.mr->owner);
2576 object_unparent(section.mr->owner);
2577 }
2578 }
2579
2580 qemu_mutex_unlock_iothread();
2581
2582 if (invalidate_data->allocated) {
2583 g_free(invalidate_data);
2584 } else {
2585 invalidate_data->busy = 0;
2586 }
2587 }
2588
2589 void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2590 unsigned size)
2591 {
2592 size_t i;
2593 MMIOPtrInvalidate *invalidate_data = NULL;
2594
2595 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2596 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2597 invalidate_data = &mmio_ptr_invalidate_list[i];
2598 break;
2599 }
2600 }
2601
2602 if (!invalidate_data) {
2603 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2604 invalidate_data->allocated = 1;
2605 }
2606
2607 invalidate_data->mr = mr;
2608 invalidate_data->offset = offset;
2609 invalidate_data->size = size;
2610
2611 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2612 RUN_ON_CPU_HOST_PTR(invalidate_data));
2613 }
2614
2615 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2616 {
2617 memory_region_ref(root);
2618 memory_region_transaction_begin();
2619 as->ref_count = 1;
2620 as->root = root;
2621 as->malloced = false;
2622 as->current_map = g_new(FlatView, 1);
2623 flatview_init(as->current_map);
2624 as->ioeventfd_nb = 0;
2625 as->ioeventfds = NULL;
2626 QTAILQ_INIT(&as->listeners);
2627 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2628 as->name = g_strdup(name ? name : "anonymous");
2629 address_space_init_dispatch(as);
2630 memory_region_update_pending |= root->enabled;
2631 memory_region_transaction_commit();
2632 }
2633
2634 static void do_address_space_destroy(AddressSpace *as)
2635 {
2636 bool do_free = as->malloced;
2637
2638 address_space_destroy_dispatch(as);
2639 assert(QTAILQ_EMPTY(&as->listeners));
2640
2641 flatview_unref(as->current_map);
2642 g_free(as->name);
2643 g_free(as->ioeventfds);
2644 memory_region_unref(as->root);
2645 if (do_free) {
2646 g_free(as);
2647 }
2648 }
2649
2650 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2651 {
2652 AddressSpace *as;
2653
2654 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2655 if (root == as->root && as->malloced) {
2656 as->ref_count++;
2657 return as;
2658 }
2659 }
2660
2661 as = g_malloc0(sizeof *as);
2662 address_space_init(as, root, name);
2663 as->malloced = true;
2664 return as;
2665 }
2666
2667 void address_space_destroy(AddressSpace *as)
2668 {
2669 MemoryRegion *root = as->root;
2670
2671 as->ref_count--;
2672 if (as->ref_count) {
2673 return;
2674 }
2675 /* Flush out anything from MemoryListeners listening in on this */
2676 memory_region_transaction_begin();
2677 as->root = NULL;
2678 memory_region_transaction_commit();
2679 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2680 address_space_unregister(as);
2681
2682 /* At this point, as->dispatch and as->current_map are dummy
2683 * entries that the guest should never use. Wait for the old
2684 * values to expire before freeing the data.
2685 */
2686 as->root = root;
2687 call_rcu(as, do_address_space_destroy, rcu);
2688 }
2689
2690 static const char *memory_region_type(MemoryRegion *mr)
2691 {
2692 if (memory_region_is_ram_device(mr)) {
2693 return "ramd";
2694 } else if (memory_region_is_romd(mr)) {
2695 return "romd";
2696 } else if (memory_region_is_rom(mr)) {
2697 return "rom";
2698 } else if (memory_region_is_ram(mr)) {
2699 return "ram";
2700 } else {
2701 return "i/o";
2702 }
2703 }
2704
2705 typedef struct MemoryRegionList MemoryRegionList;
2706
2707 struct MemoryRegionList {
2708 const MemoryRegion *mr;
2709 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2710 };
2711
2712 typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2713
2714 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2715 int128_sub((size), int128_one())) : 0)
2716 #define MTREE_INDENT " "
2717
2718 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2719 const MemoryRegion *mr, unsigned int level,
2720 hwaddr base,
2721 MemoryRegionListHead *alias_print_queue)
2722 {
2723 MemoryRegionList *new_ml, *ml, *next_ml;
2724 MemoryRegionListHead submr_print_queue;
2725 const MemoryRegion *submr;
2726 unsigned int i;
2727 hwaddr cur_start, cur_end;
2728
2729 if (!mr) {
2730 return;
2731 }
2732
2733 for (i = 0; i < level; i++) {
2734 mon_printf(f, MTREE_INDENT);
2735 }
2736
2737 cur_start = base + mr->addr;
2738 cur_end = cur_start + MR_SIZE(mr->size);
2739
2740 /*
2741 * Try to detect overflow of memory region. This should never
2742 * happen normally. When it happens, we dump something to warn the
2743 * user who is observing this.
2744 */
2745 if (cur_start < base || cur_end < cur_start) {
2746 mon_printf(f, "[DETECTED OVERFLOW!] ");
2747 }
2748
2749 if (mr->alias) {
2750 MemoryRegionList *ml;
2751 bool found = false;
2752
2753 /* check if the alias is already in the queue */
2754 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2755 if (ml->mr == mr->alias) {
2756 found = true;
2757 }
2758 }
2759
2760 if (!found) {
2761 ml = g_new(MemoryRegionList, 1);
2762 ml->mr = mr->alias;
2763 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2764 }
2765 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2766 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2767 "-" TARGET_FMT_plx "%s\n",
2768 cur_start, cur_end,
2769 mr->priority,
2770 memory_region_type((MemoryRegion *)mr),
2771 memory_region_name(mr),
2772 memory_region_name(mr->alias),
2773 mr->alias_offset,
2774 mr->alias_offset + MR_SIZE(mr->size),
2775 mr->enabled ? "" : " [disabled]");
2776 } else {
2777 mon_printf(f,
2778 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2779 cur_start, cur_end,
2780 mr->priority,
2781 memory_region_type((MemoryRegion *)mr),
2782 memory_region_name(mr),
2783 mr->enabled ? "" : " [disabled]");
2784 }
2785
2786 QTAILQ_INIT(&submr_print_queue);
2787
2788 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2789 new_ml = g_new(MemoryRegionList, 1);
2790 new_ml->mr = submr;
2791 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2792 if (new_ml->mr->addr < ml->mr->addr ||
2793 (new_ml->mr->addr == ml->mr->addr &&
2794 new_ml->mr->priority > ml->mr->priority)) {
2795 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2796 new_ml = NULL;
2797 break;
2798 }
2799 }
2800 if (new_ml) {
2801 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2802 }
2803 }
2804
2805 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2806 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2807 alias_print_queue);
2808 }
2809
2810 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2811 g_free(ml);
2812 }
2813 }
2814
2815 static void mtree_print_flatview(fprintf_function p, void *f,
2816 AddressSpace *as)
2817 {
2818 FlatView *view = address_space_get_flatview(as);
2819 FlatRange *range = &view->ranges[0];
2820 MemoryRegion *mr;
2821 int n = view->nr;
2822
2823 if (n <= 0) {
2824 p(f, MTREE_INDENT "No rendered FlatView for "
2825 "address space '%s'\n", as->name);
2826 flatview_unref(view);
2827 return;
2828 }
2829
2830 while (n--) {
2831 mr = range->mr;
2832 if (range->offset_in_region) {
2833 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2834 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2835 int128_get64(range->addr.start),
2836 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2837 mr->priority,
2838 range->readonly ? "rom" : memory_region_type(mr),
2839 memory_region_name(mr),
2840 range->offset_in_region);
2841 } else {
2842 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2843 TARGET_FMT_plx " (prio %d, %s): %s\n",
2844 int128_get64(range->addr.start),
2845 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2846 mr->priority,
2847 range->readonly ? "rom" : memory_region_type(mr),
2848 memory_region_name(mr));
2849 }
2850 range++;
2851 }
2852
2853 flatview_unref(view);
2854 }
2855
2856 void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
2857 {
2858 MemoryRegionListHead ml_head;
2859 MemoryRegionList *ml, *ml2;
2860 AddressSpace *as;
2861
2862 if (flatview) {
2863 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2864 mon_printf(f, "address-space (flat view): %s\n", as->name);
2865 mtree_print_flatview(mon_printf, f, as);
2866 mon_printf(f, "\n");
2867 }
2868 return;
2869 }
2870
2871 QTAILQ_INIT(&ml_head);
2872
2873 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2874 mon_printf(f, "address-space: %s\n", as->name);
2875 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2876 mon_printf(f, "\n");
2877 }
2878
2879 /* print aliased regions */
2880 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
2881 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2882 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2883 mon_printf(f, "\n");
2884 }
2885
2886 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
2887 g_free(ml);
2888 }
2889 }
2890
2891 void memory_region_init_ram(MemoryRegion *mr,
2892 struct Object *owner,
2893 const char *name,
2894 uint64_t size,
2895 Error **errp)
2896 {
2897 DeviceState *owner_dev;
2898 Error *err = NULL;
2899
2900 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
2901 if (err) {
2902 error_propagate(errp, err);
2903 return;
2904 }
2905 /* This will assert if owner is neither NULL nor a DeviceState.
2906 * We only want the owner here for the purposes of defining a
2907 * unique name for migration. TODO: Ideally we should implement
2908 * a naming scheme for Objects which are not DeviceStates, in
2909 * which case we can relax this restriction.
2910 */
2911 owner_dev = DEVICE(owner);
2912 vmstate_register_ram(mr, owner_dev);
2913 }
2914
2915 void memory_region_init_rom(MemoryRegion *mr,
2916 struct Object *owner,
2917 const char *name,
2918 uint64_t size,
2919 Error **errp)
2920 {
2921 DeviceState *owner_dev;
2922 Error *err = NULL;
2923
2924 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
2925 if (err) {
2926 error_propagate(errp, err);
2927 return;
2928 }
2929 /* This will assert if owner is neither NULL nor a DeviceState.
2930 * We only want the owner here for the purposes of defining a
2931 * unique name for migration. TODO: Ideally we should implement
2932 * a naming scheme for Objects which are not DeviceStates, in
2933 * which case we can relax this restriction.
2934 */
2935 owner_dev = DEVICE(owner);
2936 vmstate_register_ram(mr, owner_dev);
2937 }
2938
2939 void memory_region_init_rom_device(MemoryRegion *mr,
2940 struct Object *owner,
2941 const MemoryRegionOps *ops,
2942 void *opaque,
2943 const char *name,
2944 uint64_t size,
2945 Error **errp)
2946 {
2947 DeviceState *owner_dev;
2948 Error *err = NULL;
2949
2950 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
2951 name, size, &err);
2952 if (err) {
2953 error_propagate(errp, err);
2954 return;
2955 }
2956 /* This will assert if owner is neither NULL nor a DeviceState.
2957 * We only want the owner here for the purposes of defining a
2958 * unique name for migration. TODO: Ideally we should implement
2959 * a naming scheme for Objects which are not DeviceStates, in
2960 * which case we can relax this restriction.
2961 */
2962 owner_dev = DEVICE(owner);
2963 vmstate_register_ram(mr, owner_dev);
2964 }
2965
2966 static const TypeInfo memory_region_info = {
2967 .parent = TYPE_OBJECT,
2968 .name = TYPE_MEMORY_REGION,
2969 .instance_size = sizeof(MemoryRegion),
2970 .instance_init = memory_region_initfn,
2971 .instance_finalize = memory_region_finalize,
2972 };
2973
2974 static const TypeInfo iommu_memory_region_info = {
2975 .parent = TYPE_MEMORY_REGION,
2976 .name = TYPE_IOMMU_MEMORY_REGION,
2977 .class_size = sizeof(IOMMUMemoryRegionClass),
2978 .instance_size = sizeof(IOMMUMemoryRegion),
2979 .instance_init = iommu_memory_region_initfn,
2980 .abstract = true,
2981 };
2982
2983 static void memory_register_types(void)
2984 {
2985 type_register_static(&memory_region_info);
2986 type_register_static(&iommu_memory_region_info);
2987 }
2988
2989 type_init(memory_register_types)
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