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Make memory_region_access_valid() take a MemTxAttrs argument
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/misc/mmio_interface.h"
34 #include "hw/qdev-properties.h"
35 #include "migration/vmstate.h"
36
37 //#define DEBUG_UNASSIGNED
38
39 static unsigned memory_region_transaction_depth;
40 static bool memory_region_update_pending;
41 static bool ioeventfd_update_pending;
42 static bool global_dirty_log = false;
43
44 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 static GHashTable *flat_views;
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note that signed integers are needed for negative offsetting in aliases
56 * (large MemoryRegion::alias_offset).
57 */
58 struct AddrRange {
59 Int128 start;
60 Int128 size;
61 };
62
63 static AddrRange addrrange_make(Int128 start, Int128 size)
64 {
65 return (AddrRange) { start, size };
66 }
67
68 static bool addrrange_equal(AddrRange r1, AddrRange r2)
69 {
70 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
71 }
72
73 static Int128 addrrange_end(AddrRange r)
74 {
75 return int128_add(r.start, r.size);
76 }
77
78 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
79 {
80 int128_addto(&range.start, delta);
81 return range;
82 }
83
84 static bool addrrange_contains(AddrRange range, Int128 addr)
85 {
86 return int128_ge(addr, range.start)
87 && int128_lt(addr, addrrange_end(range));
88 }
89
90 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
91 {
92 return addrrange_contains(r1, r2.start)
93 || addrrange_contains(r2, r1.start);
94 }
95
96 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
97 {
98 Int128 start = int128_max(r1.start, r2.start);
99 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
100 return addrrange_make(start, int128_sub(end, start));
101 }
102
103 enum ListenerDirection { Forward, Reverse };
104
105 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
106 do { \
107 MemoryListener *_listener; \
108 \
109 switch (_direction) { \
110 case Forward: \
111 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
112 if (_listener->_callback) { \
113 _listener->_callback(_listener, ##_args); \
114 } \
115 } \
116 break; \
117 case Reverse: \
118 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
119 memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 struct memory_listeners_as *list = &(_as)->listeners; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, list, link_as) { \
138 if (_listener->_callback) { \
139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 case Reverse: \
144 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
145 link_as) { \
146 if (_listener->_callback) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 default: \
152 abort(); \
153 } \
154 } while (0)
155
156 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
157 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
158 do { \
159 MemoryRegionSection mrs = section_from_flat_range(fr, \
160 address_space_to_flatview(as)); \
161 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
162 } while(0)
163
164 struct CoalescedMemoryRange {
165 AddrRange addr;
166 QTAILQ_ENTRY(CoalescedMemoryRange) link;
167 };
168
169 struct MemoryRegionIoeventfd {
170 AddrRange addr;
171 bool match_data;
172 uint64_t data;
173 EventNotifier *e;
174 };
175
176 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
177 MemoryRegionIoeventfd b)
178 {
179 if (int128_lt(a.addr.start, b.addr.start)) {
180 return true;
181 } else if (int128_gt(a.addr.start, b.addr.start)) {
182 return false;
183 } else if (int128_lt(a.addr.size, b.addr.size)) {
184 return true;
185 } else if (int128_gt(a.addr.size, b.addr.size)) {
186 return false;
187 } else if (a.match_data < b.match_data) {
188 return true;
189 } else if (a.match_data > b.match_data) {
190 return false;
191 } else if (a.match_data) {
192 if (a.data < b.data) {
193 return true;
194 } else if (a.data > b.data) {
195 return false;
196 }
197 }
198 if (a.e < b.e) {
199 return true;
200 } else if (a.e > b.e) {
201 return false;
202 }
203 return false;
204 }
205
206 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
207 MemoryRegionIoeventfd b)
208 {
209 return !memory_region_ioeventfd_before(a, b)
210 && !memory_region_ioeventfd_before(b, a);
211 }
212
213 /* Range of memory in the global map. Addresses are absolute. */
214 struct FlatRange {
215 MemoryRegion *mr;
216 hwaddr offset_in_region;
217 AddrRange addr;
218 uint8_t dirty_log_mask;
219 bool romd_mode;
220 bool readonly;
221 };
222
223 typedef struct AddressSpaceOps AddressSpaceOps;
224
225 #define FOR_EACH_FLAT_RANGE(var, view) \
226 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
227
228 static inline MemoryRegionSection
229 section_from_flat_range(FlatRange *fr, FlatView *fv)
230 {
231 return (MemoryRegionSection) {
232 .mr = fr->mr,
233 .fv = fv,
234 .offset_within_region = fr->offset_in_region,
235 .size = fr->addr.size,
236 .offset_within_address_space = int128_get64(fr->addr.start),
237 .readonly = fr->readonly,
238 };
239 }
240
241 static bool flatrange_equal(FlatRange *a, FlatRange *b)
242 {
243 return a->mr == b->mr
244 && addrrange_equal(a->addr, b->addr)
245 && a->offset_in_region == b->offset_in_region
246 && a->romd_mode == b->romd_mode
247 && a->readonly == b->readonly;
248 }
249
250 static FlatView *flatview_new(MemoryRegion *mr_root)
251 {
252 FlatView *view;
253
254 view = g_new0(FlatView, 1);
255 view->ref = 1;
256 view->root = mr_root;
257 memory_region_ref(mr_root);
258 trace_flatview_new(view, mr_root);
259
260 return view;
261 }
262
263 /* Insert a range into a given position. Caller is responsible for maintaining
264 * sorting order.
265 */
266 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
267 {
268 if (view->nr == view->nr_allocated) {
269 view->nr_allocated = MAX(2 * view->nr, 10);
270 view->ranges = g_realloc(view->ranges,
271 view->nr_allocated * sizeof(*view->ranges));
272 }
273 memmove(view->ranges + pos + 1, view->ranges + pos,
274 (view->nr - pos) * sizeof(FlatRange));
275 view->ranges[pos] = *range;
276 memory_region_ref(range->mr);
277 ++view->nr;
278 }
279
280 static void flatview_destroy(FlatView *view)
281 {
282 int i;
283
284 trace_flatview_destroy(view, view->root);
285 if (view->dispatch) {
286 address_space_dispatch_free(view->dispatch);
287 }
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 memory_region_unref(view->root);
293 g_free(view);
294 }
295
296 static bool flatview_ref(FlatView *view)
297 {
298 return atomic_fetch_inc_nonzero(&view->ref) > 0;
299 }
300
301 void flatview_unref(FlatView *view)
302 {
303 if (atomic_fetch_dec(&view->ref) == 1) {
304 trace_flatview_destroy_rcu(view, view->root);
305 assert(view->root);
306 call_rcu(view, flatview_destroy, rcu);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340 }
341
342 static bool memory_region_big_endian(MemoryRegion *mr)
343 {
344 #ifdef TARGET_WORDS_BIGENDIAN
345 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
346 #else
347 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
348 #endif
349 }
350
351 static bool memory_region_wrong_endianness(MemoryRegion *mr)
352 {
353 #ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
355 #else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357 #endif
358 }
359
360 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
361 {
362 if (memory_region_wrong_endianness(mr)) {
363 switch (size) {
364 case 1:
365 break;
366 case 2:
367 *data = bswap16(*data);
368 break;
369 case 4:
370 *data = bswap32(*data);
371 break;
372 case 8:
373 *data = bswap64(*data);
374 break;
375 default:
376 abort();
377 }
378 }
379 }
380
381 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
382 {
383 MemoryRegion *root;
384 hwaddr abs_addr = offset;
385
386 abs_addr += mr->addr;
387 for (root = mr; root->container; ) {
388 root = root->container;
389 abs_addr += root->addr;
390 }
391
392 return abs_addr;
393 }
394
395 static int get_cpu_index(void)
396 {
397 if (current_cpu) {
398 return current_cpu->cpu_index;
399 }
400 return -1;
401 }
402
403 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
404 hwaddr addr,
405 uint64_t *value,
406 unsigned size,
407 unsigned shift,
408 uint64_t mask,
409 MemTxAttrs attrs)
410 {
411 uint64_t tmp;
412
413 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
414 if (mr->subpage) {
415 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
416 } else if (mr == &io_mem_notdirty) {
417 /* Accesses to code which has previously been translated into a TB show
418 * up in the MMIO path, as accesses to the io_mem_notdirty
419 * MemoryRegion. */
420 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
421 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
422 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
423 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
424 }
425 *value |= (tmp & mask) << shift;
426 return MEMTX_OK;
427 }
428
429 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
430 hwaddr addr,
431 uint64_t *value,
432 unsigned size,
433 unsigned shift,
434 uint64_t mask,
435 MemTxAttrs attrs)
436 {
437 uint64_t tmp;
438
439 tmp = mr->ops->read(mr->opaque, addr, size);
440 if (mr->subpage) {
441 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
442 } else if (mr == &io_mem_notdirty) {
443 /* Accesses to code which has previously been translated into a TB show
444 * up in the MMIO path, as accesses to the io_mem_notdirty
445 * MemoryRegion. */
446 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
447 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
448 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
449 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
450 }
451 *value |= (tmp & mask) << shift;
452 return MEMTX_OK;
453 }
454
455 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
456 hwaddr addr,
457 uint64_t *value,
458 unsigned size,
459 unsigned shift,
460 uint64_t mask,
461 MemTxAttrs attrs)
462 {
463 uint64_t tmp = 0;
464 MemTxResult r;
465
466 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
467 if (mr->subpage) {
468 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
469 } else if (mr == &io_mem_notdirty) {
470 /* Accesses to code which has previously been translated into a TB show
471 * up in the MMIO path, as accesses to the io_mem_notdirty
472 * MemoryRegion. */
473 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
474 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
475 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
476 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
477 }
478 *value |= (tmp & mask) << shift;
479 return r;
480 }
481
482 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
483 hwaddr addr,
484 uint64_t *value,
485 unsigned size,
486 unsigned shift,
487 uint64_t mask,
488 MemTxAttrs attrs)
489 {
490 uint64_t tmp;
491
492 tmp = (*value >> shift) & mask;
493 if (mr->subpage) {
494 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
495 } else if (mr == &io_mem_notdirty) {
496 /* Accesses to code which has previously been translated into a TB show
497 * up in the MMIO path, as accesses to the io_mem_notdirty
498 * MemoryRegion. */
499 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
500 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
501 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
502 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
503 }
504 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
505 return MEMTX_OK;
506 }
507
508 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
509 hwaddr addr,
510 uint64_t *value,
511 unsigned size,
512 unsigned shift,
513 uint64_t mask,
514 MemTxAttrs attrs)
515 {
516 uint64_t tmp;
517
518 tmp = (*value >> shift) & mask;
519 if (mr->subpage) {
520 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
521 } else if (mr == &io_mem_notdirty) {
522 /* Accesses to code which has previously been translated into a TB show
523 * up in the MMIO path, as accesses to the io_mem_notdirty
524 * MemoryRegion. */
525 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
526 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
527 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
528 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
529 }
530 mr->ops->write(mr->opaque, addr, tmp, size);
531 return MEMTX_OK;
532 }
533
534 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
535 hwaddr addr,
536 uint64_t *value,
537 unsigned size,
538 unsigned shift,
539 uint64_t mask,
540 MemTxAttrs attrs)
541 {
542 uint64_t tmp;
543
544 tmp = (*value >> shift) & mask;
545 if (mr->subpage) {
546 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
547 } else if (mr == &io_mem_notdirty) {
548 /* Accesses to code which has previously been translated into a TB show
549 * up in the MMIO path, as accesses to the io_mem_notdirty
550 * MemoryRegion. */
551 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
552 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
553 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
554 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
555 }
556 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
557 }
558
559 static MemTxResult access_with_adjusted_size(hwaddr addr,
560 uint64_t *value,
561 unsigned size,
562 unsigned access_size_min,
563 unsigned access_size_max,
564 MemTxResult (*access_fn)
565 (MemoryRegion *mr,
566 hwaddr addr,
567 uint64_t *value,
568 unsigned size,
569 unsigned shift,
570 uint64_t mask,
571 MemTxAttrs attrs),
572 MemoryRegion *mr,
573 MemTxAttrs attrs)
574 {
575 uint64_t access_mask;
576 unsigned access_size;
577 unsigned i;
578 MemTxResult r = MEMTX_OK;
579
580 if (!access_size_min) {
581 access_size_min = 1;
582 }
583 if (!access_size_max) {
584 access_size_max = 4;
585 }
586
587 /* FIXME: support unaligned access? */
588 access_size = MAX(MIN(size, access_size_max), access_size_min);
589 access_mask = -1ULL >> (64 - access_size * 8);
590 if (memory_region_big_endian(mr)) {
591 for (i = 0; i < size; i += access_size) {
592 r |= access_fn(mr, addr + i, value, access_size,
593 (size - access_size - i) * 8, access_mask, attrs);
594 }
595 } else {
596 for (i = 0; i < size; i += access_size) {
597 r |= access_fn(mr, addr + i, value, access_size, i * 8,
598 access_mask, attrs);
599 }
600 }
601 return r;
602 }
603
604 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
605 {
606 AddressSpace *as;
607
608 while (mr->container) {
609 mr = mr->container;
610 }
611 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
612 if (mr == as->root) {
613 return as;
614 }
615 }
616 return NULL;
617 }
618
619 /* Render a memory region into the global view. Ranges in @view obscure
620 * ranges in @mr.
621 */
622 static void render_memory_region(FlatView *view,
623 MemoryRegion *mr,
624 Int128 base,
625 AddrRange clip,
626 bool readonly)
627 {
628 MemoryRegion *subregion;
629 unsigned i;
630 hwaddr offset_in_region;
631 Int128 remain;
632 Int128 now;
633 FlatRange fr;
634 AddrRange tmp;
635
636 if (!mr->enabled) {
637 return;
638 }
639
640 int128_addto(&base, int128_make64(mr->addr));
641 readonly |= mr->readonly;
642
643 tmp = addrrange_make(base, mr->size);
644
645 if (!addrrange_intersects(tmp, clip)) {
646 return;
647 }
648
649 clip = addrrange_intersection(tmp, clip);
650
651 if (mr->alias) {
652 int128_subfrom(&base, int128_make64(mr->alias->addr));
653 int128_subfrom(&base, int128_make64(mr->alias_offset));
654 render_memory_region(view, mr->alias, base, clip, readonly);
655 return;
656 }
657
658 /* Render subregions in priority order. */
659 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
660 render_memory_region(view, subregion, base, clip, readonly);
661 }
662
663 if (!mr->terminates) {
664 return;
665 }
666
667 offset_in_region = int128_get64(int128_sub(clip.start, base));
668 base = clip.start;
669 remain = clip.size;
670
671 fr.mr = mr;
672 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
673 fr.romd_mode = mr->romd_mode;
674 fr.readonly = readonly;
675
676 /* Render the region itself into any gaps left by the current view. */
677 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
678 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
679 continue;
680 }
681 if (int128_lt(base, view->ranges[i].addr.start)) {
682 now = int128_min(remain,
683 int128_sub(view->ranges[i].addr.start, base));
684 fr.offset_in_region = offset_in_region;
685 fr.addr = addrrange_make(base, now);
686 flatview_insert(view, i, &fr);
687 ++i;
688 int128_addto(&base, now);
689 offset_in_region += int128_get64(now);
690 int128_subfrom(&remain, now);
691 }
692 now = int128_sub(int128_min(int128_add(base, remain),
693 addrrange_end(view->ranges[i].addr)),
694 base);
695 int128_addto(&base, now);
696 offset_in_region += int128_get64(now);
697 int128_subfrom(&remain, now);
698 }
699 if (int128_nz(remain)) {
700 fr.offset_in_region = offset_in_region;
701 fr.addr = addrrange_make(base, remain);
702 flatview_insert(view, i, &fr);
703 }
704 }
705
706 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
707 {
708 while (mr->enabled) {
709 if (mr->alias) {
710 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
711 /* The alias is included in its entirety. Use it as
712 * the "real" root, so that we can share more FlatViews.
713 */
714 mr = mr->alias;
715 continue;
716 }
717 } else if (!mr->terminates) {
718 unsigned int found = 0;
719 MemoryRegion *child, *next = NULL;
720 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
721 if (child->enabled) {
722 if (++found > 1) {
723 next = NULL;
724 break;
725 }
726 if (!child->addr && int128_ge(mr->size, child->size)) {
727 /* A child is included in its entirety. If it's the only
728 * enabled one, use it in the hope of finding an alias down the
729 * way. This will also let us share FlatViews.
730 */
731 next = child;
732 }
733 }
734 }
735 if (found == 0) {
736 return NULL;
737 }
738 if (next) {
739 mr = next;
740 continue;
741 }
742 }
743
744 return mr;
745 }
746
747 return NULL;
748 }
749
750 /* Render a memory topology into a list of disjoint absolute ranges. */
751 static FlatView *generate_memory_topology(MemoryRegion *mr)
752 {
753 int i;
754 FlatView *view;
755
756 view = flatview_new(mr);
757
758 if (mr) {
759 render_memory_region(view, mr, int128_zero(),
760 addrrange_make(int128_zero(), int128_2_64()), false);
761 }
762 flatview_simplify(view);
763
764 view->dispatch = address_space_dispatch_new(view);
765 for (i = 0; i < view->nr; i++) {
766 MemoryRegionSection mrs =
767 section_from_flat_range(&view->ranges[i], view);
768 flatview_add_to_dispatch(view, &mrs);
769 }
770 address_space_dispatch_compact(view->dispatch);
771 g_hash_table_replace(flat_views, mr, view);
772
773 return view;
774 }
775
776 static void address_space_add_del_ioeventfds(AddressSpace *as,
777 MemoryRegionIoeventfd *fds_new,
778 unsigned fds_new_nb,
779 MemoryRegionIoeventfd *fds_old,
780 unsigned fds_old_nb)
781 {
782 unsigned iold, inew;
783 MemoryRegionIoeventfd *fd;
784 MemoryRegionSection section;
785
786 /* Generate a symmetric difference of the old and new fd sets, adding
787 * and deleting as necessary.
788 */
789
790 iold = inew = 0;
791 while (iold < fds_old_nb || inew < fds_new_nb) {
792 if (iold < fds_old_nb
793 && (inew == fds_new_nb
794 || memory_region_ioeventfd_before(fds_old[iold],
795 fds_new[inew]))) {
796 fd = &fds_old[iold];
797 section = (MemoryRegionSection) {
798 .fv = address_space_to_flatview(as),
799 .offset_within_address_space = int128_get64(fd->addr.start),
800 .size = fd->addr.size,
801 };
802 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
803 fd->match_data, fd->data, fd->e);
804 ++iold;
805 } else if (inew < fds_new_nb
806 && (iold == fds_old_nb
807 || memory_region_ioeventfd_before(fds_new[inew],
808 fds_old[iold]))) {
809 fd = &fds_new[inew];
810 section = (MemoryRegionSection) {
811 .fv = address_space_to_flatview(as),
812 .offset_within_address_space = int128_get64(fd->addr.start),
813 .size = fd->addr.size,
814 };
815 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
816 fd->match_data, fd->data, fd->e);
817 ++inew;
818 } else {
819 ++iold;
820 ++inew;
821 }
822 }
823 }
824
825 FlatView *address_space_get_flatview(AddressSpace *as)
826 {
827 FlatView *view;
828
829 rcu_read_lock();
830 do {
831 view = address_space_to_flatview(as);
832 /* If somebody has replaced as->current_map concurrently,
833 * flatview_ref returns false.
834 */
835 } while (!flatview_ref(view));
836 rcu_read_unlock();
837 return view;
838 }
839
840 static void address_space_update_ioeventfds(AddressSpace *as)
841 {
842 FlatView *view;
843 FlatRange *fr;
844 unsigned ioeventfd_nb = 0;
845 MemoryRegionIoeventfd *ioeventfds = NULL;
846 AddrRange tmp;
847 unsigned i;
848
849 view = address_space_get_flatview(as);
850 FOR_EACH_FLAT_RANGE(fr, view) {
851 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
852 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
853 int128_sub(fr->addr.start,
854 int128_make64(fr->offset_in_region)));
855 if (addrrange_intersects(fr->addr, tmp)) {
856 ++ioeventfd_nb;
857 ioeventfds = g_realloc(ioeventfds,
858 ioeventfd_nb * sizeof(*ioeventfds));
859 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
860 ioeventfds[ioeventfd_nb-1].addr = tmp;
861 }
862 }
863 }
864
865 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
866 as->ioeventfds, as->ioeventfd_nb);
867
868 g_free(as->ioeventfds);
869 as->ioeventfds = ioeventfds;
870 as->ioeventfd_nb = ioeventfd_nb;
871 flatview_unref(view);
872 }
873
874 static void address_space_update_topology_pass(AddressSpace *as,
875 const FlatView *old_view,
876 const FlatView *new_view,
877 bool adding)
878 {
879 unsigned iold, inew;
880 FlatRange *frold, *frnew;
881
882 /* Generate a symmetric difference of the old and new memory maps.
883 * Kill ranges in the old map, and instantiate ranges in the new map.
884 */
885 iold = inew = 0;
886 while (iold < old_view->nr || inew < new_view->nr) {
887 if (iold < old_view->nr) {
888 frold = &old_view->ranges[iold];
889 } else {
890 frold = NULL;
891 }
892 if (inew < new_view->nr) {
893 frnew = &new_view->ranges[inew];
894 } else {
895 frnew = NULL;
896 }
897
898 if (frold
899 && (!frnew
900 || int128_lt(frold->addr.start, frnew->addr.start)
901 || (int128_eq(frold->addr.start, frnew->addr.start)
902 && !flatrange_equal(frold, frnew)))) {
903 /* In old but not in new, or in both but attributes changed. */
904
905 if (!adding) {
906 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
907 }
908
909 ++iold;
910 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
911 /* In both and unchanged (except logging may have changed) */
912
913 if (adding) {
914 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
915 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
916 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
917 frold->dirty_log_mask,
918 frnew->dirty_log_mask);
919 }
920 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
921 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
922 frold->dirty_log_mask,
923 frnew->dirty_log_mask);
924 }
925 }
926
927 ++iold;
928 ++inew;
929 } else {
930 /* In new */
931
932 if (adding) {
933 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
934 }
935
936 ++inew;
937 }
938 }
939 }
940
941 static void flatviews_init(void)
942 {
943 static FlatView *empty_view;
944
945 if (flat_views) {
946 return;
947 }
948
949 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
950 (GDestroyNotify) flatview_unref);
951 if (!empty_view) {
952 empty_view = generate_memory_topology(NULL);
953 /* We keep it alive forever in the global variable. */
954 flatview_ref(empty_view);
955 } else {
956 g_hash_table_replace(flat_views, NULL, empty_view);
957 flatview_ref(empty_view);
958 }
959 }
960
961 static void flatviews_reset(void)
962 {
963 AddressSpace *as;
964
965 if (flat_views) {
966 g_hash_table_unref(flat_views);
967 flat_views = NULL;
968 }
969 flatviews_init();
970
971 /* Render unique FVs */
972 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
973 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
974
975 if (g_hash_table_lookup(flat_views, physmr)) {
976 continue;
977 }
978
979 generate_memory_topology(physmr);
980 }
981 }
982
983 static void address_space_set_flatview(AddressSpace *as)
984 {
985 FlatView *old_view = address_space_to_flatview(as);
986 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
987 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
988
989 assert(new_view);
990
991 if (old_view == new_view) {
992 return;
993 }
994
995 if (old_view) {
996 flatview_ref(old_view);
997 }
998
999 flatview_ref(new_view);
1000
1001 if (!QTAILQ_EMPTY(&as->listeners)) {
1002 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1003
1004 if (!old_view2) {
1005 old_view2 = &tmpview;
1006 }
1007 address_space_update_topology_pass(as, old_view2, new_view, false);
1008 address_space_update_topology_pass(as, old_view2, new_view, true);
1009 }
1010
1011 /* Writes are protected by the BQL. */
1012 atomic_rcu_set(&as->current_map, new_view);
1013 if (old_view) {
1014 flatview_unref(old_view);
1015 }
1016
1017 /* Note that all the old MemoryRegions are still alive up to this
1018 * point. This relieves most MemoryListeners from the need to
1019 * ref/unref the MemoryRegions they get---unless they use them
1020 * outside the iothread mutex, in which case precise reference
1021 * counting is necessary.
1022 */
1023 if (old_view) {
1024 flatview_unref(old_view);
1025 }
1026 }
1027
1028 static void address_space_update_topology(AddressSpace *as)
1029 {
1030 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1031
1032 flatviews_init();
1033 if (!g_hash_table_lookup(flat_views, physmr)) {
1034 generate_memory_topology(physmr);
1035 }
1036 address_space_set_flatview(as);
1037 }
1038
1039 void memory_region_transaction_begin(void)
1040 {
1041 qemu_flush_coalesced_mmio_buffer();
1042 ++memory_region_transaction_depth;
1043 }
1044
1045 void memory_region_transaction_commit(void)
1046 {
1047 AddressSpace *as;
1048
1049 assert(memory_region_transaction_depth);
1050 assert(qemu_mutex_iothread_locked());
1051
1052 --memory_region_transaction_depth;
1053 if (!memory_region_transaction_depth) {
1054 if (memory_region_update_pending) {
1055 flatviews_reset();
1056
1057 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1058
1059 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1060 address_space_set_flatview(as);
1061 address_space_update_ioeventfds(as);
1062 }
1063 memory_region_update_pending = false;
1064 ioeventfd_update_pending = false;
1065 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1066 } else if (ioeventfd_update_pending) {
1067 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1068 address_space_update_ioeventfds(as);
1069 }
1070 ioeventfd_update_pending = false;
1071 }
1072 }
1073 }
1074
1075 static void memory_region_destructor_none(MemoryRegion *mr)
1076 {
1077 }
1078
1079 static void memory_region_destructor_ram(MemoryRegion *mr)
1080 {
1081 qemu_ram_free(mr->ram_block);
1082 }
1083
1084 static bool memory_region_need_escape(char c)
1085 {
1086 return c == '/' || c == '[' || c == '\\' || c == ']';
1087 }
1088
1089 static char *memory_region_escape_name(const char *name)
1090 {
1091 const char *p;
1092 char *escaped, *q;
1093 uint8_t c;
1094 size_t bytes = 0;
1095
1096 for (p = name; *p; p++) {
1097 bytes += memory_region_need_escape(*p) ? 4 : 1;
1098 }
1099 if (bytes == p - name) {
1100 return g_memdup(name, bytes + 1);
1101 }
1102
1103 escaped = g_malloc(bytes + 1);
1104 for (p = name, q = escaped; *p; p++) {
1105 c = *p;
1106 if (unlikely(memory_region_need_escape(c))) {
1107 *q++ = '\\';
1108 *q++ = 'x';
1109 *q++ = "0123456789abcdef"[c >> 4];
1110 c = "0123456789abcdef"[c & 15];
1111 }
1112 *q++ = c;
1113 }
1114 *q = 0;
1115 return escaped;
1116 }
1117
1118 static void memory_region_do_init(MemoryRegion *mr,
1119 Object *owner,
1120 const char *name,
1121 uint64_t size)
1122 {
1123 mr->size = int128_make64(size);
1124 if (size == UINT64_MAX) {
1125 mr->size = int128_2_64();
1126 }
1127 mr->name = g_strdup(name);
1128 mr->owner = owner;
1129 mr->ram_block = NULL;
1130
1131 if (name) {
1132 char *escaped_name = memory_region_escape_name(name);
1133 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1134
1135 if (!owner) {
1136 owner = container_get(qdev_get_machine(), "/unattached");
1137 }
1138
1139 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1140 object_unref(OBJECT(mr));
1141 g_free(name_array);
1142 g_free(escaped_name);
1143 }
1144 }
1145
1146 void memory_region_init(MemoryRegion *mr,
1147 Object *owner,
1148 const char *name,
1149 uint64_t size)
1150 {
1151 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1152 memory_region_do_init(mr, owner, name, size);
1153 }
1154
1155 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1156 void *opaque, Error **errp)
1157 {
1158 MemoryRegion *mr = MEMORY_REGION(obj);
1159 uint64_t value = mr->addr;
1160
1161 visit_type_uint64(v, name, &value, errp);
1162 }
1163
1164 static void memory_region_get_container(Object *obj, Visitor *v,
1165 const char *name, void *opaque,
1166 Error **errp)
1167 {
1168 MemoryRegion *mr = MEMORY_REGION(obj);
1169 gchar *path = (gchar *)"";
1170
1171 if (mr->container) {
1172 path = object_get_canonical_path(OBJECT(mr->container));
1173 }
1174 visit_type_str(v, name, &path, errp);
1175 if (mr->container) {
1176 g_free(path);
1177 }
1178 }
1179
1180 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1181 const char *part)
1182 {
1183 MemoryRegion *mr = MEMORY_REGION(obj);
1184
1185 return OBJECT(mr->container);
1186 }
1187
1188 static void memory_region_get_priority(Object *obj, Visitor *v,
1189 const char *name, void *opaque,
1190 Error **errp)
1191 {
1192 MemoryRegion *mr = MEMORY_REGION(obj);
1193 int32_t value = mr->priority;
1194
1195 visit_type_int32(v, name, &value, errp);
1196 }
1197
1198 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1199 void *opaque, Error **errp)
1200 {
1201 MemoryRegion *mr = MEMORY_REGION(obj);
1202 uint64_t value = memory_region_size(mr);
1203
1204 visit_type_uint64(v, name, &value, errp);
1205 }
1206
1207 static void memory_region_initfn(Object *obj)
1208 {
1209 MemoryRegion *mr = MEMORY_REGION(obj);
1210 ObjectProperty *op;
1211
1212 mr->ops = &unassigned_mem_ops;
1213 mr->enabled = true;
1214 mr->romd_mode = true;
1215 mr->global_locking = true;
1216 mr->destructor = memory_region_destructor_none;
1217 QTAILQ_INIT(&mr->subregions);
1218 QTAILQ_INIT(&mr->coalesced);
1219
1220 op = object_property_add(OBJECT(mr), "container",
1221 "link<" TYPE_MEMORY_REGION ">",
1222 memory_region_get_container,
1223 NULL, /* memory_region_set_container */
1224 NULL, NULL, &error_abort);
1225 op->resolve = memory_region_resolve_container;
1226
1227 object_property_add(OBJECT(mr), "addr", "uint64",
1228 memory_region_get_addr,
1229 NULL, /* memory_region_set_addr */
1230 NULL, NULL, &error_abort);
1231 object_property_add(OBJECT(mr), "priority", "uint32",
1232 memory_region_get_priority,
1233 NULL, /* memory_region_set_priority */
1234 NULL, NULL, &error_abort);
1235 object_property_add(OBJECT(mr), "size", "uint64",
1236 memory_region_get_size,
1237 NULL, /* memory_region_set_size, */
1238 NULL, NULL, &error_abort);
1239 }
1240
1241 static void iommu_memory_region_initfn(Object *obj)
1242 {
1243 MemoryRegion *mr = MEMORY_REGION(obj);
1244
1245 mr->is_iommu = true;
1246 }
1247
1248 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1249 unsigned size)
1250 {
1251 #ifdef DEBUG_UNASSIGNED
1252 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1253 #endif
1254 if (current_cpu != NULL) {
1255 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1256 }
1257 return 0;
1258 }
1259
1260 static void unassigned_mem_write(void *opaque, hwaddr addr,
1261 uint64_t val, unsigned size)
1262 {
1263 #ifdef DEBUG_UNASSIGNED
1264 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1265 #endif
1266 if (current_cpu != NULL) {
1267 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1268 }
1269 }
1270
1271 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1272 unsigned size, bool is_write)
1273 {
1274 return false;
1275 }
1276
1277 const MemoryRegionOps unassigned_mem_ops = {
1278 .valid.accepts = unassigned_mem_accepts,
1279 .endianness = DEVICE_NATIVE_ENDIAN,
1280 };
1281
1282 static uint64_t memory_region_ram_device_read(void *opaque,
1283 hwaddr addr, unsigned size)
1284 {
1285 MemoryRegion *mr = opaque;
1286 uint64_t data = (uint64_t)~0;
1287
1288 switch (size) {
1289 case 1:
1290 data = *(uint8_t *)(mr->ram_block->host + addr);
1291 break;
1292 case 2:
1293 data = *(uint16_t *)(mr->ram_block->host + addr);
1294 break;
1295 case 4:
1296 data = *(uint32_t *)(mr->ram_block->host + addr);
1297 break;
1298 case 8:
1299 data = *(uint64_t *)(mr->ram_block->host + addr);
1300 break;
1301 }
1302
1303 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1304
1305 return data;
1306 }
1307
1308 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1309 uint64_t data, unsigned size)
1310 {
1311 MemoryRegion *mr = opaque;
1312
1313 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1314
1315 switch (size) {
1316 case 1:
1317 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1318 break;
1319 case 2:
1320 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1321 break;
1322 case 4:
1323 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1324 break;
1325 case 8:
1326 *(uint64_t *)(mr->ram_block->host + addr) = data;
1327 break;
1328 }
1329 }
1330
1331 static const MemoryRegionOps ram_device_mem_ops = {
1332 .read = memory_region_ram_device_read,
1333 .write = memory_region_ram_device_write,
1334 .endianness = DEVICE_HOST_ENDIAN,
1335 .valid = {
1336 .min_access_size = 1,
1337 .max_access_size = 8,
1338 .unaligned = true,
1339 },
1340 .impl = {
1341 .min_access_size = 1,
1342 .max_access_size = 8,
1343 .unaligned = true,
1344 },
1345 };
1346
1347 bool memory_region_access_valid(MemoryRegion *mr,
1348 hwaddr addr,
1349 unsigned size,
1350 bool is_write,
1351 MemTxAttrs attrs)
1352 {
1353 int access_size_min, access_size_max;
1354 int access_size, i;
1355
1356 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1357 return false;
1358 }
1359
1360 if (!mr->ops->valid.accepts) {
1361 return true;
1362 }
1363
1364 access_size_min = mr->ops->valid.min_access_size;
1365 if (!mr->ops->valid.min_access_size) {
1366 access_size_min = 1;
1367 }
1368
1369 access_size_max = mr->ops->valid.max_access_size;
1370 if (!mr->ops->valid.max_access_size) {
1371 access_size_max = 4;
1372 }
1373
1374 access_size = MAX(MIN(size, access_size_max), access_size_min);
1375 for (i = 0; i < size; i += access_size) {
1376 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1377 is_write)) {
1378 return false;
1379 }
1380 }
1381
1382 return true;
1383 }
1384
1385 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1386 hwaddr addr,
1387 uint64_t *pval,
1388 unsigned size,
1389 MemTxAttrs attrs)
1390 {
1391 *pval = 0;
1392
1393 if (mr->ops->read) {
1394 return access_with_adjusted_size(addr, pval, size,
1395 mr->ops->impl.min_access_size,
1396 mr->ops->impl.max_access_size,
1397 memory_region_read_accessor,
1398 mr, attrs);
1399 } else if (mr->ops->read_with_attrs) {
1400 return access_with_adjusted_size(addr, pval, size,
1401 mr->ops->impl.min_access_size,
1402 mr->ops->impl.max_access_size,
1403 memory_region_read_with_attrs_accessor,
1404 mr, attrs);
1405 } else {
1406 return access_with_adjusted_size(addr, pval, size, 1, 4,
1407 memory_region_oldmmio_read_accessor,
1408 mr, attrs);
1409 }
1410 }
1411
1412 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1413 hwaddr addr,
1414 uint64_t *pval,
1415 unsigned size,
1416 MemTxAttrs attrs)
1417 {
1418 MemTxResult r;
1419
1420 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1421 *pval = unassigned_mem_read(mr, addr, size);
1422 return MEMTX_DECODE_ERROR;
1423 }
1424
1425 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1426 adjust_endianness(mr, pval, size);
1427 return r;
1428 }
1429
1430 /* Return true if an eventfd was signalled */
1431 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1432 hwaddr addr,
1433 uint64_t data,
1434 unsigned size,
1435 MemTxAttrs attrs)
1436 {
1437 MemoryRegionIoeventfd ioeventfd = {
1438 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1439 .data = data,
1440 };
1441 unsigned i;
1442
1443 for (i = 0; i < mr->ioeventfd_nb; i++) {
1444 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1445 ioeventfd.e = mr->ioeventfds[i].e;
1446
1447 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1448 event_notifier_set(ioeventfd.e);
1449 return true;
1450 }
1451 }
1452
1453 return false;
1454 }
1455
1456 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1457 hwaddr addr,
1458 uint64_t data,
1459 unsigned size,
1460 MemTxAttrs attrs)
1461 {
1462 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1463 unassigned_mem_write(mr, addr, data, size);
1464 return MEMTX_DECODE_ERROR;
1465 }
1466
1467 adjust_endianness(mr, &data, size);
1468
1469 if ((!kvm_eventfds_enabled()) &&
1470 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1471 return MEMTX_OK;
1472 }
1473
1474 if (mr->ops->write) {
1475 return access_with_adjusted_size(addr, &data, size,
1476 mr->ops->impl.min_access_size,
1477 mr->ops->impl.max_access_size,
1478 memory_region_write_accessor, mr,
1479 attrs);
1480 } else if (mr->ops->write_with_attrs) {
1481 return
1482 access_with_adjusted_size(addr, &data, size,
1483 mr->ops->impl.min_access_size,
1484 mr->ops->impl.max_access_size,
1485 memory_region_write_with_attrs_accessor,
1486 mr, attrs);
1487 } else {
1488 return access_with_adjusted_size(addr, &data, size, 1, 4,
1489 memory_region_oldmmio_write_accessor,
1490 mr, attrs);
1491 }
1492 }
1493
1494 void memory_region_init_io(MemoryRegion *mr,
1495 Object *owner,
1496 const MemoryRegionOps *ops,
1497 void *opaque,
1498 const char *name,
1499 uint64_t size)
1500 {
1501 memory_region_init(mr, owner, name, size);
1502 mr->ops = ops ? ops : &unassigned_mem_ops;
1503 mr->opaque = opaque;
1504 mr->terminates = true;
1505 }
1506
1507 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1508 Object *owner,
1509 const char *name,
1510 uint64_t size,
1511 Error **errp)
1512 {
1513 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1514 }
1515
1516 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1517 Object *owner,
1518 const char *name,
1519 uint64_t size,
1520 bool share,
1521 Error **errp)
1522 {
1523 memory_region_init(mr, owner, name, size);
1524 mr->ram = true;
1525 mr->terminates = true;
1526 mr->destructor = memory_region_destructor_ram;
1527 mr->ram_block = qemu_ram_alloc(size, share, mr, errp);
1528 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1529 }
1530
1531 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1532 Object *owner,
1533 const char *name,
1534 uint64_t size,
1535 uint64_t max_size,
1536 void (*resized)(const char*,
1537 uint64_t length,
1538 void *host),
1539 Error **errp)
1540 {
1541 memory_region_init(mr, owner, name, size);
1542 mr->ram = true;
1543 mr->terminates = true;
1544 mr->destructor = memory_region_destructor_ram;
1545 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1546 mr, errp);
1547 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1548 }
1549
1550 #ifdef __linux__
1551 void memory_region_init_ram_from_file(MemoryRegion *mr,
1552 struct Object *owner,
1553 const char *name,
1554 uint64_t size,
1555 uint64_t align,
1556 bool share,
1557 const char *path,
1558 Error **errp)
1559 {
1560 memory_region_init(mr, owner, name, size);
1561 mr->ram = true;
1562 mr->terminates = true;
1563 mr->destructor = memory_region_destructor_ram;
1564 mr->align = align;
1565 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1566 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1567 }
1568
1569 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1570 struct Object *owner,
1571 const char *name,
1572 uint64_t size,
1573 bool share,
1574 int fd,
1575 Error **errp)
1576 {
1577 memory_region_init(mr, owner, name, size);
1578 mr->ram = true;
1579 mr->terminates = true;
1580 mr->destructor = memory_region_destructor_ram;
1581 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1582 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1583 }
1584 #endif
1585
1586 void memory_region_init_ram_ptr(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 void *ptr)
1591 {
1592 memory_region_init(mr, owner, name, size);
1593 mr->ram = true;
1594 mr->terminates = true;
1595 mr->destructor = memory_region_destructor_ram;
1596 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1597
1598 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1599 assert(ptr != NULL);
1600 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1601 }
1602
1603 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1604 Object *owner,
1605 const char *name,
1606 uint64_t size,
1607 void *ptr)
1608 {
1609 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1610 mr->ram_device = true;
1611 mr->ops = &ram_device_mem_ops;
1612 mr->opaque = mr;
1613 }
1614
1615 void memory_region_init_alias(MemoryRegion *mr,
1616 Object *owner,
1617 const char *name,
1618 MemoryRegion *orig,
1619 hwaddr offset,
1620 uint64_t size)
1621 {
1622 memory_region_init(mr, owner, name, size);
1623 mr->alias = orig;
1624 mr->alias_offset = offset;
1625 }
1626
1627 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1628 struct Object *owner,
1629 const char *name,
1630 uint64_t size,
1631 Error **errp)
1632 {
1633 memory_region_init(mr, owner, name, size);
1634 mr->ram = true;
1635 mr->readonly = true;
1636 mr->terminates = true;
1637 mr->destructor = memory_region_destructor_ram;
1638 mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
1639 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1640 }
1641
1642 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1643 Object *owner,
1644 const MemoryRegionOps *ops,
1645 void *opaque,
1646 const char *name,
1647 uint64_t size,
1648 Error **errp)
1649 {
1650 assert(ops);
1651 memory_region_init(mr, owner, name, size);
1652 mr->ops = ops;
1653 mr->opaque = opaque;
1654 mr->terminates = true;
1655 mr->rom_device = true;
1656 mr->destructor = memory_region_destructor_ram;
1657 mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
1658 }
1659
1660 void memory_region_init_iommu(void *_iommu_mr,
1661 size_t instance_size,
1662 const char *mrtypename,
1663 Object *owner,
1664 const char *name,
1665 uint64_t size)
1666 {
1667 struct IOMMUMemoryRegion *iommu_mr;
1668 struct MemoryRegion *mr;
1669
1670 object_initialize(_iommu_mr, instance_size, mrtypename);
1671 mr = MEMORY_REGION(_iommu_mr);
1672 memory_region_do_init(mr, owner, name, size);
1673 iommu_mr = IOMMU_MEMORY_REGION(mr);
1674 mr->terminates = true; /* then re-forwards */
1675 QLIST_INIT(&iommu_mr->iommu_notify);
1676 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1677 }
1678
1679 static void memory_region_finalize(Object *obj)
1680 {
1681 MemoryRegion *mr = MEMORY_REGION(obj);
1682
1683 assert(!mr->container);
1684
1685 /* We know the region is not visible in any address space (it
1686 * does not have a container and cannot be a root either because
1687 * it has no references, so we can blindly clear mr->enabled.
1688 * memory_region_set_enabled instead could trigger a transaction
1689 * and cause an infinite loop.
1690 */
1691 mr->enabled = false;
1692 memory_region_transaction_begin();
1693 while (!QTAILQ_EMPTY(&mr->subregions)) {
1694 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1695 memory_region_del_subregion(mr, subregion);
1696 }
1697 memory_region_transaction_commit();
1698
1699 mr->destructor(mr);
1700 memory_region_clear_coalescing(mr);
1701 g_free((char *)mr->name);
1702 g_free(mr->ioeventfds);
1703 }
1704
1705 Object *memory_region_owner(MemoryRegion *mr)
1706 {
1707 Object *obj = OBJECT(mr);
1708 return obj->parent;
1709 }
1710
1711 void memory_region_ref(MemoryRegion *mr)
1712 {
1713 /* MMIO callbacks most likely will access data that belongs
1714 * to the owner, hence the need to ref/unref the owner whenever
1715 * the memory region is in use.
1716 *
1717 * The memory region is a child of its owner. As long as the
1718 * owner doesn't call unparent itself on the memory region,
1719 * ref-ing the owner will also keep the memory region alive.
1720 * Memory regions without an owner are supposed to never go away;
1721 * we do not ref/unref them because it slows down DMA sensibly.
1722 */
1723 if (mr && mr->owner) {
1724 object_ref(mr->owner);
1725 }
1726 }
1727
1728 void memory_region_unref(MemoryRegion *mr)
1729 {
1730 if (mr && mr->owner) {
1731 object_unref(mr->owner);
1732 }
1733 }
1734
1735 uint64_t memory_region_size(MemoryRegion *mr)
1736 {
1737 if (int128_eq(mr->size, int128_2_64())) {
1738 return UINT64_MAX;
1739 }
1740 return int128_get64(mr->size);
1741 }
1742
1743 const char *memory_region_name(const MemoryRegion *mr)
1744 {
1745 if (!mr->name) {
1746 ((MemoryRegion *)mr)->name =
1747 object_get_canonical_path_component(OBJECT(mr));
1748 }
1749 return mr->name;
1750 }
1751
1752 bool memory_region_is_ram_device(MemoryRegion *mr)
1753 {
1754 return mr->ram_device;
1755 }
1756
1757 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1758 {
1759 uint8_t mask = mr->dirty_log_mask;
1760 if (global_dirty_log && mr->ram_block) {
1761 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1762 }
1763 return mask;
1764 }
1765
1766 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1767 {
1768 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1769 }
1770
1771 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1772 {
1773 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1774 IOMMUNotifier *iommu_notifier;
1775 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1776
1777 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1778 flags |= iommu_notifier->notifier_flags;
1779 }
1780
1781 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1782 imrc->notify_flag_changed(iommu_mr,
1783 iommu_mr->iommu_notify_flags,
1784 flags);
1785 }
1786
1787 iommu_mr->iommu_notify_flags = flags;
1788 }
1789
1790 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1791 IOMMUNotifier *n)
1792 {
1793 IOMMUMemoryRegion *iommu_mr;
1794
1795 if (mr->alias) {
1796 memory_region_register_iommu_notifier(mr->alias, n);
1797 return;
1798 }
1799
1800 /* We need to register for at least one bitfield */
1801 iommu_mr = IOMMU_MEMORY_REGION(mr);
1802 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1803 assert(n->start <= n->end);
1804 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1805 memory_region_update_iommu_notify_flags(iommu_mr);
1806 }
1807
1808 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1809 {
1810 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1811
1812 if (imrc->get_min_page_size) {
1813 return imrc->get_min_page_size(iommu_mr);
1814 }
1815 return TARGET_PAGE_SIZE;
1816 }
1817
1818 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1819 {
1820 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1821 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1822 hwaddr addr, granularity;
1823 IOMMUTLBEntry iotlb;
1824
1825 /* If the IOMMU has its own replay callback, override */
1826 if (imrc->replay) {
1827 imrc->replay(iommu_mr, n);
1828 return;
1829 }
1830
1831 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1832
1833 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1834 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1835 if (iotlb.perm != IOMMU_NONE) {
1836 n->notify(n, &iotlb);
1837 }
1838
1839 /* if (2^64 - MR size) < granularity, it's possible to get an
1840 * infinite loop here. This should catch such a wraparound */
1841 if ((addr + granularity) < addr) {
1842 break;
1843 }
1844 }
1845 }
1846
1847 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1848 {
1849 IOMMUNotifier *notifier;
1850
1851 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1852 memory_region_iommu_replay(iommu_mr, notifier);
1853 }
1854 }
1855
1856 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1857 IOMMUNotifier *n)
1858 {
1859 IOMMUMemoryRegion *iommu_mr;
1860
1861 if (mr->alias) {
1862 memory_region_unregister_iommu_notifier(mr->alias, n);
1863 return;
1864 }
1865 QLIST_REMOVE(n, node);
1866 iommu_mr = IOMMU_MEMORY_REGION(mr);
1867 memory_region_update_iommu_notify_flags(iommu_mr);
1868 }
1869
1870 void memory_region_notify_one(IOMMUNotifier *notifier,
1871 IOMMUTLBEntry *entry)
1872 {
1873 IOMMUNotifierFlag request_flags;
1874
1875 /*
1876 * Skip the notification if the notification does not overlap
1877 * with registered range.
1878 */
1879 if (notifier->start > entry->iova + entry->addr_mask ||
1880 notifier->end < entry->iova) {
1881 return;
1882 }
1883
1884 if (entry->perm & IOMMU_RW) {
1885 request_flags = IOMMU_NOTIFIER_MAP;
1886 } else {
1887 request_flags = IOMMU_NOTIFIER_UNMAP;
1888 }
1889
1890 if (notifier->notifier_flags & request_flags) {
1891 notifier->notify(notifier, entry);
1892 }
1893 }
1894
1895 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1896 IOMMUTLBEntry entry)
1897 {
1898 IOMMUNotifier *iommu_notifier;
1899
1900 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1901
1902 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1903 memory_region_notify_one(iommu_notifier, &entry);
1904 }
1905 }
1906
1907 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1908 enum IOMMUMemoryRegionAttr attr,
1909 void *data)
1910 {
1911 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1912
1913 if (!imrc->get_attr) {
1914 return -EINVAL;
1915 }
1916
1917 return imrc->get_attr(iommu_mr, attr, data);
1918 }
1919
1920 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1921 {
1922 uint8_t mask = 1 << client;
1923 uint8_t old_logging;
1924
1925 assert(client == DIRTY_MEMORY_VGA);
1926 old_logging = mr->vga_logging_count;
1927 mr->vga_logging_count += log ? 1 : -1;
1928 if (!!old_logging == !!mr->vga_logging_count) {
1929 return;
1930 }
1931
1932 memory_region_transaction_begin();
1933 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1934 memory_region_update_pending |= mr->enabled;
1935 memory_region_transaction_commit();
1936 }
1937
1938 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1939 hwaddr size, unsigned client)
1940 {
1941 assert(mr->ram_block);
1942 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1943 size, client);
1944 }
1945
1946 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1947 hwaddr size)
1948 {
1949 assert(mr->ram_block);
1950 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1951 size,
1952 memory_region_get_dirty_log_mask(mr));
1953 }
1954
1955 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1956 {
1957 MemoryListener *listener;
1958 AddressSpace *as;
1959 FlatView *view;
1960 FlatRange *fr;
1961
1962 /* If the same address space has multiple log_sync listeners, we
1963 * visit that address space's FlatView multiple times. But because
1964 * log_sync listeners are rare, it's still cheaper than walking each
1965 * address space once.
1966 */
1967 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1968 if (!listener->log_sync) {
1969 continue;
1970 }
1971 as = listener->address_space;
1972 view = address_space_get_flatview(as);
1973 FOR_EACH_FLAT_RANGE(fr, view) {
1974 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
1975 MemoryRegionSection mrs = section_from_flat_range(fr, view);
1976 listener->log_sync(listener, &mrs);
1977 }
1978 }
1979 flatview_unref(view);
1980 }
1981 }
1982
1983 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1984 hwaddr addr,
1985 hwaddr size,
1986 unsigned client)
1987 {
1988 assert(mr->ram_block);
1989 memory_region_sync_dirty_bitmap(mr);
1990 return cpu_physical_memory_snapshot_and_clear_dirty(
1991 memory_region_get_ram_addr(mr) + addr, size, client);
1992 }
1993
1994 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1995 hwaddr addr, hwaddr size)
1996 {
1997 assert(mr->ram_block);
1998 return cpu_physical_memory_snapshot_get_dirty(snap,
1999 memory_region_get_ram_addr(mr) + addr, size);
2000 }
2001
2002 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2003 {
2004 if (mr->readonly != readonly) {
2005 memory_region_transaction_begin();
2006 mr->readonly = readonly;
2007 memory_region_update_pending |= mr->enabled;
2008 memory_region_transaction_commit();
2009 }
2010 }
2011
2012 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2013 {
2014 if (mr->romd_mode != romd_mode) {
2015 memory_region_transaction_begin();
2016 mr->romd_mode = romd_mode;
2017 memory_region_update_pending |= mr->enabled;
2018 memory_region_transaction_commit();
2019 }
2020 }
2021
2022 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2023 hwaddr size, unsigned client)
2024 {
2025 assert(mr->ram_block);
2026 cpu_physical_memory_test_and_clear_dirty(
2027 memory_region_get_ram_addr(mr) + addr, size, client);
2028 }
2029
2030 int memory_region_get_fd(MemoryRegion *mr)
2031 {
2032 int fd;
2033
2034 rcu_read_lock();
2035 while (mr->alias) {
2036 mr = mr->alias;
2037 }
2038 fd = mr->ram_block->fd;
2039 rcu_read_unlock();
2040
2041 return fd;
2042 }
2043
2044 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2045 {
2046 void *ptr;
2047 uint64_t offset = 0;
2048
2049 rcu_read_lock();
2050 while (mr->alias) {
2051 offset += mr->alias_offset;
2052 mr = mr->alias;
2053 }
2054 assert(mr->ram_block);
2055 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2056 rcu_read_unlock();
2057
2058 return ptr;
2059 }
2060
2061 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2062 {
2063 RAMBlock *block;
2064
2065 block = qemu_ram_block_from_host(ptr, false, offset);
2066 if (!block) {
2067 return NULL;
2068 }
2069
2070 return block->mr;
2071 }
2072
2073 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2074 {
2075 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2076 }
2077
2078 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2079 {
2080 assert(mr->ram_block);
2081
2082 qemu_ram_resize(mr->ram_block, newsize, errp);
2083 }
2084
2085 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
2086 {
2087 FlatView *view;
2088 FlatRange *fr;
2089 CoalescedMemoryRange *cmr;
2090 AddrRange tmp;
2091 MemoryRegionSection section;
2092
2093 view = address_space_get_flatview(as);
2094 FOR_EACH_FLAT_RANGE(fr, view) {
2095 if (fr->mr == mr) {
2096 section = (MemoryRegionSection) {
2097 .fv = view,
2098 .offset_within_address_space = int128_get64(fr->addr.start),
2099 .size = fr->addr.size,
2100 };
2101
2102 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2103 int128_get64(fr->addr.start),
2104 int128_get64(fr->addr.size));
2105 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2106 tmp = addrrange_shift(cmr->addr,
2107 int128_sub(fr->addr.start,
2108 int128_make64(fr->offset_in_region)));
2109 if (!addrrange_intersects(tmp, fr->addr)) {
2110 continue;
2111 }
2112 tmp = addrrange_intersection(tmp, fr->addr);
2113 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2114 int128_get64(tmp.start),
2115 int128_get64(tmp.size));
2116 }
2117 }
2118 }
2119 flatview_unref(view);
2120 }
2121
2122 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2123 {
2124 AddressSpace *as;
2125
2126 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2127 memory_region_update_coalesced_range_as(mr, as);
2128 }
2129 }
2130
2131 void memory_region_set_coalescing(MemoryRegion *mr)
2132 {
2133 memory_region_clear_coalescing(mr);
2134 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2135 }
2136
2137 void memory_region_add_coalescing(MemoryRegion *mr,
2138 hwaddr offset,
2139 uint64_t size)
2140 {
2141 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2142
2143 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2144 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2145 memory_region_update_coalesced_range(mr);
2146 memory_region_set_flush_coalesced(mr);
2147 }
2148
2149 void memory_region_clear_coalescing(MemoryRegion *mr)
2150 {
2151 CoalescedMemoryRange *cmr;
2152 bool updated = false;
2153
2154 qemu_flush_coalesced_mmio_buffer();
2155 mr->flush_coalesced_mmio = false;
2156
2157 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2158 cmr = QTAILQ_FIRST(&mr->coalesced);
2159 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2160 g_free(cmr);
2161 updated = true;
2162 }
2163
2164 if (updated) {
2165 memory_region_update_coalesced_range(mr);
2166 }
2167 }
2168
2169 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2170 {
2171 mr->flush_coalesced_mmio = true;
2172 }
2173
2174 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2175 {
2176 qemu_flush_coalesced_mmio_buffer();
2177 if (QTAILQ_EMPTY(&mr->coalesced)) {
2178 mr->flush_coalesced_mmio = false;
2179 }
2180 }
2181
2182 void memory_region_clear_global_locking(MemoryRegion *mr)
2183 {
2184 mr->global_locking = false;
2185 }
2186
2187 static bool userspace_eventfd_warning;
2188
2189 void memory_region_add_eventfd(MemoryRegion *mr,
2190 hwaddr addr,
2191 unsigned size,
2192 bool match_data,
2193 uint64_t data,
2194 EventNotifier *e)
2195 {
2196 MemoryRegionIoeventfd mrfd = {
2197 .addr.start = int128_make64(addr),
2198 .addr.size = int128_make64(size),
2199 .match_data = match_data,
2200 .data = data,
2201 .e = e,
2202 };
2203 unsigned i;
2204
2205 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2206 userspace_eventfd_warning))) {
2207 userspace_eventfd_warning = true;
2208 error_report("Using eventfd without MMIO binding in KVM. "
2209 "Suboptimal performance expected");
2210 }
2211
2212 if (size) {
2213 adjust_endianness(mr, &mrfd.data, size);
2214 }
2215 memory_region_transaction_begin();
2216 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2217 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2218 break;
2219 }
2220 }
2221 ++mr->ioeventfd_nb;
2222 mr->ioeventfds = g_realloc(mr->ioeventfds,
2223 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2224 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2225 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2226 mr->ioeventfds[i] = mrfd;
2227 ioeventfd_update_pending |= mr->enabled;
2228 memory_region_transaction_commit();
2229 }
2230
2231 void memory_region_del_eventfd(MemoryRegion *mr,
2232 hwaddr addr,
2233 unsigned size,
2234 bool match_data,
2235 uint64_t data,
2236 EventNotifier *e)
2237 {
2238 MemoryRegionIoeventfd mrfd = {
2239 .addr.start = int128_make64(addr),
2240 .addr.size = int128_make64(size),
2241 .match_data = match_data,
2242 .data = data,
2243 .e = e,
2244 };
2245 unsigned i;
2246
2247 if (size) {
2248 adjust_endianness(mr, &mrfd.data, size);
2249 }
2250 memory_region_transaction_begin();
2251 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2252 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2253 break;
2254 }
2255 }
2256 assert(i != mr->ioeventfd_nb);
2257 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2258 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2259 --mr->ioeventfd_nb;
2260 mr->ioeventfds = g_realloc(mr->ioeventfds,
2261 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2262 ioeventfd_update_pending |= mr->enabled;
2263 memory_region_transaction_commit();
2264 }
2265
2266 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2267 {
2268 MemoryRegion *mr = subregion->container;
2269 MemoryRegion *other;
2270
2271 memory_region_transaction_begin();
2272
2273 memory_region_ref(subregion);
2274 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2275 if (subregion->priority >= other->priority) {
2276 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2277 goto done;
2278 }
2279 }
2280 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2281 done:
2282 memory_region_update_pending |= mr->enabled && subregion->enabled;
2283 memory_region_transaction_commit();
2284 }
2285
2286 static void memory_region_add_subregion_common(MemoryRegion *mr,
2287 hwaddr offset,
2288 MemoryRegion *subregion)
2289 {
2290 assert(!subregion->container);
2291 subregion->container = mr;
2292 subregion->addr = offset;
2293 memory_region_update_container_subregions(subregion);
2294 }
2295
2296 void memory_region_add_subregion(MemoryRegion *mr,
2297 hwaddr offset,
2298 MemoryRegion *subregion)
2299 {
2300 subregion->priority = 0;
2301 memory_region_add_subregion_common(mr, offset, subregion);
2302 }
2303
2304 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2305 hwaddr offset,
2306 MemoryRegion *subregion,
2307 int priority)
2308 {
2309 subregion->priority = priority;
2310 memory_region_add_subregion_common(mr, offset, subregion);
2311 }
2312
2313 void memory_region_del_subregion(MemoryRegion *mr,
2314 MemoryRegion *subregion)
2315 {
2316 memory_region_transaction_begin();
2317 assert(subregion->container == mr);
2318 subregion->container = NULL;
2319 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2320 memory_region_unref(subregion);
2321 memory_region_update_pending |= mr->enabled && subregion->enabled;
2322 memory_region_transaction_commit();
2323 }
2324
2325 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2326 {
2327 if (enabled == mr->enabled) {
2328 return;
2329 }
2330 memory_region_transaction_begin();
2331 mr->enabled = enabled;
2332 memory_region_update_pending = true;
2333 memory_region_transaction_commit();
2334 }
2335
2336 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2337 {
2338 Int128 s = int128_make64(size);
2339
2340 if (size == UINT64_MAX) {
2341 s = int128_2_64();
2342 }
2343 if (int128_eq(s, mr->size)) {
2344 return;
2345 }
2346 memory_region_transaction_begin();
2347 mr->size = s;
2348 memory_region_update_pending = true;
2349 memory_region_transaction_commit();
2350 }
2351
2352 static void memory_region_readd_subregion(MemoryRegion *mr)
2353 {
2354 MemoryRegion *container = mr->container;
2355
2356 if (container) {
2357 memory_region_transaction_begin();
2358 memory_region_ref(mr);
2359 memory_region_del_subregion(container, mr);
2360 mr->container = container;
2361 memory_region_update_container_subregions(mr);
2362 memory_region_unref(mr);
2363 memory_region_transaction_commit();
2364 }
2365 }
2366
2367 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2368 {
2369 if (addr != mr->addr) {
2370 mr->addr = addr;
2371 memory_region_readd_subregion(mr);
2372 }
2373 }
2374
2375 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2376 {
2377 assert(mr->alias);
2378
2379 if (offset == mr->alias_offset) {
2380 return;
2381 }
2382
2383 memory_region_transaction_begin();
2384 mr->alias_offset = offset;
2385 memory_region_update_pending |= mr->enabled;
2386 memory_region_transaction_commit();
2387 }
2388
2389 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2390 {
2391 return mr->align;
2392 }
2393
2394 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2395 {
2396 const AddrRange *addr = addr_;
2397 const FlatRange *fr = fr_;
2398
2399 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2400 return -1;
2401 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2402 return 1;
2403 }
2404 return 0;
2405 }
2406
2407 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2408 {
2409 return bsearch(&addr, view->ranges, view->nr,
2410 sizeof(FlatRange), cmp_flatrange_addr);
2411 }
2412
2413 bool memory_region_is_mapped(MemoryRegion *mr)
2414 {
2415 return mr->container ? true : false;
2416 }
2417
2418 /* Same as memory_region_find, but it does not add a reference to the
2419 * returned region. It must be called from an RCU critical section.
2420 */
2421 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2422 hwaddr addr, uint64_t size)
2423 {
2424 MemoryRegionSection ret = { .mr = NULL };
2425 MemoryRegion *root;
2426 AddressSpace *as;
2427 AddrRange range;
2428 FlatView *view;
2429 FlatRange *fr;
2430
2431 addr += mr->addr;
2432 for (root = mr; root->container; ) {
2433 root = root->container;
2434 addr += root->addr;
2435 }
2436
2437 as = memory_region_to_address_space(root);
2438 if (!as) {
2439 return ret;
2440 }
2441 range = addrrange_make(int128_make64(addr), int128_make64(size));
2442
2443 view = address_space_to_flatview(as);
2444 fr = flatview_lookup(view, range);
2445 if (!fr) {
2446 return ret;
2447 }
2448
2449 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2450 --fr;
2451 }
2452
2453 ret.mr = fr->mr;
2454 ret.fv = view;
2455 range = addrrange_intersection(range, fr->addr);
2456 ret.offset_within_region = fr->offset_in_region;
2457 ret.offset_within_region += int128_get64(int128_sub(range.start,
2458 fr->addr.start));
2459 ret.size = range.size;
2460 ret.offset_within_address_space = int128_get64(range.start);
2461 ret.readonly = fr->readonly;
2462 return ret;
2463 }
2464
2465 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2466 hwaddr addr, uint64_t size)
2467 {
2468 MemoryRegionSection ret;
2469 rcu_read_lock();
2470 ret = memory_region_find_rcu(mr, addr, size);
2471 if (ret.mr) {
2472 memory_region_ref(ret.mr);
2473 }
2474 rcu_read_unlock();
2475 return ret;
2476 }
2477
2478 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2479 {
2480 MemoryRegion *mr;
2481
2482 rcu_read_lock();
2483 mr = memory_region_find_rcu(container, addr, 1).mr;
2484 rcu_read_unlock();
2485 return mr && mr != container;
2486 }
2487
2488 void memory_global_dirty_log_sync(void)
2489 {
2490 memory_region_sync_dirty_bitmap(NULL);
2491 }
2492
2493 static VMChangeStateEntry *vmstate_change;
2494
2495 void memory_global_dirty_log_start(void)
2496 {
2497 if (vmstate_change) {
2498 qemu_del_vm_change_state_handler(vmstate_change);
2499 vmstate_change = NULL;
2500 }
2501
2502 global_dirty_log = true;
2503
2504 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2505
2506 /* Refresh DIRTY_LOG_MIGRATION bit. */
2507 memory_region_transaction_begin();
2508 memory_region_update_pending = true;
2509 memory_region_transaction_commit();
2510 }
2511
2512 static void memory_global_dirty_log_do_stop(void)
2513 {
2514 global_dirty_log = false;
2515
2516 /* Refresh DIRTY_LOG_MIGRATION bit. */
2517 memory_region_transaction_begin();
2518 memory_region_update_pending = true;
2519 memory_region_transaction_commit();
2520
2521 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2522 }
2523
2524 static void memory_vm_change_state_handler(void *opaque, int running,
2525 RunState state)
2526 {
2527 if (running) {
2528 memory_global_dirty_log_do_stop();
2529
2530 if (vmstate_change) {
2531 qemu_del_vm_change_state_handler(vmstate_change);
2532 vmstate_change = NULL;
2533 }
2534 }
2535 }
2536
2537 void memory_global_dirty_log_stop(void)
2538 {
2539 if (!runstate_is_running()) {
2540 if (vmstate_change) {
2541 return;
2542 }
2543 vmstate_change = qemu_add_vm_change_state_handler(
2544 memory_vm_change_state_handler, NULL);
2545 return;
2546 }
2547
2548 memory_global_dirty_log_do_stop();
2549 }
2550
2551 static void listener_add_address_space(MemoryListener *listener,
2552 AddressSpace *as)
2553 {
2554 FlatView *view;
2555 FlatRange *fr;
2556
2557 if (listener->begin) {
2558 listener->begin(listener);
2559 }
2560 if (global_dirty_log) {
2561 if (listener->log_global_start) {
2562 listener->log_global_start(listener);
2563 }
2564 }
2565
2566 view = address_space_get_flatview(as);
2567 FOR_EACH_FLAT_RANGE(fr, view) {
2568 MemoryRegionSection section = section_from_flat_range(fr, view);
2569
2570 if (listener->region_add) {
2571 listener->region_add(listener, &section);
2572 }
2573 if (fr->dirty_log_mask && listener->log_start) {
2574 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2575 }
2576 }
2577 if (listener->commit) {
2578 listener->commit(listener);
2579 }
2580 flatview_unref(view);
2581 }
2582
2583 static void listener_del_address_space(MemoryListener *listener,
2584 AddressSpace *as)
2585 {
2586 FlatView *view;
2587 FlatRange *fr;
2588
2589 if (listener->begin) {
2590 listener->begin(listener);
2591 }
2592 view = address_space_get_flatview(as);
2593 FOR_EACH_FLAT_RANGE(fr, view) {
2594 MemoryRegionSection section = section_from_flat_range(fr, view);
2595
2596 if (fr->dirty_log_mask && listener->log_stop) {
2597 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2598 }
2599 if (listener->region_del) {
2600 listener->region_del(listener, &section);
2601 }
2602 }
2603 if (listener->commit) {
2604 listener->commit(listener);
2605 }
2606 flatview_unref(view);
2607 }
2608
2609 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2610 {
2611 MemoryListener *other = NULL;
2612
2613 listener->address_space = as;
2614 if (QTAILQ_EMPTY(&memory_listeners)
2615 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2616 memory_listeners)->priority) {
2617 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2618 } else {
2619 QTAILQ_FOREACH(other, &memory_listeners, link) {
2620 if (listener->priority < other->priority) {
2621 break;
2622 }
2623 }
2624 QTAILQ_INSERT_BEFORE(other, listener, link);
2625 }
2626
2627 if (QTAILQ_EMPTY(&as->listeners)
2628 || listener->priority >= QTAILQ_LAST(&as->listeners,
2629 memory_listeners)->priority) {
2630 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2631 } else {
2632 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2633 if (listener->priority < other->priority) {
2634 break;
2635 }
2636 }
2637 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2638 }
2639
2640 listener_add_address_space(listener, as);
2641 }
2642
2643 void memory_listener_unregister(MemoryListener *listener)
2644 {
2645 if (!listener->address_space) {
2646 return;
2647 }
2648
2649 listener_del_address_space(listener, listener->address_space);
2650 QTAILQ_REMOVE(&memory_listeners, listener, link);
2651 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2652 listener->address_space = NULL;
2653 }
2654
2655 bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2656 {
2657 void *host;
2658 unsigned size = 0;
2659 unsigned offset = 0;
2660 Object *new_interface;
2661
2662 if (!mr || !mr->ops->request_ptr) {
2663 return false;
2664 }
2665
2666 /*
2667 * Avoid an update if the request_ptr call
2668 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2669 * a cache.
2670 */
2671 memory_region_transaction_begin();
2672
2673 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2674
2675 if (!host || !size) {
2676 memory_region_transaction_commit();
2677 return false;
2678 }
2679
2680 new_interface = object_new("mmio_interface");
2681 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2682 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2683 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2684 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2685 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2686 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2687
2688 memory_region_transaction_commit();
2689 return true;
2690 }
2691
2692 typedef struct MMIOPtrInvalidate {
2693 MemoryRegion *mr;
2694 hwaddr offset;
2695 unsigned size;
2696 int busy;
2697 int allocated;
2698 } MMIOPtrInvalidate;
2699
2700 #define MAX_MMIO_INVALIDATE 10
2701 static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2702
2703 static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2704 run_on_cpu_data data)
2705 {
2706 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2707 MemoryRegion *mr = invalidate_data->mr;
2708 hwaddr offset = invalidate_data->offset;
2709 unsigned size = invalidate_data->size;
2710 MemoryRegionSection section = memory_region_find(mr, offset, size);
2711
2712 qemu_mutex_lock_iothread();
2713
2714 /* Reset dirty so this doesn't happen later. */
2715 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2716
2717 if (section.mr != mr) {
2718 /* memory_region_find add a ref on section.mr */
2719 memory_region_unref(section.mr);
2720 if (MMIO_INTERFACE(section.mr->owner)) {
2721 /* We found the interface just drop it. */
2722 object_property_set_bool(section.mr->owner, false, "realized",
2723 NULL);
2724 object_unref(section.mr->owner);
2725 object_unparent(section.mr->owner);
2726 }
2727 }
2728
2729 qemu_mutex_unlock_iothread();
2730
2731 if (invalidate_data->allocated) {
2732 g_free(invalidate_data);
2733 } else {
2734 invalidate_data->busy = 0;
2735 }
2736 }
2737
2738 void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2739 unsigned size)
2740 {
2741 size_t i;
2742 MMIOPtrInvalidate *invalidate_data = NULL;
2743
2744 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2745 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2746 invalidate_data = &mmio_ptr_invalidate_list[i];
2747 break;
2748 }
2749 }
2750
2751 if (!invalidate_data) {
2752 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2753 invalidate_data->allocated = 1;
2754 }
2755
2756 invalidate_data->mr = mr;
2757 invalidate_data->offset = offset;
2758 invalidate_data->size = size;
2759
2760 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2761 RUN_ON_CPU_HOST_PTR(invalidate_data));
2762 }
2763
2764 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2765 {
2766 memory_region_ref(root);
2767 as->root = root;
2768 as->current_map = NULL;
2769 as->ioeventfd_nb = 0;
2770 as->ioeventfds = NULL;
2771 QTAILQ_INIT(&as->listeners);
2772 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2773 as->name = g_strdup(name ? name : "anonymous");
2774 address_space_update_topology(as);
2775 address_space_update_ioeventfds(as);
2776 }
2777
2778 static void do_address_space_destroy(AddressSpace *as)
2779 {
2780 assert(QTAILQ_EMPTY(&as->listeners));
2781
2782 flatview_unref(as->current_map);
2783 g_free(as->name);
2784 g_free(as->ioeventfds);
2785 memory_region_unref(as->root);
2786 }
2787
2788 void address_space_destroy(AddressSpace *as)
2789 {
2790 MemoryRegion *root = as->root;
2791
2792 /* Flush out anything from MemoryListeners listening in on this */
2793 memory_region_transaction_begin();
2794 as->root = NULL;
2795 memory_region_transaction_commit();
2796 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2797
2798 /* At this point, as->dispatch and as->current_map are dummy
2799 * entries that the guest should never use. Wait for the old
2800 * values to expire before freeing the data.
2801 */
2802 as->root = root;
2803 call_rcu(as, do_address_space_destroy, rcu);
2804 }
2805
2806 static const char *memory_region_type(MemoryRegion *mr)
2807 {
2808 if (memory_region_is_ram_device(mr)) {
2809 return "ramd";
2810 } else if (memory_region_is_romd(mr)) {
2811 return "romd";
2812 } else if (memory_region_is_rom(mr)) {
2813 return "rom";
2814 } else if (memory_region_is_ram(mr)) {
2815 return "ram";
2816 } else {
2817 return "i/o";
2818 }
2819 }
2820
2821 typedef struct MemoryRegionList MemoryRegionList;
2822
2823 struct MemoryRegionList {
2824 const MemoryRegion *mr;
2825 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2826 };
2827
2828 typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2829
2830 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2831 int128_sub((size), int128_one())) : 0)
2832 #define MTREE_INDENT " "
2833
2834 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2835 const MemoryRegion *mr, unsigned int level,
2836 hwaddr base,
2837 MemoryRegionListHead *alias_print_queue)
2838 {
2839 MemoryRegionList *new_ml, *ml, *next_ml;
2840 MemoryRegionListHead submr_print_queue;
2841 const MemoryRegion *submr;
2842 unsigned int i;
2843 hwaddr cur_start, cur_end;
2844
2845 if (!mr) {
2846 return;
2847 }
2848
2849 for (i = 0; i < level; i++) {
2850 mon_printf(f, MTREE_INDENT);
2851 }
2852
2853 cur_start = base + mr->addr;
2854 cur_end = cur_start + MR_SIZE(mr->size);
2855
2856 /*
2857 * Try to detect overflow of memory region. This should never
2858 * happen normally. When it happens, we dump something to warn the
2859 * user who is observing this.
2860 */
2861 if (cur_start < base || cur_end < cur_start) {
2862 mon_printf(f, "[DETECTED OVERFLOW!] ");
2863 }
2864
2865 if (mr->alias) {
2866 MemoryRegionList *ml;
2867 bool found = false;
2868
2869 /* check if the alias is already in the queue */
2870 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2871 if (ml->mr == mr->alias) {
2872 found = true;
2873 }
2874 }
2875
2876 if (!found) {
2877 ml = g_new(MemoryRegionList, 1);
2878 ml->mr = mr->alias;
2879 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2880 }
2881 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2882 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2883 "-" TARGET_FMT_plx "%s\n",
2884 cur_start, cur_end,
2885 mr->priority,
2886 memory_region_type((MemoryRegion *)mr),
2887 memory_region_name(mr),
2888 memory_region_name(mr->alias),
2889 mr->alias_offset,
2890 mr->alias_offset + MR_SIZE(mr->size),
2891 mr->enabled ? "" : " [disabled]");
2892 } else {
2893 mon_printf(f,
2894 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2895 cur_start, cur_end,
2896 mr->priority,
2897 memory_region_type((MemoryRegion *)mr),
2898 memory_region_name(mr),
2899 mr->enabled ? "" : " [disabled]");
2900 }
2901
2902 QTAILQ_INIT(&submr_print_queue);
2903
2904 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2905 new_ml = g_new(MemoryRegionList, 1);
2906 new_ml->mr = submr;
2907 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2908 if (new_ml->mr->addr < ml->mr->addr ||
2909 (new_ml->mr->addr == ml->mr->addr &&
2910 new_ml->mr->priority > ml->mr->priority)) {
2911 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2912 new_ml = NULL;
2913 break;
2914 }
2915 }
2916 if (new_ml) {
2917 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2918 }
2919 }
2920
2921 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2922 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2923 alias_print_queue);
2924 }
2925
2926 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2927 g_free(ml);
2928 }
2929 }
2930
2931 struct FlatViewInfo {
2932 fprintf_function mon_printf;
2933 void *f;
2934 int counter;
2935 bool dispatch_tree;
2936 };
2937
2938 static void mtree_print_flatview(gpointer key, gpointer value,
2939 gpointer user_data)
2940 {
2941 FlatView *view = key;
2942 GArray *fv_address_spaces = value;
2943 struct FlatViewInfo *fvi = user_data;
2944 fprintf_function p = fvi->mon_printf;
2945 void *f = fvi->f;
2946 FlatRange *range = &view->ranges[0];
2947 MemoryRegion *mr;
2948 int n = view->nr;
2949 int i;
2950 AddressSpace *as;
2951
2952 p(f, "FlatView #%d\n", fvi->counter);
2953 ++fvi->counter;
2954
2955 for (i = 0; i < fv_address_spaces->len; ++i) {
2956 as = g_array_index(fv_address_spaces, AddressSpace*, i);
2957 p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
2958 if (as->root->alias) {
2959 p(f, ", alias %s", memory_region_name(as->root->alias));
2960 }
2961 p(f, "\n");
2962 }
2963
2964 p(f, " Root memory region: %s\n",
2965 view->root ? memory_region_name(view->root) : "(none)");
2966
2967 if (n <= 0) {
2968 p(f, MTREE_INDENT "No rendered FlatView\n\n");
2969 return;
2970 }
2971
2972 while (n--) {
2973 mr = range->mr;
2974 if (range->offset_in_region) {
2975 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2976 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2977 int128_get64(range->addr.start),
2978 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2979 mr->priority,
2980 range->readonly ? "rom" : memory_region_type(mr),
2981 memory_region_name(mr),
2982 range->offset_in_region);
2983 } else {
2984 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2985 TARGET_FMT_plx " (prio %d, %s): %s\n",
2986 int128_get64(range->addr.start),
2987 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2988 mr->priority,
2989 range->readonly ? "rom" : memory_region_type(mr),
2990 memory_region_name(mr));
2991 }
2992 range++;
2993 }
2994
2995 #if !defined(CONFIG_USER_ONLY)
2996 if (fvi->dispatch_tree && view->root) {
2997 mtree_print_dispatch(p, f, view->dispatch, view->root);
2998 }
2999 #endif
3000
3001 p(f, "\n");
3002 }
3003
3004 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3005 gpointer user_data)
3006 {
3007 FlatView *view = key;
3008 GArray *fv_address_spaces = value;
3009
3010 g_array_unref(fv_address_spaces);
3011 flatview_unref(view);
3012
3013 return true;
3014 }
3015
3016 void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
3017 bool dispatch_tree)
3018 {
3019 MemoryRegionListHead ml_head;
3020 MemoryRegionList *ml, *ml2;
3021 AddressSpace *as;
3022
3023 if (flatview) {
3024 FlatView *view;
3025 struct FlatViewInfo fvi = {
3026 .mon_printf = mon_printf,
3027 .f = f,
3028 .counter = 0,
3029 .dispatch_tree = dispatch_tree
3030 };
3031 GArray *fv_address_spaces;
3032 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3033
3034 /* Gather all FVs in one table */
3035 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3036 view = address_space_get_flatview(as);
3037
3038 fv_address_spaces = g_hash_table_lookup(views, view);
3039 if (!fv_address_spaces) {
3040 fv_address_spaces = g_array_new(false, false, sizeof(as));
3041 g_hash_table_insert(views, view, fv_address_spaces);
3042 }
3043
3044 g_array_append_val(fv_address_spaces, as);
3045 }
3046
3047 /* Print */
3048 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3049
3050 /* Free */
3051 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3052 g_hash_table_unref(views);
3053
3054 return;
3055 }
3056
3057 QTAILQ_INIT(&ml_head);
3058
3059 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3060 mon_printf(f, "address-space: %s\n", as->name);
3061 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
3062 mon_printf(f, "\n");
3063 }
3064
3065 /* print aliased regions */
3066 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3067 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
3068 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
3069 mon_printf(f, "\n");
3070 }
3071
3072 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3073 g_free(ml);
3074 }
3075 }
3076
3077 void memory_region_init_ram(MemoryRegion *mr,
3078 struct Object *owner,
3079 const char *name,
3080 uint64_t size,
3081 Error **errp)
3082 {
3083 DeviceState *owner_dev;
3084 Error *err = NULL;
3085
3086 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3087 if (err) {
3088 error_propagate(errp, err);
3089 return;
3090 }
3091 /* This will assert if owner is neither NULL nor a DeviceState.
3092 * We only want the owner here for the purposes of defining a
3093 * unique name for migration. TODO: Ideally we should implement
3094 * a naming scheme for Objects which are not DeviceStates, in
3095 * which case we can relax this restriction.
3096 */
3097 owner_dev = DEVICE(owner);
3098 vmstate_register_ram(mr, owner_dev);
3099 }
3100
3101 void memory_region_init_rom(MemoryRegion *mr,
3102 struct Object *owner,
3103 const char *name,
3104 uint64_t size,
3105 Error **errp)
3106 {
3107 DeviceState *owner_dev;
3108 Error *err = NULL;
3109
3110 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3111 if (err) {
3112 error_propagate(errp, err);
3113 return;
3114 }
3115 /* This will assert if owner is neither NULL nor a DeviceState.
3116 * We only want the owner here for the purposes of defining a
3117 * unique name for migration. TODO: Ideally we should implement
3118 * a naming scheme for Objects which are not DeviceStates, in
3119 * which case we can relax this restriction.
3120 */
3121 owner_dev = DEVICE(owner);
3122 vmstate_register_ram(mr, owner_dev);
3123 }
3124
3125 void memory_region_init_rom_device(MemoryRegion *mr,
3126 struct Object *owner,
3127 const MemoryRegionOps *ops,
3128 void *opaque,
3129 const char *name,
3130 uint64_t size,
3131 Error **errp)
3132 {
3133 DeviceState *owner_dev;
3134 Error *err = NULL;
3135
3136 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3137 name, size, &err);
3138 if (err) {
3139 error_propagate(errp, err);
3140 return;
3141 }
3142 /* This will assert if owner is neither NULL nor a DeviceState.
3143 * We only want the owner here for the purposes of defining a
3144 * unique name for migration. TODO: Ideally we should implement
3145 * a naming scheme for Objects which are not DeviceStates, in
3146 * which case we can relax this restriction.
3147 */
3148 owner_dev = DEVICE(owner);
3149 vmstate_register_ram(mr, owner_dev);
3150 }
3151
3152 static const TypeInfo memory_region_info = {
3153 .parent = TYPE_OBJECT,
3154 .name = TYPE_MEMORY_REGION,
3155 .instance_size = sizeof(MemoryRegion),
3156 .instance_init = memory_region_initfn,
3157 .instance_finalize = memory_region_finalize,
3158 };
3159
3160 static const TypeInfo iommu_memory_region_info = {
3161 .parent = TYPE_MEMORY_REGION,
3162 .name = TYPE_IOMMU_MEMORY_REGION,
3163 .class_size = sizeof(IOMMUMemoryRegionClass),
3164 .instance_size = sizeof(IOMMUMemoryRegion),
3165 .instance_init = iommu_memory_region_initfn,
3166 .abstract = true,
3167 };
3168
3169 static void memory_register_types(void)
3170 {
3171 type_register_static(&memory_region_info);
3172 type_register_static(&iommu_memory_region_info);
3173 }
3174
3175 type_init(memory_register_types)
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