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memory: replace cpu_physical_sync_dirty_bitmap() with a memory API
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1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 */
13
14 #include "memory.h"
15 #include "exec-memory.h"
16 #include "ioport.h"
17 #include "bitops.h"
18 #include "kvm.h"
19 #include <assert.h>
20
21 #define WANT_EXEC_OBSOLETE
22 #include "exec-obsolete.h"
23
24 unsigned memory_region_transaction_depth = 0;
25 static bool memory_region_update_pending = false;
26
27 typedef struct AddrRange AddrRange;
28
29 /*
30 * Note using signed integers limits us to physical addresses at most
31 * 63 bits wide. They are needed for negative offsetting in aliases
32 * (large MemoryRegion::alias_offset).
33 */
34 struct AddrRange {
35 Int128 start;
36 Int128 size;
37 };
38
39 static AddrRange addrrange_make(Int128 start, Int128 size)
40 {
41 return (AddrRange) { start, size };
42 }
43
44 static bool addrrange_equal(AddrRange r1, AddrRange r2)
45 {
46 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
47 }
48
49 static Int128 addrrange_end(AddrRange r)
50 {
51 return int128_add(r.start, r.size);
52 }
53
54 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
55 {
56 int128_addto(&range.start, delta);
57 return range;
58 }
59
60 static bool addrrange_contains(AddrRange range, Int128 addr)
61 {
62 return int128_ge(addr, range.start)
63 && int128_lt(addr, addrrange_end(range));
64 }
65
66 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
67 {
68 return addrrange_contains(r1, r2.start)
69 || addrrange_contains(r2, r1.start);
70 }
71
72 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
73 {
74 Int128 start = int128_max(r1.start, r2.start);
75 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
76 return addrrange_make(start, int128_sub(end, start));
77 }
78
79 struct CoalescedMemoryRange {
80 AddrRange addr;
81 QTAILQ_ENTRY(CoalescedMemoryRange) link;
82 };
83
84 struct MemoryRegionIoeventfd {
85 AddrRange addr;
86 bool match_data;
87 uint64_t data;
88 int fd;
89 };
90
91 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
92 MemoryRegionIoeventfd b)
93 {
94 if (int128_lt(a.addr.start, b.addr.start)) {
95 return true;
96 } else if (int128_gt(a.addr.start, b.addr.start)) {
97 return false;
98 } else if (int128_lt(a.addr.size, b.addr.size)) {
99 return true;
100 } else if (int128_gt(a.addr.size, b.addr.size)) {
101 return false;
102 } else if (a.match_data < b.match_data) {
103 return true;
104 } else if (a.match_data > b.match_data) {
105 return false;
106 } else if (a.match_data) {
107 if (a.data < b.data) {
108 return true;
109 } else if (a.data > b.data) {
110 return false;
111 }
112 }
113 if (a.fd < b.fd) {
114 return true;
115 } else if (a.fd > b.fd) {
116 return false;
117 }
118 return false;
119 }
120
121 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
122 MemoryRegionIoeventfd b)
123 {
124 return !memory_region_ioeventfd_before(a, b)
125 && !memory_region_ioeventfd_before(b, a);
126 }
127
128 typedef struct FlatRange FlatRange;
129 typedef struct FlatView FlatView;
130
131 /* Range of memory in the global map. Addresses are absolute. */
132 struct FlatRange {
133 MemoryRegion *mr;
134 target_phys_addr_t offset_in_region;
135 AddrRange addr;
136 uint8_t dirty_log_mask;
137 bool readable;
138 bool readonly;
139 };
140
141 /* Flattened global view of current active memory hierarchy. Kept in sorted
142 * order.
143 */
144 struct FlatView {
145 FlatRange *ranges;
146 unsigned nr;
147 unsigned nr_allocated;
148 };
149
150 typedef struct AddressSpace AddressSpace;
151 typedef struct AddressSpaceOps AddressSpaceOps;
152
153 /* A system address space - I/O, memory, etc. */
154 struct AddressSpace {
155 const AddressSpaceOps *ops;
156 MemoryRegion *root;
157 FlatView current_map;
158 int ioeventfd_nb;
159 MemoryRegionIoeventfd *ioeventfds;
160 };
161
162 struct AddressSpaceOps {
163 void (*range_add)(AddressSpace *as, FlatRange *fr);
164 void (*range_del)(AddressSpace *as, FlatRange *fr);
165 void (*log_start)(AddressSpace *as, FlatRange *fr);
166 void (*log_stop)(AddressSpace *as, FlatRange *fr);
167 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
168 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
169 };
170
171 #define FOR_EACH_FLAT_RANGE(var, view) \
172 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
173
174 static bool flatrange_equal(FlatRange *a, FlatRange *b)
175 {
176 return a->mr == b->mr
177 && addrrange_equal(a->addr, b->addr)
178 && a->offset_in_region == b->offset_in_region
179 && a->readable == b->readable
180 && a->readonly == b->readonly;
181 }
182
183 static void flatview_init(FlatView *view)
184 {
185 view->ranges = NULL;
186 view->nr = 0;
187 view->nr_allocated = 0;
188 }
189
190 /* Insert a range into a given position. Caller is responsible for maintaining
191 * sorting order.
192 */
193 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
194 {
195 if (view->nr == view->nr_allocated) {
196 view->nr_allocated = MAX(2 * view->nr, 10);
197 view->ranges = g_realloc(view->ranges,
198 view->nr_allocated * sizeof(*view->ranges));
199 }
200 memmove(view->ranges + pos + 1, view->ranges + pos,
201 (view->nr - pos) * sizeof(FlatRange));
202 view->ranges[pos] = *range;
203 ++view->nr;
204 }
205
206 static void flatview_destroy(FlatView *view)
207 {
208 g_free(view->ranges);
209 }
210
211 static bool can_merge(FlatRange *r1, FlatRange *r2)
212 {
213 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
214 && r1->mr == r2->mr
215 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
216 r1->addr.size),
217 int128_make64(r2->offset_in_region))
218 && r1->dirty_log_mask == r2->dirty_log_mask
219 && r1->readable == r2->readable
220 && r1->readonly == r2->readonly;
221 }
222
223 /* Attempt to simplify a view by merging ajacent ranges */
224 static void flatview_simplify(FlatView *view)
225 {
226 unsigned i, j;
227
228 i = 0;
229 while (i < view->nr) {
230 j = i + 1;
231 while (j < view->nr
232 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
233 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
234 ++j;
235 }
236 ++i;
237 memmove(&view->ranges[i], &view->ranges[j],
238 (view->nr - j) * sizeof(view->ranges[j]));
239 view->nr -= j - i;
240 }
241 }
242
243 static void memory_region_read_accessor(void *opaque,
244 target_phys_addr_t addr,
245 uint64_t *value,
246 unsigned size,
247 unsigned shift,
248 uint64_t mask)
249 {
250 MemoryRegion *mr = opaque;
251 uint64_t tmp;
252
253 tmp = mr->ops->read(mr->opaque, addr, size);
254 *value |= (tmp & mask) << shift;
255 }
256
257 static void memory_region_write_accessor(void *opaque,
258 target_phys_addr_t addr,
259 uint64_t *value,
260 unsigned size,
261 unsigned shift,
262 uint64_t mask)
263 {
264 MemoryRegion *mr = opaque;
265 uint64_t tmp;
266
267 tmp = (*value >> shift) & mask;
268 mr->ops->write(mr->opaque, addr, tmp, size);
269 }
270
271 static void access_with_adjusted_size(target_phys_addr_t addr,
272 uint64_t *value,
273 unsigned size,
274 unsigned access_size_min,
275 unsigned access_size_max,
276 void (*access)(void *opaque,
277 target_phys_addr_t addr,
278 uint64_t *value,
279 unsigned size,
280 unsigned shift,
281 uint64_t mask),
282 void *opaque)
283 {
284 uint64_t access_mask;
285 unsigned access_size;
286 unsigned i;
287
288 if (!access_size_min) {
289 access_size_min = 1;
290 }
291 if (!access_size_max) {
292 access_size_max = 4;
293 }
294 access_size = MAX(MIN(size, access_size_max), access_size_min);
295 access_mask = -1ULL >> (64 - access_size * 8);
296 for (i = 0; i < size; i += access_size) {
297 /* FIXME: big-endian support */
298 access(opaque, addr + i, value, access_size, i * 8, access_mask);
299 }
300 }
301
302 static void memory_region_prepare_ram_addr(MemoryRegion *mr);
303
304 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
305 {
306 ram_addr_t phys_offset, region_offset;
307
308 memory_region_prepare_ram_addr(fr->mr);
309
310 phys_offset = fr->mr->ram_addr;
311 region_offset = fr->offset_in_region;
312 /* cpu_register_physical_memory_log() wants region_offset for
313 * mmio, but prefers offseting phys_offset for RAM. Humour it.
314 */
315 if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
316 phys_offset += region_offset;
317 region_offset = 0;
318 }
319
320 if (!fr->readable) {
321 phys_offset &= ~TARGET_PAGE_MASK & ~IO_MEM_ROMD;
322 }
323
324 if (fr->readonly) {
325 phys_offset |= IO_MEM_ROM;
326 }
327
328 cpu_register_physical_memory_log(int128_get64(fr->addr.start),
329 int128_get64(fr->addr.size),
330 phys_offset,
331 region_offset,
332 fr->dirty_log_mask);
333 }
334
335 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
336 {
337 if (fr->dirty_log_mask) {
338 Int128 end = addrrange_end(fr->addr);
339 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
340 int128_get64(end));
341 }
342 cpu_register_physical_memory(int128_get64(fr->addr.start),
343 int128_get64(fr->addr.size),
344 IO_MEM_UNASSIGNED);
345 }
346
347 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
348 {
349 cpu_physical_log_start(int128_get64(fr->addr.start),
350 int128_get64(fr->addr.size));
351 }
352
353 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
354 {
355 cpu_physical_log_stop(int128_get64(fr->addr.start),
356 int128_get64(fr->addr.size));
357 }
358
359 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
360 {
361 int r;
362
363 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
364
365 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
366 fd->data, true);
367 if (r < 0) {
368 abort();
369 }
370 }
371
372 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
373 {
374 int r;
375
376 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
377 fd->data, false);
378 if (r < 0) {
379 abort();
380 }
381 }
382
383 static const AddressSpaceOps address_space_ops_memory = {
384 .range_add = as_memory_range_add,
385 .range_del = as_memory_range_del,
386 .log_start = as_memory_log_start,
387 .log_stop = as_memory_log_stop,
388 .ioeventfd_add = as_memory_ioeventfd_add,
389 .ioeventfd_del = as_memory_ioeventfd_del,
390 };
391
392 static AddressSpace address_space_memory = {
393 .ops = &address_space_ops_memory,
394 };
395
396 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
397 unsigned width, bool write)
398 {
399 const MemoryRegionPortio *mrp;
400
401 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
402 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
403 && width == mrp->size
404 && (write ? (bool)mrp->write : (bool)mrp->read)) {
405 return mrp;
406 }
407 }
408 return NULL;
409 }
410
411 static void memory_region_iorange_read(IORange *iorange,
412 uint64_t offset,
413 unsigned width,
414 uint64_t *data)
415 {
416 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
417
418 if (mr->ops->old_portio) {
419 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
420
421 *data = ((uint64_t)1 << (width * 8)) - 1;
422 if (mrp) {
423 *data = mrp->read(mr->opaque, offset + mr->offset);
424 } else if (width == 2) {
425 mrp = find_portio(mr, offset, 1, false);
426 assert(mrp);
427 *data = mrp->read(mr->opaque, offset + mr->offset) |
428 (mrp->read(mr->opaque, offset + mr->offset + 1) << 8);
429 }
430 return;
431 }
432 *data = 0;
433 access_with_adjusted_size(offset + mr->offset, data, width,
434 mr->ops->impl.min_access_size,
435 mr->ops->impl.max_access_size,
436 memory_region_read_accessor, mr);
437 }
438
439 static void memory_region_iorange_write(IORange *iorange,
440 uint64_t offset,
441 unsigned width,
442 uint64_t data)
443 {
444 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
445
446 if (mr->ops->old_portio) {
447 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
448
449 if (mrp) {
450 mrp->write(mr->opaque, offset + mr->offset, data);
451 } else if (width == 2) {
452 mrp = find_portio(mr, offset, 1, false);
453 assert(mrp);
454 mrp->write(mr->opaque, offset + mr->offset, data & 0xff);
455 mrp->write(mr->opaque, offset + mr->offset + 1, data >> 8);
456 }
457 return;
458 }
459 access_with_adjusted_size(offset + mr->offset, &data, width,
460 mr->ops->impl.min_access_size,
461 mr->ops->impl.max_access_size,
462 memory_region_write_accessor, mr);
463 }
464
465 static const IORangeOps memory_region_iorange_ops = {
466 .read = memory_region_iorange_read,
467 .write = memory_region_iorange_write,
468 };
469
470 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
471 {
472 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
473 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
474 ioport_register(&fr->mr->iorange);
475 }
476
477 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
478 {
479 isa_unassign_ioport(int128_get64(fr->addr.start),
480 int128_get64(fr->addr.size));
481 }
482
483 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
484 {
485 int r;
486
487 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
488
489 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
490 fd->data, true);
491 if (r < 0) {
492 abort();
493 }
494 }
495
496 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
497 {
498 int r;
499
500 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
501 fd->data, false);
502 if (r < 0) {
503 abort();
504 }
505 }
506
507 static const AddressSpaceOps address_space_ops_io = {
508 .range_add = as_io_range_add,
509 .range_del = as_io_range_del,
510 .ioeventfd_add = as_io_ioeventfd_add,
511 .ioeventfd_del = as_io_ioeventfd_del,
512 };
513
514 static AddressSpace address_space_io = {
515 .ops = &address_space_ops_io,
516 };
517
518 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
519 {
520 while (mr->parent) {
521 mr = mr->parent;
522 }
523 if (mr == address_space_memory.root) {
524 return &address_space_memory;
525 }
526 if (mr == address_space_io.root) {
527 return &address_space_io;
528 }
529 abort();
530 }
531
532 /* Render a memory region into the global view. Ranges in @view obscure
533 * ranges in @mr.
534 */
535 static void render_memory_region(FlatView *view,
536 MemoryRegion *mr,
537 Int128 base,
538 AddrRange clip,
539 bool readonly)
540 {
541 MemoryRegion *subregion;
542 unsigned i;
543 target_phys_addr_t offset_in_region;
544 Int128 remain;
545 Int128 now;
546 FlatRange fr;
547 AddrRange tmp;
548
549 if (!mr->enabled) {
550 return;
551 }
552
553 int128_addto(&base, int128_make64(mr->addr));
554 readonly |= mr->readonly;
555
556 tmp = addrrange_make(base, mr->size);
557
558 if (!addrrange_intersects(tmp, clip)) {
559 return;
560 }
561
562 clip = addrrange_intersection(tmp, clip);
563
564 if (mr->alias) {
565 int128_subfrom(&base, int128_make64(mr->alias->addr));
566 int128_subfrom(&base, int128_make64(mr->alias_offset));
567 render_memory_region(view, mr->alias, base, clip, readonly);
568 return;
569 }
570
571 /* Render subregions in priority order. */
572 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
573 render_memory_region(view, subregion, base, clip, readonly);
574 }
575
576 if (!mr->terminates) {
577 return;
578 }
579
580 offset_in_region = int128_get64(int128_sub(clip.start, base));
581 base = clip.start;
582 remain = clip.size;
583
584 /* Render the region itself into any gaps left by the current view. */
585 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
586 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
587 continue;
588 }
589 if (int128_lt(base, view->ranges[i].addr.start)) {
590 now = int128_min(remain,
591 int128_sub(view->ranges[i].addr.start, base));
592 fr.mr = mr;
593 fr.offset_in_region = offset_in_region;
594 fr.addr = addrrange_make(base, now);
595 fr.dirty_log_mask = mr->dirty_log_mask;
596 fr.readable = mr->readable;
597 fr.readonly = readonly;
598 flatview_insert(view, i, &fr);
599 ++i;
600 int128_addto(&base, now);
601 offset_in_region += int128_get64(now);
602 int128_subfrom(&remain, now);
603 }
604 if (int128_eq(base, view->ranges[i].addr.start)) {
605 now = int128_min(remain, view->ranges[i].addr.size);
606 int128_addto(&base, now);
607 offset_in_region += int128_get64(now);
608 int128_subfrom(&remain, now);
609 }
610 }
611 if (int128_nz(remain)) {
612 fr.mr = mr;
613 fr.offset_in_region = offset_in_region;
614 fr.addr = addrrange_make(base, remain);
615 fr.dirty_log_mask = mr->dirty_log_mask;
616 fr.readable = mr->readable;
617 fr.readonly = readonly;
618 flatview_insert(view, i, &fr);
619 }
620 }
621
622 /* Render a memory topology into a list of disjoint absolute ranges. */
623 static FlatView generate_memory_topology(MemoryRegion *mr)
624 {
625 FlatView view;
626
627 flatview_init(&view);
628
629 render_memory_region(&view, mr, int128_zero(),
630 addrrange_make(int128_zero(), int128_2_64()), false);
631 flatview_simplify(&view);
632
633 return view;
634 }
635
636 static void address_space_add_del_ioeventfds(AddressSpace *as,
637 MemoryRegionIoeventfd *fds_new,
638 unsigned fds_new_nb,
639 MemoryRegionIoeventfd *fds_old,
640 unsigned fds_old_nb)
641 {
642 unsigned iold, inew;
643
644 /* Generate a symmetric difference of the old and new fd sets, adding
645 * and deleting as necessary.
646 */
647
648 iold = inew = 0;
649 while (iold < fds_old_nb || inew < fds_new_nb) {
650 if (iold < fds_old_nb
651 && (inew == fds_new_nb
652 || memory_region_ioeventfd_before(fds_old[iold],
653 fds_new[inew]))) {
654 as->ops->ioeventfd_del(as, &fds_old[iold]);
655 ++iold;
656 } else if (inew < fds_new_nb
657 && (iold == fds_old_nb
658 || memory_region_ioeventfd_before(fds_new[inew],
659 fds_old[iold]))) {
660 as->ops->ioeventfd_add(as, &fds_new[inew]);
661 ++inew;
662 } else {
663 ++iold;
664 ++inew;
665 }
666 }
667 }
668
669 static void address_space_update_ioeventfds(AddressSpace *as)
670 {
671 FlatRange *fr;
672 unsigned ioeventfd_nb = 0;
673 MemoryRegionIoeventfd *ioeventfds = NULL;
674 AddrRange tmp;
675 unsigned i;
676
677 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
678 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
679 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
680 int128_sub(fr->addr.start,
681 int128_make64(fr->offset_in_region)));
682 if (addrrange_intersects(fr->addr, tmp)) {
683 ++ioeventfd_nb;
684 ioeventfds = g_realloc(ioeventfds,
685 ioeventfd_nb * sizeof(*ioeventfds));
686 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
687 ioeventfds[ioeventfd_nb-1].addr = tmp;
688 }
689 }
690 }
691
692 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
693 as->ioeventfds, as->ioeventfd_nb);
694
695 g_free(as->ioeventfds);
696 as->ioeventfds = ioeventfds;
697 as->ioeventfd_nb = ioeventfd_nb;
698 }
699
700 static void address_space_update_topology_pass(AddressSpace *as,
701 FlatView old_view,
702 FlatView new_view,
703 bool adding)
704 {
705 unsigned iold, inew;
706 FlatRange *frold, *frnew;
707
708 /* Generate a symmetric difference of the old and new memory maps.
709 * Kill ranges in the old map, and instantiate ranges in the new map.
710 */
711 iold = inew = 0;
712 while (iold < old_view.nr || inew < new_view.nr) {
713 if (iold < old_view.nr) {
714 frold = &old_view.ranges[iold];
715 } else {
716 frold = NULL;
717 }
718 if (inew < new_view.nr) {
719 frnew = &new_view.ranges[inew];
720 } else {
721 frnew = NULL;
722 }
723
724 if (frold
725 && (!frnew
726 || int128_lt(frold->addr.start, frnew->addr.start)
727 || (int128_eq(frold->addr.start, frnew->addr.start)
728 && !flatrange_equal(frold, frnew)))) {
729 /* In old, but (not in new, or in new but attributes changed). */
730
731 if (!adding) {
732 as->ops->range_del(as, frold);
733 }
734
735 ++iold;
736 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
737 /* In both (logging may have changed) */
738
739 if (adding) {
740 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
741 as->ops->log_stop(as, frnew);
742 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
743 as->ops->log_start(as, frnew);
744 }
745 }
746
747 ++iold;
748 ++inew;
749 } else {
750 /* In new */
751
752 if (adding) {
753 as->ops->range_add(as, frnew);
754 }
755
756 ++inew;
757 }
758 }
759 }
760
761
762 static void address_space_update_topology(AddressSpace *as)
763 {
764 FlatView old_view = as->current_map;
765 FlatView new_view = generate_memory_topology(as->root);
766
767 address_space_update_topology_pass(as, old_view, new_view, false);
768 address_space_update_topology_pass(as, old_view, new_view, true);
769
770 as->current_map = new_view;
771 flatview_destroy(&old_view);
772 address_space_update_ioeventfds(as);
773 }
774
775 static void memory_region_update_topology(MemoryRegion *mr)
776 {
777 if (memory_region_transaction_depth) {
778 memory_region_update_pending |= !mr || mr->enabled;
779 return;
780 }
781
782 if (mr && !mr->enabled) {
783 return;
784 }
785
786 if (address_space_memory.root) {
787 address_space_update_topology(&address_space_memory);
788 }
789 if (address_space_io.root) {
790 address_space_update_topology(&address_space_io);
791 }
792
793 memory_region_update_pending = false;
794 }
795
796 void memory_region_transaction_begin(void)
797 {
798 ++memory_region_transaction_depth;
799 }
800
801 void memory_region_transaction_commit(void)
802 {
803 assert(memory_region_transaction_depth);
804 --memory_region_transaction_depth;
805 if (!memory_region_transaction_depth && memory_region_update_pending) {
806 memory_region_update_topology(NULL);
807 }
808 }
809
810 static void memory_region_destructor_none(MemoryRegion *mr)
811 {
812 }
813
814 static void memory_region_destructor_ram(MemoryRegion *mr)
815 {
816 qemu_ram_free(mr->ram_addr);
817 }
818
819 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
820 {
821 qemu_ram_free_from_ptr(mr->ram_addr);
822 }
823
824 static void memory_region_destructor_iomem(MemoryRegion *mr)
825 {
826 cpu_unregister_io_memory(mr->ram_addr);
827 }
828
829 static void memory_region_destructor_rom_device(MemoryRegion *mr)
830 {
831 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
832 cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
833 }
834
835 void memory_region_init(MemoryRegion *mr,
836 const char *name,
837 uint64_t size)
838 {
839 mr->ops = NULL;
840 mr->parent = NULL;
841 mr->size = int128_make64(size);
842 if (size == UINT64_MAX) {
843 mr->size = int128_2_64();
844 }
845 mr->addr = 0;
846 mr->offset = 0;
847 mr->enabled = true;
848 mr->terminates = false;
849 mr->ram = false;
850 mr->readable = true;
851 mr->readonly = false;
852 mr->destructor = memory_region_destructor_none;
853 mr->priority = 0;
854 mr->may_overlap = false;
855 mr->alias = NULL;
856 QTAILQ_INIT(&mr->subregions);
857 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
858 QTAILQ_INIT(&mr->coalesced);
859 mr->name = g_strdup(name);
860 mr->dirty_log_mask = 0;
861 mr->ioeventfd_nb = 0;
862 mr->ioeventfds = NULL;
863 }
864
865 static bool memory_region_access_valid(MemoryRegion *mr,
866 target_phys_addr_t addr,
867 unsigned size,
868 bool is_write)
869 {
870 if (mr->ops->valid.accepts
871 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
872 return false;
873 }
874
875 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
876 return false;
877 }
878
879 /* Treat zero as compatibility all valid */
880 if (!mr->ops->valid.max_access_size) {
881 return true;
882 }
883
884 if (size > mr->ops->valid.max_access_size
885 || size < mr->ops->valid.min_access_size) {
886 return false;
887 }
888 return true;
889 }
890
891 static uint32_t memory_region_read_thunk_n(void *_mr,
892 target_phys_addr_t addr,
893 unsigned size)
894 {
895 MemoryRegion *mr = _mr;
896 uint64_t data = 0;
897
898 if (!memory_region_access_valid(mr, addr, size, false)) {
899 return -1U; /* FIXME: better signalling */
900 }
901
902 if (!mr->ops->read) {
903 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
904 }
905
906 /* FIXME: support unaligned access */
907 access_with_adjusted_size(addr + mr->offset, &data, size,
908 mr->ops->impl.min_access_size,
909 mr->ops->impl.max_access_size,
910 memory_region_read_accessor, mr);
911
912 return data;
913 }
914
915 static void memory_region_write_thunk_n(void *_mr,
916 target_phys_addr_t addr,
917 unsigned size,
918 uint64_t data)
919 {
920 MemoryRegion *mr = _mr;
921
922 if (!memory_region_access_valid(mr, addr, size, true)) {
923 return; /* FIXME: better signalling */
924 }
925
926 if (!mr->ops->write) {
927 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
928 return;
929 }
930
931 /* FIXME: support unaligned access */
932 access_with_adjusted_size(addr + mr->offset, &data, size,
933 mr->ops->impl.min_access_size,
934 mr->ops->impl.max_access_size,
935 memory_region_write_accessor, mr);
936 }
937
938 static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr)
939 {
940 return memory_region_read_thunk_n(mr, addr, 1);
941 }
942
943 static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr)
944 {
945 return memory_region_read_thunk_n(mr, addr, 2);
946 }
947
948 static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr)
949 {
950 return memory_region_read_thunk_n(mr, addr, 4);
951 }
952
953 static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr,
954 uint32_t data)
955 {
956 memory_region_write_thunk_n(mr, addr, 1, data);
957 }
958
959 static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr,
960 uint32_t data)
961 {
962 memory_region_write_thunk_n(mr, addr, 2, data);
963 }
964
965 static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr,
966 uint32_t data)
967 {
968 memory_region_write_thunk_n(mr, addr, 4, data);
969 }
970
971 static CPUReadMemoryFunc * const memory_region_read_thunk[] = {
972 memory_region_read_thunk_b,
973 memory_region_read_thunk_w,
974 memory_region_read_thunk_l,
975 };
976
977 static CPUWriteMemoryFunc * const memory_region_write_thunk[] = {
978 memory_region_write_thunk_b,
979 memory_region_write_thunk_w,
980 memory_region_write_thunk_l,
981 };
982
983 static void memory_region_prepare_ram_addr(MemoryRegion *mr)
984 {
985 if (mr->backend_registered) {
986 return;
987 }
988
989 mr->destructor = memory_region_destructor_iomem;
990 mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk,
991 memory_region_write_thunk,
992 mr,
993 mr->ops->endianness);
994 mr->backend_registered = true;
995 }
996
997 void memory_region_init_io(MemoryRegion *mr,
998 const MemoryRegionOps *ops,
999 void *opaque,
1000 const char *name,
1001 uint64_t size)
1002 {
1003 memory_region_init(mr, name, size);
1004 mr->ops = ops;
1005 mr->opaque = opaque;
1006 mr->terminates = true;
1007 mr->backend_registered = false;
1008 }
1009
1010 void memory_region_init_ram(MemoryRegion *mr,
1011 DeviceState *dev,
1012 const char *name,
1013 uint64_t size)
1014 {
1015 memory_region_init(mr, name, size);
1016 mr->ram = true;
1017 mr->terminates = true;
1018 mr->destructor = memory_region_destructor_ram;
1019 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1020 mr->backend_registered = true;
1021 }
1022
1023 void memory_region_init_ram_ptr(MemoryRegion *mr,
1024 DeviceState *dev,
1025 const char *name,
1026 uint64_t size,
1027 void *ptr)
1028 {
1029 memory_region_init(mr, name, size);
1030 mr->ram = true;
1031 mr->terminates = true;
1032 mr->destructor = memory_region_destructor_ram_from_ptr;
1033 mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr, mr);
1034 mr->backend_registered = true;
1035 }
1036
1037 void memory_region_init_alias(MemoryRegion *mr,
1038 const char *name,
1039 MemoryRegion *orig,
1040 target_phys_addr_t offset,
1041 uint64_t size)
1042 {
1043 memory_region_init(mr, name, size);
1044 mr->alias = orig;
1045 mr->alias_offset = offset;
1046 }
1047
1048 void memory_region_init_rom_device(MemoryRegion *mr,
1049 const MemoryRegionOps *ops,
1050 void *opaque,
1051 DeviceState *dev,
1052 const char *name,
1053 uint64_t size)
1054 {
1055 memory_region_init(mr, name, size);
1056 mr->ops = ops;
1057 mr->opaque = opaque;
1058 mr->terminates = true;
1059 mr->destructor = memory_region_destructor_rom_device;
1060 mr->ram_addr = qemu_ram_alloc(dev, name, size, mr);
1061 mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
1062 memory_region_write_thunk,
1063 mr,
1064 mr->ops->endianness);
1065 mr->ram_addr |= IO_MEM_ROMD;
1066 mr->backend_registered = true;
1067 }
1068
1069 void memory_region_destroy(MemoryRegion *mr)
1070 {
1071 assert(QTAILQ_EMPTY(&mr->subregions));
1072 mr->destructor(mr);
1073 memory_region_clear_coalescing(mr);
1074 g_free((char *)mr->name);
1075 g_free(mr->ioeventfds);
1076 }
1077
1078 uint64_t memory_region_size(MemoryRegion *mr)
1079 {
1080 if (int128_eq(mr->size, int128_2_64())) {
1081 return UINT64_MAX;
1082 }
1083 return int128_get64(mr->size);
1084 }
1085
1086 bool memory_region_is_ram(MemoryRegion *mr)
1087 {
1088 return mr->ram;
1089 }
1090
1091 bool memory_region_is_logging(MemoryRegion *mr)
1092 {
1093 return mr->dirty_log_mask;
1094 }
1095
1096 bool memory_region_is_rom(MemoryRegion *mr)
1097 {
1098 return mr->ram && mr->readonly;
1099 }
1100
1101 void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
1102 {
1103 mr->offset = offset;
1104 }
1105
1106 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1107 {
1108 uint8_t mask = 1 << client;
1109
1110 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1111 memory_region_update_topology(mr);
1112 }
1113
1114 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1115 unsigned client)
1116 {
1117 assert(mr->terminates);
1118 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
1119 }
1120
1121 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
1122 {
1123 assert(mr->terminates);
1124 return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
1125 }
1126
1127 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1128 {
1129 FlatRange *fr;
1130
1131 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1132 if (fr->mr == mr) {
1133 cpu_physical_sync_dirty_bitmap(int128_get64(fr->addr.start),
1134 int128_get64(addrrange_end(fr->addr)));
1135 }
1136 }
1137 }
1138
1139 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1140 {
1141 if (mr->readonly != readonly) {
1142 mr->readonly = readonly;
1143 memory_region_update_topology(mr);
1144 }
1145 }
1146
1147 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1148 {
1149 if (mr->readable != readable) {
1150 mr->readable = readable;
1151 memory_region_update_topology(mr);
1152 }
1153 }
1154
1155 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1156 target_phys_addr_t size, unsigned client)
1157 {
1158 assert(mr->terminates);
1159 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1160 mr->ram_addr + addr + size,
1161 1 << client);
1162 }
1163
1164 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1165 {
1166 if (mr->alias) {
1167 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1168 }
1169
1170 assert(mr->terminates);
1171
1172 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1173 }
1174
1175 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1176 {
1177 FlatRange *fr;
1178 CoalescedMemoryRange *cmr;
1179 AddrRange tmp;
1180
1181 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1182 if (fr->mr == mr) {
1183 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1184 int128_get64(fr->addr.size));
1185 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1186 tmp = addrrange_shift(cmr->addr,
1187 int128_sub(fr->addr.start,
1188 int128_make64(fr->offset_in_region)));
1189 if (!addrrange_intersects(tmp, fr->addr)) {
1190 continue;
1191 }
1192 tmp = addrrange_intersection(tmp, fr->addr);
1193 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1194 int128_get64(tmp.size));
1195 }
1196 }
1197 }
1198 }
1199
1200 void memory_region_set_coalescing(MemoryRegion *mr)
1201 {
1202 memory_region_clear_coalescing(mr);
1203 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1204 }
1205
1206 void memory_region_add_coalescing(MemoryRegion *mr,
1207 target_phys_addr_t offset,
1208 uint64_t size)
1209 {
1210 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1211
1212 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1213 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1214 memory_region_update_coalesced_range(mr);
1215 }
1216
1217 void memory_region_clear_coalescing(MemoryRegion *mr)
1218 {
1219 CoalescedMemoryRange *cmr;
1220
1221 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1222 cmr = QTAILQ_FIRST(&mr->coalesced);
1223 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1224 g_free(cmr);
1225 }
1226 memory_region_update_coalesced_range(mr);
1227 }
1228
1229 void memory_region_add_eventfd(MemoryRegion *mr,
1230 target_phys_addr_t addr,
1231 unsigned size,
1232 bool match_data,
1233 uint64_t data,
1234 int fd)
1235 {
1236 MemoryRegionIoeventfd mrfd = {
1237 .addr.start = int128_make64(addr),
1238 .addr.size = int128_make64(size),
1239 .match_data = match_data,
1240 .data = data,
1241 .fd = fd,
1242 };
1243 unsigned i;
1244
1245 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1246 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1247 break;
1248 }
1249 }
1250 ++mr->ioeventfd_nb;
1251 mr->ioeventfds = g_realloc(mr->ioeventfds,
1252 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1253 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1254 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1255 mr->ioeventfds[i] = mrfd;
1256 memory_region_update_topology(mr);
1257 }
1258
1259 void memory_region_del_eventfd(MemoryRegion *mr,
1260 target_phys_addr_t addr,
1261 unsigned size,
1262 bool match_data,
1263 uint64_t data,
1264 int fd)
1265 {
1266 MemoryRegionIoeventfd mrfd = {
1267 .addr.start = int128_make64(addr),
1268 .addr.size = int128_make64(size),
1269 .match_data = match_data,
1270 .data = data,
1271 .fd = fd,
1272 };
1273 unsigned i;
1274
1275 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1276 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1277 break;
1278 }
1279 }
1280 assert(i != mr->ioeventfd_nb);
1281 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1282 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1283 --mr->ioeventfd_nb;
1284 mr->ioeventfds = g_realloc(mr->ioeventfds,
1285 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1286 memory_region_update_topology(mr);
1287 }
1288
1289 static void memory_region_add_subregion_common(MemoryRegion *mr,
1290 target_phys_addr_t offset,
1291 MemoryRegion *subregion)
1292 {
1293 MemoryRegion *other;
1294
1295 assert(!subregion->parent);
1296 subregion->parent = mr;
1297 subregion->addr = offset;
1298 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1299 if (subregion->may_overlap || other->may_overlap) {
1300 continue;
1301 }
1302 if (int128_gt(int128_make64(offset),
1303 int128_add(int128_make64(other->addr), other->size))
1304 || int128_le(int128_add(int128_make64(offset), subregion->size),
1305 int128_make64(other->addr))) {
1306 continue;
1307 }
1308 #if 0
1309 printf("warning: subregion collision %llx/%llx (%s) "
1310 "vs %llx/%llx (%s)\n",
1311 (unsigned long long)offset,
1312 (unsigned long long)int128_get64(subregion->size),
1313 subregion->name,
1314 (unsigned long long)other->addr,
1315 (unsigned long long)int128_get64(other->size),
1316 other->name);
1317 #endif
1318 }
1319 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1320 if (subregion->priority >= other->priority) {
1321 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1322 goto done;
1323 }
1324 }
1325 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1326 done:
1327 memory_region_update_topology(mr);
1328 }
1329
1330
1331 void memory_region_add_subregion(MemoryRegion *mr,
1332 target_phys_addr_t offset,
1333 MemoryRegion *subregion)
1334 {
1335 subregion->may_overlap = false;
1336 subregion->priority = 0;
1337 memory_region_add_subregion_common(mr, offset, subregion);
1338 }
1339
1340 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1341 target_phys_addr_t offset,
1342 MemoryRegion *subregion,
1343 unsigned priority)
1344 {
1345 subregion->may_overlap = true;
1346 subregion->priority = priority;
1347 memory_region_add_subregion_common(mr, offset, subregion);
1348 }
1349
1350 void memory_region_del_subregion(MemoryRegion *mr,
1351 MemoryRegion *subregion)
1352 {
1353 assert(subregion->parent == mr);
1354 subregion->parent = NULL;
1355 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1356 memory_region_update_topology(mr);
1357 }
1358
1359 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1360 {
1361 if (enabled == mr->enabled) {
1362 return;
1363 }
1364 mr->enabled = enabled;
1365 memory_region_update_topology(NULL);
1366 }
1367
1368 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1369 {
1370 MemoryRegion *parent = mr->parent;
1371 unsigned priority = mr->priority;
1372 bool may_overlap = mr->may_overlap;
1373
1374 if (addr == mr->addr || !parent) {
1375 mr->addr = addr;
1376 return;
1377 }
1378
1379 memory_region_transaction_begin();
1380 memory_region_del_subregion(parent, mr);
1381 if (may_overlap) {
1382 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1383 } else {
1384 memory_region_add_subregion(parent, addr, mr);
1385 }
1386 memory_region_transaction_commit();
1387 }
1388
1389 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1390 {
1391 target_phys_addr_t old_offset = mr->alias_offset;
1392
1393 assert(mr->alias);
1394 mr->alias_offset = offset;
1395
1396 if (offset == old_offset || !mr->parent) {
1397 return;
1398 }
1399
1400 memory_region_update_topology(mr);
1401 }
1402
1403 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1404 {
1405 const AddrRange *addr = addr_;
1406 const FlatRange *fr = fr_;
1407
1408 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1409 return -1;
1410 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1411 return 1;
1412 }
1413 return 0;
1414 }
1415
1416 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1417 {
1418 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1419 sizeof(FlatRange), cmp_flatrange_addr);
1420 }
1421
1422 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1423 target_phys_addr_t addr, uint64_t size)
1424 {
1425 AddressSpace *as = memory_region_to_address_space(address_space);
1426 AddrRange range = addrrange_make(int128_make64(addr),
1427 int128_make64(size));
1428 FlatRange *fr = address_space_lookup(as, range);
1429 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1430
1431 if (!fr) {
1432 return ret;
1433 }
1434
1435 while (fr > as->current_map.ranges
1436 && addrrange_intersects(fr[-1].addr, range)) {
1437 --fr;
1438 }
1439
1440 ret.mr = fr->mr;
1441 range = addrrange_intersection(range, fr->addr);
1442 ret.offset_within_region = fr->offset_in_region;
1443 ret.offset_within_region += int128_get64(int128_sub(range.start,
1444 fr->addr.start));
1445 ret.size = int128_get64(range.size);
1446 ret.offset_within_address_space = int128_get64(range.start);
1447 return ret;
1448 }
1449
1450 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1451 {
1452 cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX);
1453 }
1454
1455 void set_system_memory_map(MemoryRegion *mr)
1456 {
1457 address_space_memory.root = mr;
1458 memory_region_update_topology(NULL);
1459 }
1460
1461 void set_system_io_map(MemoryRegion *mr)
1462 {
1463 address_space_io.root = mr;
1464 memory_region_update_topology(NULL);
1465 }
1466
1467 typedef struct MemoryRegionList MemoryRegionList;
1468
1469 struct MemoryRegionList {
1470 const MemoryRegion *mr;
1471 bool printed;
1472 QTAILQ_ENTRY(MemoryRegionList) queue;
1473 };
1474
1475 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1476
1477 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1478 const MemoryRegion *mr, unsigned int level,
1479 target_phys_addr_t base,
1480 MemoryRegionListHead *alias_print_queue)
1481 {
1482 MemoryRegionList *new_ml, *ml, *next_ml;
1483 MemoryRegionListHead submr_print_queue;
1484 const MemoryRegion *submr;
1485 unsigned int i;
1486
1487 if (!mr) {
1488 return;
1489 }
1490
1491 for (i = 0; i < level; i++) {
1492 mon_printf(f, " ");
1493 }
1494
1495 if (mr->alias) {
1496 MemoryRegionList *ml;
1497 bool found = false;
1498
1499 /* check if the alias is already in the queue */
1500 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1501 if (ml->mr == mr->alias && !ml->printed) {
1502 found = true;
1503 }
1504 }
1505
1506 if (!found) {
1507 ml = g_new(MemoryRegionList, 1);
1508 ml->mr = mr->alias;
1509 ml->printed = false;
1510 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1511 }
1512 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): alias %s @%s "
1513 TARGET_FMT_plx "-" TARGET_FMT_plx "\n",
1514 base + mr->addr,
1515 base + mr->addr
1516 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1517 mr->priority,
1518 mr->name,
1519 mr->alias->name,
1520 mr->alias_offset,
1521 mr->alias_offset
1522 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1523 } else {
1524 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d): %s\n",
1525 base + mr->addr,
1526 base + mr->addr
1527 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1528 mr->priority,
1529 mr->name);
1530 }
1531
1532 QTAILQ_INIT(&submr_print_queue);
1533
1534 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1535 new_ml = g_new(MemoryRegionList, 1);
1536 new_ml->mr = submr;
1537 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1538 if (new_ml->mr->addr < ml->mr->addr ||
1539 (new_ml->mr->addr == ml->mr->addr &&
1540 new_ml->mr->priority > ml->mr->priority)) {
1541 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1542 new_ml = NULL;
1543 break;
1544 }
1545 }
1546 if (new_ml) {
1547 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1548 }
1549 }
1550
1551 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1552 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1553 alias_print_queue);
1554 }
1555
1556 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1557 g_free(ml);
1558 }
1559 }
1560
1561 void mtree_info(fprintf_function mon_printf, void *f)
1562 {
1563 MemoryRegionListHead ml_head;
1564 MemoryRegionList *ml, *ml2;
1565
1566 QTAILQ_INIT(&ml_head);
1567
1568 mon_printf(f, "memory\n");
1569 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1570
1571 /* print aliased regions */
1572 QTAILQ_FOREACH(ml, &ml_head, queue) {
1573 if (!ml->printed) {
1574 mon_printf(f, "%s\n", ml->mr->name);
1575 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1576 }
1577 }
1578
1579 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1580 g_free(ml);
1581 }
1582
1583 if (address_space_io.root &&
1584 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1585 QTAILQ_INIT(&ml_head);
1586 mon_printf(f, "I/O\n");
1587 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1588 }
1589 }