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memory: Store physical root MR in FlatView
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace-root.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/misc/mmio_interface.h"
34 #include "hw/qdev-properties.h"
35 #include "migration/vmstate.h"
36
37 //#define DEBUG_UNASSIGNED
38
39 static unsigned memory_region_transaction_depth;
40 static bool memory_region_update_pending;
41 static bool ioeventfd_update_pending;
42 static bool global_dirty_log = false;
43
44 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 typedef struct AddrRange AddrRange;
51
52 /*
53 * Note that signed integers are needed for negative offsetting in aliases
54 * (large MemoryRegion::alias_offset).
55 */
56 struct AddrRange {
57 Int128 start;
58 Int128 size;
59 };
60
61 static AddrRange addrrange_make(Int128 start, Int128 size)
62 {
63 return (AddrRange) { start, size };
64 }
65
66 static bool addrrange_equal(AddrRange r1, AddrRange r2)
67 {
68 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
69 }
70
71 static Int128 addrrange_end(AddrRange r)
72 {
73 return int128_add(r.start, r.size);
74 }
75
76 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
77 {
78 int128_addto(&range.start, delta);
79 return range;
80 }
81
82 static bool addrrange_contains(AddrRange range, Int128 addr)
83 {
84 return int128_ge(addr, range.start)
85 && int128_lt(addr, addrrange_end(range));
86 }
87
88 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
89 {
90 return addrrange_contains(r1, r2.start)
91 || addrrange_contains(r2, r1.start);
92 }
93
94 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
95 {
96 Int128 start = int128_max(r1.start, r2.start);
97 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
98 return addrrange_make(start, int128_sub(end, start));
99 }
100
101 enum ListenerDirection { Forward, Reverse };
102
103 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
104 do { \
105 MemoryListener *_listener; \
106 \
107 switch (_direction) { \
108 case Forward: \
109 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
110 if (_listener->_callback) { \
111 _listener->_callback(_listener, ##_args); \
112 } \
113 } \
114 break; \
115 case Reverse: \
116 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
117 memory_listeners, link) { \
118 if (_listener->_callback) { \
119 _listener->_callback(_listener, ##_args); \
120 } \
121 } \
122 break; \
123 default: \
124 abort(); \
125 } \
126 } while (0)
127
128 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
129 do { \
130 MemoryListener *_listener; \
131 struct memory_listeners_as *list = &(_as)->listeners; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, list, link_as) { \
136 if (_listener->_callback) { \
137 _listener->_callback(_listener, _section, ##_args); \
138 } \
139 } \
140 break; \
141 case Reverse: \
142 QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
143 link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
175 MemoryRegionIoeventfd b)
176 {
177 if (int128_lt(a.addr.start, b.addr.start)) {
178 return true;
179 } else if (int128_gt(a.addr.start, b.addr.start)) {
180 return false;
181 } else if (int128_lt(a.addr.size, b.addr.size)) {
182 return true;
183 } else if (int128_gt(a.addr.size, b.addr.size)) {
184 return false;
185 } else if (a.match_data < b.match_data) {
186 return true;
187 } else if (a.match_data > b.match_data) {
188 return false;
189 } else if (a.match_data) {
190 if (a.data < b.data) {
191 return true;
192 } else if (a.data > b.data) {
193 return false;
194 }
195 }
196 if (a.e < b.e) {
197 return true;
198 } else if (a.e > b.e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
205 MemoryRegionIoeventfd b)
206 {
207 return !memory_region_ioeventfd_before(a, b)
208 && !memory_region_ioeventfd_before(b, a);
209 }
210
211 typedef struct FlatRange FlatRange;
212
213 /* Range of memory in the global map. Addresses are absolute. */
214 struct FlatRange {
215 MemoryRegion *mr;
216 hwaddr offset_in_region;
217 AddrRange addr;
218 uint8_t dirty_log_mask;
219 bool romd_mode;
220 bool readonly;
221 };
222
223 /* Flattened global view of current active memory hierarchy. Kept in sorted
224 * order.
225 */
226 struct FlatView {
227 struct rcu_head rcu;
228 unsigned ref;
229 FlatRange *ranges;
230 unsigned nr;
231 unsigned nr_allocated;
232 struct AddressSpaceDispatch *dispatch;
233 MemoryRegion *root;
234 };
235
236 typedef struct AddressSpaceOps AddressSpaceOps;
237
238 #define FOR_EACH_FLAT_RANGE(var, view) \
239 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
240
241 static inline MemoryRegionSection
242 section_from_flat_range(FlatRange *fr, FlatView *fv)
243 {
244 return (MemoryRegionSection) {
245 .mr = fr->mr,
246 .fv = fv,
247 .offset_within_region = fr->offset_in_region,
248 .size = fr->addr.size,
249 .offset_within_address_space = int128_get64(fr->addr.start),
250 .readonly = fr->readonly,
251 };
252 }
253
254 static bool flatrange_equal(FlatRange *a, FlatRange *b)
255 {
256 return a->mr == b->mr
257 && addrrange_equal(a->addr, b->addr)
258 && a->offset_in_region == b->offset_in_region
259 && a->romd_mode == b->romd_mode
260 && a->readonly == b->readonly;
261 }
262
263 static FlatView *flatview_new(MemoryRegion *mr_root)
264 {
265 FlatView *view;
266
267 view = g_new0(FlatView, 1);
268 view->ref = 1;
269 view->root = mr_root;
270 memory_region_ref(mr_root);
271
272 return view;
273 }
274
275 /* Insert a range into a given position. Caller is responsible for maintaining
276 * sorting order.
277 */
278 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
279 {
280 if (view->nr == view->nr_allocated) {
281 view->nr_allocated = MAX(2 * view->nr, 10);
282 view->ranges = g_realloc(view->ranges,
283 view->nr_allocated * sizeof(*view->ranges));
284 }
285 memmove(view->ranges + pos + 1, view->ranges + pos,
286 (view->nr - pos) * sizeof(FlatRange));
287 view->ranges[pos] = *range;
288 memory_region_ref(range->mr);
289 ++view->nr;
290 }
291
292 static void flatview_destroy(FlatView *view)
293 {
294 int i;
295
296 if (view->dispatch) {
297 address_space_dispatch_free(view->dispatch);
298 }
299 for (i = 0; i < view->nr; i++) {
300 memory_region_unref(view->ranges[i].mr);
301 }
302 g_free(view->ranges);
303 memory_region_unref(view->root);
304 g_free(view);
305 }
306
307 static bool flatview_ref(FlatView *view)
308 {
309 return atomic_fetch_inc_nonzero(&view->ref) > 0;
310 }
311
312 static void flatview_unref(FlatView *view)
313 {
314 if (atomic_fetch_dec(&view->ref) == 1) {
315 call_rcu(view, flatview_destroy, rcu);
316 }
317 }
318
319 FlatView *address_space_to_flatview(AddressSpace *as)
320 {
321 return atomic_rcu_read(&as->current_map);
322 }
323
324 AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv)
325 {
326 return fv->dispatch;
327 }
328
329 AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as)
330 {
331 return flatview_to_dispatch(address_space_to_flatview(as));
332 }
333
334 static bool can_merge(FlatRange *r1, FlatRange *r2)
335 {
336 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
337 && r1->mr == r2->mr
338 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
339 r1->addr.size),
340 int128_make64(r2->offset_in_region))
341 && r1->dirty_log_mask == r2->dirty_log_mask
342 && r1->romd_mode == r2->romd_mode
343 && r1->readonly == r2->readonly;
344 }
345
346 /* Attempt to simplify a view by merging adjacent ranges */
347 static void flatview_simplify(FlatView *view)
348 {
349 unsigned i, j;
350
351 i = 0;
352 while (i < view->nr) {
353 j = i + 1;
354 while (j < view->nr
355 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
356 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
357 ++j;
358 }
359 ++i;
360 memmove(&view->ranges[i], &view->ranges[j],
361 (view->nr - j) * sizeof(view->ranges[j]));
362 view->nr -= j - i;
363 }
364 }
365
366 static bool memory_region_big_endian(MemoryRegion *mr)
367 {
368 #ifdef TARGET_WORDS_BIGENDIAN
369 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
370 #else
371 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
372 #endif
373 }
374
375 static bool memory_region_wrong_endianness(MemoryRegion *mr)
376 {
377 #ifdef TARGET_WORDS_BIGENDIAN
378 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
379 #else
380 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
381 #endif
382 }
383
384 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
385 {
386 if (memory_region_wrong_endianness(mr)) {
387 switch (size) {
388 case 1:
389 break;
390 case 2:
391 *data = bswap16(*data);
392 break;
393 case 4:
394 *data = bswap32(*data);
395 break;
396 case 8:
397 *data = bswap64(*data);
398 break;
399 default:
400 abort();
401 }
402 }
403 }
404
405 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
406 {
407 MemoryRegion *root;
408 hwaddr abs_addr = offset;
409
410 abs_addr += mr->addr;
411 for (root = mr; root->container; ) {
412 root = root->container;
413 abs_addr += root->addr;
414 }
415
416 return abs_addr;
417 }
418
419 static int get_cpu_index(void)
420 {
421 if (current_cpu) {
422 return current_cpu->cpu_index;
423 }
424 return -1;
425 }
426
427 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
428 hwaddr addr,
429 uint64_t *value,
430 unsigned size,
431 unsigned shift,
432 uint64_t mask,
433 MemTxAttrs attrs)
434 {
435 uint64_t tmp;
436
437 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
438 if (mr->subpage) {
439 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
440 } else if (mr == &io_mem_notdirty) {
441 /* Accesses to code which has previously been translated into a TB show
442 * up in the MMIO path, as accesses to the io_mem_notdirty
443 * MemoryRegion. */
444 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
445 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
446 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
447 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
448 }
449 *value |= (tmp & mask) << shift;
450 return MEMTX_OK;
451 }
452
453 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
454 hwaddr addr,
455 uint64_t *value,
456 unsigned size,
457 unsigned shift,
458 uint64_t mask,
459 MemTxAttrs attrs)
460 {
461 uint64_t tmp;
462
463 tmp = mr->ops->read(mr->opaque, addr, size);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (mr == &io_mem_notdirty) {
467 /* Accesses to code which has previously been translated into a TB show
468 * up in the MMIO path, as accesses to the io_mem_notdirty
469 * MemoryRegion. */
470 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
471 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
474 }
475 *value |= (tmp & mask) << shift;
476 return MEMTX_OK;
477 }
478
479 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
480 hwaddr addr,
481 uint64_t *value,
482 unsigned size,
483 unsigned shift,
484 uint64_t mask,
485 MemTxAttrs attrs)
486 {
487 uint64_t tmp = 0;
488 MemTxResult r;
489
490 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
491 if (mr->subpage) {
492 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
493 } else if (mr == &io_mem_notdirty) {
494 /* Accesses to code which has previously been translated into a TB show
495 * up in the MMIO path, as accesses to the io_mem_notdirty
496 * MemoryRegion. */
497 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
498 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
499 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
500 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
501 }
502 *value |= (tmp & mask) << shift;
503 return r;
504 }
505
506 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
507 hwaddr addr,
508 uint64_t *value,
509 unsigned size,
510 unsigned shift,
511 uint64_t mask,
512 MemTxAttrs attrs)
513 {
514 uint64_t tmp;
515
516 tmp = (*value >> shift) & mask;
517 if (mr->subpage) {
518 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
519 } else if (mr == &io_mem_notdirty) {
520 /* Accesses to code which has previously been translated into a TB show
521 * up in the MMIO path, as accesses to the io_mem_notdirty
522 * MemoryRegion. */
523 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
524 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
525 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
526 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
527 }
528 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
529 return MEMTX_OK;
530 }
531
532 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
533 hwaddr addr,
534 uint64_t *value,
535 unsigned size,
536 unsigned shift,
537 uint64_t mask,
538 MemTxAttrs attrs)
539 {
540 uint64_t tmp;
541
542 tmp = (*value >> shift) & mask;
543 if (mr->subpage) {
544 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
545 } else if (mr == &io_mem_notdirty) {
546 /* Accesses to code which has previously been translated into a TB show
547 * up in the MMIO path, as accesses to the io_mem_notdirty
548 * MemoryRegion. */
549 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
550 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
551 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
552 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
553 }
554 mr->ops->write(mr->opaque, addr, tmp, size);
555 return MEMTX_OK;
556 }
557
558 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
559 hwaddr addr,
560 uint64_t *value,
561 unsigned size,
562 unsigned shift,
563 uint64_t mask,
564 MemTxAttrs attrs)
565 {
566 uint64_t tmp;
567
568 tmp = (*value >> shift) & mask;
569 if (mr->subpage) {
570 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
571 } else if (mr == &io_mem_notdirty) {
572 /* Accesses to code which has previously been translated into a TB show
573 * up in the MMIO path, as accesses to the io_mem_notdirty
574 * MemoryRegion. */
575 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
576 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
577 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
578 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
579 }
580 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
581 }
582
583 static MemTxResult access_with_adjusted_size(hwaddr addr,
584 uint64_t *value,
585 unsigned size,
586 unsigned access_size_min,
587 unsigned access_size_max,
588 MemTxResult (*access_fn)
589 (MemoryRegion *mr,
590 hwaddr addr,
591 uint64_t *value,
592 unsigned size,
593 unsigned shift,
594 uint64_t mask,
595 MemTxAttrs attrs),
596 MemoryRegion *mr,
597 MemTxAttrs attrs)
598 {
599 uint64_t access_mask;
600 unsigned access_size;
601 unsigned i;
602 MemTxResult r = MEMTX_OK;
603
604 if (!access_size_min) {
605 access_size_min = 1;
606 }
607 if (!access_size_max) {
608 access_size_max = 4;
609 }
610
611 /* FIXME: support unaligned access? */
612 access_size = MAX(MIN(size, access_size_max), access_size_min);
613 access_mask = -1ULL >> (64 - access_size * 8);
614 if (memory_region_big_endian(mr)) {
615 for (i = 0; i < size; i += access_size) {
616 r |= access_fn(mr, addr + i, value, access_size,
617 (size - access_size - i) * 8, access_mask, attrs);
618 }
619 } else {
620 for (i = 0; i < size; i += access_size) {
621 r |= access_fn(mr, addr + i, value, access_size, i * 8,
622 access_mask, attrs);
623 }
624 }
625 return r;
626 }
627
628 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
629 {
630 AddressSpace *as;
631
632 while (mr->container) {
633 mr = mr->container;
634 }
635 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
636 if (mr == as->root) {
637 return as;
638 }
639 }
640 return NULL;
641 }
642
643 /* Render a memory region into the global view. Ranges in @view obscure
644 * ranges in @mr.
645 */
646 static void render_memory_region(FlatView *view,
647 MemoryRegion *mr,
648 Int128 base,
649 AddrRange clip,
650 bool readonly)
651 {
652 MemoryRegion *subregion;
653 unsigned i;
654 hwaddr offset_in_region;
655 Int128 remain;
656 Int128 now;
657 FlatRange fr;
658 AddrRange tmp;
659
660 if (!mr->enabled) {
661 return;
662 }
663
664 int128_addto(&base, int128_make64(mr->addr));
665 readonly |= mr->readonly;
666
667 tmp = addrrange_make(base, mr->size);
668
669 if (!addrrange_intersects(tmp, clip)) {
670 return;
671 }
672
673 clip = addrrange_intersection(tmp, clip);
674
675 if (mr->alias) {
676 int128_subfrom(&base, int128_make64(mr->alias->addr));
677 int128_subfrom(&base, int128_make64(mr->alias_offset));
678 render_memory_region(view, mr->alias, base, clip, readonly);
679 return;
680 }
681
682 /* Render subregions in priority order. */
683 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
684 render_memory_region(view, subregion, base, clip, readonly);
685 }
686
687 if (!mr->terminates) {
688 return;
689 }
690
691 offset_in_region = int128_get64(int128_sub(clip.start, base));
692 base = clip.start;
693 remain = clip.size;
694
695 fr.mr = mr;
696 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
697 fr.romd_mode = mr->romd_mode;
698 fr.readonly = readonly;
699
700 /* Render the region itself into any gaps left by the current view. */
701 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
702 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
703 continue;
704 }
705 if (int128_lt(base, view->ranges[i].addr.start)) {
706 now = int128_min(remain,
707 int128_sub(view->ranges[i].addr.start, base));
708 fr.offset_in_region = offset_in_region;
709 fr.addr = addrrange_make(base, now);
710 flatview_insert(view, i, &fr);
711 ++i;
712 int128_addto(&base, now);
713 offset_in_region += int128_get64(now);
714 int128_subfrom(&remain, now);
715 }
716 now = int128_sub(int128_min(int128_add(base, remain),
717 addrrange_end(view->ranges[i].addr)),
718 base);
719 int128_addto(&base, now);
720 offset_in_region += int128_get64(now);
721 int128_subfrom(&remain, now);
722 }
723 if (int128_nz(remain)) {
724 fr.offset_in_region = offset_in_region;
725 fr.addr = addrrange_make(base, remain);
726 flatview_insert(view, i, &fr);
727 }
728 }
729
730 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
731 {
732 while (mr->alias && !mr->alias_offset &&
733 int128_ge(mr->size, mr->alias->size)) {
734 /* The alias is included in its entirety. Use it as
735 * the "real" root, so that we can share more FlatViews.
736 */
737 mr = mr->alias;
738 }
739
740 return mr;
741 }
742
743 /* Render a memory topology into a list of disjoint absolute ranges. */
744 static FlatView *generate_memory_topology(MemoryRegion *mr)
745 {
746 FlatView *view;
747
748 view = flatview_new(mr);
749
750 if (mr) {
751 render_memory_region(view, mr, int128_zero(),
752 addrrange_make(int128_zero(), int128_2_64()), false);
753 }
754 flatview_simplify(view);
755
756 return view;
757 }
758
759 static void address_space_add_del_ioeventfds(AddressSpace *as,
760 MemoryRegionIoeventfd *fds_new,
761 unsigned fds_new_nb,
762 MemoryRegionIoeventfd *fds_old,
763 unsigned fds_old_nb)
764 {
765 unsigned iold, inew;
766 MemoryRegionIoeventfd *fd;
767 MemoryRegionSection section;
768
769 /* Generate a symmetric difference of the old and new fd sets, adding
770 * and deleting as necessary.
771 */
772
773 iold = inew = 0;
774 while (iold < fds_old_nb || inew < fds_new_nb) {
775 if (iold < fds_old_nb
776 && (inew == fds_new_nb
777 || memory_region_ioeventfd_before(fds_old[iold],
778 fds_new[inew]))) {
779 fd = &fds_old[iold];
780 section = (MemoryRegionSection) {
781 .fv = address_space_to_flatview(as),
782 .offset_within_address_space = int128_get64(fd->addr.start),
783 .size = fd->addr.size,
784 };
785 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
786 fd->match_data, fd->data, fd->e);
787 ++iold;
788 } else if (inew < fds_new_nb
789 && (iold == fds_old_nb
790 || memory_region_ioeventfd_before(fds_new[inew],
791 fds_old[iold]))) {
792 fd = &fds_new[inew];
793 section = (MemoryRegionSection) {
794 .fv = address_space_to_flatview(as),
795 .offset_within_address_space = int128_get64(fd->addr.start),
796 .size = fd->addr.size,
797 };
798 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
799 fd->match_data, fd->data, fd->e);
800 ++inew;
801 } else {
802 ++iold;
803 ++inew;
804 }
805 }
806 }
807
808 static FlatView *address_space_get_flatview(AddressSpace *as)
809 {
810 FlatView *view;
811
812 rcu_read_lock();
813 do {
814 view = address_space_to_flatview(as);
815 /* If somebody has replaced as->current_map concurrently,
816 * flatview_ref returns false.
817 */
818 } while (!flatview_ref(view));
819 rcu_read_unlock();
820 return view;
821 }
822
823 static void address_space_update_ioeventfds(AddressSpace *as)
824 {
825 FlatView *view;
826 FlatRange *fr;
827 unsigned ioeventfd_nb = 0;
828 MemoryRegionIoeventfd *ioeventfds = NULL;
829 AddrRange tmp;
830 unsigned i;
831
832 view = address_space_get_flatview(as);
833 FOR_EACH_FLAT_RANGE(fr, view) {
834 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
835 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
836 int128_sub(fr->addr.start,
837 int128_make64(fr->offset_in_region)));
838 if (addrrange_intersects(fr->addr, tmp)) {
839 ++ioeventfd_nb;
840 ioeventfds = g_realloc(ioeventfds,
841 ioeventfd_nb * sizeof(*ioeventfds));
842 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
843 ioeventfds[ioeventfd_nb-1].addr = tmp;
844 }
845 }
846 }
847
848 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
849 as->ioeventfds, as->ioeventfd_nb);
850
851 g_free(as->ioeventfds);
852 as->ioeventfds = ioeventfds;
853 as->ioeventfd_nb = ioeventfd_nb;
854 flatview_unref(view);
855 }
856
857 static void address_space_update_topology_pass(AddressSpace *as,
858 const FlatView *old_view,
859 const FlatView *new_view,
860 bool adding)
861 {
862 unsigned iold, inew;
863 FlatRange *frold, *frnew;
864
865 /* Generate a symmetric difference of the old and new memory maps.
866 * Kill ranges in the old map, and instantiate ranges in the new map.
867 */
868 iold = inew = 0;
869 while (iold < old_view->nr || inew < new_view->nr) {
870 if (iold < old_view->nr) {
871 frold = &old_view->ranges[iold];
872 } else {
873 frold = NULL;
874 }
875 if (inew < new_view->nr) {
876 frnew = &new_view->ranges[inew];
877 } else {
878 frnew = NULL;
879 }
880
881 if (frold
882 && (!frnew
883 || int128_lt(frold->addr.start, frnew->addr.start)
884 || (int128_eq(frold->addr.start, frnew->addr.start)
885 && !flatrange_equal(frold, frnew)))) {
886 /* In old but not in new, or in both but attributes changed. */
887
888 if (!adding) {
889 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
890 }
891
892 ++iold;
893 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
894 /* In both and unchanged (except logging may have changed) */
895
896 if (adding) {
897 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
898 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
899 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
900 frold->dirty_log_mask,
901 frnew->dirty_log_mask);
902 }
903 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
904 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
905 frold->dirty_log_mask,
906 frnew->dirty_log_mask);
907 }
908 }
909
910 ++iold;
911 ++inew;
912 } else {
913 /* In new */
914
915 if (adding) {
916 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
917 }
918
919 ++inew;
920 }
921 }
922 }
923
924 static void address_space_update_topology(AddressSpace *as)
925 {
926 FlatView *old_view = address_space_get_flatview(as);
927 MemoryRegion *physmr = memory_region_get_flatview_root(old_view->root);
928 FlatView *new_view = generate_memory_topology(physmr);
929 int i;
930
931 new_view->dispatch = address_space_dispatch_new(new_view);
932 for (i = 0; i < new_view->nr; i++) {
933 MemoryRegionSection mrs =
934 section_from_flat_range(&new_view->ranges[i], new_view);
935 flatview_add_to_dispatch(new_view, &mrs);
936 }
937 address_space_dispatch_compact(new_view->dispatch);
938
939 if (!QTAILQ_EMPTY(&as->listeners)) {
940 address_space_update_topology_pass(as, old_view, new_view, false);
941 address_space_update_topology_pass(as, old_view, new_view, true);
942 }
943
944 /* Writes are protected by the BQL. */
945 atomic_rcu_set(&as->current_map, new_view);
946 flatview_unref(old_view);
947
948 /* Note that all the old MemoryRegions are still alive up to this
949 * point. This relieves most MemoryListeners from the need to
950 * ref/unref the MemoryRegions they get---unless they use them
951 * outside the iothread mutex, in which case precise reference
952 * counting is necessary.
953 */
954 flatview_unref(old_view);
955
956 address_space_update_ioeventfds(as);
957 }
958
959 void memory_region_transaction_begin(void)
960 {
961 qemu_flush_coalesced_mmio_buffer();
962 ++memory_region_transaction_depth;
963 }
964
965 void memory_region_transaction_commit(void)
966 {
967 AddressSpace *as;
968
969 assert(memory_region_transaction_depth);
970 assert(qemu_mutex_iothread_locked());
971
972 --memory_region_transaction_depth;
973 if (!memory_region_transaction_depth) {
974 if (memory_region_update_pending) {
975 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
976
977 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
978 address_space_update_topology(as);
979 }
980 memory_region_update_pending = false;
981 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
982 } else if (ioeventfd_update_pending) {
983 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
984 address_space_update_ioeventfds(as);
985 }
986 ioeventfd_update_pending = false;
987 }
988 }
989 }
990
991 static void memory_region_destructor_none(MemoryRegion *mr)
992 {
993 }
994
995 static void memory_region_destructor_ram(MemoryRegion *mr)
996 {
997 qemu_ram_free(mr->ram_block);
998 }
999
1000 static bool memory_region_need_escape(char c)
1001 {
1002 return c == '/' || c == '[' || c == '\\' || c == ']';
1003 }
1004
1005 static char *memory_region_escape_name(const char *name)
1006 {
1007 const char *p;
1008 char *escaped, *q;
1009 uint8_t c;
1010 size_t bytes = 0;
1011
1012 for (p = name; *p; p++) {
1013 bytes += memory_region_need_escape(*p) ? 4 : 1;
1014 }
1015 if (bytes == p - name) {
1016 return g_memdup(name, bytes + 1);
1017 }
1018
1019 escaped = g_malloc(bytes + 1);
1020 for (p = name, q = escaped; *p; p++) {
1021 c = *p;
1022 if (unlikely(memory_region_need_escape(c))) {
1023 *q++ = '\\';
1024 *q++ = 'x';
1025 *q++ = "0123456789abcdef"[c >> 4];
1026 c = "0123456789abcdef"[c & 15];
1027 }
1028 *q++ = c;
1029 }
1030 *q = 0;
1031 return escaped;
1032 }
1033
1034 static void memory_region_do_init(MemoryRegion *mr,
1035 Object *owner,
1036 const char *name,
1037 uint64_t size)
1038 {
1039 mr->size = int128_make64(size);
1040 if (size == UINT64_MAX) {
1041 mr->size = int128_2_64();
1042 }
1043 mr->name = g_strdup(name);
1044 mr->owner = owner;
1045 mr->ram_block = NULL;
1046
1047 if (name) {
1048 char *escaped_name = memory_region_escape_name(name);
1049 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1050
1051 if (!owner) {
1052 owner = container_get(qdev_get_machine(), "/unattached");
1053 }
1054
1055 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1056 object_unref(OBJECT(mr));
1057 g_free(name_array);
1058 g_free(escaped_name);
1059 }
1060 }
1061
1062 void memory_region_init(MemoryRegion *mr,
1063 Object *owner,
1064 const char *name,
1065 uint64_t size)
1066 {
1067 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1068 memory_region_do_init(mr, owner, name, size);
1069 }
1070
1071 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1072 void *opaque, Error **errp)
1073 {
1074 MemoryRegion *mr = MEMORY_REGION(obj);
1075 uint64_t value = mr->addr;
1076
1077 visit_type_uint64(v, name, &value, errp);
1078 }
1079
1080 static void memory_region_get_container(Object *obj, Visitor *v,
1081 const char *name, void *opaque,
1082 Error **errp)
1083 {
1084 MemoryRegion *mr = MEMORY_REGION(obj);
1085 gchar *path = (gchar *)"";
1086
1087 if (mr->container) {
1088 path = object_get_canonical_path(OBJECT(mr->container));
1089 }
1090 visit_type_str(v, name, &path, errp);
1091 if (mr->container) {
1092 g_free(path);
1093 }
1094 }
1095
1096 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1097 const char *part)
1098 {
1099 MemoryRegion *mr = MEMORY_REGION(obj);
1100
1101 return OBJECT(mr->container);
1102 }
1103
1104 static void memory_region_get_priority(Object *obj, Visitor *v,
1105 const char *name, void *opaque,
1106 Error **errp)
1107 {
1108 MemoryRegion *mr = MEMORY_REGION(obj);
1109 int32_t value = mr->priority;
1110
1111 visit_type_int32(v, name, &value, errp);
1112 }
1113
1114 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1115 void *opaque, Error **errp)
1116 {
1117 MemoryRegion *mr = MEMORY_REGION(obj);
1118 uint64_t value = memory_region_size(mr);
1119
1120 visit_type_uint64(v, name, &value, errp);
1121 }
1122
1123 static void memory_region_initfn(Object *obj)
1124 {
1125 MemoryRegion *mr = MEMORY_REGION(obj);
1126 ObjectProperty *op;
1127
1128 mr->ops = &unassigned_mem_ops;
1129 mr->enabled = true;
1130 mr->romd_mode = true;
1131 mr->global_locking = true;
1132 mr->destructor = memory_region_destructor_none;
1133 QTAILQ_INIT(&mr->subregions);
1134 QTAILQ_INIT(&mr->coalesced);
1135
1136 op = object_property_add(OBJECT(mr), "container",
1137 "link<" TYPE_MEMORY_REGION ">",
1138 memory_region_get_container,
1139 NULL, /* memory_region_set_container */
1140 NULL, NULL, &error_abort);
1141 op->resolve = memory_region_resolve_container;
1142
1143 object_property_add(OBJECT(mr), "addr", "uint64",
1144 memory_region_get_addr,
1145 NULL, /* memory_region_set_addr */
1146 NULL, NULL, &error_abort);
1147 object_property_add(OBJECT(mr), "priority", "uint32",
1148 memory_region_get_priority,
1149 NULL, /* memory_region_set_priority */
1150 NULL, NULL, &error_abort);
1151 object_property_add(OBJECT(mr), "size", "uint64",
1152 memory_region_get_size,
1153 NULL, /* memory_region_set_size, */
1154 NULL, NULL, &error_abort);
1155 }
1156
1157 static void iommu_memory_region_initfn(Object *obj)
1158 {
1159 MemoryRegion *mr = MEMORY_REGION(obj);
1160
1161 mr->is_iommu = true;
1162 }
1163
1164 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1165 unsigned size)
1166 {
1167 #ifdef DEBUG_UNASSIGNED
1168 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1169 #endif
1170 if (current_cpu != NULL) {
1171 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1172 }
1173 return 0;
1174 }
1175
1176 static void unassigned_mem_write(void *opaque, hwaddr addr,
1177 uint64_t val, unsigned size)
1178 {
1179 #ifdef DEBUG_UNASSIGNED
1180 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1181 #endif
1182 if (current_cpu != NULL) {
1183 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1184 }
1185 }
1186
1187 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1188 unsigned size, bool is_write)
1189 {
1190 return false;
1191 }
1192
1193 const MemoryRegionOps unassigned_mem_ops = {
1194 .valid.accepts = unassigned_mem_accepts,
1195 .endianness = DEVICE_NATIVE_ENDIAN,
1196 };
1197
1198 static uint64_t memory_region_ram_device_read(void *opaque,
1199 hwaddr addr, unsigned size)
1200 {
1201 MemoryRegion *mr = opaque;
1202 uint64_t data = (uint64_t)~0;
1203
1204 switch (size) {
1205 case 1:
1206 data = *(uint8_t *)(mr->ram_block->host + addr);
1207 break;
1208 case 2:
1209 data = *(uint16_t *)(mr->ram_block->host + addr);
1210 break;
1211 case 4:
1212 data = *(uint32_t *)(mr->ram_block->host + addr);
1213 break;
1214 case 8:
1215 data = *(uint64_t *)(mr->ram_block->host + addr);
1216 break;
1217 }
1218
1219 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1220
1221 return data;
1222 }
1223
1224 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1225 uint64_t data, unsigned size)
1226 {
1227 MemoryRegion *mr = opaque;
1228
1229 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1230
1231 switch (size) {
1232 case 1:
1233 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1234 break;
1235 case 2:
1236 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1237 break;
1238 case 4:
1239 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1240 break;
1241 case 8:
1242 *(uint64_t *)(mr->ram_block->host + addr) = data;
1243 break;
1244 }
1245 }
1246
1247 static const MemoryRegionOps ram_device_mem_ops = {
1248 .read = memory_region_ram_device_read,
1249 .write = memory_region_ram_device_write,
1250 .endianness = DEVICE_HOST_ENDIAN,
1251 .valid = {
1252 .min_access_size = 1,
1253 .max_access_size = 8,
1254 .unaligned = true,
1255 },
1256 .impl = {
1257 .min_access_size = 1,
1258 .max_access_size = 8,
1259 .unaligned = true,
1260 },
1261 };
1262
1263 bool memory_region_access_valid(MemoryRegion *mr,
1264 hwaddr addr,
1265 unsigned size,
1266 bool is_write)
1267 {
1268 int access_size_min, access_size_max;
1269 int access_size, i;
1270
1271 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1272 return false;
1273 }
1274
1275 if (!mr->ops->valid.accepts) {
1276 return true;
1277 }
1278
1279 access_size_min = mr->ops->valid.min_access_size;
1280 if (!mr->ops->valid.min_access_size) {
1281 access_size_min = 1;
1282 }
1283
1284 access_size_max = mr->ops->valid.max_access_size;
1285 if (!mr->ops->valid.max_access_size) {
1286 access_size_max = 4;
1287 }
1288
1289 access_size = MAX(MIN(size, access_size_max), access_size_min);
1290 for (i = 0; i < size; i += access_size) {
1291 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1292 is_write)) {
1293 return false;
1294 }
1295 }
1296
1297 return true;
1298 }
1299
1300 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1301 hwaddr addr,
1302 uint64_t *pval,
1303 unsigned size,
1304 MemTxAttrs attrs)
1305 {
1306 *pval = 0;
1307
1308 if (mr->ops->read) {
1309 return access_with_adjusted_size(addr, pval, size,
1310 mr->ops->impl.min_access_size,
1311 mr->ops->impl.max_access_size,
1312 memory_region_read_accessor,
1313 mr, attrs);
1314 } else if (mr->ops->read_with_attrs) {
1315 return access_with_adjusted_size(addr, pval, size,
1316 mr->ops->impl.min_access_size,
1317 mr->ops->impl.max_access_size,
1318 memory_region_read_with_attrs_accessor,
1319 mr, attrs);
1320 } else {
1321 return access_with_adjusted_size(addr, pval, size, 1, 4,
1322 memory_region_oldmmio_read_accessor,
1323 mr, attrs);
1324 }
1325 }
1326
1327 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1328 hwaddr addr,
1329 uint64_t *pval,
1330 unsigned size,
1331 MemTxAttrs attrs)
1332 {
1333 MemTxResult r;
1334
1335 if (!memory_region_access_valid(mr, addr, size, false)) {
1336 *pval = unassigned_mem_read(mr, addr, size);
1337 return MEMTX_DECODE_ERROR;
1338 }
1339
1340 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1341 adjust_endianness(mr, pval, size);
1342 return r;
1343 }
1344
1345 /* Return true if an eventfd was signalled */
1346 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1347 hwaddr addr,
1348 uint64_t data,
1349 unsigned size,
1350 MemTxAttrs attrs)
1351 {
1352 MemoryRegionIoeventfd ioeventfd = {
1353 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1354 .data = data,
1355 };
1356 unsigned i;
1357
1358 for (i = 0; i < mr->ioeventfd_nb; i++) {
1359 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1360 ioeventfd.e = mr->ioeventfds[i].e;
1361
1362 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1363 event_notifier_set(ioeventfd.e);
1364 return true;
1365 }
1366 }
1367
1368 return false;
1369 }
1370
1371 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1372 hwaddr addr,
1373 uint64_t data,
1374 unsigned size,
1375 MemTxAttrs attrs)
1376 {
1377 if (!memory_region_access_valid(mr, addr, size, true)) {
1378 unassigned_mem_write(mr, addr, data, size);
1379 return MEMTX_DECODE_ERROR;
1380 }
1381
1382 adjust_endianness(mr, &data, size);
1383
1384 if ((!kvm_eventfds_enabled()) &&
1385 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1386 return MEMTX_OK;
1387 }
1388
1389 if (mr->ops->write) {
1390 return access_with_adjusted_size(addr, &data, size,
1391 mr->ops->impl.min_access_size,
1392 mr->ops->impl.max_access_size,
1393 memory_region_write_accessor, mr,
1394 attrs);
1395 } else if (mr->ops->write_with_attrs) {
1396 return
1397 access_with_adjusted_size(addr, &data, size,
1398 mr->ops->impl.min_access_size,
1399 mr->ops->impl.max_access_size,
1400 memory_region_write_with_attrs_accessor,
1401 mr, attrs);
1402 } else {
1403 return access_with_adjusted_size(addr, &data, size, 1, 4,
1404 memory_region_oldmmio_write_accessor,
1405 mr, attrs);
1406 }
1407 }
1408
1409 void memory_region_init_io(MemoryRegion *mr,
1410 Object *owner,
1411 const MemoryRegionOps *ops,
1412 void *opaque,
1413 const char *name,
1414 uint64_t size)
1415 {
1416 memory_region_init(mr, owner, name, size);
1417 mr->ops = ops ? ops : &unassigned_mem_ops;
1418 mr->opaque = opaque;
1419 mr->terminates = true;
1420 }
1421
1422 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1423 Object *owner,
1424 const char *name,
1425 uint64_t size,
1426 Error **errp)
1427 {
1428 memory_region_init(mr, owner, name, size);
1429 mr->ram = true;
1430 mr->terminates = true;
1431 mr->destructor = memory_region_destructor_ram;
1432 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1433 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1434 }
1435
1436 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1437 Object *owner,
1438 const char *name,
1439 uint64_t size,
1440 uint64_t max_size,
1441 void (*resized)(const char*,
1442 uint64_t length,
1443 void *host),
1444 Error **errp)
1445 {
1446 memory_region_init(mr, owner, name, size);
1447 mr->ram = true;
1448 mr->terminates = true;
1449 mr->destructor = memory_region_destructor_ram;
1450 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1451 mr, errp);
1452 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1453 }
1454
1455 #ifdef __linux__
1456 void memory_region_init_ram_from_file(MemoryRegion *mr,
1457 struct Object *owner,
1458 const char *name,
1459 uint64_t size,
1460 bool share,
1461 const char *path,
1462 Error **errp)
1463 {
1464 memory_region_init(mr, owner, name, size);
1465 mr->ram = true;
1466 mr->terminates = true;
1467 mr->destructor = memory_region_destructor_ram;
1468 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1469 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1470 }
1471
1472 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1473 struct Object *owner,
1474 const char *name,
1475 uint64_t size,
1476 bool share,
1477 int fd,
1478 Error **errp)
1479 {
1480 memory_region_init(mr, owner, name, size);
1481 mr->ram = true;
1482 mr->terminates = true;
1483 mr->destructor = memory_region_destructor_ram;
1484 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
1485 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1486 }
1487 #endif
1488
1489 void memory_region_init_ram_ptr(MemoryRegion *mr,
1490 Object *owner,
1491 const char *name,
1492 uint64_t size,
1493 void *ptr)
1494 {
1495 memory_region_init(mr, owner, name, size);
1496 mr->ram = true;
1497 mr->terminates = true;
1498 mr->destructor = memory_region_destructor_ram;
1499 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1500
1501 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1502 assert(ptr != NULL);
1503 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1504 }
1505
1506 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1507 Object *owner,
1508 const char *name,
1509 uint64_t size,
1510 void *ptr)
1511 {
1512 memory_region_init_ram_ptr(mr, owner, name, size, ptr);
1513 mr->ram_device = true;
1514 mr->ops = &ram_device_mem_ops;
1515 mr->opaque = mr;
1516 }
1517
1518 void memory_region_init_alias(MemoryRegion *mr,
1519 Object *owner,
1520 const char *name,
1521 MemoryRegion *orig,
1522 hwaddr offset,
1523 uint64_t size)
1524 {
1525 memory_region_init(mr, owner, name, size);
1526 mr->alias = orig;
1527 mr->alias_offset = offset;
1528 }
1529
1530 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1531 struct Object *owner,
1532 const char *name,
1533 uint64_t size,
1534 Error **errp)
1535 {
1536 memory_region_init(mr, owner, name, size);
1537 mr->ram = true;
1538 mr->readonly = true;
1539 mr->terminates = true;
1540 mr->destructor = memory_region_destructor_ram;
1541 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1542 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1543 }
1544
1545 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1546 Object *owner,
1547 const MemoryRegionOps *ops,
1548 void *opaque,
1549 const char *name,
1550 uint64_t size,
1551 Error **errp)
1552 {
1553 assert(ops);
1554 memory_region_init(mr, owner, name, size);
1555 mr->ops = ops;
1556 mr->opaque = opaque;
1557 mr->terminates = true;
1558 mr->rom_device = true;
1559 mr->destructor = memory_region_destructor_ram;
1560 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1561 }
1562
1563 void memory_region_init_iommu(void *_iommu_mr,
1564 size_t instance_size,
1565 const char *mrtypename,
1566 Object *owner,
1567 const char *name,
1568 uint64_t size)
1569 {
1570 struct IOMMUMemoryRegion *iommu_mr;
1571 struct MemoryRegion *mr;
1572
1573 object_initialize(_iommu_mr, instance_size, mrtypename);
1574 mr = MEMORY_REGION(_iommu_mr);
1575 memory_region_do_init(mr, owner, name, size);
1576 iommu_mr = IOMMU_MEMORY_REGION(mr);
1577 mr->terminates = true; /* then re-forwards */
1578 QLIST_INIT(&iommu_mr->iommu_notify);
1579 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1580 }
1581
1582 static void memory_region_finalize(Object *obj)
1583 {
1584 MemoryRegion *mr = MEMORY_REGION(obj);
1585
1586 assert(!mr->container);
1587
1588 /* We know the region is not visible in any address space (it
1589 * does not have a container and cannot be a root either because
1590 * it has no references, so we can blindly clear mr->enabled.
1591 * memory_region_set_enabled instead could trigger a transaction
1592 * and cause an infinite loop.
1593 */
1594 mr->enabled = false;
1595 memory_region_transaction_begin();
1596 while (!QTAILQ_EMPTY(&mr->subregions)) {
1597 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1598 memory_region_del_subregion(mr, subregion);
1599 }
1600 memory_region_transaction_commit();
1601
1602 mr->destructor(mr);
1603 memory_region_clear_coalescing(mr);
1604 g_free((char *)mr->name);
1605 g_free(mr->ioeventfds);
1606 }
1607
1608 Object *memory_region_owner(MemoryRegion *mr)
1609 {
1610 Object *obj = OBJECT(mr);
1611 return obj->parent;
1612 }
1613
1614 void memory_region_ref(MemoryRegion *mr)
1615 {
1616 /* MMIO callbacks most likely will access data that belongs
1617 * to the owner, hence the need to ref/unref the owner whenever
1618 * the memory region is in use.
1619 *
1620 * The memory region is a child of its owner. As long as the
1621 * owner doesn't call unparent itself on the memory region,
1622 * ref-ing the owner will also keep the memory region alive.
1623 * Memory regions without an owner are supposed to never go away;
1624 * we do not ref/unref them because it slows down DMA sensibly.
1625 */
1626 if (mr && mr->owner) {
1627 object_ref(mr->owner);
1628 }
1629 }
1630
1631 void memory_region_unref(MemoryRegion *mr)
1632 {
1633 if (mr && mr->owner) {
1634 object_unref(mr->owner);
1635 }
1636 }
1637
1638 uint64_t memory_region_size(MemoryRegion *mr)
1639 {
1640 if (int128_eq(mr->size, int128_2_64())) {
1641 return UINT64_MAX;
1642 }
1643 return int128_get64(mr->size);
1644 }
1645
1646 const char *memory_region_name(const MemoryRegion *mr)
1647 {
1648 if (!mr->name) {
1649 ((MemoryRegion *)mr)->name =
1650 object_get_canonical_path_component(OBJECT(mr));
1651 }
1652 return mr->name;
1653 }
1654
1655 bool memory_region_is_ram_device(MemoryRegion *mr)
1656 {
1657 return mr->ram_device;
1658 }
1659
1660 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1661 {
1662 uint8_t mask = mr->dirty_log_mask;
1663 if (global_dirty_log && mr->ram_block) {
1664 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1665 }
1666 return mask;
1667 }
1668
1669 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1670 {
1671 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1672 }
1673
1674 static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
1675 {
1676 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1677 IOMMUNotifier *iommu_notifier;
1678 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1679
1680 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1681 flags |= iommu_notifier->notifier_flags;
1682 }
1683
1684 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1685 imrc->notify_flag_changed(iommu_mr,
1686 iommu_mr->iommu_notify_flags,
1687 flags);
1688 }
1689
1690 iommu_mr->iommu_notify_flags = flags;
1691 }
1692
1693 void memory_region_register_iommu_notifier(MemoryRegion *mr,
1694 IOMMUNotifier *n)
1695 {
1696 IOMMUMemoryRegion *iommu_mr;
1697
1698 if (mr->alias) {
1699 memory_region_register_iommu_notifier(mr->alias, n);
1700 return;
1701 }
1702
1703 /* We need to register for at least one bitfield */
1704 iommu_mr = IOMMU_MEMORY_REGION(mr);
1705 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1706 assert(n->start <= n->end);
1707 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1708 memory_region_update_iommu_notify_flags(iommu_mr);
1709 }
1710
1711 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1712 {
1713 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1714
1715 if (imrc->get_min_page_size) {
1716 return imrc->get_min_page_size(iommu_mr);
1717 }
1718 return TARGET_PAGE_SIZE;
1719 }
1720
1721 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1722 {
1723 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1724 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1725 hwaddr addr, granularity;
1726 IOMMUTLBEntry iotlb;
1727
1728 /* If the IOMMU has its own replay callback, override */
1729 if (imrc->replay) {
1730 imrc->replay(iommu_mr, n);
1731 return;
1732 }
1733
1734 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1735
1736 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1737 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE);
1738 if (iotlb.perm != IOMMU_NONE) {
1739 n->notify(n, &iotlb);
1740 }
1741
1742 /* if (2^64 - MR size) < granularity, it's possible to get an
1743 * infinite loop here. This should catch such a wraparound */
1744 if ((addr + granularity) < addr) {
1745 break;
1746 }
1747 }
1748 }
1749
1750 void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
1751 {
1752 IOMMUNotifier *notifier;
1753
1754 IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
1755 memory_region_iommu_replay(iommu_mr, notifier);
1756 }
1757 }
1758
1759 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1760 IOMMUNotifier *n)
1761 {
1762 IOMMUMemoryRegion *iommu_mr;
1763
1764 if (mr->alias) {
1765 memory_region_unregister_iommu_notifier(mr->alias, n);
1766 return;
1767 }
1768 QLIST_REMOVE(n, node);
1769 iommu_mr = IOMMU_MEMORY_REGION(mr);
1770 memory_region_update_iommu_notify_flags(iommu_mr);
1771 }
1772
1773 void memory_region_notify_one(IOMMUNotifier *notifier,
1774 IOMMUTLBEntry *entry)
1775 {
1776 IOMMUNotifierFlag request_flags;
1777
1778 /*
1779 * Skip the notification if the notification does not overlap
1780 * with registered range.
1781 */
1782 if (notifier->start > entry->iova + entry->addr_mask + 1 ||
1783 notifier->end < entry->iova) {
1784 return;
1785 }
1786
1787 if (entry->perm & IOMMU_RW) {
1788 request_flags = IOMMU_NOTIFIER_MAP;
1789 } else {
1790 request_flags = IOMMU_NOTIFIER_UNMAP;
1791 }
1792
1793 if (notifier->notifier_flags & request_flags) {
1794 notifier->notify(notifier, entry);
1795 }
1796 }
1797
1798 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1799 IOMMUTLBEntry entry)
1800 {
1801 IOMMUNotifier *iommu_notifier;
1802
1803 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1804
1805 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1806 memory_region_notify_one(iommu_notifier, &entry);
1807 }
1808 }
1809
1810 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1811 {
1812 uint8_t mask = 1 << client;
1813 uint8_t old_logging;
1814
1815 assert(client == DIRTY_MEMORY_VGA);
1816 old_logging = mr->vga_logging_count;
1817 mr->vga_logging_count += log ? 1 : -1;
1818 if (!!old_logging == !!mr->vga_logging_count) {
1819 return;
1820 }
1821
1822 memory_region_transaction_begin();
1823 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1824 memory_region_update_pending |= mr->enabled;
1825 memory_region_transaction_commit();
1826 }
1827
1828 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1829 hwaddr size, unsigned client)
1830 {
1831 assert(mr->ram_block);
1832 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1833 size, client);
1834 }
1835
1836 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1837 hwaddr size)
1838 {
1839 assert(mr->ram_block);
1840 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1841 size,
1842 memory_region_get_dirty_log_mask(mr));
1843 }
1844
1845 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1846 hwaddr size, unsigned client)
1847 {
1848 assert(mr->ram_block);
1849 return cpu_physical_memory_test_and_clear_dirty(
1850 memory_region_get_ram_addr(mr) + addr, size, client);
1851 }
1852
1853 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
1854 hwaddr addr,
1855 hwaddr size,
1856 unsigned client)
1857 {
1858 assert(mr->ram_block);
1859 return cpu_physical_memory_snapshot_and_clear_dirty(
1860 memory_region_get_ram_addr(mr) + addr, size, client);
1861 }
1862
1863 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
1864 hwaddr addr, hwaddr size)
1865 {
1866 assert(mr->ram_block);
1867 return cpu_physical_memory_snapshot_get_dirty(snap,
1868 memory_region_get_ram_addr(mr) + addr, size);
1869 }
1870
1871 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1872 {
1873 MemoryListener *listener;
1874 AddressSpace *as;
1875 FlatView *view;
1876 FlatRange *fr;
1877
1878 /* If the same address space has multiple log_sync listeners, we
1879 * visit that address space's FlatView multiple times. But because
1880 * log_sync listeners are rare, it's still cheaper than walking each
1881 * address space once.
1882 */
1883 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1884 if (!listener->log_sync) {
1885 continue;
1886 }
1887 as = listener->address_space;
1888 view = address_space_get_flatview(as);
1889 FOR_EACH_FLAT_RANGE(fr, view) {
1890 if (fr->mr == mr) {
1891 MemoryRegionSection mrs = section_from_flat_range(fr, view);
1892 listener->log_sync(listener, &mrs);
1893 }
1894 }
1895 flatview_unref(view);
1896 }
1897 }
1898
1899 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1900 {
1901 if (mr->readonly != readonly) {
1902 memory_region_transaction_begin();
1903 mr->readonly = readonly;
1904 memory_region_update_pending |= mr->enabled;
1905 memory_region_transaction_commit();
1906 }
1907 }
1908
1909 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1910 {
1911 if (mr->romd_mode != romd_mode) {
1912 memory_region_transaction_begin();
1913 mr->romd_mode = romd_mode;
1914 memory_region_update_pending |= mr->enabled;
1915 memory_region_transaction_commit();
1916 }
1917 }
1918
1919 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1920 hwaddr size, unsigned client)
1921 {
1922 assert(mr->ram_block);
1923 cpu_physical_memory_test_and_clear_dirty(
1924 memory_region_get_ram_addr(mr) + addr, size, client);
1925 }
1926
1927 int memory_region_get_fd(MemoryRegion *mr)
1928 {
1929 int fd;
1930
1931 rcu_read_lock();
1932 while (mr->alias) {
1933 mr = mr->alias;
1934 }
1935 fd = mr->ram_block->fd;
1936 rcu_read_unlock();
1937
1938 return fd;
1939 }
1940
1941 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1942 {
1943 void *ptr;
1944 uint64_t offset = 0;
1945
1946 rcu_read_lock();
1947 while (mr->alias) {
1948 offset += mr->alias_offset;
1949 mr = mr->alias;
1950 }
1951 assert(mr->ram_block);
1952 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1953 rcu_read_unlock();
1954
1955 return ptr;
1956 }
1957
1958 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1959 {
1960 RAMBlock *block;
1961
1962 block = qemu_ram_block_from_host(ptr, false, offset);
1963 if (!block) {
1964 return NULL;
1965 }
1966
1967 return block->mr;
1968 }
1969
1970 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1971 {
1972 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1973 }
1974
1975 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1976 {
1977 assert(mr->ram_block);
1978
1979 qemu_ram_resize(mr->ram_block, newsize, errp);
1980 }
1981
1982 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1983 {
1984 FlatView *view;
1985 FlatRange *fr;
1986 CoalescedMemoryRange *cmr;
1987 AddrRange tmp;
1988 MemoryRegionSection section;
1989
1990 view = address_space_get_flatview(as);
1991 FOR_EACH_FLAT_RANGE(fr, view) {
1992 if (fr->mr == mr) {
1993 section = (MemoryRegionSection) {
1994 .fv = view,
1995 .offset_within_address_space = int128_get64(fr->addr.start),
1996 .size = fr->addr.size,
1997 };
1998
1999 MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
2000 int128_get64(fr->addr.start),
2001 int128_get64(fr->addr.size));
2002 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
2003 tmp = addrrange_shift(cmr->addr,
2004 int128_sub(fr->addr.start,
2005 int128_make64(fr->offset_in_region)));
2006 if (!addrrange_intersects(tmp, fr->addr)) {
2007 continue;
2008 }
2009 tmp = addrrange_intersection(tmp, fr->addr);
2010 MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
2011 int128_get64(tmp.start),
2012 int128_get64(tmp.size));
2013 }
2014 }
2015 }
2016 flatview_unref(view);
2017 }
2018
2019 static void memory_region_update_coalesced_range(MemoryRegion *mr)
2020 {
2021 AddressSpace *as;
2022
2023 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2024 memory_region_update_coalesced_range_as(mr, as);
2025 }
2026 }
2027
2028 void memory_region_set_coalescing(MemoryRegion *mr)
2029 {
2030 memory_region_clear_coalescing(mr);
2031 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2032 }
2033
2034 void memory_region_add_coalescing(MemoryRegion *mr,
2035 hwaddr offset,
2036 uint64_t size)
2037 {
2038 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2039
2040 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2041 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2042 memory_region_update_coalesced_range(mr);
2043 memory_region_set_flush_coalesced(mr);
2044 }
2045
2046 void memory_region_clear_coalescing(MemoryRegion *mr)
2047 {
2048 CoalescedMemoryRange *cmr;
2049 bool updated = false;
2050
2051 qemu_flush_coalesced_mmio_buffer();
2052 mr->flush_coalesced_mmio = false;
2053
2054 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2055 cmr = QTAILQ_FIRST(&mr->coalesced);
2056 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2057 g_free(cmr);
2058 updated = true;
2059 }
2060
2061 if (updated) {
2062 memory_region_update_coalesced_range(mr);
2063 }
2064 }
2065
2066 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2067 {
2068 mr->flush_coalesced_mmio = true;
2069 }
2070
2071 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2072 {
2073 qemu_flush_coalesced_mmio_buffer();
2074 if (QTAILQ_EMPTY(&mr->coalesced)) {
2075 mr->flush_coalesced_mmio = false;
2076 }
2077 }
2078
2079 void memory_region_set_global_locking(MemoryRegion *mr)
2080 {
2081 mr->global_locking = true;
2082 }
2083
2084 void memory_region_clear_global_locking(MemoryRegion *mr)
2085 {
2086 mr->global_locking = false;
2087 }
2088
2089 static bool userspace_eventfd_warning;
2090
2091 void memory_region_add_eventfd(MemoryRegion *mr,
2092 hwaddr addr,
2093 unsigned size,
2094 bool match_data,
2095 uint64_t data,
2096 EventNotifier *e)
2097 {
2098 MemoryRegionIoeventfd mrfd = {
2099 .addr.start = int128_make64(addr),
2100 .addr.size = int128_make64(size),
2101 .match_data = match_data,
2102 .data = data,
2103 .e = e,
2104 };
2105 unsigned i;
2106
2107 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2108 userspace_eventfd_warning))) {
2109 userspace_eventfd_warning = true;
2110 error_report("Using eventfd without MMIO binding in KVM. "
2111 "Suboptimal performance expected");
2112 }
2113
2114 if (size) {
2115 adjust_endianness(mr, &mrfd.data, size);
2116 }
2117 memory_region_transaction_begin();
2118 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2119 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
2120 break;
2121 }
2122 }
2123 ++mr->ioeventfd_nb;
2124 mr->ioeventfds = g_realloc(mr->ioeventfds,
2125 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2126 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2127 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2128 mr->ioeventfds[i] = mrfd;
2129 ioeventfd_update_pending |= mr->enabled;
2130 memory_region_transaction_commit();
2131 }
2132
2133 void memory_region_del_eventfd(MemoryRegion *mr,
2134 hwaddr addr,
2135 unsigned size,
2136 bool match_data,
2137 uint64_t data,
2138 EventNotifier *e)
2139 {
2140 MemoryRegionIoeventfd mrfd = {
2141 .addr.start = int128_make64(addr),
2142 .addr.size = int128_make64(size),
2143 .match_data = match_data,
2144 .data = data,
2145 .e = e,
2146 };
2147 unsigned i;
2148
2149 if (size) {
2150 adjust_endianness(mr, &mrfd.data, size);
2151 }
2152 memory_region_transaction_begin();
2153 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2154 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
2155 break;
2156 }
2157 }
2158 assert(i != mr->ioeventfd_nb);
2159 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2160 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2161 --mr->ioeventfd_nb;
2162 mr->ioeventfds = g_realloc(mr->ioeventfds,
2163 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2164 ioeventfd_update_pending |= mr->enabled;
2165 memory_region_transaction_commit();
2166 }
2167
2168 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2169 {
2170 MemoryRegion *mr = subregion->container;
2171 MemoryRegion *other;
2172
2173 memory_region_transaction_begin();
2174
2175 memory_region_ref(subregion);
2176 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2177 if (subregion->priority >= other->priority) {
2178 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2179 goto done;
2180 }
2181 }
2182 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2183 done:
2184 memory_region_update_pending |= mr->enabled && subregion->enabled;
2185 memory_region_transaction_commit();
2186 }
2187
2188 static void memory_region_add_subregion_common(MemoryRegion *mr,
2189 hwaddr offset,
2190 MemoryRegion *subregion)
2191 {
2192 assert(!subregion->container);
2193 subregion->container = mr;
2194 subregion->addr = offset;
2195 memory_region_update_container_subregions(subregion);
2196 }
2197
2198 void memory_region_add_subregion(MemoryRegion *mr,
2199 hwaddr offset,
2200 MemoryRegion *subregion)
2201 {
2202 subregion->priority = 0;
2203 memory_region_add_subregion_common(mr, offset, subregion);
2204 }
2205
2206 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2207 hwaddr offset,
2208 MemoryRegion *subregion,
2209 int priority)
2210 {
2211 subregion->priority = priority;
2212 memory_region_add_subregion_common(mr, offset, subregion);
2213 }
2214
2215 void memory_region_del_subregion(MemoryRegion *mr,
2216 MemoryRegion *subregion)
2217 {
2218 memory_region_transaction_begin();
2219 assert(subregion->container == mr);
2220 subregion->container = NULL;
2221 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2222 memory_region_unref(subregion);
2223 memory_region_update_pending |= mr->enabled && subregion->enabled;
2224 memory_region_transaction_commit();
2225 }
2226
2227 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2228 {
2229 if (enabled == mr->enabled) {
2230 return;
2231 }
2232 memory_region_transaction_begin();
2233 mr->enabled = enabled;
2234 memory_region_update_pending = true;
2235 memory_region_transaction_commit();
2236 }
2237
2238 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2239 {
2240 Int128 s = int128_make64(size);
2241
2242 if (size == UINT64_MAX) {
2243 s = int128_2_64();
2244 }
2245 if (int128_eq(s, mr->size)) {
2246 return;
2247 }
2248 memory_region_transaction_begin();
2249 mr->size = s;
2250 memory_region_update_pending = true;
2251 memory_region_transaction_commit();
2252 }
2253
2254 static void memory_region_readd_subregion(MemoryRegion *mr)
2255 {
2256 MemoryRegion *container = mr->container;
2257
2258 if (container) {
2259 memory_region_transaction_begin();
2260 memory_region_ref(mr);
2261 memory_region_del_subregion(container, mr);
2262 mr->container = container;
2263 memory_region_update_container_subregions(mr);
2264 memory_region_unref(mr);
2265 memory_region_transaction_commit();
2266 }
2267 }
2268
2269 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2270 {
2271 if (addr != mr->addr) {
2272 mr->addr = addr;
2273 memory_region_readd_subregion(mr);
2274 }
2275 }
2276
2277 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2278 {
2279 assert(mr->alias);
2280
2281 if (offset == mr->alias_offset) {
2282 return;
2283 }
2284
2285 memory_region_transaction_begin();
2286 mr->alias_offset = offset;
2287 memory_region_update_pending |= mr->enabled;
2288 memory_region_transaction_commit();
2289 }
2290
2291 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2292 {
2293 return mr->align;
2294 }
2295
2296 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2297 {
2298 const AddrRange *addr = addr_;
2299 const FlatRange *fr = fr_;
2300
2301 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2302 return -1;
2303 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2304 return 1;
2305 }
2306 return 0;
2307 }
2308
2309 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2310 {
2311 return bsearch(&addr, view->ranges, view->nr,
2312 sizeof(FlatRange), cmp_flatrange_addr);
2313 }
2314
2315 bool memory_region_is_mapped(MemoryRegion *mr)
2316 {
2317 return mr->container ? true : false;
2318 }
2319
2320 /* Same as memory_region_find, but it does not add a reference to the
2321 * returned region. It must be called from an RCU critical section.
2322 */
2323 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2324 hwaddr addr, uint64_t size)
2325 {
2326 MemoryRegionSection ret = { .mr = NULL };
2327 MemoryRegion *root;
2328 AddressSpace *as;
2329 AddrRange range;
2330 FlatView *view;
2331 FlatRange *fr;
2332
2333 addr += mr->addr;
2334 for (root = mr; root->container; ) {
2335 root = root->container;
2336 addr += root->addr;
2337 }
2338
2339 as = memory_region_to_address_space(root);
2340 if (!as) {
2341 return ret;
2342 }
2343 range = addrrange_make(int128_make64(addr), int128_make64(size));
2344
2345 view = address_space_to_flatview(as);
2346 fr = flatview_lookup(view, range);
2347 if (!fr) {
2348 return ret;
2349 }
2350
2351 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2352 --fr;
2353 }
2354
2355 ret.mr = fr->mr;
2356 ret.fv = view;
2357 range = addrrange_intersection(range, fr->addr);
2358 ret.offset_within_region = fr->offset_in_region;
2359 ret.offset_within_region += int128_get64(int128_sub(range.start,
2360 fr->addr.start));
2361 ret.size = range.size;
2362 ret.offset_within_address_space = int128_get64(range.start);
2363 ret.readonly = fr->readonly;
2364 return ret;
2365 }
2366
2367 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2368 hwaddr addr, uint64_t size)
2369 {
2370 MemoryRegionSection ret;
2371 rcu_read_lock();
2372 ret = memory_region_find_rcu(mr, addr, size);
2373 if (ret.mr) {
2374 memory_region_ref(ret.mr);
2375 }
2376 rcu_read_unlock();
2377 return ret;
2378 }
2379
2380 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2381 {
2382 MemoryRegion *mr;
2383
2384 rcu_read_lock();
2385 mr = memory_region_find_rcu(container, addr, 1).mr;
2386 rcu_read_unlock();
2387 return mr && mr != container;
2388 }
2389
2390 void memory_global_dirty_log_sync(void)
2391 {
2392 MemoryListener *listener;
2393 AddressSpace *as;
2394 FlatView *view;
2395 FlatRange *fr;
2396
2397 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2398 if (!listener->log_sync) {
2399 continue;
2400 }
2401 as = listener->address_space;
2402 view = address_space_get_flatview(as);
2403 FOR_EACH_FLAT_RANGE(fr, view) {
2404 if (fr->dirty_log_mask) {
2405 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2406
2407 listener->log_sync(listener, &mrs);
2408 }
2409 }
2410 flatview_unref(view);
2411 }
2412 }
2413
2414 static VMChangeStateEntry *vmstate_change;
2415
2416 void memory_global_dirty_log_start(void)
2417 {
2418 if (vmstate_change) {
2419 qemu_del_vm_change_state_handler(vmstate_change);
2420 vmstate_change = NULL;
2421 }
2422
2423 global_dirty_log = true;
2424
2425 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2426
2427 /* Refresh DIRTY_LOG_MIGRATION bit. */
2428 memory_region_transaction_begin();
2429 memory_region_update_pending = true;
2430 memory_region_transaction_commit();
2431 }
2432
2433 static void memory_global_dirty_log_do_stop(void)
2434 {
2435 global_dirty_log = false;
2436
2437 /* Refresh DIRTY_LOG_MIGRATION bit. */
2438 memory_region_transaction_begin();
2439 memory_region_update_pending = true;
2440 memory_region_transaction_commit();
2441
2442 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2443 }
2444
2445 static void memory_vm_change_state_handler(void *opaque, int running,
2446 RunState state)
2447 {
2448 if (running) {
2449 memory_global_dirty_log_do_stop();
2450
2451 if (vmstate_change) {
2452 qemu_del_vm_change_state_handler(vmstate_change);
2453 vmstate_change = NULL;
2454 }
2455 }
2456 }
2457
2458 void memory_global_dirty_log_stop(void)
2459 {
2460 if (!runstate_is_running()) {
2461 if (vmstate_change) {
2462 return;
2463 }
2464 vmstate_change = qemu_add_vm_change_state_handler(
2465 memory_vm_change_state_handler, NULL);
2466 return;
2467 }
2468
2469 memory_global_dirty_log_do_stop();
2470 }
2471
2472 static void listener_add_address_space(MemoryListener *listener,
2473 AddressSpace *as)
2474 {
2475 FlatView *view;
2476 FlatRange *fr;
2477
2478 if (listener->begin) {
2479 listener->begin(listener);
2480 }
2481 if (global_dirty_log) {
2482 if (listener->log_global_start) {
2483 listener->log_global_start(listener);
2484 }
2485 }
2486
2487 view = address_space_get_flatview(as);
2488 FOR_EACH_FLAT_RANGE(fr, view) {
2489 MemoryRegionSection section = {
2490 .mr = fr->mr,
2491 .fv = view,
2492 .offset_within_region = fr->offset_in_region,
2493 .size = fr->addr.size,
2494 .offset_within_address_space = int128_get64(fr->addr.start),
2495 .readonly = fr->readonly,
2496 };
2497 if (fr->dirty_log_mask && listener->log_start) {
2498 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2499 }
2500 if (listener->region_add) {
2501 listener->region_add(listener, &section);
2502 }
2503 }
2504 if (listener->commit) {
2505 listener->commit(listener);
2506 }
2507 flatview_unref(view);
2508 }
2509
2510 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2511 {
2512 MemoryListener *other = NULL;
2513
2514 listener->address_space = as;
2515 if (QTAILQ_EMPTY(&memory_listeners)
2516 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2517 memory_listeners)->priority) {
2518 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2519 } else {
2520 QTAILQ_FOREACH(other, &memory_listeners, link) {
2521 if (listener->priority < other->priority) {
2522 break;
2523 }
2524 }
2525 QTAILQ_INSERT_BEFORE(other, listener, link);
2526 }
2527
2528 if (QTAILQ_EMPTY(&as->listeners)
2529 || listener->priority >= QTAILQ_LAST(&as->listeners,
2530 memory_listeners)->priority) {
2531 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2532 } else {
2533 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2534 if (listener->priority < other->priority) {
2535 break;
2536 }
2537 }
2538 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2539 }
2540
2541 listener_add_address_space(listener, as);
2542 }
2543
2544 void memory_listener_unregister(MemoryListener *listener)
2545 {
2546 if (!listener->address_space) {
2547 return;
2548 }
2549
2550 QTAILQ_REMOVE(&memory_listeners, listener, link);
2551 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2552 listener->address_space = NULL;
2553 }
2554
2555 bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
2556 {
2557 void *host;
2558 unsigned size = 0;
2559 unsigned offset = 0;
2560 Object *new_interface;
2561
2562 if (!mr || !mr->ops->request_ptr) {
2563 return false;
2564 }
2565
2566 /*
2567 * Avoid an update if the request_ptr call
2568 * memory_region_invalidate_mmio_ptr which seems to be likely when we use
2569 * a cache.
2570 */
2571 memory_region_transaction_begin();
2572
2573 host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
2574
2575 if (!host || !size) {
2576 memory_region_transaction_commit();
2577 return false;
2578 }
2579
2580 new_interface = object_new("mmio_interface");
2581 qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
2582 qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
2583 qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
2584 qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
2585 qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
2586 object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
2587
2588 memory_region_transaction_commit();
2589 return true;
2590 }
2591
2592 typedef struct MMIOPtrInvalidate {
2593 MemoryRegion *mr;
2594 hwaddr offset;
2595 unsigned size;
2596 int busy;
2597 int allocated;
2598 } MMIOPtrInvalidate;
2599
2600 #define MAX_MMIO_INVALIDATE 10
2601 static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
2602
2603 static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
2604 run_on_cpu_data data)
2605 {
2606 MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
2607 MemoryRegion *mr = invalidate_data->mr;
2608 hwaddr offset = invalidate_data->offset;
2609 unsigned size = invalidate_data->size;
2610 MemoryRegionSection section = memory_region_find(mr, offset, size);
2611
2612 qemu_mutex_lock_iothread();
2613
2614 /* Reset dirty so this doesn't happen later. */
2615 cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
2616
2617 if (section.mr != mr) {
2618 /* memory_region_find add a ref on section.mr */
2619 memory_region_unref(section.mr);
2620 if (MMIO_INTERFACE(section.mr->owner)) {
2621 /* We found the interface just drop it. */
2622 object_property_set_bool(section.mr->owner, false, "realized",
2623 NULL);
2624 object_unref(section.mr->owner);
2625 object_unparent(section.mr->owner);
2626 }
2627 }
2628
2629 qemu_mutex_unlock_iothread();
2630
2631 if (invalidate_data->allocated) {
2632 g_free(invalidate_data);
2633 } else {
2634 invalidate_data->busy = 0;
2635 }
2636 }
2637
2638 void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
2639 unsigned size)
2640 {
2641 size_t i;
2642 MMIOPtrInvalidate *invalidate_data = NULL;
2643
2644 for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
2645 if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
2646 invalidate_data = &mmio_ptr_invalidate_list[i];
2647 break;
2648 }
2649 }
2650
2651 if (!invalidate_data) {
2652 invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
2653 invalidate_data->allocated = 1;
2654 }
2655
2656 invalidate_data->mr = mr;
2657 invalidate_data->offset = offset;
2658 invalidate_data->size = size;
2659
2660 async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
2661 RUN_ON_CPU_HOST_PTR(invalidate_data));
2662 }
2663
2664 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2665 {
2666 memory_region_ref(root);
2667 memory_region_transaction_begin();
2668 as->ref_count = 1;
2669 as->root = root;
2670 as->malloced = false;
2671 as->current_map = flatview_new(root);
2672 as->ioeventfd_nb = 0;
2673 as->ioeventfds = NULL;
2674 QTAILQ_INIT(&as->listeners);
2675 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2676 as->name = g_strdup(name ? name : "anonymous");
2677 memory_region_update_pending |= root->enabled;
2678 memory_region_transaction_commit();
2679 }
2680
2681 static void do_address_space_destroy(AddressSpace *as)
2682 {
2683 bool do_free = as->malloced;
2684
2685 assert(QTAILQ_EMPTY(&as->listeners));
2686
2687 flatview_unref(as->current_map);
2688 g_free(as->name);
2689 g_free(as->ioeventfds);
2690 memory_region_unref(as->root);
2691 if (do_free) {
2692 g_free(as);
2693 }
2694 }
2695
2696 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2697 {
2698 AddressSpace *as;
2699
2700 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2701 if (root == as->root && as->malloced) {
2702 as->ref_count++;
2703 return as;
2704 }
2705 }
2706
2707 as = g_malloc0(sizeof *as);
2708 address_space_init(as, root, name);
2709 as->malloced = true;
2710 return as;
2711 }
2712
2713 void address_space_destroy(AddressSpace *as)
2714 {
2715 MemoryRegion *root = as->root;
2716
2717 as->ref_count--;
2718 if (as->ref_count) {
2719 return;
2720 }
2721 /* Flush out anything from MemoryListeners listening in on this */
2722 memory_region_transaction_begin();
2723 as->root = NULL;
2724 memory_region_transaction_commit();
2725 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2726
2727 /* At this point, as->dispatch and as->current_map are dummy
2728 * entries that the guest should never use. Wait for the old
2729 * values to expire before freeing the data.
2730 */
2731 as->root = root;
2732 call_rcu(as, do_address_space_destroy, rcu);
2733 }
2734
2735 static const char *memory_region_type(MemoryRegion *mr)
2736 {
2737 if (memory_region_is_ram_device(mr)) {
2738 return "ramd";
2739 } else if (memory_region_is_romd(mr)) {
2740 return "romd";
2741 } else if (memory_region_is_rom(mr)) {
2742 return "rom";
2743 } else if (memory_region_is_ram(mr)) {
2744 return "ram";
2745 } else {
2746 return "i/o";
2747 }
2748 }
2749
2750 typedef struct MemoryRegionList MemoryRegionList;
2751
2752 struct MemoryRegionList {
2753 const MemoryRegion *mr;
2754 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2755 };
2756
2757 typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
2758
2759 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2760 int128_sub((size), int128_one())) : 0)
2761 #define MTREE_INDENT " "
2762
2763 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2764 const MemoryRegion *mr, unsigned int level,
2765 hwaddr base,
2766 MemoryRegionListHead *alias_print_queue)
2767 {
2768 MemoryRegionList *new_ml, *ml, *next_ml;
2769 MemoryRegionListHead submr_print_queue;
2770 const MemoryRegion *submr;
2771 unsigned int i;
2772 hwaddr cur_start, cur_end;
2773
2774 if (!mr) {
2775 return;
2776 }
2777
2778 for (i = 0; i < level; i++) {
2779 mon_printf(f, MTREE_INDENT);
2780 }
2781
2782 cur_start = base + mr->addr;
2783 cur_end = cur_start + MR_SIZE(mr->size);
2784
2785 /*
2786 * Try to detect overflow of memory region. This should never
2787 * happen normally. When it happens, we dump something to warn the
2788 * user who is observing this.
2789 */
2790 if (cur_start < base || cur_end < cur_start) {
2791 mon_printf(f, "[DETECTED OVERFLOW!] ");
2792 }
2793
2794 if (mr->alias) {
2795 MemoryRegionList *ml;
2796 bool found = false;
2797
2798 /* check if the alias is already in the queue */
2799 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2800 if (ml->mr == mr->alias) {
2801 found = true;
2802 }
2803 }
2804
2805 if (!found) {
2806 ml = g_new(MemoryRegionList, 1);
2807 ml->mr = mr->alias;
2808 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2809 }
2810 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2811 " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
2812 "-" TARGET_FMT_plx "%s\n",
2813 cur_start, cur_end,
2814 mr->priority,
2815 memory_region_type((MemoryRegion *)mr),
2816 memory_region_name(mr),
2817 memory_region_name(mr->alias),
2818 mr->alias_offset,
2819 mr->alias_offset + MR_SIZE(mr->size),
2820 mr->enabled ? "" : " [disabled]");
2821 } else {
2822 mon_printf(f,
2823 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
2824 cur_start, cur_end,
2825 mr->priority,
2826 memory_region_type((MemoryRegion *)mr),
2827 memory_region_name(mr),
2828 mr->enabled ? "" : " [disabled]");
2829 }
2830
2831 QTAILQ_INIT(&submr_print_queue);
2832
2833 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2834 new_ml = g_new(MemoryRegionList, 1);
2835 new_ml->mr = submr;
2836 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2837 if (new_ml->mr->addr < ml->mr->addr ||
2838 (new_ml->mr->addr == ml->mr->addr &&
2839 new_ml->mr->priority > ml->mr->priority)) {
2840 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2841 new_ml = NULL;
2842 break;
2843 }
2844 }
2845 if (new_ml) {
2846 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2847 }
2848 }
2849
2850 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2851 mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
2852 alias_print_queue);
2853 }
2854
2855 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2856 g_free(ml);
2857 }
2858 }
2859
2860 static void mtree_print_flatview(fprintf_function p, void *f,
2861 AddressSpace *as)
2862 {
2863 FlatView *view = address_space_get_flatview(as);
2864 FlatRange *range = &view->ranges[0];
2865 MemoryRegion *mr;
2866 int n = view->nr;
2867
2868 if (n <= 0) {
2869 p(f, MTREE_INDENT "No rendered FlatView for "
2870 "address space '%s'\n", as->name);
2871 flatview_unref(view);
2872 return;
2873 }
2874
2875 while (n--) {
2876 mr = range->mr;
2877 if (range->offset_in_region) {
2878 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2879 TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
2880 int128_get64(range->addr.start),
2881 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2882 mr->priority,
2883 range->readonly ? "rom" : memory_region_type(mr),
2884 memory_region_name(mr),
2885 range->offset_in_region);
2886 } else {
2887 p(f, MTREE_INDENT TARGET_FMT_plx "-"
2888 TARGET_FMT_plx " (prio %d, %s): %s\n",
2889 int128_get64(range->addr.start),
2890 int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
2891 mr->priority,
2892 range->readonly ? "rom" : memory_region_type(mr),
2893 memory_region_name(mr));
2894 }
2895 range++;
2896 }
2897
2898 flatview_unref(view);
2899 }
2900
2901 void mtree_info(fprintf_function mon_printf, void *f, bool flatview)
2902 {
2903 MemoryRegionListHead ml_head;
2904 MemoryRegionList *ml, *ml2;
2905 AddressSpace *as;
2906
2907 if (flatview) {
2908 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2909 mon_printf(f, "address-space (flat view): %s\n", as->name);
2910 mtree_print_flatview(mon_printf, f, as);
2911 mon_printf(f, "\n");
2912 }
2913 return;
2914 }
2915
2916 QTAILQ_INIT(&ml_head);
2917
2918 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2919 mon_printf(f, "address-space: %s\n", as->name);
2920 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2921 mon_printf(f, "\n");
2922 }
2923
2924 /* print aliased regions */
2925 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
2926 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2927 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2928 mon_printf(f, "\n");
2929 }
2930
2931 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
2932 g_free(ml);
2933 }
2934 }
2935
2936 void memory_region_init_ram(MemoryRegion *mr,
2937 struct Object *owner,
2938 const char *name,
2939 uint64_t size,
2940 Error **errp)
2941 {
2942 DeviceState *owner_dev;
2943 Error *err = NULL;
2944
2945 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
2946 if (err) {
2947 error_propagate(errp, err);
2948 return;
2949 }
2950 /* This will assert if owner is neither NULL nor a DeviceState.
2951 * We only want the owner here for the purposes of defining a
2952 * unique name for migration. TODO: Ideally we should implement
2953 * a naming scheme for Objects which are not DeviceStates, in
2954 * which case we can relax this restriction.
2955 */
2956 owner_dev = DEVICE(owner);
2957 vmstate_register_ram(mr, owner_dev);
2958 }
2959
2960 void memory_region_init_rom(MemoryRegion *mr,
2961 struct Object *owner,
2962 const char *name,
2963 uint64_t size,
2964 Error **errp)
2965 {
2966 DeviceState *owner_dev;
2967 Error *err = NULL;
2968
2969 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
2970 if (err) {
2971 error_propagate(errp, err);
2972 return;
2973 }
2974 /* This will assert if owner is neither NULL nor a DeviceState.
2975 * We only want the owner here for the purposes of defining a
2976 * unique name for migration. TODO: Ideally we should implement
2977 * a naming scheme for Objects which are not DeviceStates, in
2978 * which case we can relax this restriction.
2979 */
2980 owner_dev = DEVICE(owner);
2981 vmstate_register_ram(mr, owner_dev);
2982 }
2983
2984 void memory_region_init_rom_device(MemoryRegion *mr,
2985 struct Object *owner,
2986 const MemoryRegionOps *ops,
2987 void *opaque,
2988 const char *name,
2989 uint64_t size,
2990 Error **errp)
2991 {
2992 DeviceState *owner_dev;
2993 Error *err = NULL;
2994
2995 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
2996 name, size, &err);
2997 if (err) {
2998 error_propagate(errp, err);
2999 return;
3000 }
3001 /* This will assert if owner is neither NULL nor a DeviceState.
3002 * We only want the owner here for the purposes of defining a
3003 * unique name for migration. TODO: Ideally we should implement
3004 * a naming scheme for Objects which are not DeviceStates, in
3005 * which case we can relax this restriction.
3006 */
3007 owner_dev = DEVICE(owner);
3008 vmstate_register_ram(mr, owner_dev);
3009 }
3010
3011 static const TypeInfo memory_region_info = {
3012 .parent = TYPE_OBJECT,
3013 .name = TYPE_MEMORY_REGION,
3014 .instance_size = sizeof(MemoryRegion),
3015 .instance_init = memory_region_initfn,
3016 .instance_finalize = memory_region_finalize,
3017 };
3018
3019 static const TypeInfo iommu_memory_region_info = {
3020 .parent = TYPE_MEMORY_REGION,
3021 .name = TYPE_IOMMU_MEMORY_REGION,
3022 .class_size = sizeof(IOMMUMemoryRegionClass),
3023 .instance_size = sizeof(IOMMUMemoryRegion),
3024 .instance_init = iommu_memory_region_initfn,
3025 .abstract = true,
3026 };
3027
3028 static void memory_register_types(void)
3029 {
3030 type_register_static(&memory_region_info);
3031 type_register_static(&iommu_memory_region_info);
3032 }
3033
3034 type_init(memory_register_types)
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