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memory: provide defaults for MemoryListener operations
[mirror_qemu.git] / memory.c
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #include "memory-internal.h"
24
25 unsigned memory_region_transaction_depth = 0;
26 static bool global_dirty_log = false;
27
28 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
29 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
30
31 static QTAILQ_HEAD(, AddressSpace) address_spaces
32 = QTAILQ_HEAD_INITIALIZER(address_spaces);
33
34 typedef struct AddrRange AddrRange;
35
36 /*
37 * Note using signed integers limits us to physical addresses at most
38 * 63 bits wide. They are needed for negative offsetting in aliases
39 * (large MemoryRegion::alias_offset).
40 */
41 struct AddrRange {
42 Int128 start;
43 Int128 size;
44 };
45
46 static AddrRange addrrange_make(Int128 start, Int128 size)
47 {
48 return (AddrRange) { start, size };
49 }
50
51 static bool addrrange_equal(AddrRange r1, AddrRange r2)
52 {
53 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
54 }
55
56 static Int128 addrrange_end(AddrRange r)
57 {
58 return int128_add(r.start, r.size);
59 }
60
61 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
62 {
63 int128_addto(&range.start, delta);
64 return range;
65 }
66
67 static bool addrrange_contains(AddrRange range, Int128 addr)
68 {
69 return int128_ge(addr, range.start)
70 && int128_lt(addr, addrrange_end(range));
71 }
72
73 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
74 {
75 return addrrange_contains(r1, r2.start)
76 || addrrange_contains(r2, r1.start);
77 }
78
79 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
80 {
81 Int128 start = int128_max(r1.start, r2.start);
82 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
83 return addrrange_make(start, int128_sub(end, start));
84 }
85
86 enum ListenerDirection { Forward, Reverse };
87
88 static bool memory_listener_match(MemoryListener *listener,
89 MemoryRegionSection *section)
90 {
91 return !listener->address_space_filter
92 || listener->address_space_filter == section->address_space;
93 }
94
95 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
96 do { \
97 MemoryListener *_listener; \
98 \
99 switch (_direction) { \
100 case Forward: \
101 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
102 if (_listener->_callback) { \
103 _listener->_callback(_listener, ##_args); \
104 } \
105 } \
106 break; \
107 case Reverse: \
108 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
109 memory_listeners, link) { \
110 if (_listener->_callback) { \
111 _listener->_callback(_listener, ##_args); \
112 } \
113 } \
114 break; \
115 default: \
116 abort(); \
117 } \
118 } while (0)
119
120 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
121 do { \
122 MemoryListener *_listener; \
123 \
124 switch (_direction) { \
125 case Forward: \
126 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
127 if (_listener->_callback \
128 && memory_listener_match(_listener, _section)) { \
129 _listener->_callback(_listener, _section, ##_args); \
130 } \
131 } \
132 break; \
133 case Reverse: \
134 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
135 memory_listeners, link) { \
136 if (_listener->_callback \
137 && memory_listener_match(_listener, _section)) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 default: \
143 abort(); \
144 } \
145 } while (0)
146
147 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
148 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
149 .mr = (fr)->mr, \
150 .address_space = (as)->root, \
151 .offset_within_region = (fr)->offset_in_region, \
152 .size = int128_get64((fr)->addr.size), \
153 .offset_within_address_space = int128_get64((fr)->addr.start), \
154 .readonly = (fr)->readonly, \
155 }))
156
157 struct CoalescedMemoryRange {
158 AddrRange addr;
159 QTAILQ_ENTRY(CoalescedMemoryRange) link;
160 };
161
162 struct MemoryRegionIoeventfd {
163 AddrRange addr;
164 bool match_data;
165 uint64_t data;
166 EventNotifier *e;
167 };
168
169 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
170 MemoryRegionIoeventfd b)
171 {
172 if (int128_lt(a.addr.start, b.addr.start)) {
173 return true;
174 } else if (int128_gt(a.addr.start, b.addr.start)) {
175 return false;
176 } else if (int128_lt(a.addr.size, b.addr.size)) {
177 return true;
178 } else if (int128_gt(a.addr.size, b.addr.size)) {
179 return false;
180 } else if (a.match_data < b.match_data) {
181 return true;
182 } else if (a.match_data > b.match_data) {
183 return false;
184 } else if (a.match_data) {
185 if (a.data < b.data) {
186 return true;
187 } else if (a.data > b.data) {
188 return false;
189 }
190 }
191 if (a.e < b.e) {
192 return true;
193 } else if (a.e > b.e) {
194 return false;
195 }
196 return false;
197 }
198
199 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
200 MemoryRegionIoeventfd b)
201 {
202 return !memory_region_ioeventfd_before(a, b)
203 && !memory_region_ioeventfd_before(b, a);
204 }
205
206 typedef struct FlatRange FlatRange;
207 typedef struct FlatView FlatView;
208
209 /* Range of memory in the global map. Addresses are absolute. */
210 struct FlatRange {
211 MemoryRegion *mr;
212 target_phys_addr_t offset_in_region;
213 AddrRange addr;
214 uint8_t dirty_log_mask;
215 bool readable;
216 bool readonly;
217 };
218
219 /* Flattened global view of current active memory hierarchy. Kept in sorted
220 * order.
221 */
222 struct FlatView {
223 FlatRange *ranges;
224 unsigned nr;
225 unsigned nr_allocated;
226 };
227
228 typedef struct AddressSpaceOps AddressSpaceOps;
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static bool flatrange_equal(FlatRange *a, FlatRange *b)
234 {
235 return a->mr == b->mr
236 && addrrange_equal(a->addr, b->addr)
237 && a->offset_in_region == b->offset_in_region
238 && a->readable == b->readable
239 && a->readonly == b->readonly;
240 }
241
242 static void flatview_init(FlatView *view)
243 {
244 view->ranges = NULL;
245 view->nr = 0;
246 view->nr_allocated = 0;
247 }
248
249 /* Insert a range into a given position. Caller is responsible for maintaining
250 * sorting order.
251 */
252 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
253 {
254 if (view->nr == view->nr_allocated) {
255 view->nr_allocated = MAX(2 * view->nr, 10);
256 view->ranges = g_realloc(view->ranges,
257 view->nr_allocated * sizeof(*view->ranges));
258 }
259 memmove(view->ranges + pos + 1, view->ranges + pos,
260 (view->nr - pos) * sizeof(FlatRange));
261 view->ranges[pos] = *range;
262 ++view->nr;
263 }
264
265 static void flatview_destroy(FlatView *view)
266 {
267 g_free(view->ranges);
268 }
269
270 static bool can_merge(FlatRange *r1, FlatRange *r2)
271 {
272 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
273 && r1->mr == r2->mr
274 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
275 r1->addr.size),
276 int128_make64(r2->offset_in_region))
277 && r1->dirty_log_mask == r2->dirty_log_mask
278 && r1->readable == r2->readable
279 && r1->readonly == r2->readonly;
280 }
281
282 /* Attempt to simplify a view by merging ajacent ranges */
283 static void flatview_simplify(FlatView *view)
284 {
285 unsigned i, j;
286
287 i = 0;
288 while (i < view->nr) {
289 j = i + 1;
290 while (j < view->nr
291 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
292 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
293 ++j;
294 }
295 ++i;
296 memmove(&view->ranges[i], &view->ranges[j],
297 (view->nr - j) * sizeof(view->ranges[j]));
298 view->nr -= j - i;
299 }
300 }
301
302 static void memory_region_read_accessor(void *opaque,
303 target_phys_addr_t addr,
304 uint64_t *value,
305 unsigned size,
306 unsigned shift,
307 uint64_t mask)
308 {
309 MemoryRegion *mr = opaque;
310 uint64_t tmp;
311
312 if (mr->flush_coalesced_mmio) {
313 qemu_flush_coalesced_mmio_buffer();
314 }
315 tmp = mr->ops->read(mr->opaque, addr, size);
316 *value |= (tmp & mask) << shift;
317 }
318
319 static void memory_region_write_accessor(void *opaque,
320 target_phys_addr_t addr,
321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325 {
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
332 tmp = (*value >> shift) & mask;
333 mr->ops->write(mr->opaque, addr, tmp, size);
334 }
335
336 static void access_with_adjusted_size(target_phys_addr_t addr,
337 uint64_t *value,
338 unsigned size,
339 unsigned access_size_min,
340 unsigned access_size_max,
341 void (*access)(void *opaque,
342 target_phys_addr_t addr,
343 uint64_t *value,
344 unsigned size,
345 unsigned shift,
346 uint64_t mask),
347 void *opaque)
348 {
349 uint64_t access_mask;
350 unsigned access_size;
351 unsigned i;
352
353 if (!access_size_min) {
354 access_size_min = 1;
355 }
356 if (!access_size_max) {
357 access_size_max = 4;
358 }
359 access_size = MAX(MIN(size, access_size_max), access_size_min);
360 access_mask = -1ULL >> (64 - access_size * 8);
361 for (i = 0; i < size; i += access_size) {
362 /* FIXME: big-endian support */
363 access(opaque, addr + i, value, access_size, i * 8, access_mask);
364 }
365 }
366
367 static AddressSpace address_space_memory;
368
369 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
370 unsigned width, bool write)
371 {
372 const MemoryRegionPortio *mrp;
373
374 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
375 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
376 && width == mrp->size
377 && (write ? (bool)mrp->write : (bool)mrp->read)) {
378 return mrp;
379 }
380 }
381 return NULL;
382 }
383
384 static void memory_region_iorange_read(IORange *iorange,
385 uint64_t offset,
386 unsigned width,
387 uint64_t *data)
388 {
389 MemoryRegionIORange *mrio
390 = container_of(iorange, MemoryRegionIORange, iorange);
391 MemoryRegion *mr = mrio->mr;
392
393 offset += mrio->offset;
394 if (mr->ops->old_portio) {
395 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
396 width, false);
397
398 *data = ((uint64_t)1 << (width * 8)) - 1;
399 if (mrp) {
400 *data = mrp->read(mr->opaque, offset);
401 } else if (width == 2) {
402 mrp = find_portio(mr, offset - mrio->offset, 1, false);
403 assert(mrp);
404 *data = mrp->read(mr->opaque, offset) |
405 (mrp->read(mr->opaque, offset + 1) << 8);
406 }
407 return;
408 }
409 *data = 0;
410 access_with_adjusted_size(offset, data, width,
411 mr->ops->impl.min_access_size,
412 mr->ops->impl.max_access_size,
413 memory_region_read_accessor, mr);
414 }
415
416 static void memory_region_iorange_write(IORange *iorange,
417 uint64_t offset,
418 unsigned width,
419 uint64_t data)
420 {
421 MemoryRegionIORange *mrio
422 = container_of(iorange, MemoryRegionIORange, iorange);
423 MemoryRegion *mr = mrio->mr;
424
425 offset += mrio->offset;
426 if (mr->ops->old_portio) {
427 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
428 width, true);
429
430 if (mrp) {
431 mrp->write(mr->opaque, offset, data);
432 } else if (width == 2) {
433 mrp = find_portio(mr, offset - mrio->offset, 1, true);
434 assert(mrp);
435 mrp->write(mr->opaque, offset, data & 0xff);
436 mrp->write(mr->opaque, offset + 1, data >> 8);
437 }
438 return;
439 }
440 access_with_adjusted_size(offset, &data, width,
441 mr->ops->impl.min_access_size,
442 mr->ops->impl.max_access_size,
443 memory_region_write_accessor, mr);
444 }
445
446 static void memory_region_iorange_destructor(IORange *iorange)
447 {
448 g_free(container_of(iorange, MemoryRegionIORange, iorange));
449 }
450
451 const IORangeOps memory_region_iorange_ops = {
452 .read = memory_region_iorange_read,
453 .write = memory_region_iorange_write,
454 .destructor = memory_region_iorange_destructor,
455 };
456
457 static AddressSpace address_space_io;
458
459 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
460 {
461 AddressSpace *as;
462
463 while (mr->parent) {
464 mr = mr->parent;
465 }
466 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
467 if (mr == as->root) {
468 return as;
469 }
470 }
471 abort();
472 }
473
474 /* Render a memory region into the global view. Ranges in @view obscure
475 * ranges in @mr.
476 */
477 static void render_memory_region(FlatView *view,
478 MemoryRegion *mr,
479 Int128 base,
480 AddrRange clip,
481 bool readonly)
482 {
483 MemoryRegion *subregion;
484 unsigned i;
485 target_phys_addr_t offset_in_region;
486 Int128 remain;
487 Int128 now;
488 FlatRange fr;
489 AddrRange tmp;
490
491 if (!mr->enabled) {
492 return;
493 }
494
495 int128_addto(&base, int128_make64(mr->addr));
496 readonly |= mr->readonly;
497
498 tmp = addrrange_make(base, mr->size);
499
500 if (!addrrange_intersects(tmp, clip)) {
501 return;
502 }
503
504 clip = addrrange_intersection(tmp, clip);
505
506 if (mr->alias) {
507 int128_subfrom(&base, int128_make64(mr->alias->addr));
508 int128_subfrom(&base, int128_make64(mr->alias_offset));
509 render_memory_region(view, mr->alias, base, clip, readonly);
510 return;
511 }
512
513 /* Render subregions in priority order. */
514 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
515 render_memory_region(view, subregion, base, clip, readonly);
516 }
517
518 if (!mr->terminates) {
519 return;
520 }
521
522 offset_in_region = int128_get64(int128_sub(clip.start, base));
523 base = clip.start;
524 remain = clip.size;
525
526 /* Render the region itself into any gaps left by the current view. */
527 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
528 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
529 continue;
530 }
531 if (int128_lt(base, view->ranges[i].addr.start)) {
532 now = int128_min(remain,
533 int128_sub(view->ranges[i].addr.start, base));
534 fr.mr = mr;
535 fr.offset_in_region = offset_in_region;
536 fr.addr = addrrange_make(base, now);
537 fr.dirty_log_mask = mr->dirty_log_mask;
538 fr.readable = mr->readable;
539 fr.readonly = readonly;
540 flatview_insert(view, i, &fr);
541 ++i;
542 int128_addto(&base, now);
543 offset_in_region += int128_get64(now);
544 int128_subfrom(&remain, now);
545 }
546 if (int128_eq(base, view->ranges[i].addr.start)) {
547 now = int128_min(remain, view->ranges[i].addr.size);
548 int128_addto(&base, now);
549 offset_in_region += int128_get64(now);
550 int128_subfrom(&remain, now);
551 }
552 }
553 if (int128_nz(remain)) {
554 fr.mr = mr;
555 fr.offset_in_region = offset_in_region;
556 fr.addr = addrrange_make(base, remain);
557 fr.dirty_log_mask = mr->dirty_log_mask;
558 fr.readable = mr->readable;
559 fr.readonly = readonly;
560 flatview_insert(view, i, &fr);
561 }
562 }
563
564 /* Render a memory topology into a list of disjoint absolute ranges. */
565 static FlatView generate_memory_topology(MemoryRegion *mr)
566 {
567 FlatView view;
568
569 flatview_init(&view);
570
571 render_memory_region(&view, mr, int128_zero(),
572 addrrange_make(int128_zero(), int128_2_64()), false);
573 flatview_simplify(&view);
574
575 return view;
576 }
577
578 static void address_space_add_del_ioeventfds(AddressSpace *as,
579 MemoryRegionIoeventfd *fds_new,
580 unsigned fds_new_nb,
581 MemoryRegionIoeventfd *fds_old,
582 unsigned fds_old_nb)
583 {
584 unsigned iold, inew;
585 MemoryRegionIoeventfd *fd;
586 MemoryRegionSection section;
587
588 /* Generate a symmetric difference of the old and new fd sets, adding
589 * and deleting as necessary.
590 */
591
592 iold = inew = 0;
593 while (iold < fds_old_nb || inew < fds_new_nb) {
594 if (iold < fds_old_nb
595 && (inew == fds_new_nb
596 || memory_region_ioeventfd_before(fds_old[iold],
597 fds_new[inew]))) {
598 fd = &fds_old[iold];
599 section = (MemoryRegionSection) {
600 .address_space = as->root,
601 .offset_within_address_space = int128_get64(fd->addr.start),
602 .size = int128_get64(fd->addr.size),
603 };
604 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
605 fd->match_data, fd->data, fd->e);
606 ++iold;
607 } else if (inew < fds_new_nb
608 && (iold == fds_old_nb
609 || memory_region_ioeventfd_before(fds_new[inew],
610 fds_old[iold]))) {
611 fd = &fds_new[inew];
612 section = (MemoryRegionSection) {
613 .address_space = as->root,
614 .offset_within_address_space = int128_get64(fd->addr.start),
615 .size = int128_get64(fd->addr.size),
616 };
617 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
618 fd->match_data, fd->data, fd->e);
619 ++inew;
620 } else {
621 ++iold;
622 ++inew;
623 }
624 }
625 }
626
627 static void address_space_update_ioeventfds(AddressSpace *as)
628 {
629 FlatRange *fr;
630 unsigned ioeventfd_nb = 0;
631 MemoryRegionIoeventfd *ioeventfds = NULL;
632 AddrRange tmp;
633 unsigned i;
634
635 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
636 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
637 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
638 int128_sub(fr->addr.start,
639 int128_make64(fr->offset_in_region)));
640 if (addrrange_intersects(fr->addr, tmp)) {
641 ++ioeventfd_nb;
642 ioeventfds = g_realloc(ioeventfds,
643 ioeventfd_nb * sizeof(*ioeventfds));
644 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
645 ioeventfds[ioeventfd_nb-1].addr = tmp;
646 }
647 }
648 }
649
650 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
651 as->ioeventfds, as->ioeventfd_nb);
652
653 g_free(as->ioeventfds);
654 as->ioeventfds = ioeventfds;
655 as->ioeventfd_nb = ioeventfd_nb;
656 }
657
658 static void address_space_update_topology_pass(AddressSpace *as,
659 FlatView old_view,
660 FlatView new_view,
661 bool adding)
662 {
663 unsigned iold, inew;
664 FlatRange *frold, *frnew;
665
666 /* Generate a symmetric difference of the old and new memory maps.
667 * Kill ranges in the old map, and instantiate ranges in the new map.
668 */
669 iold = inew = 0;
670 while (iold < old_view.nr || inew < new_view.nr) {
671 if (iold < old_view.nr) {
672 frold = &old_view.ranges[iold];
673 } else {
674 frold = NULL;
675 }
676 if (inew < new_view.nr) {
677 frnew = &new_view.ranges[inew];
678 } else {
679 frnew = NULL;
680 }
681
682 if (frold
683 && (!frnew
684 || int128_lt(frold->addr.start, frnew->addr.start)
685 || (int128_eq(frold->addr.start, frnew->addr.start)
686 && !flatrange_equal(frold, frnew)))) {
687 /* In old, but (not in new, or in new but attributes changed). */
688
689 if (!adding) {
690 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
691 }
692
693 ++iold;
694 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
695 /* In both (logging may have changed) */
696
697 if (adding) {
698 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
699 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
700 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
701 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
702 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
703 }
704 }
705
706 ++iold;
707 ++inew;
708 } else {
709 /* In new */
710
711 if (adding) {
712 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
713 }
714
715 ++inew;
716 }
717 }
718 }
719
720
721 static void address_space_update_topology(AddressSpace *as)
722 {
723 FlatView old_view = *as->current_map;
724 FlatView new_view = generate_memory_topology(as->root);
725
726 address_space_update_topology_pass(as, old_view, new_view, false);
727 address_space_update_topology_pass(as, old_view, new_view, true);
728
729 *as->current_map = new_view;
730 flatview_destroy(&old_view);
731 address_space_update_ioeventfds(as);
732 }
733
734 void memory_region_transaction_begin(void)
735 {
736 qemu_flush_coalesced_mmio_buffer();
737 ++memory_region_transaction_depth;
738 }
739
740 void memory_region_transaction_commit(void)
741 {
742 AddressSpace *as;
743
744 assert(memory_region_transaction_depth);
745 --memory_region_transaction_depth;
746 if (!memory_region_transaction_depth) {
747 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
748
749 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
750 address_space_update_topology(as);
751 }
752
753 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
754 }
755 }
756
757 static void memory_region_destructor_none(MemoryRegion *mr)
758 {
759 }
760
761 static void memory_region_destructor_ram(MemoryRegion *mr)
762 {
763 qemu_ram_free(mr->ram_addr);
764 }
765
766 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
767 {
768 qemu_ram_free_from_ptr(mr->ram_addr);
769 }
770
771 static void memory_region_destructor_iomem(MemoryRegion *mr)
772 {
773 }
774
775 static void memory_region_destructor_rom_device(MemoryRegion *mr)
776 {
777 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
778 }
779
780 static bool memory_region_wrong_endianness(MemoryRegion *mr)
781 {
782 #ifdef TARGET_WORDS_BIGENDIAN
783 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
784 #else
785 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
786 #endif
787 }
788
789 void memory_region_init(MemoryRegion *mr,
790 const char *name,
791 uint64_t size)
792 {
793 mr->ops = NULL;
794 mr->parent = NULL;
795 mr->size = int128_make64(size);
796 if (size == UINT64_MAX) {
797 mr->size = int128_2_64();
798 }
799 mr->addr = 0;
800 mr->subpage = false;
801 mr->enabled = true;
802 mr->terminates = false;
803 mr->ram = false;
804 mr->readable = true;
805 mr->readonly = false;
806 mr->rom_device = false;
807 mr->destructor = memory_region_destructor_none;
808 mr->priority = 0;
809 mr->may_overlap = false;
810 mr->alias = NULL;
811 QTAILQ_INIT(&mr->subregions);
812 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
813 QTAILQ_INIT(&mr->coalesced);
814 mr->name = g_strdup(name);
815 mr->dirty_log_mask = 0;
816 mr->ioeventfd_nb = 0;
817 mr->ioeventfds = NULL;
818 mr->flush_coalesced_mmio = false;
819 }
820
821 static bool memory_region_access_valid(MemoryRegion *mr,
822 target_phys_addr_t addr,
823 unsigned size,
824 bool is_write)
825 {
826 if (mr->ops->valid.accepts
827 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
828 return false;
829 }
830
831 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
832 return false;
833 }
834
835 /* Treat zero as compatibility all valid */
836 if (!mr->ops->valid.max_access_size) {
837 return true;
838 }
839
840 if (size > mr->ops->valid.max_access_size
841 || size < mr->ops->valid.min_access_size) {
842 return false;
843 }
844 return true;
845 }
846
847 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
848 target_phys_addr_t addr,
849 unsigned size)
850 {
851 uint64_t data = 0;
852
853 if (!memory_region_access_valid(mr, addr, size, false)) {
854 return -1U; /* FIXME: better signalling */
855 }
856
857 if (!mr->ops->read) {
858 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
859 }
860
861 /* FIXME: support unaligned access */
862 access_with_adjusted_size(addr, &data, size,
863 mr->ops->impl.min_access_size,
864 mr->ops->impl.max_access_size,
865 memory_region_read_accessor, mr);
866
867 return data;
868 }
869
870 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
871 {
872 if (memory_region_wrong_endianness(mr)) {
873 switch (size) {
874 case 1:
875 break;
876 case 2:
877 *data = bswap16(*data);
878 break;
879 case 4:
880 *data = bswap32(*data);
881 break;
882 default:
883 abort();
884 }
885 }
886 }
887
888 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
889 target_phys_addr_t addr,
890 unsigned size)
891 {
892 uint64_t ret;
893
894 ret = memory_region_dispatch_read1(mr, addr, size);
895 adjust_endianness(mr, &ret, size);
896 return ret;
897 }
898
899 static void memory_region_dispatch_write(MemoryRegion *mr,
900 target_phys_addr_t addr,
901 uint64_t data,
902 unsigned size)
903 {
904 if (!memory_region_access_valid(mr, addr, size, true)) {
905 return; /* FIXME: better signalling */
906 }
907
908 adjust_endianness(mr, &data, size);
909
910 if (!mr->ops->write) {
911 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
912 return;
913 }
914
915 /* FIXME: support unaligned access */
916 access_with_adjusted_size(addr, &data, size,
917 mr->ops->impl.min_access_size,
918 mr->ops->impl.max_access_size,
919 memory_region_write_accessor, mr);
920 }
921
922 void memory_region_init_io(MemoryRegion *mr,
923 const MemoryRegionOps *ops,
924 void *opaque,
925 const char *name,
926 uint64_t size)
927 {
928 memory_region_init(mr, name, size);
929 mr->ops = ops;
930 mr->opaque = opaque;
931 mr->terminates = true;
932 mr->destructor = memory_region_destructor_iomem;
933 mr->ram_addr = ~(ram_addr_t)0;
934 }
935
936 void memory_region_init_ram(MemoryRegion *mr,
937 const char *name,
938 uint64_t size)
939 {
940 memory_region_init(mr, name, size);
941 mr->ram = true;
942 mr->terminates = true;
943 mr->destructor = memory_region_destructor_ram;
944 mr->ram_addr = qemu_ram_alloc(size, mr);
945 }
946
947 void memory_region_init_ram_ptr(MemoryRegion *mr,
948 const char *name,
949 uint64_t size,
950 void *ptr)
951 {
952 memory_region_init(mr, name, size);
953 mr->ram = true;
954 mr->terminates = true;
955 mr->destructor = memory_region_destructor_ram_from_ptr;
956 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
957 }
958
959 void memory_region_init_alias(MemoryRegion *mr,
960 const char *name,
961 MemoryRegion *orig,
962 target_phys_addr_t offset,
963 uint64_t size)
964 {
965 memory_region_init(mr, name, size);
966 mr->alias = orig;
967 mr->alias_offset = offset;
968 }
969
970 void memory_region_init_rom_device(MemoryRegion *mr,
971 const MemoryRegionOps *ops,
972 void *opaque,
973 const char *name,
974 uint64_t size)
975 {
976 memory_region_init(mr, name, size);
977 mr->ops = ops;
978 mr->opaque = opaque;
979 mr->terminates = true;
980 mr->rom_device = true;
981 mr->destructor = memory_region_destructor_rom_device;
982 mr->ram_addr = qemu_ram_alloc(size, mr);
983 }
984
985 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
986 unsigned size)
987 {
988 MemoryRegion *mr = opaque;
989
990 if (!mr->warning_printed) {
991 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
992 mr->warning_printed = true;
993 }
994 return -1U;
995 }
996
997 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
998 unsigned size)
999 {
1000 MemoryRegion *mr = opaque;
1001
1002 if (!mr->warning_printed) {
1003 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1004 mr->warning_printed = true;
1005 }
1006 }
1007
1008 static const MemoryRegionOps reservation_ops = {
1009 .read = invalid_read,
1010 .write = invalid_write,
1011 .endianness = DEVICE_NATIVE_ENDIAN,
1012 };
1013
1014 void memory_region_init_reservation(MemoryRegion *mr,
1015 const char *name,
1016 uint64_t size)
1017 {
1018 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1019 }
1020
1021 void memory_region_destroy(MemoryRegion *mr)
1022 {
1023 assert(QTAILQ_EMPTY(&mr->subregions));
1024 mr->destructor(mr);
1025 memory_region_clear_coalescing(mr);
1026 g_free((char *)mr->name);
1027 g_free(mr->ioeventfds);
1028 }
1029
1030 uint64_t memory_region_size(MemoryRegion *mr)
1031 {
1032 if (int128_eq(mr->size, int128_2_64())) {
1033 return UINT64_MAX;
1034 }
1035 return int128_get64(mr->size);
1036 }
1037
1038 const char *memory_region_name(MemoryRegion *mr)
1039 {
1040 return mr->name;
1041 }
1042
1043 bool memory_region_is_ram(MemoryRegion *mr)
1044 {
1045 return mr->ram;
1046 }
1047
1048 bool memory_region_is_logging(MemoryRegion *mr)
1049 {
1050 return mr->dirty_log_mask;
1051 }
1052
1053 bool memory_region_is_rom(MemoryRegion *mr)
1054 {
1055 return mr->ram && mr->readonly;
1056 }
1057
1058 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1059 {
1060 uint8_t mask = 1 << client;
1061
1062 memory_region_transaction_begin();
1063 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1064 memory_region_transaction_commit();
1065 }
1066
1067 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1068 target_phys_addr_t size, unsigned client)
1069 {
1070 assert(mr->terminates);
1071 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1072 1 << client);
1073 }
1074
1075 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1076 target_phys_addr_t size)
1077 {
1078 assert(mr->terminates);
1079 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1080 }
1081
1082 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1083 {
1084 AddressSpace *as;
1085 FlatRange *fr;
1086
1087 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1088 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1089 if (fr->mr == mr) {
1090 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1091 }
1092 }
1093 }
1094 }
1095
1096 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1097 {
1098 if (mr->readonly != readonly) {
1099 memory_region_transaction_begin();
1100 mr->readonly = readonly;
1101 memory_region_transaction_commit();
1102 }
1103 }
1104
1105 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1106 {
1107 if (mr->readable != readable) {
1108 memory_region_transaction_begin();
1109 mr->readable = readable;
1110 memory_region_transaction_commit();
1111 }
1112 }
1113
1114 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1115 target_phys_addr_t size, unsigned client)
1116 {
1117 assert(mr->terminates);
1118 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1119 mr->ram_addr + addr + size,
1120 1 << client);
1121 }
1122
1123 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1124 {
1125 if (mr->alias) {
1126 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1127 }
1128
1129 assert(mr->terminates);
1130
1131 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1132 }
1133
1134 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1135 {
1136 FlatRange *fr;
1137 CoalescedMemoryRange *cmr;
1138 AddrRange tmp;
1139
1140 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1141 if (fr->mr == mr) {
1142 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1143 int128_get64(fr->addr.size));
1144 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1145 tmp = addrrange_shift(cmr->addr,
1146 int128_sub(fr->addr.start,
1147 int128_make64(fr->offset_in_region)));
1148 if (!addrrange_intersects(tmp, fr->addr)) {
1149 continue;
1150 }
1151 tmp = addrrange_intersection(tmp, fr->addr);
1152 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1153 int128_get64(tmp.size));
1154 }
1155 }
1156 }
1157 }
1158
1159 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1160 {
1161 AddressSpace *as;
1162
1163 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1164 memory_region_update_coalesced_range_as(mr, as);
1165 }
1166 }
1167
1168 void memory_region_set_coalescing(MemoryRegion *mr)
1169 {
1170 memory_region_clear_coalescing(mr);
1171 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1172 }
1173
1174 void memory_region_add_coalescing(MemoryRegion *mr,
1175 target_phys_addr_t offset,
1176 uint64_t size)
1177 {
1178 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1179
1180 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1181 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1182 memory_region_update_coalesced_range(mr);
1183 memory_region_set_flush_coalesced(mr);
1184 }
1185
1186 void memory_region_clear_coalescing(MemoryRegion *mr)
1187 {
1188 CoalescedMemoryRange *cmr;
1189
1190 qemu_flush_coalesced_mmio_buffer();
1191 mr->flush_coalesced_mmio = false;
1192
1193 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1194 cmr = QTAILQ_FIRST(&mr->coalesced);
1195 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1196 g_free(cmr);
1197 }
1198 memory_region_update_coalesced_range(mr);
1199 }
1200
1201 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1202 {
1203 mr->flush_coalesced_mmio = true;
1204 }
1205
1206 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1207 {
1208 qemu_flush_coalesced_mmio_buffer();
1209 if (QTAILQ_EMPTY(&mr->coalesced)) {
1210 mr->flush_coalesced_mmio = false;
1211 }
1212 }
1213
1214 void memory_region_add_eventfd(MemoryRegion *mr,
1215 target_phys_addr_t addr,
1216 unsigned size,
1217 bool match_data,
1218 uint64_t data,
1219 EventNotifier *e)
1220 {
1221 MemoryRegionIoeventfd mrfd = {
1222 .addr.start = int128_make64(addr),
1223 .addr.size = int128_make64(size),
1224 .match_data = match_data,
1225 .data = data,
1226 .e = e,
1227 };
1228 unsigned i;
1229
1230 memory_region_transaction_begin();
1231 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1232 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1233 break;
1234 }
1235 }
1236 ++mr->ioeventfd_nb;
1237 mr->ioeventfds = g_realloc(mr->ioeventfds,
1238 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1239 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1240 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1241 mr->ioeventfds[i] = mrfd;
1242 memory_region_transaction_commit();
1243 }
1244
1245 void memory_region_del_eventfd(MemoryRegion *mr,
1246 target_phys_addr_t addr,
1247 unsigned size,
1248 bool match_data,
1249 uint64_t data,
1250 EventNotifier *e)
1251 {
1252 MemoryRegionIoeventfd mrfd = {
1253 .addr.start = int128_make64(addr),
1254 .addr.size = int128_make64(size),
1255 .match_data = match_data,
1256 .data = data,
1257 .e = e,
1258 };
1259 unsigned i;
1260
1261 memory_region_transaction_begin();
1262 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1263 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1264 break;
1265 }
1266 }
1267 assert(i != mr->ioeventfd_nb);
1268 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1269 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1270 --mr->ioeventfd_nb;
1271 mr->ioeventfds = g_realloc(mr->ioeventfds,
1272 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1273 memory_region_transaction_commit();
1274 }
1275
1276 static void memory_region_add_subregion_common(MemoryRegion *mr,
1277 target_phys_addr_t offset,
1278 MemoryRegion *subregion)
1279 {
1280 MemoryRegion *other;
1281
1282 memory_region_transaction_begin();
1283
1284 assert(!subregion->parent);
1285 subregion->parent = mr;
1286 subregion->addr = offset;
1287 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1288 if (subregion->may_overlap || other->may_overlap) {
1289 continue;
1290 }
1291 if (int128_gt(int128_make64(offset),
1292 int128_add(int128_make64(other->addr), other->size))
1293 || int128_le(int128_add(int128_make64(offset), subregion->size),
1294 int128_make64(other->addr))) {
1295 continue;
1296 }
1297 #if 0
1298 printf("warning: subregion collision %llx/%llx (%s) "
1299 "vs %llx/%llx (%s)\n",
1300 (unsigned long long)offset,
1301 (unsigned long long)int128_get64(subregion->size),
1302 subregion->name,
1303 (unsigned long long)other->addr,
1304 (unsigned long long)int128_get64(other->size),
1305 other->name);
1306 #endif
1307 }
1308 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1309 if (subregion->priority >= other->priority) {
1310 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1311 goto done;
1312 }
1313 }
1314 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1315 done:
1316 memory_region_transaction_commit();
1317 }
1318
1319
1320 void memory_region_add_subregion(MemoryRegion *mr,
1321 target_phys_addr_t offset,
1322 MemoryRegion *subregion)
1323 {
1324 subregion->may_overlap = false;
1325 subregion->priority = 0;
1326 memory_region_add_subregion_common(mr, offset, subregion);
1327 }
1328
1329 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1330 target_phys_addr_t offset,
1331 MemoryRegion *subregion,
1332 unsigned priority)
1333 {
1334 subregion->may_overlap = true;
1335 subregion->priority = priority;
1336 memory_region_add_subregion_common(mr, offset, subregion);
1337 }
1338
1339 void memory_region_del_subregion(MemoryRegion *mr,
1340 MemoryRegion *subregion)
1341 {
1342 memory_region_transaction_begin();
1343 assert(subregion->parent == mr);
1344 subregion->parent = NULL;
1345 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1346 memory_region_transaction_commit();
1347 }
1348
1349 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1350 {
1351 if (enabled == mr->enabled) {
1352 return;
1353 }
1354 memory_region_transaction_begin();
1355 mr->enabled = enabled;
1356 memory_region_transaction_commit();
1357 }
1358
1359 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1360 {
1361 MemoryRegion *parent = mr->parent;
1362 unsigned priority = mr->priority;
1363 bool may_overlap = mr->may_overlap;
1364
1365 if (addr == mr->addr || !parent) {
1366 mr->addr = addr;
1367 return;
1368 }
1369
1370 memory_region_transaction_begin();
1371 memory_region_del_subregion(parent, mr);
1372 if (may_overlap) {
1373 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1374 } else {
1375 memory_region_add_subregion(parent, addr, mr);
1376 }
1377 memory_region_transaction_commit();
1378 }
1379
1380 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1381 {
1382 assert(mr->alias);
1383
1384 if (offset == mr->alias_offset) {
1385 return;
1386 }
1387
1388 memory_region_transaction_begin();
1389 mr->alias_offset = offset;
1390 memory_region_transaction_commit();
1391 }
1392
1393 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1394 {
1395 return mr->ram_addr;
1396 }
1397
1398 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1399 {
1400 const AddrRange *addr = addr_;
1401 const FlatRange *fr = fr_;
1402
1403 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1404 return -1;
1405 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1406 return 1;
1407 }
1408 return 0;
1409 }
1410
1411 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1412 {
1413 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1414 sizeof(FlatRange), cmp_flatrange_addr);
1415 }
1416
1417 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1418 target_phys_addr_t addr, uint64_t size)
1419 {
1420 AddressSpace *as = memory_region_to_address_space(address_space);
1421 AddrRange range = addrrange_make(int128_make64(addr),
1422 int128_make64(size));
1423 FlatRange *fr = address_space_lookup(as, range);
1424 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1425
1426 if (!fr) {
1427 return ret;
1428 }
1429
1430 while (fr > as->current_map->ranges
1431 && addrrange_intersects(fr[-1].addr, range)) {
1432 --fr;
1433 }
1434
1435 ret.mr = fr->mr;
1436 range = addrrange_intersection(range, fr->addr);
1437 ret.offset_within_region = fr->offset_in_region;
1438 ret.offset_within_region += int128_get64(int128_sub(range.start,
1439 fr->addr.start));
1440 ret.size = int128_get64(range.size);
1441 ret.offset_within_address_space = int128_get64(range.start);
1442 ret.readonly = fr->readonly;
1443 return ret;
1444 }
1445
1446 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1447 {
1448 AddressSpace *as = memory_region_to_address_space(address_space);
1449 FlatRange *fr;
1450
1451 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1452 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1453 }
1454 }
1455
1456 void memory_global_dirty_log_start(void)
1457 {
1458 global_dirty_log = true;
1459 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1460 }
1461
1462 void memory_global_dirty_log_stop(void)
1463 {
1464 global_dirty_log = false;
1465 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1466 }
1467
1468 static void listener_add_address_space(MemoryListener *listener,
1469 AddressSpace *as)
1470 {
1471 FlatRange *fr;
1472
1473 if (listener->address_space_filter
1474 && listener->address_space_filter != as->root) {
1475 return;
1476 }
1477
1478 if (global_dirty_log) {
1479 if (listener->log_global_start) {
1480 listener->log_global_start(listener);
1481 }
1482 }
1483
1484 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1485 MemoryRegionSection section = {
1486 .mr = fr->mr,
1487 .address_space = as->root,
1488 .offset_within_region = fr->offset_in_region,
1489 .size = int128_get64(fr->addr.size),
1490 .offset_within_address_space = int128_get64(fr->addr.start),
1491 .readonly = fr->readonly,
1492 };
1493 if (listener->region_add) {
1494 listener->region_add(listener, &section);
1495 }
1496 }
1497 }
1498
1499 void memory_listener_register(MemoryListener *listener, MemoryRegion *filter)
1500 {
1501 MemoryListener *other = NULL;
1502 AddressSpace *as;
1503
1504 listener->address_space_filter = filter;
1505 if (QTAILQ_EMPTY(&memory_listeners)
1506 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1507 memory_listeners)->priority) {
1508 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1509 } else {
1510 QTAILQ_FOREACH(other, &memory_listeners, link) {
1511 if (listener->priority < other->priority) {
1512 break;
1513 }
1514 }
1515 QTAILQ_INSERT_BEFORE(other, listener, link);
1516 }
1517
1518 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1519 listener_add_address_space(listener, as);
1520 }
1521 }
1522
1523 void memory_listener_unregister(MemoryListener *listener)
1524 {
1525 QTAILQ_REMOVE(&memory_listeners, listener, link);
1526 }
1527
1528 void address_space_init(AddressSpace *as, MemoryRegion *root)
1529 {
1530 memory_region_transaction_begin();
1531 as->root = root;
1532 as->current_map = g_new(FlatView, 1);
1533 flatview_init(as->current_map);
1534 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1535 as->name = NULL;
1536 memory_region_transaction_commit();
1537 }
1538
1539 void set_system_memory_map(MemoryRegion *mr)
1540 {
1541 address_space_init(&address_space_memory, mr);
1542 address_space_memory.name = "memory";
1543 }
1544
1545 void set_system_io_map(MemoryRegion *mr)
1546 {
1547 address_space_init(&address_space_io, mr);
1548 address_space_io.name = "I/O";
1549 }
1550
1551 uint64_t io_mem_read(MemoryRegion *mr, target_phys_addr_t addr, unsigned size)
1552 {
1553 return memory_region_dispatch_read(mr, addr, size);
1554 }
1555
1556 void io_mem_write(MemoryRegion *mr, target_phys_addr_t addr,
1557 uint64_t val, unsigned size)
1558 {
1559 memory_region_dispatch_write(mr, addr, val, size);
1560 }
1561
1562 typedef struct MemoryRegionList MemoryRegionList;
1563
1564 struct MemoryRegionList {
1565 const MemoryRegion *mr;
1566 bool printed;
1567 QTAILQ_ENTRY(MemoryRegionList) queue;
1568 };
1569
1570 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1571
1572 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1573 const MemoryRegion *mr, unsigned int level,
1574 target_phys_addr_t base,
1575 MemoryRegionListHead *alias_print_queue)
1576 {
1577 MemoryRegionList *new_ml, *ml, *next_ml;
1578 MemoryRegionListHead submr_print_queue;
1579 const MemoryRegion *submr;
1580 unsigned int i;
1581
1582 if (!mr) {
1583 return;
1584 }
1585
1586 for (i = 0; i < level; i++) {
1587 mon_printf(f, " ");
1588 }
1589
1590 if (mr->alias) {
1591 MemoryRegionList *ml;
1592 bool found = false;
1593
1594 /* check if the alias is already in the queue */
1595 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1596 if (ml->mr == mr->alias && !ml->printed) {
1597 found = true;
1598 }
1599 }
1600
1601 if (!found) {
1602 ml = g_new(MemoryRegionList, 1);
1603 ml->mr = mr->alias;
1604 ml->printed = false;
1605 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1606 }
1607 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1608 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1609 "-" TARGET_FMT_plx "\n",
1610 base + mr->addr,
1611 base + mr->addr
1612 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1613 mr->priority,
1614 mr->readable ? 'R' : '-',
1615 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1616 : '-',
1617 mr->name,
1618 mr->alias->name,
1619 mr->alias_offset,
1620 mr->alias_offset
1621 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1622 } else {
1623 mon_printf(f,
1624 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1625 base + mr->addr,
1626 base + mr->addr
1627 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1628 mr->priority,
1629 mr->readable ? 'R' : '-',
1630 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1631 : '-',
1632 mr->name);
1633 }
1634
1635 QTAILQ_INIT(&submr_print_queue);
1636
1637 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1638 new_ml = g_new(MemoryRegionList, 1);
1639 new_ml->mr = submr;
1640 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1641 if (new_ml->mr->addr < ml->mr->addr ||
1642 (new_ml->mr->addr == ml->mr->addr &&
1643 new_ml->mr->priority > ml->mr->priority)) {
1644 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1645 new_ml = NULL;
1646 break;
1647 }
1648 }
1649 if (new_ml) {
1650 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1651 }
1652 }
1653
1654 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1655 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1656 alias_print_queue);
1657 }
1658
1659 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1660 g_free(ml);
1661 }
1662 }
1663
1664 void mtree_info(fprintf_function mon_printf, void *f)
1665 {
1666 MemoryRegionListHead ml_head;
1667 MemoryRegionList *ml, *ml2;
1668 AddressSpace *as;
1669
1670 QTAILQ_INIT(&ml_head);
1671
1672 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1673 if (!as->name) {
1674 continue;
1675 }
1676 mon_printf(f, "%s\n", as->name);
1677 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1678 }
1679
1680 mon_printf(f, "aliases\n");
1681 /* print aliased regions */
1682 QTAILQ_FOREACH(ml, &ml_head, queue) {
1683 if (!ml->printed) {
1684 mon_printf(f, "%s\n", ml->mr->name);
1685 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1686 }
1687 }
1688
1689 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1690 g_free(ml);
1691 }
1692 }
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