]> git.proxmox.com Git - mirror_qemu.git/blob - migration/rdma.c
migration/rdma: Silence qemu_rdma_reg_control()
[mirror_qemu.git] / migration / rdma.c
1 /*
2 * RDMA protocol and interfaces
3 *
4 * Copyright IBM, Corp. 2010-2013
5 * Copyright Red Hat, Inc. 2015-2016
6 *
7 * Authors:
8 * Michael R. Hines <mrhines@us.ibm.com>
9 * Jiuxing Liu <jl@us.ibm.com>
10 * Daniel P. Berrange <berrange@redhat.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2 or
13 * later. See the COPYING file in the top-level directory.
14 *
15 */
16
17 #include "qemu/osdep.h"
18 #include "qapi/error.h"
19 #include "qemu/cutils.h"
20 #include "exec/target_page.h"
21 #include "rdma.h"
22 #include "migration.h"
23 #include "migration-stats.h"
24 #include "qemu-file.h"
25 #include "ram.h"
26 #include "qemu/error-report.h"
27 #include "qemu/main-loop.h"
28 #include "qemu/module.h"
29 #include "qemu/rcu.h"
30 #include "qemu/sockets.h"
31 #include "qemu/bitmap.h"
32 #include "qemu/coroutine.h"
33 #include "exec/memory.h"
34 #include <sys/socket.h>
35 #include <netdb.h>
36 #include <arpa/inet.h>
37 #include <rdma/rdma_cma.h>
38 #include "trace.h"
39 #include "qom/object.h"
40 #include "options.h"
41 #include <poll.h>
42
43 #define RDMA_RESOLVE_TIMEOUT_MS 10000
44
45 /* Do not merge data if larger than this. */
46 #define RDMA_MERGE_MAX (2 * 1024 * 1024)
47 #define RDMA_SIGNALED_SEND_MAX (RDMA_MERGE_MAX / 4096)
48
49 #define RDMA_REG_CHUNK_SHIFT 20 /* 1 MB */
50
51 /*
52 * This is only for non-live state being migrated.
53 * Instead of RDMA_WRITE messages, we use RDMA_SEND
54 * messages for that state, which requires a different
55 * delivery design than main memory.
56 */
57 #define RDMA_SEND_INCREMENT 32768
58
59 /*
60 * Maximum size infiniband SEND message
61 */
62 #define RDMA_CONTROL_MAX_BUFFER (512 * 1024)
63 #define RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE 4096
64
65 #define RDMA_CONTROL_VERSION_CURRENT 1
66 /*
67 * Capabilities for negotiation.
68 */
69 #define RDMA_CAPABILITY_PIN_ALL 0x01
70
71 /*
72 * Add the other flags above to this list of known capabilities
73 * as they are introduced.
74 */
75 static uint32_t known_capabilities = RDMA_CAPABILITY_PIN_ALL;
76
77 /*
78 * A work request ID is 64-bits and we split up these bits
79 * into 3 parts:
80 *
81 * bits 0-15 : type of control message, 2^16
82 * bits 16-29: ram block index, 2^14
83 * bits 30-63: ram block chunk number, 2^34
84 *
85 * The last two bit ranges are only used for RDMA writes,
86 * in order to track their completion and potentially
87 * also track unregistration status of the message.
88 */
89 #define RDMA_WRID_TYPE_SHIFT 0UL
90 #define RDMA_WRID_BLOCK_SHIFT 16UL
91 #define RDMA_WRID_CHUNK_SHIFT 30UL
92
93 #define RDMA_WRID_TYPE_MASK \
94 ((1UL << RDMA_WRID_BLOCK_SHIFT) - 1UL)
95
96 #define RDMA_WRID_BLOCK_MASK \
97 (~RDMA_WRID_TYPE_MASK & ((1UL << RDMA_WRID_CHUNK_SHIFT) - 1UL))
98
99 #define RDMA_WRID_CHUNK_MASK (~RDMA_WRID_BLOCK_MASK & ~RDMA_WRID_TYPE_MASK)
100
101 /*
102 * RDMA migration protocol:
103 * 1. RDMA Writes (data messages, i.e. RAM)
104 * 2. IB Send/Recv (control channel messages)
105 */
106 enum {
107 RDMA_WRID_NONE = 0,
108 RDMA_WRID_RDMA_WRITE = 1,
109 RDMA_WRID_SEND_CONTROL = 2000,
110 RDMA_WRID_RECV_CONTROL = 4000,
111 };
112
113 /*
114 * Work request IDs for IB SEND messages only (not RDMA writes).
115 * This is used by the migration protocol to transmit
116 * control messages (such as device state and registration commands)
117 *
118 * We could use more WRs, but we have enough for now.
119 */
120 enum {
121 RDMA_WRID_READY = 0,
122 RDMA_WRID_DATA,
123 RDMA_WRID_CONTROL,
124 RDMA_WRID_MAX,
125 };
126
127 /*
128 * SEND/RECV IB Control Messages.
129 */
130 enum {
131 RDMA_CONTROL_NONE = 0,
132 RDMA_CONTROL_ERROR,
133 RDMA_CONTROL_READY, /* ready to receive */
134 RDMA_CONTROL_QEMU_FILE, /* QEMUFile-transmitted bytes */
135 RDMA_CONTROL_RAM_BLOCKS_REQUEST, /* RAMBlock synchronization */
136 RDMA_CONTROL_RAM_BLOCKS_RESULT, /* RAMBlock synchronization */
137 RDMA_CONTROL_COMPRESS, /* page contains repeat values */
138 RDMA_CONTROL_REGISTER_REQUEST, /* dynamic page registration */
139 RDMA_CONTROL_REGISTER_RESULT, /* key to use after registration */
140 RDMA_CONTROL_REGISTER_FINISHED, /* current iteration finished */
141 RDMA_CONTROL_UNREGISTER_REQUEST, /* dynamic UN-registration */
142 RDMA_CONTROL_UNREGISTER_FINISHED, /* unpinning finished */
143 };
144
145
146 /*
147 * Memory and MR structures used to represent an IB Send/Recv work request.
148 * This is *not* used for RDMA writes, only IB Send/Recv.
149 */
150 typedef struct {
151 uint8_t control[RDMA_CONTROL_MAX_BUFFER]; /* actual buffer to register */
152 struct ibv_mr *control_mr; /* registration metadata */
153 size_t control_len; /* length of the message */
154 uint8_t *control_curr; /* start of unconsumed bytes */
155 } RDMAWorkRequestData;
156
157 /*
158 * Negotiate RDMA capabilities during connection-setup time.
159 */
160 typedef struct {
161 uint32_t version;
162 uint32_t flags;
163 } RDMACapabilities;
164
165 static void caps_to_network(RDMACapabilities *cap)
166 {
167 cap->version = htonl(cap->version);
168 cap->flags = htonl(cap->flags);
169 }
170
171 static void network_to_caps(RDMACapabilities *cap)
172 {
173 cap->version = ntohl(cap->version);
174 cap->flags = ntohl(cap->flags);
175 }
176
177 /*
178 * Representation of a RAMBlock from an RDMA perspective.
179 * This is not transmitted, only local.
180 * This and subsequent structures cannot be linked lists
181 * because we're using a single IB message to transmit
182 * the information. It's small anyway, so a list is overkill.
183 */
184 typedef struct RDMALocalBlock {
185 char *block_name;
186 uint8_t *local_host_addr; /* local virtual address */
187 uint64_t remote_host_addr; /* remote virtual address */
188 uint64_t offset;
189 uint64_t length;
190 struct ibv_mr **pmr; /* MRs for chunk-level registration */
191 struct ibv_mr *mr; /* MR for non-chunk-level registration */
192 uint32_t *remote_keys; /* rkeys for chunk-level registration */
193 uint32_t remote_rkey; /* rkeys for non-chunk-level registration */
194 int index; /* which block are we */
195 unsigned int src_index; /* (Only used on dest) */
196 bool is_ram_block;
197 int nb_chunks;
198 unsigned long *transit_bitmap;
199 unsigned long *unregister_bitmap;
200 } RDMALocalBlock;
201
202 /*
203 * Also represents a RAMblock, but only on the dest.
204 * This gets transmitted by the dest during connection-time
205 * to the source VM and then is used to populate the
206 * corresponding RDMALocalBlock with
207 * the information needed to perform the actual RDMA.
208 */
209 typedef struct QEMU_PACKED RDMADestBlock {
210 uint64_t remote_host_addr;
211 uint64_t offset;
212 uint64_t length;
213 uint32_t remote_rkey;
214 uint32_t padding;
215 } RDMADestBlock;
216
217 static const char *control_desc(unsigned int rdma_control)
218 {
219 static const char *strs[] = {
220 [RDMA_CONTROL_NONE] = "NONE",
221 [RDMA_CONTROL_ERROR] = "ERROR",
222 [RDMA_CONTROL_READY] = "READY",
223 [RDMA_CONTROL_QEMU_FILE] = "QEMU FILE",
224 [RDMA_CONTROL_RAM_BLOCKS_REQUEST] = "RAM BLOCKS REQUEST",
225 [RDMA_CONTROL_RAM_BLOCKS_RESULT] = "RAM BLOCKS RESULT",
226 [RDMA_CONTROL_COMPRESS] = "COMPRESS",
227 [RDMA_CONTROL_REGISTER_REQUEST] = "REGISTER REQUEST",
228 [RDMA_CONTROL_REGISTER_RESULT] = "REGISTER RESULT",
229 [RDMA_CONTROL_REGISTER_FINISHED] = "REGISTER FINISHED",
230 [RDMA_CONTROL_UNREGISTER_REQUEST] = "UNREGISTER REQUEST",
231 [RDMA_CONTROL_UNREGISTER_FINISHED] = "UNREGISTER FINISHED",
232 };
233
234 if (rdma_control > RDMA_CONTROL_UNREGISTER_FINISHED) {
235 return "??BAD CONTROL VALUE??";
236 }
237
238 return strs[rdma_control];
239 }
240
241 static uint64_t htonll(uint64_t v)
242 {
243 union { uint32_t lv[2]; uint64_t llv; } u;
244 u.lv[0] = htonl(v >> 32);
245 u.lv[1] = htonl(v & 0xFFFFFFFFULL);
246 return u.llv;
247 }
248
249 static uint64_t ntohll(uint64_t v)
250 {
251 union { uint32_t lv[2]; uint64_t llv; } u;
252 u.llv = v;
253 return ((uint64_t)ntohl(u.lv[0]) << 32) | (uint64_t) ntohl(u.lv[1]);
254 }
255
256 static void dest_block_to_network(RDMADestBlock *db)
257 {
258 db->remote_host_addr = htonll(db->remote_host_addr);
259 db->offset = htonll(db->offset);
260 db->length = htonll(db->length);
261 db->remote_rkey = htonl(db->remote_rkey);
262 }
263
264 static void network_to_dest_block(RDMADestBlock *db)
265 {
266 db->remote_host_addr = ntohll(db->remote_host_addr);
267 db->offset = ntohll(db->offset);
268 db->length = ntohll(db->length);
269 db->remote_rkey = ntohl(db->remote_rkey);
270 }
271
272 /*
273 * Virtual address of the above structures used for transmitting
274 * the RAMBlock descriptions at connection-time.
275 * This structure is *not* transmitted.
276 */
277 typedef struct RDMALocalBlocks {
278 int nb_blocks;
279 bool init; /* main memory init complete */
280 RDMALocalBlock *block;
281 } RDMALocalBlocks;
282
283 /*
284 * Main data structure for RDMA state.
285 * While there is only one copy of this structure being allocated right now,
286 * this is the place where one would start if you wanted to consider
287 * having more than one RDMA connection open at the same time.
288 */
289 typedef struct RDMAContext {
290 char *host;
291 int port;
292 char *host_port;
293
294 RDMAWorkRequestData wr_data[RDMA_WRID_MAX];
295
296 /*
297 * This is used by *_exchange_send() to figure out whether or not
298 * the initial "READY" message has already been received or not.
299 * This is because other functions may potentially poll() and detect
300 * the READY message before send() does, in which case we need to
301 * know if it completed.
302 */
303 int control_ready_expected;
304
305 /* number of outstanding writes */
306 int nb_sent;
307
308 /* store info about current buffer so that we can
309 merge it with future sends */
310 uint64_t current_addr;
311 uint64_t current_length;
312 /* index of ram block the current buffer belongs to */
313 int current_index;
314 /* index of the chunk in the current ram block */
315 int current_chunk;
316
317 bool pin_all;
318
319 /*
320 * infiniband-specific variables for opening the device
321 * and maintaining connection state and so forth.
322 *
323 * cm_id also has ibv_context, rdma_event_channel, and ibv_qp in
324 * cm_id->verbs, cm_id->channel, and cm_id->qp.
325 */
326 struct rdma_cm_id *cm_id; /* connection manager ID */
327 struct rdma_cm_id *listen_id;
328 bool connected;
329
330 struct ibv_context *verbs;
331 struct rdma_event_channel *channel;
332 struct ibv_qp *qp; /* queue pair */
333 struct ibv_comp_channel *recv_comp_channel; /* recv completion channel */
334 struct ibv_comp_channel *send_comp_channel; /* send completion channel */
335 struct ibv_pd *pd; /* protection domain */
336 struct ibv_cq *recv_cq; /* recvieve completion queue */
337 struct ibv_cq *send_cq; /* send completion queue */
338
339 /*
340 * If a previous write failed (perhaps because of a failed
341 * memory registration, then do not attempt any future work
342 * and remember the error state.
343 */
344 bool errored;
345 bool error_reported;
346 bool received_error;
347
348 /*
349 * Description of ram blocks used throughout the code.
350 */
351 RDMALocalBlocks local_ram_blocks;
352 RDMADestBlock *dest_blocks;
353
354 /* Index of the next RAMBlock received during block registration */
355 unsigned int next_src_index;
356
357 /*
358 * Migration on *destination* started.
359 * Then use coroutine yield function.
360 * Source runs in a thread, so we don't care.
361 */
362 int migration_started_on_destination;
363
364 int total_registrations;
365 int total_writes;
366
367 int unregister_current, unregister_next;
368 uint64_t unregistrations[RDMA_SIGNALED_SEND_MAX];
369
370 GHashTable *blockmap;
371
372 /* the RDMAContext for return path */
373 struct RDMAContext *return_path;
374 bool is_return_path;
375 } RDMAContext;
376
377 #define TYPE_QIO_CHANNEL_RDMA "qio-channel-rdma"
378 OBJECT_DECLARE_SIMPLE_TYPE(QIOChannelRDMA, QIO_CHANNEL_RDMA)
379
380
381
382 struct QIOChannelRDMA {
383 QIOChannel parent;
384 RDMAContext *rdmain;
385 RDMAContext *rdmaout;
386 QEMUFile *file;
387 bool blocking; /* XXX we don't actually honour this yet */
388 };
389
390 /*
391 * Main structure for IB Send/Recv control messages.
392 * This gets prepended at the beginning of every Send/Recv.
393 */
394 typedef struct QEMU_PACKED {
395 uint32_t len; /* Total length of data portion */
396 uint32_t type; /* which control command to perform */
397 uint32_t repeat; /* number of commands in data portion of same type */
398 uint32_t padding;
399 } RDMAControlHeader;
400
401 static void control_to_network(RDMAControlHeader *control)
402 {
403 control->type = htonl(control->type);
404 control->len = htonl(control->len);
405 control->repeat = htonl(control->repeat);
406 }
407
408 static void network_to_control(RDMAControlHeader *control)
409 {
410 control->type = ntohl(control->type);
411 control->len = ntohl(control->len);
412 control->repeat = ntohl(control->repeat);
413 }
414
415 /*
416 * Register a single Chunk.
417 * Information sent by the source VM to inform the dest
418 * to register an single chunk of memory before we can perform
419 * the actual RDMA operation.
420 */
421 typedef struct QEMU_PACKED {
422 union QEMU_PACKED {
423 uint64_t current_addr; /* offset into the ram_addr_t space */
424 uint64_t chunk; /* chunk to lookup if unregistering */
425 } key;
426 uint32_t current_index; /* which ramblock the chunk belongs to */
427 uint32_t padding;
428 uint64_t chunks; /* how many sequential chunks to register */
429 } RDMARegister;
430
431 static bool rdma_errored(RDMAContext *rdma)
432 {
433 if (rdma->errored && !rdma->error_reported) {
434 error_report("RDMA is in an error state waiting migration"
435 " to abort!");
436 rdma->error_reported = true;
437 }
438 return rdma->errored;
439 }
440
441 static void register_to_network(RDMAContext *rdma, RDMARegister *reg)
442 {
443 RDMALocalBlock *local_block;
444 local_block = &rdma->local_ram_blocks.block[reg->current_index];
445
446 if (local_block->is_ram_block) {
447 /*
448 * current_addr as passed in is an address in the local ram_addr_t
449 * space, we need to translate this for the destination
450 */
451 reg->key.current_addr -= local_block->offset;
452 reg->key.current_addr += rdma->dest_blocks[reg->current_index].offset;
453 }
454 reg->key.current_addr = htonll(reg->key.current_addr);
455 reg->current_index = htonl(reg->current_index);
456 reg->chunks = htonll(reg->chunks);
457 }
458
459 static void network_to_register(RDMARegister *reg)
460 {
461 reg->key.current_addr = ntohll(reg->key.current_addr);
462 reg->current_index = ntohl(reg->current_index);
463 reg->chunks = ntohll(reg->chunks);
464 }
465
466 typedef struct QEMU_PACKED {
467 uint32_t value; /* if zero, we will madvise() */
468 uint32_t block_idx; /* which ram block index */
469 uint64_t offset; /* Address in remote ram_addr_t space */
470 uint64_t length; /* length of the chunk */
471 } RDMACompress;
472
473 static void compress_to_network(RDMAContext *rdma, RDMACompress *comp)
474 {
475 comp->value = htonl(comp->value);
476 /*
477 * comp->offset as passed in is an address in the local ram_addr_t
478 * space, we need to translate this for the destination
479 */
480 comp->offset -= rdma->local_ram_blocks.block[comp->block_idx].offset;
481 comp->offset += rdma->dest_blocks[comp->block_idx].offset;
482 comp->block_idx = htonl(comp->block_idx);
483 comp->offset = htonll(comp->offset);
484 comp->length = htonll(comp->length);
485 }
486
487 static void network_to_compress(RDMACompress *comp)
488 {
489 comp->value = ntohl(comp->value);
490 comp->block_idx = ntohl(comp->block_idx);
491 comp->offset = ntohll(comp->offset);
492 comp->length = ntohll(comp->length);
493 }
494
495 /*
496 * The result of the dest's memory registration produces an "rkey"
497 * which the source VM must reference in order to perform
498 * the RDMA operation.
499 */
500 typedef struct QEMU_PACKED {
501 uint32_t rkey;
502 uint32_t padding;
503 uint64_t host_addr;
504 } RDMARegisterResult;
505
506 static void result_to_network(RDMARegisterResult *result)
507 {
508 result->rkey = htonl(result->rkey);
509 result->host_addr = htonll(result->host_addr);
510 };
511
512 static void network_to_result(RDMARegisterResult *result)
513 {
514 result->rkey = ntohl(result->rkey);
515 result->host_addr = ntohll(result->host_addr);
516 };
517
518 static int qemu_rdma_exchange_send(RDMAContext *rdma, RDMAControlHeader *head,
519 uint8_t *data, RDMAControlHeader *resp,
520 int *resp_idx,
521 int (*callback)(RDMAContext *rdma,
522 Error **errp),
523 Error **errp);
524
525 static inline uint64_t ram_chunk_index(const uint8_t *start,
526 const uint8_t *host)
527 {
528 return ((uintptr_t) host - (uintptr_t) start) >> RDMA_REG_CHUNK_SHIFT;
529 }
530
531 static inline uint8_t *ram_chunk_start(const RDMALocalBlock *rdma_ram_block,
532 uint64_t i)
533 {
534 return (uint8_t *)(uintptr_t)(rdma_ram_block->local_host_addr +
535 (i << RDMA_REG_CHUNK_SHIFT));
536 }
537
538 static inline uint8_t *ram_chunk_end(const RDMALocalBlock *rdma_ram_block,
539 uint64_t i)
540 {
541 uint8_t *result = ram_chunk_start(rdma_ram_block, i) +
542 (1UL << RDMA_REG_CHUNK_SHIFT);
543
544 if (result > (rdma_ram_block->local_host_addr + rdma_ram_block->length)) {
545 result = rdma_ram_block->local_host_addr + rdma_ram_block->length;
546 }
547
548 return result;
549 }
550
551 static void rdma_add_block(RDMAContext *rdma, const char *block_name,
552 void *host_addr,
553 ram_addr_t block_offset, uint64_t length)
554 {
555 RDMALocalBlocks *local = &rdma->local_ram_blocks;
556 RDMALocalBlock *block;
557 RDMALocalBlock *old = local->block;
558
559 local->block = g_new0(RDMALocalBlock, local->nb_blocks + 1);
560
561 if (local->nb_blocks) {
562 int x;
563
564 if (rdma->blockmap) {
565 for (x = 0; x < local->nb_blocks; x++) {
566 g_hash_table_remove(rdma->blockmap,
567 (void *)(uintptr_t)old[x].offset);
568 g_hash_table_insert(rdma->blockmap,
569 (void *)(uintptr_t)old[x].offset,
570 &local->block[x]);
571 }
572 }
573 memcpy(local->block, old, sizeof(RDMALocalBlock) * local->nb_blocks);
574 g_free(old);
575 }
576
577 block = &local->block[local->nb_blocks];
578
579 block->block_name = g_strdup(block_name);
580 block->local_host_addr = host_addr;
581 block->offset = block_offset;
582 block->length = length;
583 block->index = local->nb_blocks;
584 block->src_index = ~0U; /* Filled in by the receipt of the block list */
585 block->nb_chunks = ram_chunk_index(host_addr, host_addr + length) + 1UL;
586 block->transit_bitmap = bitmap_new(block->nb_chunks);
587 bitmap_clear(block->transit_bitmap, 0, block->nb_chunks);
588 block->unregister_bitmap = bitmap_new(block->nb_chunks);
589 bitmap_clear(block->unregister_bitmap, 0, block->nb_chunks);
590 block->remote_keys = g_new0(uint32_t, block->nb_chunks);
591
592 block->is_ram_block = local->init ? false : true;
593
594 if (rdma->blockmap) {
595 g_hash_table_insert(rdma->blockmap, (void *)(uintptr_t)block_offset, block);
596 }
597
598 trace_rdma_add_block(block_name, local->nb_blocks,
599 (uintptr_t) block->local_host_addr,
600 block->offset, block->length,
601 (uintptr_t) (block->local_host_addr + block->length),
602 BITS_TO_LONGS(block->nb_chunks) *
603 sizeof(unsigned long) * 8,
604 block->nb_chunks);
605
606 local->nb_blocks++;
607 }
608
609 /*
610 * Memory regions need to be registered with the device and queue pairs setup
611 * in advanced before the migration starts. This tells us where the RAM blocks
612 * are so that we can register them individually.
613 */
614 static int qemu_rdma_init_one_block(RAMBlock *rb, void *opaque)
615 {
616 const char *block_name = qemu_ram_get_idstr(rb);
617 void *host_addr = qemu_ram_get_host_addr(rb);
618 ram_addr_t block_offset = qemu_ram_get_offset(rb);
619 ram_addr_t length = qemu_ram_get_used_length(rb);
620 rdma_add_block(opaque, block_name, host_addr, block_offset, length);
621 return 0;
622 }
623
624 /*
625 * Identify the RAMBlocks and their quantity. They will be references to
626 * identify chunk boundaries inside each RAMBlock and also be referenced
627 * during dynamic page registration.
628 */
629 static void qemu_rdma_init_ram_blocks(RDMAContext *rdma)
630 {
631 RDMALocalBlocks *local = &rdma->local_ram_blocks;
632 int ret;
633
634 assert(rdma->blockmap == NULL);
635 memset(local, 0, sizeof *local);
636 ret = foreach_not_ignored_block(qemu_rdma_init_one_block, rdma);
637 assert(!ret);
638 trace_qemu_rdma_init_ram_blocks(local->nb_blocks);
639 rdma->dest_blocks = g_new0(RDMADestBlock,
640 rdma->local_ram_blocks.nb_blocks);
641 local->init = true;
642 }
643
644 /*
645 * Note: If used outside of cleanup, the caller must ensure that the destination
646 * block structures are also updated
647 */
648 static void rdma_delete_block(RDMAContext *rdma, RDMALocalBlock *block)
649 {
650 RDMALocalBlocks *local = &rdma->local_ram_blocks;
651 RDMALocalBlock *old = local->block;
652 int x;
653
654 if (rdma->blockmap) {
655 g_hash_table_remove(rdma->blockmap, (void *)(uintptr_t)block->offset);
656 }
657 if (block->pmr) {
658 int j;
659
660 for (j = 0; j < block->nb_chunks; j++) {
661 if (!block->pmr[j]) {
662 continue;
663 }
664 ibv_dereg_mr(block->pmr[j]);
665 rdma->total_registrations--;
666 }
667 g_free(block->pmr);
668 block->pmr = NULL;
669 }
670
671 if (block->mr) {
672 ibv_dereg_mr(block->mr);
673 rdma->total_registrations--;
674 block->mr = NULL;
675 }
676
677 g_free(block->transit_bitmap);
678 block->transit_bitmap = NULL;
679
680 g_free(block->unregister_bitmap);
681 block->unregister_bitmap = NULL;
682
683 g_free(block->remote_keys);
684 block->remote_keys = NULL;
685
686 g_free(block->block_name);
687 block->block_name = NULL;
688
689 if (rdma->blockmap) {
690 for (x = 0; x < local->nb_blocks; x++) {
691 g_hash_table_remove(rdma->blockmap,
692 (void *)(uintptr_t)old[x].offset);
693 }
694 }
695
696 if (local->nb_blocks > 1) {
697
698 local->block = g_new0(RDMALocalBlock, local->nb_blocks - 1);
699
700 if (block->index) {
701 memcpy(local->block, old, sizeof(RDMALocalBlock) * block->index);
702 }
703
704 if (block->index < (local->nb_blocks - 1)) {
705 memcpy(local->block + block->index, old + (block->index + 1),
706 sizeof(RDMALocalBlock) *
707 (local->nb_blocks - (block->index + 1)));
708 for (x = block->index; x < local->nb_blocks - 1; x++) {
709 local->block[x].index--;
710 }
711 }
712 } else {
713 assert(block == local->block);
714 local->block = NULL;
715 }
716
717 trace_rdma_delete_block(block, (uintptr_t)block->local_host_addr,
718 block->offset, block->length,
719 (uintptr_t)(block->local_host_addr + block->length),
720 BITS_TO_LONGS(block->nb_chunks) *
721 sizeof(unsigned long) * 8, block->nb_chunks);
722
723 g_free(old);
724
725 local->nb_blocks--;
726
727 if (local->nb_blocks && rdma->blockmap) {
728 for (x = 0; x < local->nb_blocks; x++) {
729 g_hash_table_insert(rdma->blockmap,
730 (void *)(uintptr_t)local->block[x].offset,
731 &local->block[x]);
732 }
733 }
734 }
735
736 /*
737 * Put in the log file which RDMA device was opened and the details
738 * associated with that device.
739 */
740 static void qemu_rdma_dump_id(const char *who, struct ibv_context *verbs)
741 {
742 struct ibv_port_attr port;
743
744 if (ibv_query_port(verbs, 1, &port)) {
745 error_report("Failed to query port information");
746 return;
747 }
748
749 printf("%s RDMA Device opened: kernel name %s "
750 "uverbs device name %s, "
751 "infiniband_verbs class device path %s, "
752 "infiniband class device path %s, "
753 "transport: (%d) %s\n",
754 who,
755 verbs->device->name,
756 verbs->device->dev_name,
757 verbs->device->dev_path,
758 verbs->device->ibdev_path,
759 port.link_layer,
760 (port.link_layer == IBV_LINK_LAYER_INFINIBAND) ? "Infiniband" :
761 ((port.link_layer == IBV_LINK_LAYER_ETHERNET)
762 ? "Ethernet" : "Unknown"));
763 }
764
765 /*
766 * Put in the log file the RDMA gid addressing information,
767 * useful for folks who have trouble understanding the
768 * RDMA device hierarchy in the kernel.
769 */
770 static void qemu_rdma_dump_gid(const char *who, struct rdma_cm_id *id)
771 {
772 char sgid[33];
773 char dgid[33];
774 inet_ntop(AF_INET6, &id->route.addr.addr.ibaddr.sgid, sgid, sizeof sgid);
775 inet_ntop(AF_INET6, &id->route.addr.addr.ibaddr.dgid, dgid, sizeof dgid);
776 trace_qemu_rdma_dump_gid(who, sgid, dgid);
777 }
778
779 /*
780 * As of now, IPv6 over RoCE / iWARP is not supported by linux.
781 * We will try the next addrinfo struct, and fail if there are
782 * no other valid addresses to bind against.
783 *
784 * If user is listening on '[::]', then we will not have a opened a device
785 * yet and have no way of verifying if the device is RoCE or not.
786 *
787 * In this case, the source VM will throw an error for ALL types of
788 * connections (both IPv4 and IPv6) if the destination machine does not have
789 * a regular infiniband network available for use.
790 *
791 * The only way to guarantee that an error is thrown for broken kernels is
792 * for the management software to choose a *specific* interface at bind time
793 * and validate what time of hardware it is.
794 *
795 * Unfortunately, this puts the user in a fix:
796 *
797 * If the source VM connects with an IPv4 address without knowing that the
798 * destination has bound to '[::]' the migration will unconditionally fail
799 * unless the management software is explicitly listening on the IPv4
800 * address while using a RoCE-based device.
801 *
802 * If the source VM connects with an IPv6 address, then we're OK because we can
803 * throw an error on the source (and similarly on the destination).
804 *
805 * But in mixed environments, this will be broken for a while until it is fixed
806 * inside linux.
807 *
808 * We do provide a *tiny* bit of help in this function: We can list all of the
809 * devices in the system and check to see if all the devices are RoCE or
810 * Infiniband.
811 *
812 * If we detect that we have a *pure* RoCE environment, then we can safely
813 * thrown an error even if the management software has specified '[::]' as the
814 * bind address.
815 *
816 * However, if there is are multiple hetergeneous devices, then we cannot make
817 * this assumption and the user just has to be sure they know what they are
818 * doing.
819 *
820 * Patches are being reviewed on linux-rdma.
821 */
822 static int qemu_rdma_broken_ipv6_kernel(struct ibv_context *verbs, Error **errp)
823 {
824 /* This bug only exists in linux, to our knowledge. */
825 #ifdef CONFIG_LINUX
826 struct ibv_port_attr port_attr;
827
828 /*
829 * Verbs are only NULL if management has bound to '[::]'.
830 *
831 * Let's iterate through all the devices and see if there any pure IB
832 * devices (non-ethernet).
833 *
834 * If not, then we can safely proceed with the migration.
835 * Otherwise, there are no guarantees until the bug is fixed in linux.
836 */
837 if (!verbs) {
838 int num_devices, x;
839 struct ibv_device **dev_list = ibv_get_device_list(&num_devices);
840 bool roce_found = false;
841 bool ib_found = false;
842
843 for (x = 0; x < num_devices; x++) {
844 verbs = ibv_open_device(dev_list[x]);
845 /*
846 * ibv_open_device() is not documented to set errno. If
847 * it does, it's somebody else's doc bug. If it doesn't,
848 * the use of errno below is wrong.
849 * TODO Find out whether ibv_open_device() sets errno.
850 */
851 if (!verbs) {
852 if (errno == EPERM) {
853 continue;
854 } else {
855 error_setg_errno(errp, errno,
856 "could not open RDMA device context");
857 return -1;
858 }
859 }
860
861 if (ibv_query_port(verbs, 1, &port_attr)) {
862 ibv_close_device(verbs);
863 error_setg(errp,
864 "RDMA ERROR: Could not query initial IB port");
865 return -1;
866 }
867
868 if (port_attr.link_layer == IBV_LINK_LAYER_INFINIBAND) {
869 ib_found = true;
870 } else if (port_attr.link_layer == IBV_LINK_LAYER_ETHERNET) {
871 roce_found = true;
872 }
873
874 ibv_close_device(verbs);
875
876 }
877
878 if (roce_found) {
879 if (ib_found) {
880 fprintf(stderr, "WARN: migrations may fail:"
881 " IPv6 over RoCE / iWARP in linux"
882 " is broken. But since you appear to have a"
883 " mixed RoCE / IB environment, be sure to only"
884 " migrate over the IB fabric until the kernel "
885 " fixes the bug.\n");
886 } else {
887 error_setg(errp, "RDMA ERROR: "
888 "You only have RoCE / iWARP devices in your systems"
889 " and your management software has specified '[::]'"
890 ", but IPv6 over RoCE / iWARP is not supported in Linux.");
891 return -1;
892 }
893 }
894
895 return 0;
896 }
897
898 /*
899 * If we have a verbs context, that means that some other than '[::]' was
900 * used by the management software for binding. In which case we can
901 * actually warn the user about a potentially broken kernel.
902 */
903
904 /* IB ports start with 1, not 0 */
905 if (ibv_query_port(verbs, 1, &port_attr)) {
906 error_setg(errp, "RDMA ERROR: Could not query initial IB port");
907 return -1;
908 }
909
910 if (port_attr.link_layer == IBV_LINK_LAYER_ETHERNET) {
911 error_setg(errp, "RDMA ERROR: "
912 "Linux kernel's RoCE / iWARP does not support IPv6 "
913 "(but patches on linux-rdma in progress)");
914 return -1;
915 }
916
917 #endif
918
919 return 0;
920 }
921
922 /*
923 * Figure out which RDMA device corresponds to the requested IP hostname
924 * Also create the initial connection manager identifiers for opening
925 * the connection.
926 */
927 static int qemu_rdma_resolve_host(RDMAContext *rdma, Error **errp)
928 {
929 Error *err = NULL;
930 int ret;
931 struct rdma_addrinfo *res;
932 char port_str[16];
933 struct rdma_cm_event *cm_event;
934 char ip[40] = "unknown";
935 struct rdma_addrinfo *e;
936
937 if (rdma->host == NULL || !strcmp(rdma->host, "")) {
938 error_setg(errp, "RDMA ERROR: RDMA hostname has not been set");
939 return -1;
940 }
941
942 /* create CM channel */
943 rdma->channel = rdma_create_event_channel();
944 if (!rdma->channel) {
945 error_setg(errp, "RDMA ERROR: could not create CM channel");
946 return -1;
947 }
948
949 /* create CM id */
950 ret = rdma_create_id(rdma->channel, &rdma->cm_id, NULL, RDMA_PS_TCP);
951 if (ret < 0) {
952 error_setg(errp, "RDMA ERROR: could not create channel id");
953 goto err_resolve_create_id;
954 }
955
956 snprintf(port_str, 16, "%d", rdma->port);
957 port_str[15] = '\0';
958
959 ret = rdma_getaddrinfo(rdma->host, port_str, NULL, &res);
960 if (ret) {
961 error_setg(errp, "RDMA ERROR: could not rdma_getaddrinfo address %s",
962 rdma->host);
963 goto err_resolve_get_addr;
964 }
965
966 /* Try all addresses, saving the first error in @err */
967 for (e = res; e != NULL; e = e->ai_next) {
968 Error **local_errp = err ? NULL : &err;
969
970 inet_ntop(e->ai_family,
971 &((struct sockaddr_in *) e->ai_dst_addr)->sin_addr, ip, sizeof ip);
972 trace_qemu_rdma_resolve_host_trying(rdma->host, ip);
973
974 ret = rdma_resolve_addr(rdma->cm_id, NULL, e->ai_dst_addr,
975 RDMA_RESOLVE_TIMEOUT_MS);
976 if (ret >= 0) {
977 if (e->ai_family == AF_INET6) {
978 ret = qemu_rdma_broken_ipv6_kernel(rdma->cm_id->verbs,
979 local_errp);
980 if (ret < 0) {
981 continue;
982 }
983 }
984 error_free(err);
985 goto route;
986 }
987 }
988
989 rdma_freeaddrinfo(res);
990 if (err) {
991 error_propagate(errp, err);
992 } else {
993 error_setg(errp, "RDMA ERROR: could not resolve address %s",
994 rdma->host);
995 }
996 goto err_resolve_get_addr;
997
998 route:
999 rdma_freeaddrinfo(res);
1000 qemu_rdma_dump_gid("source_resolve_addr", rdma->cm_id);
1001
1002 ret = rdma_get_cm_event(rdma->channel, &cm_event);
1003 if (ret < 0) {
1004 error_setg(errp, "RDMA ERROR: could not perform event_addr_resolved");
1005 goto err_resolve_get_addr;
1006 }
1007
1008 if (cm_event->event != RDMA_CM_EVENT_ADDR_RESOLVED) {
1009 error_setg(errp,
1010 "RDMA ERROR: result not equal to event_addr_resolved %s",
1011 rdma_event_str(cm_event->event));
1012 rdma_ack_cm_event(cm_event);
1013 goto err_resolve_get_addr;
1014 }
1015 rdma_ack_cm_event(cm_event);
1016
1017 /* resolve route */
1018 ret = rdma_resolve_route(rdma->cm_id, RDMA_RESOLVE_TIMEOUT_MS);
1019 if (ret < 0) {
1020 error_setg(errp, "RDMA ERROR: could not resolve rdma route");
1021 goto err_resolve_get_addr;
1022 }
1023
1024 ret = rdma_get_cm_event(rdma->channel, &cm_event);
1025 if (ret < 0) {
1026 error_setg(errp, "RDMA ERROR: could not perform event_route_resolved");
1027 goto err_resolve_get_addr;
1028 }
1029 if (cm_event->event != RDMA_CM_EVENT_ROUTE_RESOLVED) {
1030 error_setg(errp, "RDMA ERROR: "
1031 "result not equal to event_route_resolved: %s",
1032 rdma_event_str(cm_event->event));
1033 rdma_ack_cm_event(cm_event);
1034 goto err_resolve_get_addr;
1035 }
1036 rdma_ack_cm_event(cm_event);
1037 rdma->verbs = rdma->cm_id->verbs;
1038 qemu_rdma_dump_id("source_resolve_host", rdma->cm_id->verbs);
1039 qemu_rdma_dump_gid("source_resolve_host", rdma->cm_id);
1040 return 0;
1041
1042 err_resolve_get_addr:
1043 rdma_destroy_id(rdma->cm_id);
1044 rdma->cm_id = NULL;
1045 err_resolve_create_id:
1046 rdma_destroy_event_channel(rdma->channel);
1047 rdma->channel = NULL;
1048 return -1;
1049 }
1050
1051 /*
1052 * Create protection domain and completion queues
1053 */
1054 static int qemu_rdma_alloc_pd_cq(RDMAContext *rdma, Error **errp)
1055 {
1056 /* allocate pd */
1057 rdma->pd = ibv_alloc_pd(rdma->verbs);
1058 if (!rdma->pd) {
1059 error_setg(errp, "failed to allocate protection domain");
1060 return -1;
1061 }
1062
1063 /* create receive completion channel */
1064 rdma->recv_comp_channel = ibv_create_comp_channel(rdma->verbs);
1065 if (!rdma->recv_comp_channel) {
1066 error_setg(errp, "failed to allocate receive completion channel");
1067 goto err_alloc_pd_cq;
1068 }
1069
1070 /*
1071 * Completion queue can be filled by read work requests.
1072 */
1073 rdma->recv_cq = ibv_create_cq(rdma->verbs, (RDMA_SIGNALED_SEND_MAX * 3),
1074 NULL, rdma->recv_comp_channel, 0);
1075 if (!rdma->recv_cq) {
1076 error_setg(errp, "failed to allocate receive completion queue");
1077 goto err_alloc_pd_cq;
1078 }
1079
1080 /* create send completion channel */
1081 rdma->send_comp_channel = ibv_create_comp_channel(rdma->verbs);
1082 if (!rdma->send_comp_channel) {
1083 error_setg(errp, "failed to allocate send completion channel");
1084 goto err_alloc_pd_cq;
1085 }
1086
1087 rdma->send_cq = ibv_create_cq(rdma->verbs, (RDMA_SIGNALED_SEND_MAX * 3),
1088 NULL, rdma->send_comp_channel, 0);
1089 if (!rdma->send_cq) {
1090 error_setg(errp, "failed to allocate send completion queue");
1091 goto err_alloc_pd_cq;
1092 }
1093
1094 return 0;
1095
1096 err_alloc_pd_cq:
1097 if (rdma->pd) {
1098 ibv_dealloc_pd(rdma->pd);
1099 }
1100 if (rdma->recv_comp_channel) {
1101 ibv_destroy_comp_channel(rdma->recv_comp_channel);
1102 }
1103 if (rdma->send_comp_channel) {
1104 ibv_destroy_comp_channel(rdma->send_comp_channel);
1105 }
1106 if (rdma->recv_cq) {
1107 ibv_destroy_cq(rdma->recv_cq);
1108 rdma->recv_cq = NULL;
1109 }
1110 rdma->pd = NULL;
1111 rdma->recv_comp_channel = NULL;
1112 rdma->send_comp_channel = NULL;
1113 return -1;
1114
1115 }
1116
1117 /*
1118 * Create queue pairs.
1119 */
1120 static int qemu_rdma_alloc_qp(RDMAContext *rdma)
1121 {
1122 struct ibv_qp_init_attr attr = { 0 };
1123 int ret;
1124
1125 attr.cap.max_send_wr = RDMA_SIGNALED_SEND_MAX;
1126 attr.cap.max_recv_wr = 3;
1127 attr.cap.max_send_sge = 1;
1128 attr.cap.max_recv_sge = 1;
1129 attr.send_cq = rdma->send_cq;
1130 attr.recv_cq = rdma->recv_cq;
1131 attr.qp_type = IBV_QPT_RC;
1132
1133 ret = rdma_create_qp(rdma->cm_id, rdma->pd, &attr);
1134 if (ret < 0) {
1135 return -1;
1136 }
1137
1138 rdma->qp = rdma->cm_id->qp;
1139 return 0;
1140 }
1141
1142 /* Check whether On-Demand Paging is supported by RDAM device */
1143 static bool rdma_support_odp(struct ibv_context *dev)
1144 {
1145 struct ibv_device_attr_ex attr = {0};
1146 int ret = ibv_query_device_ex(dev, NULL, &attr);
1147 if (ret) {
1148 return false;
1149 }
1150
1151 if (attr.odp_caps.general_caps & IBV_ODP_SUPPORT) {
1152 return true;
1153 }
1154
1155 return false;
1156 }
1157
1158 /*
1159 * ibv_advise_mr to avoid RNR NAK error as far as possible.
1160 * The responder mr registering with ODP will sent RNR NAK back to
1161 * the requester in the face of the page fault.
1162 */
1163 static void qemu_rdma_advise_prefetch_mr(struct ibv_pd *pd, uint64_t addr,
1164 uint32_t len, uint32_t lkey,
1165 const char *name, bool wr)
1166 {
1167 #ifdef HAVE_IBV_ADVISE_MR
1168 int ret;
1169 int advice = wr ? IBV_ADVISE_MR_ADVICE_PREFETCH_WRITE :
1170 IBV_ADVISE_MR_ADVICE_PREFETCH;
1171 struct ibv_sge sg_list = {.lkey = lkey, .addr = addr, .length = len};
1172
1173 ret = ibv_advise_mr(pd, advice,
1174 IBV_ADVISE_MR_FLAG_FLUSH, &sg_list, 1);
1175 /* ignore the error */
1176 trace_qemu_rdma_advise_mr(name, len, addr, strerror(ret));
1177 #endif
1178 }
1179
1180 static int qemu_rdma_reg_whole_ram_blocks(RDMAContext *rdma, Error **errp)
1181 {
1182 int i;
1183 RDMALocalBlocks *local = &rdma->local_ram_blocks;
1184
1185 for (i = 0; i < local->nb_blocks; i++) {
1186 int access = IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE;
1187
1188 local->block[i].mr =
1189 ibv_reg_mr(rdma->pd,
1190 local->block[i].local_host_addr,
1191 local->block[i].length, access
1192 );
1193 /*
1194 * ibv_reg_mr() is not documented to set errno. If it does,
1195 * it's somebody else's doc bug. If it doesn't, the use of
1196 * errno below is wrong.
1197 * TODO Find out whether ibv_reg_mr() sets errno.
1198 */
1199 if (!local->block[i].mr &&
1200 errno == ENOTSUP && rdma_support_odp(rdma->verbs)) {
1201 access |= IBV_ACCESS_ON_DEMAND;
1202 /* register ODP mr */
1203 local->block[i].mr =
1204 ibv_reg_mr(rdma->pd,
1205 local->block[i].local_host_addr,
1206 local->block[i].length, access);
1207 trace_qemu_rdma_register_odp_mr(local->block[i].block_name);
1208
1209 if (local->block[i].mr) {
1210 qemu_rdma_advise_prefetch_mr(rdma->pd,
1211 (uintptr_t)local->block[i].local_host_addr,
1212 local->block[i].length,
1213 local->block[i].mr->lkey,
1214 local->block[i].block_name,
1215 true);
1216 }
1217 }
1218
1219 if (!local->block[i].mr) {
1220 error_setg_errno(errp, errno,
1221 "Failed to register local dest ram block!");
1222 goto err;
1223 }
1224 rdma->total_registrations++;
1225 }
1226
1227 return 0;
1228
1229 err:
1230 for (i--; i >= 0; i--) {
1231 ibv_dereg_mr(local->block[i].mr);
1232 local->block[i].mr = NULL;
1233 rdma->total_registrations--;
1234 }
1235
1236 return -1;
1237
1238 }
1239
1240 /*
1241 * Find the ram block that corresponds to the page requested to be
1242 * transmitted by QEMU.
1243 *
1244 * Once the block is found, also identify which 'chunk' within that
1245 * block that the page belongs to.
1246 */
1247 static void qemu_rdma_search_ram_block(RDMAContext *rdma,
1248 uintptr_t block_offset,
1249 uint64_t offset,
1250 uint64_t length,
1251 uint64_t *block_index,
1252 uint64_t *chunk_index)
1253 {
1254 uint64_t current_addr = block_offset + offset;
1255 RDMALocalBlock *block = g_hash_table_lookup(rdma->blockmap,
1256 (void *) block_offset);
1257 assert(block);
1258 assert(current_addr >= block->offset);
1259 assert((current_addr + length) <= (block->offset + block->length));
1260
1261 *block_index = block->index;
1262 *chunk_index = ram_chunk_index(block->local_host_addr,
1263 block->local_host_addr + (current_addr - block->offset));
1264 }
1265
1266 /*
1267 * Register a chunk with IB. If the chunk was already registered
1268 * previously, then skip.
1269 *
1270 * Also return the keys associated with the registration needed
1271 * to perform the actual RDMA operation.
1272 */
1273 static int qemu_rdma_register_and_get_keys(RDMAContext *rdma,
1274 RDMALocalBlock *block, uintptr_t host_addr,
1275 uint32_t *lkey, uint32_t *rkey, int chunk,
1276 uint8_t *chunk_start, uint8_t *chunk_end)
1277 {
1278 if (block->mr) {
1279 if (lkey) {
1280 *lkey = block->mr->lkey;
1281 }
1282 if (rkey) {
1283 *rkey = block->mr->rkey;
1284 }
1285 return 0;
1286 }
1287
1288 /* allocate memory to store chunk MRs */
1289 if (!block->pmr) {
1290 block->pmr = g_new0(struct ibv_mr *, block->nb_chunks);
1291 }
1292
1293 /*
1294 * If 'rkey', then we're the destination, so grant access to the source.
1295 *
1296 * If 'lkey', then we're the source VM, so grant access only to ourselves.
1297 */
1298 if (!block->pmr[chunk]) {
1299 uint64_t len = chunk_end - chunk_start;
1300 int access = rkey ? IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE :
1301 0;
1302
1303 trace_qemu_rdma_register_and_get_keys(len, chunk_start);
1304
1305 block->pmr[chunk] = ibv_reg_mr(rdma->pd, chunk_start, len, access);
1306 /*
1307 * ibv_reg_mr() is not documented to set errno. If it does,
1308 * it's somebody else's doc bug. If it doesn't, the use of
1309 * errno below is wrong.
1310 * TODO Find out whether ibv_reg_mr() sets errno.
1311 */
1312 if (!block->pmr[chunk] &&
1313 errno == ENOTSUP && rdma_support_odp(rdma->verbs)) {
1314 access |= IBV_ACCESS_ON_DEMAND;
1315 /* register ODP mr */
1316 block->pmr[chunk] = ibv_reg_mr(rdma->pd, chunk_start, len, access);
1317 trace_qemu_rdma_register_odp_mr(block->block_name);
1318
1319 if (block->pmr[chunk]) {
1320 qemu_rdma_advise_prefetch_mr(rdma->pd, (uintptr_t)chunk_start,
1321 len, block->pmr[chunk]->lkey,
1322 block->block_name, rkey);
1323
1324 }
1325 }
1326 }
1327 if (!block->pmr[chunk]) {
1328 perror("Failed to register chunk!");
1329 fprintf(stderr, "Chunk details: block: %d chunk index %d"
1330 " start %" PRIuPTR " end %" PRIuPTR
1331 " host %" PRIuPTR
1332 " local %" PRIuPTR " registrations: %d\n",
1333 block->index, chunk, (uintptr_t)chunk_start,
1334 (uintptr_t)chunk_end, host_addr,
1335 (uintptr_t)block->local_host_addr,
1336 rdma->total_registrations);
1337 return -1;
1338 }
1339 rdma->total_registrations++;
1340
1341 if (lkey) {
1342 *lkey = block->pmr[chunk]->lkey;
1343 }
1344 if (rkey) {
1345 *rkey = block->pmr[chunk]->rkey;
1346 }
1347 return 0;
1348 }
1349
1350 /*
1351 * Register (at connection time) the memory used for control
1352 * channel messages.
1353 */
1354 static int qemu_rdma_reg_control(RDMAContext *rdma, int idx)
1355 {
1356 rdma->wr_data[idx].control_mr = ibv_reg_mr(rdma->pd,
1357 rdma->wr_data[idx].control, RDMA_CONTROL_MAX_BUFFER,
1358 IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE);
1359 if (rdma->wr_data[idx].control_mr) {
1360 rdma->total_registrations++;
1361 return 0;
1362 }
1363 return -1;
1364 }
1365
1366 /*
1367 * Perform a non-optimized memory unregistration after every transfer
1368 * for demonstration purposes, only if pin-all is not requested.
1369 *
1370 * Potential optimizations:
1371 * 1. Start a new thread to run this function continuously
1372 - for bit clearing
1373 - and for receipt of unregister messages
1374 * 2. Use an LRU.
1375 * 3. Use workload hints.
1376 */
1377 static int qemu_rdma_unregister_waiting(RDMAContext *rdma)
1378 {
1379 Error *err = NULL;
1380
1381 while (rdma->unregistrations[rdma->unregister_current]) {
1382 int ret;
1383 uint64_t wr_id = rdma->unregistrations[rdma->unregister_current];
1384 uint64_t chunk =
1385 (wr_id & RDMA_WRID_CHUNK_MASK) >> RDMA_WRID_CHUNK_SHIFT;
1386 uint64_t index =
1387 (wr_id & RDMA_WRID_BLOCK_MASK) >> RDMA_WRID_BLOCK_SHIFT;
1388 RDMALocalBlock *block =
1389 &(rdma->local_ram_blocks.block[index]);
1390 RDMARegister reg = { .current_index = index };
1391 RDMAControlHeader resp = { .type = RDMA_CONTROL_UNREGISTER_FINISHED,
1392 };
1393 RDMAControlHeader head = { .len = sizeof(RDMARegister),
1394 .type = RDMA_CONTROL_UNREGISTER_REQUEST,
1395 .repeat = 1,
1396 };
1397
1398 trace_qemu_rdma_unregister_waiting_proc(chunk,
1399 rdma->unregister_current);
1400
1401 rdma->unregistrations[rdma->unregister_current] = 0;
1402 rdma->unregister_current++;
1403
1404 if (rdma->unregister_current == RDMA_SIGNALED_SEND_MAX) {
1405 rdma->unregister_current = 0;
1406 }
1407
1408
1409 /*
1410 * Unregistration is speculative (because migration is single-threaded
1411 * and we cannot break the protocol's inifinband message ordering).
1412 * Thus, if the memory is currently being used for transmission,
1413 * then abort the attempt to unregister and try again
1414 * later the next time a completion is received for this memory.
1415 */
1416 clear_bit(chunk, block->unregister_bitmap);
1417
1418 if (test_bit(chunk, block->transit_bitmap)) {
1419 trace_qemu_rdma_unregister_waiting_inflight(chunk);
1420 continue;
1421 }
1422
1423 trace_qemu_rdma_unregister_waiting_send(chunk);
1424
1425 ret = ibv_dereg_mr(block->pmr[chunk]);
1426 block->pmr[chunk] = NULL;
1427 block->remote_keys[chunk] = 0;
1428
1429 if (ret != 0) {
1430 /*
1431 * FIXME perror() is problematic, bcause ibv_dereg_mr() is
1432 * not documented to set errno. Will go away later in
1433 * this series.
1434 */
1435 perror("unregistration chunk failed");
1436 return -1;
1437 }
1438 rdma->total_registrations--;
1439
1440 reg.key.chunk = chunk;
1441 register_to_network(rdma, &reg);
1442 ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) &reg,
1443 &resp, NULL, NULL, &err);
1444 if (ret < 0) {
1445 error_report_err(err);
1446 return -1;
1447 }
1448
1449 trace_qemu_rdma_unregister_waiting_complete(chunk);
1450 }
1451
1452 return 0;
1453 }
1454
1455 static uint64_t qemu_rdma_make_wrid(uint64_t wr_id, uint64_t index,
1456 uint64_t chunk)
1457 {
1458 uint64_t result = wr_id & RDMA_WRID_TYPE_MASK;
1459
1460 result |= (index << RDMA_WRID_BLOCK_SHIFT);
1461 result |= (chunk << RDMA_WRID_CHUNK_SHIFT);
1462
1463 return result;
1464 }
1465
1466 /*
1467 * Consult the connection manager to see a work request
1468 * (of any kind) has completed.
1469 * Return the work request ID that completed.
1470 */
1471 static int qemu_rdma_poll(RDMAContext *rdma, struct ibv_cq *cq,
1472 uint64_t *wr_id_out, uint32_t *byte_len)
1473 {
1474 int ret;
1475 struct ibv_wc wc;
1476 uint64_t wr_id;
1477
1478 ret = ibv_poll_cq(cq, 1, &wc);
1479
1480 if (!ret) {
1481 *wr_id_out = RDMA_WRID_NONE;
1482 return 0;
1483 }
1484
1485 if (ret < 0) {
1486 error_report("ibv_poll_cq failed");
1487 return -1;
1488 }
1489
1490 wr_id = wc.wr_id & RDMA_WRID_TYPE_MASK;
1491
1492 if (wc.status != IBV_WC_SUCCESS) {
1493 fprintf(stderr, "ibv_poll_cq wc.status=%d %s!\n",
1494 wc.status, ibv_wc_status_str(wc.status));
1495 fprintf(stderr, "ibv_poll_cq wrid=%" PRIu64 "!\n", wr_id);
1496
1497 return -1;
1498 }
1499
1500 if (rdma->control_ready_expected &&
1501 (wr_id >= RDMA_WRID_RECV_CONTROL)) {
1502 trace_qemu_rdma_poll_recv(wr_id - RDMA_WRID_RECV_CONTROL, wr_id,
1503 rdma->nb_sent);
1504 rdma->control_ready_expected = 0;
1505 }
1506
1507 if (wr_id == RDMA_WRID_RDMA_WRITE) {
1508 uint64_t chunk =
1509 (wc.wr_id & RDMA_WRID_CHUNK_MASK) >> RDMA_WRID_CHUNK_SHIFT;
1510 uint64_t index =
1511 (wc.wr_id & RDMA_WRID_BLOCK_MASK) >> RDMA_WRID_BLOCK_SHIFT;
1512 RDMALocalBlock *block = &(rdma->local_ram_blocks.block[index]);
1513
1514 trace_qemu_rdma_poll_write(wr_id, rdma->nb_sent,
1515 index, chunk, block->local_host_addr,
1516 (void *)(uintptr_t)block->remote_host_addr);
1517
1518 clear_bit(chunk, block->transit_bitmap);
1519
1520 if (rdma->nb_sent > 0) {
1521 rdma->nb_sent--;
1522 }
1523 } else {
1524 trace_qemu_rdma_poll_other(wr_id, rdma->nb_sent);
1525 }
1526
1527 *wr_id_out = wc.wr_id;
1528 if (byte_len) {
1529 *byte_len = wc.byte_len;
1530 }
1531
1532 return 0;
1533 }
1534
1535 /* Wait for activity on the completion channel.
1536 * Returns 0 on success, none-0 on error.
1537 */
1538 static int qemu_rdma_wait_comp_channel(RDMAContext *rdma,
1539 struct ibv_comp_channel *comp_channel)
1540 {
1541 struct rdma_cm_event *cm_event;
1542 int ret;
1543
1544 /*
1545 * Coroutine doesn't start until migration_fd_process_incoming()
1546 * so don't yield unless we know we're running inside of a coroutine.
1547 */
1548 if (rdma->migration_started_on_destination &&
1549 migration_incoming_get_current()->state == MIGRATION_STATUS_ACTIVE) {
1550 yield_until_fd_readable(comp_channel->fd);
1551 } else {
1552 /* This is the source side, we're in a separate thread
1553 * or destination prior to migration_fd_process_incoming()
1554 * after postcopy, the destination also in a separate thread.
1555 * we can't yield; so we have to poll the fd.
1556 * But we need to be able to handle 'cancel' or an error
1557 * without hanging forever.
1558 */
1559 while (!rdma->errored && !rdma->received_error) {
1560 GPollFD pfds[2];
1561 pfds[0].fd = comp_channel->fd;
1562 pfds[0].events = G_IO_IN | G_IO_HUP | G_IO_ERR;
1563 pfds[0].revents = 0;
1564
1565 pfds[1].fd = rdma->channel->fd;
1566 pfds[1].events = G_IO_IN | G_IO_HUP | G_IO_ERR;
1567 pfds[1].revents = 0;
1568
1569 /* 0.1s timeout, should be fine for a 'cancel' */
1570 switch (qemu_poll_ns(pfds, 2, 100 * 1000 * 1000)) {
1571 case 2:
1572 case 1: /* fd active */
1573 if (pfds[0].revents) {
1574 return 0;
1575 }
1576
1577 if (pfds[1].revents) {
1578 ret = rdma_get_cm_event(rdma->channel, &cm_event);
1579 if (ret < 0) {
1580 error_report("failed to get cm event while wait "
1581 "completion channel");
1582 return -1;
1583 }
1584
1585 error_report("receive cm event while wait comp channel,"
1586 "cm event is %d", cm_event->event);
1587 if (cm_event->event == RDMA_CM_EVENT_DISCONNECTED ||
1588 cm_event->event == RDMA_CM_EVENT_DEVICE_REMOVAL) {
1589 rdma_ack_cm_event(cm_event);
1590 return -1;
1591 }
1592 rdma_ack_cm_event(cm_event);
1593 }
1594 break;
1595
1596 case 0: /* Timeout, go around again */
1597 break;
1598
1599 default: /* Error of some type -
1600 * I don't trust errno from qemu_poll_ns
1601 */
1602 error_report("%s: poll failed", __func__);
1603 return -1;
1604 }
1605
1606 if (migrate_get_current()->state == MIGRATION_STATUS_CANCELLING) {
1607 /* Bail out and let the cancellation happen */
1608 return -1;
1609 }
1610 }
1611 }
1612
1613 if (rdma->received_error) {
1614 return -1;
1615 }
1616 return -rdma->errored;
1617 }
1618
1619 static struct ibv_comp_channel *to_channel(RDMAContext *rdma, uint64_t wrid)
1620 {
1621 return wrid < RDMA_WRID_RECV_CONTROL ? rdma->send_comp_channel :
1622 rdma->recv_comp_channel;
1623 }
1624
1625 static struct ibv_cq *to_cq(RDMAContext *rdma, uint64_t wrid)
1626 {
1627 return wrid < RDMA_WRID_RECV_CONTROL ? rdma->send_cq : rdma->recv_cq;
1628 }
1629
1630 /*
1631 * Block until the next work request has completed.
1632 *
1633 * First poll to see if a work request has already completed,
1634 * otherwise block.
1635 *
1636 * If we encounter completed work requests for IDs other than
1637 * the one we're interested in, then that's generally an error.
1638 *
1639 * The only exception is actual RDMA Write completions. These
1640 * completions only need to be recorded, but do not actually
1641 * need further processing.
1642 */
1643 static int qemu_rdma_block_for_wrid(RDMAContext *rdma,
1644 uint64_t wrid_requested,
1645 uint32_t *byte_len)
1646 {
1647 int num_cq_events = 0, ret;
1648 struct ibv_cq *cq;
1649 void *cq_ctx;
1650 uint64_t wr_id = RDMA_WRID_NONE, wr_id_in;
1651 struct ibv_comp_channel *ch = to_channel(rdma, wrid_requested);
1652 struct ibv_cq *poll_cq = to_cq(rdma, wrid_requested);
1653
1654 if (ibv_req_notify_cq(poll_cq, 0)) {
1655 return -1;
1656 }
1657 /* poll cq first */
1658 while (wr_id != wrid_requested) {
1659 ret = qemu_rdma_poll(rdma, poll_cq, &wr_id_in, byte_len);
1660 if (ret < 0) {
1661 return -1;
1662 }
1663
1664 wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
1665
1666 if (wr_id == RDMA_WRID_NONE) {
1667 break;
1668 }
1669 if (wr_id != wrid_requested) {
1670 trace_qemu_rdma_block_for_wrid_miss(wrid_requested, wr_id);
1671 }
1672 }
1673
1674 if (wr_id == wrid_requested) {
1675 return 0;
1676 }
1677
1678 while (1) {
1679 ret = qemu_rdma_wait_comp_channel(rdma, ch);
1680 if (ret < 0) {
1681 goto err_block_for_wrid;
1682 }
1683
1684 ret = ibv_get_cq_event(ch, &cq, &cq_ctx);
1685 if (ret < 0) {
1686 /*
1687 * FIXME perror() is problematic, because ibv_reg_mr() is
1688 * not documented to set errno. Will go away later in
1689 * this series.
1690 */
1691 perror("ibv_get_cq_event");
1692 goto err_block_for_wrid;
1693 }
1694
1695 num_cq_events++;
1696
1697 if (ibv_req_notify_cq(cq, 0)) {
1698 goto err_block_for_wrid;
1699 }
1700
1701 while (wr_id != wrid_requested) {
1702 ret = qemu_rdma_poll(rdma, poll_cq, &wr_id_in, byte_len);
1703 if (ret < 0) {
1704 goto err_block_for_wrid;
1705 }
1706
1707 wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
1708
1709 if (wr_id == RDMA_WRID_NONE) {
1710 break;
1711 }
1712 if (wr_id != wrid_requested) {
1713 trace_qemu_rdma_block_for_wrid_miss(wrid_requested, wr_id);
1714 }
1715 }
1716
1717 if (wr_id == wrid_requested) {
1718 goto success_block_for_wrid;
1719 }
1720 }
1721
1722 success_block_for_wrid:
1723 if (num_cq_events) {
1724 ibv_ack_cq_events(cq, num_cq_events);
1725 }
1726 return 0;
1727
1728 err_block_for_wrid:
1729 if (num_cq_events) {
1730 ibv_ack_cq_events(cq, num_cq_events);
1731 }
1732
1733 rdma->errored = true;
1734 return -1;
1735 }
1736
1737 /*
1738 * Post a SEND message work request for the control channel
1739 * containing some data and block until the post completes.
1740 */
1741 static int qemu_rdma_post_send_control(RDMAContext *rdma, uint8_t *buf,
1742 RDMAControlHeader *head,
1743 Error **errp)
1744 {
1745 int ret;
1746 RDMAWorkRequestData *wr = &rdma->wr_data[RDMA_WRID_CONTROL];
1747 struct ibv_send_wr *bad_wr;
1748 struct ibv_sge sge = {
1749 .addr = (uintptr_t)(wr->control),
1750 .length = head->len + sizeof(RDMAControlHeader),
1751 .lkey = wr->control_mr->lkey,
1752 };
1753 struct ibv_send_wr send_wr = {
1754 .wr_id = RDMA_WRID_SEND_CONTROL,
1755 .opcode = IBV_WR_SEND,
1756 .send_flags = IBV_SEND_SIGNALED,
1757 .sg_list = &sge,
1758 .num_sge = 1,
1759 };
1760
1761 trace_qemu_rdma_post_send_control(control_desc(head->type));
1762
1763 /*
1764 * We don't actually need to do a memcpy() in here if we used
1765 * the "sge" properly, but since we're only sending control messages
1766 * (not RAM in a performance-critical path), then its OK for now.
1767 *
1768 * The copy makes the RDMAControlHeader simpler to manipulate
1769 * for the time being.
1770 */
1771 assert(head->len <= RDMA_CONTROL_MAX_BUFFER - sizeof(*head));
1772 memcpy(wr->control, head, sizeof(RDMAControlHeader));
1773 control_to_network((void *) wr->control);
1774
1775 if (buf) {
1776 memcpy(wr->control + sizeof(RDMAControlHeader), buf, head->len);
1777 }
1778
1779
1780 ret = ibv_post_send(rdma->qp, &send_wr, &bad_wr);
1781
1782 if (ret > 0) {
1783 error_setg(errp, "Failed to use post IB SEND for control");
1784 return -1;
1785 }
1786
1787 ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_SEND_CONTROL, NULL);
1788 if (ret < 0) {
1789 error_setg(errp, "rdma migration: send polling control error");
1790 return -1;
1791 }
1792
1793 return 0;
1794 }
1795
1796 /*
1797 * Post a RECV work request in anticipation of some future receipt
1798 * of data on the control channel.
1799 */
1800 static int qemu_rdma_post_recv_control(RDMAContext *rdma, int idx,
1801 Error **errp)
1802 {
1803 struct ibv_recv_wr *bad_wr;
1804 struct ibv_sge sge = {
1805 .addr = (uintptr_t)(rdma->wr_data[idx].control),
1806 .length = RDMA_CONTROL_MAX_BUFFER,
1807 .lkey = rdma->wr_data[idx].control_mr->lkey,
1808 };
1809
1810 struct ibv_recv_wr recv_wr = {
1811 .wr_id = RDMA_WRID_RECV_CONTROL + idx,
1812 .sg_list = &sge,
1813 .num_sge = 1,
1814 };
1815
1816
1817 if (ibv_post_recv(rdma->qp, &recv_wr, &bad_wr)) {
1818 error_setg(errp, "error posting control recv");
1819 return -1;
1820 }
1821
1822 return 0;
1823 }
1824
1825 /*
1826 * Block and wait for a RECV control channel message to arrive.
1827 */
1828 static int qemu_rdma_exchange_get_response(RDMAContext *rdma,
1829 RDMAControlHeader *head, uint32_t expecting, int idx,
1830 Error **errp)
1831 {
1832 uint32_t byte_len;
1833 int ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RECV_CONTROL + idx,
1834 &byte_len);
1835
1836 if (ret < 0) {
1837 error_setg(errp, "rdma migration: recv polling control error!");
1838 return -1;
1839 }
1840
1841 network_to_control((void *) rdma->wr_data[idx].control);
1842 memcpy(head, rdma->wr_data[idx].control, sizeof(RDMAControlHeader));
1843
1844 trace_qemu_rdma_exchange_get_response_start(control_desc(expecting));
1845
1846 if (expecting == RDMA_CONTROL_NONE) {
1847 trace_qemu_rdma_exchange_get_response_none(control_desc(head->type),
1848 head->type);
1849 } else if (head->type != expecting || head->type == RDMA_CONTROL_ERROR) {
1850 error_setg(errp, "Was expecting a %s (%d) control message"
1851 ", but got: %s (%d), length: %d",
1852 control_desc(expecting), expecting,
1853 control_desc(head->type), head->type, head->len);
1854 if (head->type == RDMA_CONTROL_ERROR) {
1855 rdma->received_error = true;
1856 }
1857 return -1;
1858 }
1859 if (head->len > RDMA_CONTROL_MAX_BUFFER - sizeof(*head)) {
1860 error_setg(errp, "too long length: %d", head->len);
1861 return -1;
1862 }
1863 if (sizeof(*head) + head->len != byte_len) {
1864 error_setg(errp, "Malformed length: %d byte_len %d",
1865 head->len, byte_len);
1866 return -1;
1867 }
1868
1869 return 0;
1870 }
1871
1872 /*
1873 * When a RECV work request has completed, the work request's
1874 * buffer is pointed at the header.
1875 *
1876 * This will advance the pointer to the data portion
1877 * of the control message of the work request's buffer that
1878 * was populated after the work request finished.
1879 */
1880 static void qemu_rdma_move_header(RDMAContext *rdma, int idx,
1881 RDMAControlHeader *head)
1882 {
1883 rdma->wr_data[idx].control_len = head->len;
1884 rdma->wr_data[idx].control_curr =
1885 rdma->wr_data[idx].control + sizeof(RDMAControlHeader);
1886 }
1887
1888 /*
1889 * This is an 'atomic' high-level operation to deliver a single, unified
1890 * control-channel message.
1891 *
1892 * Additionally, if the user is expecting some kind of reply to this message,
1893 * they can request a 'resp' response message be filled in by posting an
1894 * additional work request on behalf of the user and waiting for an additional
1895 * completion.
1896 *
1897 * The extra (optional) response is used during registration to us from having
1898 * to perform an *additional* exchange of message just to provide a response by
1899 * instead piggy-backing on the acknowledgement.
1900 */
1901 static int qemu_rdma_exchange_send(RDMAContext *rdma, RDMAControlHeader *head,
1902 uint8_t *data, RDMAControlHeader *resp,
1903 int *resp_idx,
1904 int (*callback)(RDMAContext *rdma,
1905 Error **errp),
1906 Error **errp)
1907 {
1908 int ret;
1909
1910 /*
1911 * Wait until the dest is ready before attempting to deliver the message
1912 * by waiting for a READY message.
1913 */
1914 if (rdma->control_ready_expected) {
1915 RDMAControlHeader resp_ignored;
1916
1917 ret = qemu_rdma_exchange_get_response(rdma, &resp_ignored,
1918 RDMA_CONTROL_READY,
1919 RDMA_WRID_READY, errp);
1920 if (ret < 0) {
1921 return -1;
1922 }
1923 }
1924
1925 /*
1926 * If the user is expecting a response, post a WR in anticipation of it.
1927 */
1928 if (resp) {
1929 ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_DATA, errp);
1930 if (ret < 0) {
1931 return -1;
1932 }
1933 }
1934
1935 /*
1936 * Post a WR to replace the one we just consumed for the READY message.
1937 */
1938 ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY, errp);
1939 if (ret < 0) {
1940 return -1;
1941 }
1942
1943 /*
1944 * Deliver the control message that was requested.
1945 */
1946 ret = qemu_rdma_post_send_control(rdma, data, head, errp);
1947
1948 if (ret < 0) {
1949 return -1;
1950 }
1951
1952 /*
1953 * If we're expecting a response, block and wait for it.
1954 */
1955 if (resp) {
1956 if (callback) {
1957 trace_qemu_rdma_exchange_send_issue_callback();
1958 ret = callback(rdma, errp);
1959 if (ret < 0) {
1960 return -1;
1961 }
1962 }
1963
1964 trace_qemu_rdma_exchange_send_waiting(control_desc(resp->type));
1965 ret = qemu_rdma_exchange_get_response(rdma, resp,
1966 resp->type, RDMA_WRID_DATA,
1967 errp);
1968
1969 if (ret < 0) {
1970 return -1;
1971 }
1972
1973 qemu_rdma_move_header(rdma, RDMA_WRID_DATA, resp);
1974 if (resp_idx) {
1975 *resp_idx = RDMA_WRID_DATA;
1976 }
1977 trace_qemu_rdma_exchange_send_received(control_desc(resp->type));
1978 }
1979
1980 rdma->control_ready_expected = 1;
1981
1982 return 0;
1983 }
1984
1985 /*
1986 * This is an 'atomic' high-level operation to receive a single, unified
1987 * control-channel message.
1988 */
1989 static int qemu_rdma_exchange_recv(RDMAContext *rdma, RDMAControlHeader *head,
1990 uint32_t expecting, Error **errp)
1991 {
1992 RDMAControlHeader ready = {
1993 .len = 0,
1994 .type = RDMA_CONTROL_READY,
1995 .repeat = 1,
1996 };
1997 int ret;
1998
1999 /*
2000 * Inform the source that we're ready to receive a message.
2001 */
2002 ret = qemu_rdma_post_send_control(rdma, NULL, &ready, errp);
2003
2004 if (ret < 0) {
2005 return -1;
2006 }
2007
2008 /*
2009 * Block and wait for the message.
2010 */
2011 ret = qemu_rdma_exchange_get_response(rdma, head,
2012 expecting, RDMA_WRID_READY, errp);
2013
2014 if (ret < 0) {
2015 return -1;
2016 }
2017
2018 qemu_rdma_move_header(rdma, RDMA_WRID_READY, head);
2019
2020 /*
2021 * Post a new RECV work request to replace the one we just consumed.
2022 */
2023 ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY, errp);
2024 if (ret < 0) {
2025 return -1;
2026 }
2027
2028 return 0;
2029 }
2030
2031 /*
2032 * Write an actual chunk of memory using RDMA.
2033 *
2034 * If we're using dynamic registration on the dest-side, we have to
2035 * send a registration command first.
2036 */
2037 static int qemu_rdma_write_one(RDMAContext *rdma,
2038 int current_index, uint64_t current_addr,
2039 uint64_t length, Error **errp)
2040 {
2041 struct ibv_sge sge;
2042 struct ibv_send_wr send_wr = { 0 };
2043 struct ibv_send_wr *bad_wr;
2044 int reg_result_idx, ret, count = 0;
2045 uint64_t chunk, chunks;
2046 uint8_t *chunk_start, *chunk_end;
2047 RDMALocalBlock *block = &(rdma->local_ram_blocks.block[current_index]);
2048 RDMARegister reg;
2049 RDMARegisterResult *reg_result;
2050 RDMAControlHeader resp = { .type = RDMA_CONTROL_REGISTER_RESULT };
2051 RDMAControlHeader head = { .len = sizeof(RDMARegister),
2052 .type = RDMA_CONTROL_REGISTER_REQUEST,
2053 .repeat = 1,
2054 };
2055
2056 retry:
2057 sge.addr = (uintptr_t)(block->local_host_addr +
2058 (current_addr - block->offset));
2059 sge.length = length;
2060
2061 chunk = ram_chunk_index(block->local_host_addr,
2062 (uint8_t *)(uintptr_t)sge.addr);
2063 chunk_start = ram_chunk_start(block, chunk);
2064
2065 if (block->is_ram_block) {
2066 chunks = length / (1UL << RDMA_REG_CHUNK_SHIFT);
2067
2068 if (chunks && ((length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) {
2069 chunks--;
2070 }
2071 } else {
2072 chunks = block->length / (1UL << RDMA_REG_CHUNK_SHIFT);
2073
2074 if (chunks && ((block->length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) {
2075 chunks--;
2076 }
2077 }
2078
2079 trace_qemu_rdma_write_one_top(chunks + 1,
2080 (chunks + 1) *
2081 (1UL << RDMA_REG_CHUNK_SHIFT) / 1024 / 1024);
2082
2083 chunk_end = ram_chunk_end(block, chunk + chunks);
2084
2085
2086 while (test_bit(chunk, block->transit_bitmap)) {
2087 (void)count;
2088 trace_qemu_rdma_write_one_block(count++, current_index, chunk,
2089 sge.addr, length, rdma->nb_sent, block->nb_chunks);
2090
2091 ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE, NULL);
2092
2093 if (ret < 0) {
2094 error_setg(errp, "Failed to Wait for previous write to complete "
2095 "block %d chunk %" PRIu64
2096 " current %" PRIu64 " len %" PRIu64 " %d",
2097 current_index, chunk, sge.addr, length, rdma->nb_sent);
2098 return -1;
2099 }
2100 }
2101
2102 if (!rdma->pin_all || !block->is_ram_block) {
2103 if (!block->remote_keys[chunk]) {
2104 /*
2105 * This chunk has not yet been registered, so first check to see
2106 * if the entire chunk is zero. If so, tell the other size to
2107 * memset() + madvise() the entire chunk without RDMA.
2108 */
2109
2110 if (buffer_is_zero((void *)(uintptr_t)sge.addr, length)) {
2111 RDMACompress comp = {
2112 .offset = current_addr,
2113 .value = 0,
2114 .block_idx = current_index,
2115 .length = length,
2116 };
2117
2118 head.len = sizeof(comp);
2119 head.type = RDMA_CONTROL_COMPRESS;
2120
2121 trace_qemu_rdma_write_one_zero(chunk, sge.length,
2122 current_index, current_addr);
2123
2124 compress_to_network(rdma, &comp);
2125 ret = qemu_rdma_exchange_send(rdma, &head,
2126 (uint8_t *) &comp, NULL, NULL, NULL, errp);
2127
2128 if (ret < 0) {
2129 return -1;
2130 }
2131
2132 /*
2133 * TODO: Here we are sending something, but we are not
2134 * accounting for anything transferred. The following is wrong:
2135 *
2136 * stat64_add(&mig_stats.rdma_bytes, sge.length);
2137 *
2138 * because we are using some kind of compression. I
2139 * would think that head.len would be the more similar
2140 * thing to a correct value.
2141 */
2142 stat64_add(&mig_stats.zero_pages,
2143 sge.length / qemu_target_page_size());
2144 return 1;
2145 }
2146
2147 /*
2148 * Otherwise, tell other side to register.
2149 */
2150 reg.current_index = current_index;
2151 if (block->is_ram_block) {
2152 reg.key.current_addr = current_addr;
2153 } else {
2154 reg.key.chunk = chunk;
2155 }
2156 reg.chunks = chunks;
2157
2158 trace_qemu_rdma_write_one_sendreg(chunk, sge.length, current_index,
2159 current_addr);
2160
2161 register_to_network(rdma, &reg);
2162 ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) &reg,
2163 &resp, &reg_result_idx, NULL, errp);
2164 if (ret < 0) {
2165 return -1;
2166 }
2167
2168 /* try to overlap this single registration with the one we sent. */
2169 if (qemu_rdma_register_and_get_keys(rdma, block, sge.addr,
2170 &sge.lkey, NULL, chunk,
2171 chunk_start, chunk_end)) {
2172 error_setg(errp, "cannot get lkey");
2173 return -1;
2174 }
2175
2176 reg_result = (RDMARegisterResult *)
2177 rdma->wr_data[reg_result_idx].control_curr;
2178
2179 network_to_result(reg_result);
2180
2181 trace_qemu_rdma_write_one_recvregres(block->remote_keys[chunk],
2182 reg_result->rkey, chunk);
2183
2184 block->remote_keys[chunk] = reg_result->rkey;
2185 block->remote_host_addr = reg_result->host_addr;
2186 } else {
2187 /* already registered before */
2188 if (qemu_rdma_register_and_get_keys(rdma, block, sge.addr,
2189 &sge.lkey, NULL, chunk,
2190 chunk_start, chunk_end)) {
2191 error_setg(errp, "cannot get lkey!");
2192 return -1;
2193 }
2194 }
2195
2196 send_wr.wr.rdma.rkey = block->remote_keys[chunk];
2197 } else {
2198 send_wr.wr.rdma.rkey = block->remote_rkey;
2199
2200 if (qemu_rdma_register_and_get_keys(rdma, block, sge.addr,
2201 &sge.lkey, NULL, chunk,
2202 chunk_start, chunk_end)) {
2203 error_setg(errp, "cannot get lkey!");
2204 return -1;
2205 }
2206 }
2207
2208 /*
2209 * Encode the ram block index and chunk within this wrid.
2210 * We will use this information at the time of completion
2211 * to figure out which bitmap to check against and then which
2212 * chunk in the bitmap to look for.
2213 */
2214 send_wr.wr_id = qemu_rdma_make_wrid(RDMA_WRID_RDMA_WRITE,
2215 current_index, chunk);
2216
2217 send_wr.opcode = IBV_WR_RDMA_WRITE;
2218 send_wr.send_flags = IBV_SEND_SIGNALED;
2219 send_wr.sg_list = &sge;
2220 send_wr.num_sge = 1;
2221 send_wr.wr.rdma.remote_addr = block->remote_host_addr +
2222 (current_addr - block->offset);
2223
2224 trace_qemu_rdma_write_one_post(chunk, sge.addr, send_wr.wr.rdma.remote_addr,
2225 sge.length);
2226
2227 /*
2228 * ibv_post_send() does not return negative error numbers,
2229 * per the specification they are positive - no idea why.
2230 */
2231 ret = ibv_post_send(rdma->qp, &send_wr, &bad_wr);
2232
2233 if (ret == ENOMEM) {
2234 trace_qemu_rdma_write_one_queue_full();
2235 ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE, NULL);
2236 if (ret < 0) {
2237 error_setg(errp, "rdma migration: failed to make "
2238 "room in full send queue!");
2239 return -1;
2240 }
2241
2242 goto retry;
2243
2244 } else if (ret > 0) {
2245 error_setg_errno(errp, ret,
2246 "rdma migration: post rdma write failed");
2247 return -1;
2248 }
2249
2250 set_bit(chunk, block->transit_bitmap);
2251 stat64_add(&mig_stats.normal_pages, sge.length / qemu_target_page_size());
2252 /*
2253 * We are adding to transferred the amount of data written, but no
2254 * overhead at all. I will asume that RDMA is magicaly and don't
2255 * need to transfer (at least) the addresses where it wants to
2256 * write the pages. Here it looks like it should be something
2257 * like:
2258 * sizeof(send_wr) + sge.length
2259 * but this being RDMA, who knows.
2260 */
2261 stat64_add(&mig_stats.rdma_bytes, sge.length);
2262 ram_transferred_add(sge.length);
2263 rdma->total_writes++;
2264
2265 return 0;
2266 }
2267
2268 /*
2269 * Push out any unwritten RDMA operations.
2270 *
2271 * We support sending out multiple chunks at the same time.
2272 * Not all of them need to get signaled in the completion queue.
2273 */
2274 static int qemu_rdma_write_flush(RDMAContext *rdma, Error **errp)
2275 {
2276 int ret;
2277
2278 if (!rdma->current_length) {
2279 return 0;
2280 }
2281
2282 ret = qemu_rdma_write_one(rdma, rdma->current_index, rdma->current_addr,
2283 rdma->current_length, errp);
2284
2285 if (ret < 0) {
2286 return -1;
2287 }
2288
2289 if (ret == 0) {
2290 rdma->nb_sent++;
2291 trace_qemu_rdma_write_flush(rdma->nb_sent);
2292 }
2293
2294 rdma->current_length = 0;
2295 rdma->current_addr = 0;
2296
2297 return 0;
2298 }
2299
2300 static inline bool qemu_rdma_buffer_mergeable(RDMAContext *rdma,
2301 uint64_t offset, uint64_t len)
2302 {
2303 RDMALocalBlock *block;
2304 uint8_t *host_addr;
2305 uint8_t *chunk_end;
2306
2307 if (rdma->current_index < 0) {
2308 return false;
2309 }
2310
2311 if (rdma->current_chunk < 0) {
2312 return false;
2313 }
2314
2315 block = &(rdma->local_ram_blocks.block[rdma->current_index]);
2316 host_addr = block->local_host_addr + (offset - block->offset);
2317 chunk_end = ram_chunk_end(block, rdma->current_chunk);
2318
2319 if (rdma->current_length == 0) {
2320 return false;
2321 }
2322
2323 /*
2324 * Only merge into chunk sequentially.
2325 */
2326 if (offset != (rdma->current_addr + rdma->current_length)) {
2327 return false;
2328 }
2329
2330 if (offset < block->offset) {
2331 return false;
2332 }
2333
2334 if ((offset + len) > (block->offset + block->length)) {
2335 return false;
2336 }
2337
2338 if ((host_addr + len) > chunk_end) {
2339 return false;
2340 }
2341
2342 return true;
2343 }
2344
2345 /*
2346 * We're not actually writing here, but doing three things:
2347 *
2348 * 1. Identify the chunk the buffer belongs to.
2349 * 2. If the chunk is full or the buffer doesn't belong to the current
2350 * chunk, then start a new chunk and flush() the old chunk.
2351 * 3. To keep the hardware busy, we also group chunks into batches
2352 * and only require that a batch gets acknowledged in the completion
2353 * queue instead of each individual chunk.
2354 */
2355 static int qemu_rdma_write(RDMAContext *rdma,
2356 uint64_t block_offset, uint64_t offset,
2357 uint64_t len, Error **errp)
2358 {
2359 uint64_t current_addr = block_offset + offset;
2360 uint64_t index = rdma->current_index;
2361 uint64_t chunk = rdma->current_chunk;
2362 int ret;
2363
2364 /* If we cannot merge it, we flush the current buffer first. */
2365 if (!qemu_rdma_buffer_mergeable(rdma, current_addr, len)) {
2366 ret = qemu_rdma_write_flush(rdma, errp);
2367 if (ret < 0) {
2368 return -1;
2369 }
2370 rdma->current_length = 0;
2371 rdma->current_addr = current_addr;
2372
2373 qemu_rdma_search_ram_block(rdma, block_offset,
2374 offset, len, &index, &chunk);
2375 rdma->current_index = index;
2376 rdma->current_chunk = chunk;
2377 }
2378
2379 /* merge it */
2380 rdma->current_length += len;
2381
2382 /* flush it if buffer is too large */
2383 if (rdma->current_length >= RDMA_MERGE_MAX) {
2384 return qemu_rdma_write_flush(rdma, errp);
2385 }
2386
2387 return 0;
2388 }
2389
2390 static void qemu_rdma_cleanup(RDMAContext *rdma)
2391 {
2392 Error *err = NULL;
2393 int idx;
2394
2395 if (rdma->cm_id && rdma->connected) {
2396 if ((rdma->errored ||
2397 migrate_get_current()->state == MIGRATION_STATUS_CANCELLING) &&
2398 !rdma->received_error) {
2399 RDMAControlHeader head = { .len = 0,
2400 .type = RDMA_CONTROL_ERROR,
2401 .repeat = 1,
2402 };
2403 error_report("Early error. Sending error.");
2404 if (qemu_rdma_post_send_control(rdma, NULL, &head, &err) < 0) {
2405 error_report_err(err);
2406 }
2407 }
2408
2409 rdma_disconnect(rdma->cm_id);
2410 trace_qemu_rdma_cleanup_disconnect();
2411 rdma->connected = false;
2412 }
2413
2414 if (rdma->channel) {
2415 qemu_set_fd_handler(rdma->channel->fd, NULL, NULL, NULL);
2416 }
2417 g_free(rdma->dest_blocks);
2418 rdma->dest_blocks = NULL;
2419
2420 for (idx = 0; idx < RDMA_WRID_MAX; idx++) {
2421 if (rdma->wr_data[idx].control_mr) {
2422 rdma->total_registrations--;
2423 ibv_dereg_mr(rdma->wr_data[idx].control_mr);
2424 }
2425 rdma->wr_data[idx].control_mr = NULL;
2426 }
2427
2428 if (rdma->local_ram_blocks.block) {
2429 while (rdma->local_ram_blocks.nb_blocks) {
2430 rdma_delete_block(rdma, &rdma->local_ram_blocks.block[0]);
2431 }
2432 }
2433
2434 if (rdma->qp) {
2435 rdma_destroy_qp(rdma->cm_id);
2436 rdma->qp = NULL;
2437 }
2438 if (rdma->recv_cq) {
2439 ibv_destroy_cq(rdma->recv_cq);
2440 rdma->recv_cq = NULL;
2441 }
2442 if (rdma->send_cq) {
2443 ibv_destroy_cq(rdma->send_cq);
2444 rdma->send_cq = NULL;
2445 }
2446 if (rdma->recv_comp_channel) {
2447 ibv_destroy_comp_channel(rdma->recv_comp_channel);
2448 rdma->recv_comp_channel = NULL;
2449 }
2450 if (rdma->send_comp_channel) {
2451 ibv_destroy_comp_channel(rdma->send_comp_channel);
2452 rdma->send_comp_channel = NULL;
2453 }
2454 if (rdma->pd) {
2455 ibv_dealloc_pd(rdma->pd);
2456 rdma->pd = NULL;
2457 }
2458 if (rdma->cm_id) {
2459 rdma_destroy_id(rdma->cm_id);
2460 rdma->cm_id = NULL;
2461 }
2462
2463 /* the destination side, listen_id and channel is shared */
2464 if (rdma->listen_id) {
2465 if (!rdma->is_return_path) {
2466 rdma_destroy_id(rdma->listen_id);
2467 }
2468 rdma->listen_id = NULL;
2469
2470 if (rdma->channel) {
2471 if (!rdma->is_return_path) {
2472 rdma_destroy_event_channel(rdma->channel);
2473 }
2474 rdma->channel = NULL;
2475 }
2476 }
2477
2478 if (rdma->channel) {
2479 rdma_destroy_event_channel(rdma->channel);
2480 rdma->channel = NULL;
2481 }
2482 g_free(rdma->host);
2483 g_free(rdma->host_port);
2484 rdma->host = NULL;
2485 rdma->host_port = NULL;
2486 }
2487
2488
2489 static int qemu_rdma_source_init(RDMAContext *rdma, bool pin_all, Error **errp)
2490 {
2491 int ret, idx;
2492
2493 /*
2494 * Will be validated against destination's actual capabilities
2495 * after the connect() completes.
2496 */
2497 rdma->pin_all = pin_all;
2498
2499 ret = qemu_rdma_resolve_host(rdma, errp);
2500 if (ret < 0) {
2501 goto err_rdma_source_init;
2502 }
2503
2504 ret = qemu_rdma_alloc_pd_cq(rdma, errp);
2505 if (ret < 0) {
2506 goto err_rdma_source_init;
2507 }
2508
2509 ret = qemu_rdma_alloc_qp(rdma);
2510 if (ret < 0) {
2511 error_setg(errp, "RDMA ERROR: rdma migration: error allocating qp!");
2512 goto err_rdma_source_init;
2513 }
2514
2515 qemu_rdma_init_ram_blocks(rdma);
2516
2517 /* Build the hash that maps from offset to RAMBlock */
2518 rdma->blockmap = g_hash_table_new(g_direct_hash, g_direct_equal);
2519 for (idx = 0; idx < rdma->local_ram_blocks.nb_blocks; idx++) {
2520 g_hash_table_insert(rdma->blockmap,
2521 (void *)(uintptr_t)rdma->local_ram_blocks.block[idx].offset,
2522 &rdma->local_ram_blocks.block[idx]);
2523 }
2524
2525 for (idx = 0; idx < RDMA_WRID_MAX; idx++) {
2526 ret = qemu_rdma_reg_control(rdma, idx);
2527 if (ret < 0) {
2528 error_setg(errp,
2529 "RDMA ERROR: rdma migration: error registering %d control!",
2530 idx);
2531 goto err_rdma_source_init;
2532 }
2533 }
2534
2535 return 0;
2536
2537 err_rdma_source_init:
2538 qemu_rdma_cleanup(rdma);
2539 return -1;
2540 }
2541
2542 static int qemu_get_cm_event_timeout(RDMAContext *rdma,
2543 struct rdma_cm_event **cm_event,
2544 long msec, Error **errp)
2545 {
2546 int ret;
2547 struct pollfd poll_fd = {
2548 .fd = rdma->channel->fd,
2549 .events = POLLIN,
2550 .revents = 0
2551 };
2552
2553 do {
2554 ret = poll(&poll_fd, 1, msec);
2555 } while (ret < 0 && errno == EINTR);
2556
2557 if (ret == 0) {
2558 error_setg(errp, "RDMA ERROR: poll cm event timeout");
2559 return -1;
2560 } else if (ret < 0) {
2561 error_setg(errp, "RDMA ERROR: failed to poll cm event, errno=%i",
2562 errno);
2563 return -1;
2564 } else if (poll_fd.revents & POLLIN) {
2565 if (rdma_get_cm_event(rdma->channel, cm_event) < 0) {
2566 error_setg(errp, "RDMA ERROR: failed to get cm event");
2567 return -1;
2568 }
2569 return 0;
2570 } else {
2571 error_setg(errp, "RDMA ERROR: no POLLIN event, revent=%x",
2572 poll_fd.revents);
2573 return -1;
2574 }
2575 }
2576
2577 static int qemu_rdma_connect(RDMAContext *rdma, bool return_path,
2578 Error **errp)
2579 {
2580 RDMACapabilities cap = {
2581 .version = RDMA_CONTROL_VERSION_CURRENT,
2582 .flags = 0,
2583 };
2584 struct rdma_conn_param conn_param = { .initiator_depth = 2,
2585 .retry_count = 5,
2586 .private_data = &cap,
2587 .private_data_len = sizeof(cap),
2588 };
2589 struct rdma_cm_event *cm_event;
2590 int ret;
2591
2592 /*
2593 * Only negotiate the capability with destination if the user
2594 * on the source first requested the capability.
2595 */
2596 if (rdma->pin_all) {
2597 trace_qemu_rdma_connect_pin_all_requested();
2598 cap.flags |= RDMA_CAPABILITY_PIN_ALL;
2599 }
2600
2601 caps_to_network(&cap);
2602
2603 ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY, errp);
2604 if (ret < 0) {
2605 goto err_rdma_source_connect;
2606 }
2607
2608 ret = rdma_connect(rdma->cm_id, &conn_param);
2609 if (ret < 0) {
2610 error_setg_errno(errp, errno,
2611 "RDMA ERROR: connecting to destination!");
2612 goto err_rdma_source_connect;
2613 }
2614
2615 if (return_path) {
2616 ret = qemu_get_cm_event_timeout(rdma, &cm_event, 5000, errp);
2617 } else {
2618 ret = rdma_get_cm_event(rdma->channel, &cm_event);
2619 if (ret < 0) {
2620 error_setg_errno(errp, errno,
2621 "RDMA ERROR: failed to get cm event");
2622 }
2623 }
2624 if (ret < 0) {
2625 goto err_rdma_source_connect;
2626 }
2627
2628 if (cm_event->event != RDMA_CM_EVENT_ESTABLISHED) {
2629 error_setg(errp, "RDMA ERROR: connecting to destination!");
2630 rdma_ack_cm_event(cm_event);
2631 goto err_rdma_source_connect;
2632 }
2633 rdma->connected = true;
2634
2635 memcpy(&cap, cm_event->param.conn.private_data, sizeof(cap));
2636 network_to_caps(&cap);
2637
2638 /*
2639 * Verify that the *requested* capabilities are supported by the destination
2640 * and disable them otherwise.
2641 */
2642 if (rdma->pin_all && !(cap.flags & RDMA_CAPABILITY_PIN_ALL)) {
2643 warn_report("RDMA: Server cannot support pinning all memory. "
2644 "Will register memory dynamically.");
2645 rdma->pin_all = false;
2646 }
2647
2648 trace_qemu_rdma_connect_pin_all_outcome(rdma->pin_all);
2649
2650 rdma_ack_cm_event(cm_event);
2651
2652 rdma->control_ready_expected = 1;
2653 rdma->nb_sent = 0;
2654 return 0;
2655
2656 err_rdma_source_connect:
2657 qemu_rdma_cleanup(rdma);
2658 return -1;
2659 }
2660
2661 static int qemu_rdma_dest_init(RDMAContext *rdma, Error **errp)
2662 {
2663 Error *err = NULL;
2664 int ret, idx;
2665 struct rdma_cm_id *listen_id;
2666 char ip[40] = "unknown";
2667 struct rdma_addrinfo *res, *e;
2668 char port_str[16];
2669 int reuse = 1;
2670
2671 for (idx = 0; idx < RDMA_WRID_MAX; idx++) {
2672 rdma->wr_data[idx].control_len = 0;
2673 rdma->wr_data[idx].control_curr = NULL;
2674 }
2675
2676 if (!rdma->host || !rdma->host[0]) {
2677 error_setg(errp, "RDMA ERROR: RDMA host is not set!");
2678 rdma->errored = true;
2679 return -1;
2680 }
2681 /* create CM channel */
2682 rdma->channel = rdma_create_event_channel();
2683 if (!rdma->channel) {
2684 error_setg(errp, "RDMA ERROR: could not create rdma event channel");
2685 rdma->errored = true;
2686 return -1;
2687 }
2688
2689 /* create CM id */
2690 ret = rdma_create_id(rdma->channel, &listen_id, NULL, RDMA_PS_TCP);
2691 if (ret < 0) {
2692 error_setg(errp, "RDMA ERROR: could not create cm_id!");
2693 goto err_dest_init_create_listen_id;
2694 }
2695
2696 snprintf(port_str, 16, "%d", rdma->port);
2697 port_str[15] = '\0';
2698
2699 ret = rdma_getaddrinfo(rdma->host, port_str, NULL, &res);
2700 if (ret) {
2701 error_setg(errp, "RDMA ERROR: could not rdma_getaddrinfo address %s",
2702 rdma->host);
2703 goto err_dest_init_bind_addr;
2704 }
2705
2706 ret = rdma_set_option(listen_id, RDMA_OPTION_ID, RDMA_OPTION_ID_REUSEADDR,
2707 &reuse, sizeof reuse);
2708 if (ret < 0) {
2709 error_setg(errp, "RDMA ERROR: Error: could not set REUSEADDR option");
2710 goto err_dest_init_bind_addr;
2711 }
2712
2713 /* Try all addresses, saving the first error in @err */
2714 for (e = res; e != NULL; e = e->ai_next) {
2715 Error **local_errp = err ? NULL : &err;
2716
2717 inet_ntop(e->ai_family,
2718 &((struct sockaddr_in *) e->ai_dst_addr)->sin_addr, ip, sizeof ip);
2719 trace_qemu_rdma_dest_init_trying(rdma->host, ip);
2720 ret = rdma_bind_addr(listen_id, e->ai_dst_addr);
2721 if (ret < 0) {
2722 continue;
2723 }
2724 if (e->ai_family == AF_INET6) {
2725 ret = qemu_rdma_broken_ipv6_kernel(listen_id->verbs,
2726 local_errp);
2727 if (ret < 0) {
2728 continue;
2729 }
2730 }
2731 error_free(err);
2732 break;
2733 }
2734
2735 rdma_freeaddrinfo(res);
2736 if (!e) {
2737 if (err) {
2738 error_propagate(errp, err);
2739 } else {
2740 error_setg(errp, "RDMA ERROR: Error: could not rdma_bind_addr!");
2741 }
2742 goto err_dest_init_bind_addr;
2743 }
2744
2745 rdma->listen_id = listen_id;
2746 qemu_rdma_dump_gid("dest_init", listen_id);
2747 return 0;
2748
2749 err_dest_init_bind_addr:
2750 rdma_destroy_id(listen_id);
2751 err_dest_init_create_listen_id:
2752 rdma_destroy_event_channel(rdma->channel);
2753 rdma->channel = NULL;
2754 rdma->errored = true;
2755 return -1;
2756
2757 }
2758
2759 static void qemu_rdma_return_path_dest_init(RDMAContext *rdma_return_path,
2760 RDMAContext *rdma)
2761 {
2762 int idx;
2763
2764 for (idx = 0; idx < RDMA_WRID_MAX; idx++) {
2765 rdma_return_path->wr_data[idx].control_len = 0;
2766 rdma_return_path->wr_data[idx].control_curr = NULL;
2767 }
2768
2769 /*the CM channel and CM id is shared*/
2770 rdma_return_path->channel = rdma->channel;
2771 rdma_return_path->listen_id = rdma->listen_id;
2772
2773 rdma->return_path = rdma_return_path;
2774 rdma_return_path->return_path = rdma;
2775 rdma_return_path->is_return_path = true;
2776 }
2777
2778 static RDMAContext *qemu_rdma_data_init(const char *host_port, Error **errp)
2779 {
2780 RDMAContext *rdma = NULL;
2781 InetSocketAddress *addr;
2782
2783 rdma = g_new0(RDMAContext, 1);
2784 rdma->current_index = -1;
2785 rdma->current_chunk = -1;
2786
2787 addr = g_new(InetSocketAddress, 1);
2788 if (!inet_parse(addr, host_port, NULL)) {
2789 rdma->port = atoi(addr->port);
2790 rdma->host = g_strdup(addr->host);
2791 rdma->host_port = g_strdup(host_port);
2792 } else {
2793 error_setg(errp, "RDMA ERROR: bad RDMA migration address '%s'",
2794 host_port);
2795 g_free(rdma);
2796 rdma = NULL;
2797 }
2798
2799 qapi_free_InetSocketAddress(addr);
2800 return rdma;
2801 }
2802
2803 /*
2804 * QEMUFile interface to the control channel.
2805 * SEND messages for control only.
2806 * VM's ram is handled with regular RDMA messages.
2807 */
2808 static ssize_t qio_channel_rdma_writev(QIOChannel *ioc,
2809 const struct iovec *iov,
2810 size_t niov,
2811 int *fds,
2812 size_t nfds,
2813 int flags,
2814 Error **errp)
2815 {
2816 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
2817 RDMAContext *rdma;
2818 int ret;
2819 ssize_t done = 0;
2820 size_t i, len;
2821
2822 RCU_READ_LOCK_GUARD();
2823 rdma = qatomic_rcu_read(&rioc->rdmaout);
2824
2825 if (!rdma) {
2826 error_setg(errp, "RDMA control channel output is not set");
2827 return -1;
2828 }
2829
2830 if (rdma->errored) {
2831 error_setg(errp,
2832 "RDMA is in an error state waiting migration to abort!");
2833 return -1;
2834 }
2835
2836 /*
2837 * Push out any writes that
2838 * we're queued up for VM's ram.
2839 */
2840 ret = qemu_rdma_write_flush(rdma, errp);
2841 if (ret < 0) {
2842 rdma->errored = true;
2843 return -1;
2844 }
2845
2846 for (i = 0; i < niov; i++) {
2847 size_t remaining = iov[i].iov_len;
2848 uint8_t * data = (void *)iov[i].iov_base;
2849 while (remaining) {
2850 RDMAControlHeader head = {};
2851
2852 len = MIN(remaining, RDMA_SEND_INCREMENT);
2853 remaining -= len;
2854
2855 head.len = len;
2856 head.type = RDMA_CONTROL_QEMU_FILE;
2857
2858 ret = qemu_rdma_exchange_send(rdma, &head,
2859 data, NULL, NULL, NULL, errp);
2860
2861 if (ret < 0) {
2862 rdma->errored = true;
2863 return -1;
2864 }
2865
2866 data += len;
2867 done += len;
2868 }
2869 }
2870
2871 return done;
2872 }
2873
2874 static size_t qemu_rdma_fill(RDMAContext *rdma, uint8_t *buf,
2875 size_t size, int idx)
2876 {
2877 size_t len = 0;
2878
2879 if (rdma->wr_data[idx].control_len) {
2880 trace_qemu_rdma_fill(rdma->wr_data[idx].control_len, size);
2881
2882 len = MIN(size, rdma->wr_data[idx].control_len);
2883 memcpy(buf, rdma->wr_data[idx].control_curr, len);
2884 rdma->wr_data[idx].control_curr += len;
2885 rdma->wr_data[idx].control_len -= len;
2886 }
2887
2888 return len;
2889 }
2890
2891 /*
2892 * QEMUFile interface to the control channel.
2893 * RDMA links don't use bytestreams, so we have to
2894 * return bytes to QEMUFile opportunistically.
2895 */
2896 static ssize_t qio_channel_rdma_readv(QIOChannel *ioc,
2897 const struct iovec *iov,
2898 size_t niov,
2899 int **fds,
2900 size_t *nfds,
2901 int flags,
2902 Error **errp)
2903 {
2904 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
2905 RDMAContext *rdma;
2906 RDMAControlHeader head;
2907 int ret;
2908 ssize_t done = 0;
2909 size_t i, len;
2910
2911 RCU_READ_LOCK_GUARD();
2912 rdma = qatomic_rcu_read(&rioc->rdmain);
2913
2914 if (!rdma) {
2915 error_setg(errp, "RDMA control channel input is not set");
2916 return -1;
2917 }
2918
2919 if (rdma->errored) {
2920 error_setg(errp,
2921 "RDMA is in an error state waiting migration to abort!");
2922 return -1;
2923 }
2924
2925 for (i = 0; i < niov; i++) {
2926 size_t want = iov[i].iov_len;
2927 uint8_t *data = (void *)iov[i].iov_base;
2928
2929 /*
2930 * First, we hold on to the last SEND message we
2931 * were given and dish out the bytes until we run
2932 * out of bytes.
2933 */
2934 len = qemu_rdma_fill(rdma, data, want, 0);
2935 done += len;
2936 want -= len;
2937 /* Got what we needed, so go to next iovec */
2938 if (want == 0) {
2939 continue;
2940 }
2941
2942 /* If we got any data so far, then don't wait
2943 * for more, just return what we have */
2944 if (done > 0) {
2945 break;
2946 }
2947
2948
2949 /* We've got nothing at all, so lets wait for
2950 * more to arrive
2951 */
2952 ret = qemu_rdma_exchange_recv(rdma, &head, RDMA_CONTROL_QEMU_FILE,
2953 errp);
2954
2955 if (ret < 0) {
2956 rdma->errored = true;
2957 return -1;
2958 }
2959
2960 /*
2961 * SEND was received with new bytes, now try again.
2962 */
2963 len = qemu_rdma_fill(rdma, data, want, 0);
2964 done += len;
2965 want -= len;
2966
2967 /* Still didn't get enough, so lets just return */
2968 if (want) {
2969 if (done == 0) {
2970 return QIO_CHANNEL_ERR_BLOCK;
2971 } else {
2972 break;
2973 }
2974 }
2975 }
2976 return done;
2977 }
2978
2979 /*
2980 * Block until all the outstanding chunks have been delivered by the hardware.
2981 */
2982 static int qemu_rdma_drain_cq(RDMAContext *rdma)
2983 {
2984 Error *err = NULL;
2985 int ret;
2986
2987 if (qemu_rdma_write_flush(rdma, &err) < 0) {
2988 error_report_err(err);
2989 return -1;
2990 }
2991
2992 while (rdma->nb_sent) {
2993 ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE, NULL);
2994 if (ret < 0) {
2995 error_report("rdma migration: complete polling error!");
2996 return -1;
2997 }
2998 }
2999
3000 qemu_rdma_unregister_waiting(rdma);
3001
3002 return 0;
3003 }
3004
3005
3006 static int qio_channel_rdma_set_blocking(QIOChannel *ioc,
3007 bool blocking,
3008 Error **errp)
3009 {
3010 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
3011 /* XXX we should make readv/writev actually honour this :-) */
3012 rioc->blocking = blocking;
3013 return 0;
3014 }
3015
3016
3017 typedef struct QIOChannelRDMASource QIOChannelRDMASource;
3018 struct QIOChannelRDMASource {
3019 GSource parent;
3020 QIOChannelRDMA *rioc;
3021 GIOCondition condition;
3022 };
3023
3024 static gboolean
3025 qio_channel_rdma_source_prepare(GSource *source,
3026 gint *timeout)
3027 {
3028 QIOChannelRDMASource *rsource = (QIOChannelRDMASource *)source;
3029 RDMAContext *rdma;
3030 GIOCondition cond = 0;
3031 *timeout = -1;
3032
3033 RCU_READ_LOCK_GUARD();
3034 if (rsource->condition == G_IO_IN) {
3035 rdma = qatomic_rcu_read(&rsource->rioc->rdmain);
3036 } else {
3037 rdma = qatomic_rcu_read(&rsource->rioc->rdmaout);
3038 }
3039
3040 if (!rdma) {
3041 error_report("RDMAContext is NULL when prepare Gsource");
3042 return FALSE;
3043 }
3044
3045 if (rdma->wr_data[0].control_len) {
3046 cond |= G_IO_IN;
3047 }
3048 cond |= G_IO_OUT;
3049
3050 return cond & rsource->condition;
3051 }
3052
3053 static gboolean
3054 qio_channel_rdma_source_check(GSource *source)
3055 {
3056 QIOChannelRDMASource *rsource = (QIOChannelRDMASource *)source;
3057 RDMAContext *rdma;
3058 GIOCondition cond = 0;
3059
3060 RCU_READ_LOCK_GUARD();
3061 if (rsource->condition == G_IO_IN) {
3062 rdma = qatomic_rcu_read(&rsource->rioc->rdmain);
3063 } else {
3064 rdma = qatomic_rcu_read(&rsource->rioc->rdmaout);
3065 }
3066
3067 if (!rdma) {
3068 error_report("RDMAContext is NULL when check Gsource");
3069 return FALSE;
3070 }
3071
3072 if (rdma->wr_data[0].control_len) {
3073 cond |= G_IO_IN;
3074 }
3075 cond |= G_IO_OUT;
3076
3077 return cond & rsource->condition;
3078 }
3079
3080 static gboolean
3081 qio_channel_rdma_source_dispatch(GSource *source,
3082 GSourceFunc callback,
3083 gpointer user_data)
3084 {
3085 QIOChannelFunc func = (QIOChannelFunc)callback;
3086 QIOChannelRDMASource *rsource = (QIOChannelRDMASource *)source;
3087 RDMAContext *rdma;
3088 GIOCondition cond = 0;
3089
3090 RCU_READ_LOCK_GUARD();
3091 if (rsource->condition == G_IO_IN) {
3092 rdma = qatomic_rcu_read(&rsource->rioc->rdmain);
3093 } else {
3094 rdma = qatomic_rcu_read(&rsource->rioc->rdmaout);
3095 }
3096
3097 if (!rdma) {
3098 error_report("RDMAContext is NULL when dispatch Gsource");
3099 return FALSE;
3100 }
3101
3102 if (rdma->wr_data[0].control_len) {
3103 cond |= G_IO_IN;
3104 }
3105 cond |= G_IO_OUT;
3106
3107 return (*func)(QIO_CHANNEL(rsource->rioc),
3108 (cond & rsource->condition),
3109 user_data);
3110 }
3111
3112 static void
3113 qio_channel_rdma_source_finalize(GSource *source)
3114 {
3115 QIOChannelRDMASource *ssource = (QIOChannelRDMASource *)source;
3116
3117 object_unref(OBJECT(ssource->rioc));
3118 }
3119
3120 static GSourceFuncs qio_channel_rdma_source_funcs = {
3121 qio_channel_rdma_source_prepare,
3122 qio_channel_rdma_source_check,
3123 qio_channel_rdma_source_dispatch,
3124 qio_channel_rdma_source_finalize
3125 };
3126
3127 static GSource *qio_channel_rdma_create_watch(QIOChannel *ioc,
3128 GIOCondition condition)
3129 {
3130 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
3131 QIOChannelRDMASource *ssource;
3132 GSource *source;
3133
3134 source = g_source_new(&qio_channel_rdma_source_funcs,
3135 sizeof(QIOChannelRDMASource));
3136 ssource = (QIOChannelRDMASource *)source;
3137
3138 ssource->rioc = rioc;
3139 object_ref(OBJECT(rioc));
3140
3141 ssource->condition = condition;
3142
3143 return source;
3144 }
3145
3146 static void qio_channel_rdma_set_aio_fd_handler(QIOChannel *ioc,
3147 AioContext *read_ctx,
3148 IOHandler *io_read,
3149 AioContext *write_ctx,
3150 IOHandler *io_write,
3151 void *opaque)
3152 {
3153 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
3154 if (io_read) {
3155 aio_set_fd_handler(read_ctx, rioc->rdmain->recv_comp_channel->fd,
3156 io_read, io_write, NULL, NULL, opaque);
3157 aio_set_fd_handler(read_ctx, rioc->rdmain->send_comp_channel->fd,
3158 io_read, io_write, NULL, NULL, opaque);
3159 } else {
3160 aio_set_fd_handler(write_ctx, rioc->rdmaout->recv_comp_channel->fd,
3161 io_read, io_write, NULL, NULL, opaque);
3162 aio_set_fd_handler(write_ctx, rioc->rdmaout->send_comp_channel->fd,
3163 io_read, io_write, NULL, NULL, opaque);
3164 }
3165 }
3166
3167 struct rdma_close_rcu {
3168 struct rcu_head rcu;
3169 RDMAContext *rdmain;
3170 RDMAContext *rdmaout;
3171 };
3172
3173 /* callback from qio_channel_rdma_close via call_rcu */
3174 static void qio_channel_rdma_close_rcu(struct rdma_close_rcu *rcu)
3175 {
3176 if (rcu->rdmain) {
3177 qemu_rdma_cleanup(rcu->rdmain);
3178 }
3179
3180 if (rcu->rdmaout) {
3181 qemu_rdma_cleanup(rcu->rdmaout);
3182 }
3183
3184 g_free(rcu->rdmain);
3185 g_free(rcu->rdmaout);
3186 g_free(rcu);
3187 }
3188
3189 static int qio_channel_rdma_close(QIOChannel *ioc,
3190 Error **errp)
3191 {
3192 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
3193 RDMAContext *rdmain, *rdmaout;
3194 struct rdma_close_rcu *rcu = g_new(struct rdma_close_rcu, 1);
3195
3196 trace_qemu_rdma_close();
3197
3198 rdmain = rioc->rdmain;
3199 if (rdmain) {
3200 qatomic_rcu_set(&rioc->rdmain, NULL);
3201 }
3202
3203 rdmaout = rioc->rdmaout;
3204 if (rdmaout) {
3205 qatomic_rcu_set(&rioc->rdmaout, NULL);
3206 }
3207
3208 rcu->rdmain = rdmain;
3209 rcu->rdmaout = rdmaout;
3210 call_rcu(rcu, qio_channel_rdma_close_rcu, rcu);
3211
3212 return 0;
3213 }
3214
3215 static int
3216 qio_channel_rdma_shutdown(QIOChannel *ioc,
3217 QIOChannelShutdown how,
3218 Error **errp)
3219 {
3220 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(ioc);
3221 RDMAContext *rdmain, *rdmaout;
3222
3223 RCU_READ_LOCK_GUARD();
3224
3225 rdmain = qatomic_rcu_read(&rioc->rdmain);
3226 rdmaout = qatomic_rcu_read(&rioc->rdmain);
3227
3228 switch (how) {
3229 case QIO_CHANNEL_SHUTDOWN_READ:
3230 if (rdmain) {
3231 rdmain->errored = true;
3232 }
3233 break;
3234 case QIO_CHANNEL_SHUTDOWN_WRITE:
3235 if (rdmaout) {
3236 rdmaout->errored = true;
3237 }
3238 break;
3239 case QIO_CHANNEL_SHUTDOWN_BOTH:
3240 default:
3241 if (rdmain) {
3242 rdmain->errored = true;
3243 }
3244 if (rdmaout) {
3245 rdmaout->errored = true;
3246 }
3247 break;
3248 }
3249
3250 return 0;
3251 }
3252
3253 /*
3254 * Parameters:
3255 * @offset == 0 :
3256 * This means that 'block_offset' is a full virtual address that does not
3257 * belong to a RAMBlock of the virtual machine and instead
3258 * represents a private malloc'd memory area that the caller wishes to
3259 * transfer.
3260 *
3261 * @offset != 0 :
3262 * Offset is an offset to be added to block_offset and used
3263 * to also lookup the corresponding RAMBlock.
3264 *
3265 * @size : Number of bytes to transfer
3266 *
3267 * @pages_sent : User-specificed pointer to indicate how many pages were
3268 * sent. Usually, this will not be more than a few bytes of
3269 * the protocol because most transfers are sent asynchronously.
3270 */
3271 static int qemu_rdma_save_page(QEMUFile *f, ram_addr_t block_offset,
3272 ram_addr_t offset, size_t size)
3273 {
3274 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(qemu_file_get_ioc(f));
3275 Error *err = NULL;
3276 RDMAContext *rdma;
3277 int ret;
3278
3279 if (migration_in_postcopy()) {
3280 return RAM_SAVE_CONTROL_NOT_SUPP;
3281 }
3282
3283 RCU_READ_LOCK_GUARD();
3284 rdma = qatomic_rcu_read(&rioc->rdmaout);
3285
3286 if (!rdma) {
3287 return -1;
3288 }
3289
3290 if (rdma_errored(rdma)) {
3291 return -1;
3292 }
3293
3294 qemu_fflush(f);
3295
3296 /*
3297 * Add this page to the current 'chunk'. If the chunk
3298 * is full, or the page doesn't belong to the current chunk,
3299 * an actual RDMA write will occur and a new chunk will be formed.
3300 */
3301 ret = qemu_rdma_write(rdma, block_offset, offset, size, &err);
3302 if (ret < 0) {
3303 error_report_err(err);
3304 goto err;
3305 }
3306
3307 /*
3308 * Drain the Completion Queue if possible, but do not block,
3309 * just poll.
3310 *
3311 * If nothing to poll, the end of the iteration will do this
3312 * again to make sure we don't overflow the request queue.
3313 */
3314 while (1) {
3315 uint64_t wr_id, wr_id_in;
3316 ret = qemu_rdma_poll(rdma, rdma->recv_cq, &wr_id_in, NULL);
3317
3318 if (ret < 0) {
3319 error_report("rdma migration: polling error");
3320 goto err;
3321 }
3322
3323 wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
3324
3325 if (wr_id == RDMA_WRID_NONE) {
3326 break;
3327 }
3328 }
3329
3330 while (1) {
3331 uint64_t wr_id, wr_id_in;
3332 ret = qemu_rdma_poll(rdma, rdma->send_cq, &wr_id_in, NULL);
3333
3334 if (ret < 0) {
3335 error_report("rdma migration: polling error");
3336 goto err;
3337 }
3338
3339 wr_id = wr_id_in & RDMA_WRID_TYPE_MASK;
3340
3341 if (wr_id == RDMA_WRID_NONE) {
3342 break;
3343 }
3344 }
3345
3346 return RAM_SAVE_CONTROL_DELAYED;
3347
3348 err:
3349 rdma->errored = true;
3350 return -1;
3351 }
3352
3353 static void rdma_accept_incoming_migration(void *opaque);
3354
3355 static void rdma_cm_poll_handler(void *opaque)
3356 {
3357 RDMAContext *rdma = opaque;
3358 int ret;
3359 struct rdma_cm_event *cm_event;
3360 MigrationIncomingState *mis = migration_incoming_get_current();
3361
3362 ret = rdma_get_cm_event(rdma->channel, &cm_event);
3363 if (ret < 0) {
3364 error_report("get_cm_event failed %d", errno);
3365 return;
3366 }
3367
3368 if (cm_event->event == RDMA_CM_EVENT_DISCONNECTED ||
3369 cm_event->event == RDMA_CM_EVENT_DEVICE_REMOVAL) {
3370 if (!rdma->errored &&
3371 migration_incoming_get_current()->state !=
3372 MIGRATION_STATUS_COMPLETED) {
3373 error_report("receive cm event, cm event is %d", cm_event->event);
3374 rdma->errored = true;
3375 if (rdma->return_path) {
3376 rdma->return_path->errored = true;
3377 }
3378 }
3379 rdma_ack_cm_event(cm_event);
3380 if (mis->loadvm_co) {
3381 qemu_coroutine_enter(mis->loadvm_co);
3382 }
3383 return;
3384 }
3385 rdma_ack_cm_event(cm_event);
3386 }
3387
3388 static int qemu_rdma_accept(RDMAContext *rdma)
3389 {
3390 Error *err = NULL;
3391 RDMACapabilities cap;
3392 struct rdma_conn_param conn_param = {
3393 .responder_resources = 2,
3394 .private_data = &cap,
3395 .private_data_len = sizeof(cap),
3396 };
3397 RDMAContext *rdma_return_path = NULL;
3398 struct rdma_cm_event *cm_event;
3399 struct ibv_context *verbs;
3400 int ret;
3401 int idx;
3402
3403 ret = rdma_get_cm_event(rdma->channel, &cm_event);
3404 if (ret < 0) {
3405 goto err_rdma_dest_wait;
3406 }
3407
3408 if (cm_event->event != RDMA_CM_EVENT_CONNECT_REQUEST) {
3409 rdma_ack_cm_event(cm_event);
3410 goto err_rdma_dest_wait;
3411 }
3412
3413 /*
3414 * initialize the RDMAContext for return path for postcopy after first
3415 * connection request reached.
3416 */
3417 if ((migrate_postcopy() || migrate_return_path())
3418 && !rdma->is_return_path) {
3419 rdma_return_path = qemu_rdma_data_init(rdma->host_port, NULL);
3420 if (rdma_return_path == NULL) {
3421 rdma_ack_cm_event(cm_event);
3422 goto err_rdma_dest_wait;
3423 }
3424
3425 qemu_rdma_return_path_dest_init(rdma_return_path, rdma);
3426 }
3427
3428 memcpy(&cap, cm_event->param.conn.private_data, sizeof(cap));
3429
3430 network_to_caps(&cap);
3431
3432 if (cap.version < 1 || cap.version > RDMA_CONTROL_VERSION_CURRENT) {
3433 error_report("Unknown source RDMA version: %d, bailing...",
3434 cap.version);
3435 rdma_ack_cm_event(cm_event);
3436 goto err_rdma_dest_wait;
3437 }
3438
3439 /*
3440 * Respond with only the capabilities this version of QEMU knows about.
3441 */
3442 cap.flags &= known_capabilities;
3443
3444 /*
3445 * Enable the ones that we do know about.
3446 * Add other checks here as new ones are introduced.
3447 */
3448 if (cap.flags & RDMA_CAPABILITY_PIN_ALL) {
3449 rdma->pin_all = true;
3450 }
3451
3452 rdma->cm_id = cm_event->id;
3453 verbs = cm_event->id->verbs;
3454
3455 rdma_ack_cm_event(cm_event);
3456
3457 trace_qemu_rdma_accept_pin_state(rdma->pin_all);
3458
3459 caps_to_network(&cap);
3460
3461 trace_qemu_rdma_accept_pin_verbsc(verbs);
3462
3463 if (!rdma->verbs) {
3464 rdma->verbs = verbs;
3465 } else if (rdma->verbs != verbs) {
3466 error_report("ibv context not matching %p, %p!", rdma->verbs,
3467 verbs);
3468 goto err_rdma_dest_wait;
3469 }
3470
3471 qemu_rdma_dump_id("dest_init", verbs);
3472
3473 ret = qemu_rdma_alloc_pd_cq(rdma, &err);
3474 if (ret < 0) {
3475 error_report_err(err);
3476 goto err_rdma_dest_wait;
3477 }
3478
3479 ret = qemu_rdma_alloc_qp(rdma);
3480 if (ret < 0) {
3481 error_report("rdma migration: error allocating qp!");
3482 goto err_rdma_dest_wait;
3483 }
3484
3485 qemu_rdma_init_ram_blocks(rdma);
3486
3487 for (idx = 0; idx < RDMA_WRID_MAX; idx++) {
3488 ret = qemu_rdma_reg_control(rdma, idx);
3489 if (ret < 0) {
3490 error_report("rdma: error registering %d control", idx);
3491 goto err_rdma_dest_wait;
3492 }
3493 }
3494
3495 /* Accept the second connection request for return path */
3496 if ((migrate_postcopy() || migrate_return_path())
3497 && !rdma->is_return_path) {
3498 qemu_set_fd_handler(rdma->channel->fd, rdma_accept_incoming_migration,
3499 NULL,
3500 (void *)(intptr_t)rdma->return_path);
3501 } else {
3502 qemu_set_fd_handler(rdma->channel->fd, rdma_cm_poll_handler,
3503 NULL, rdma);
3504 }
3505
3506 ret = rdma_accept(rdma->cm_id, &conn_param);
3507 if (ret < 0) {
3508 error_report("rdma_accept failed");
3509 goto err_rdma_dest_wait;
3510 }
3511
3512 ret = rdma_get_cm_event(rdma->channel, &cm_event);
3513 if (ret < 0) {
3514 error_report("rdma_accept get_cm_event failed");
3515 goto err_rdma_dest_wait;
3516 }
3517
3518 if (cm_event->event != RDMA_CM_EVENT_ESTABLISHED) {
3519 error_report("rdma_accept not event established");
3520 rdma_ack_cm_event(cm_event);
3521 goto err_rdma_dest_wait;
3522 }
3523
3524 rdma_ack_cm_event(cm_event);
3525 rdma->connected = true;
3526
3527 ret = qemu_rdma_post_recv_control(rdma, RDMA_WRID_READY, &err);
3528 if (ret < 0) {
3529 error_report_err(err);
3530 goto err_rdma_dest_wait;
3531 }
3532
3533 qemu_rdma_dump_gid("dest_connect", rdma->cm_id);
3534
3535 return 0;
3536
3537 err_rdma_dest_wait:
3538 rdma->errored = true;
3539 qemu_rdma_cleanup(rdma);
3540 g_free(rdma_return_path);
3541 return -1;
3542 }
3543
3544 static int dest_ram_sort_func(const void *a, const void *b)
3545 {
3546 unsigned int a_index = ((const RDMALocalBlock *)a)->src_index;
3547 unsigned int b_index = ((const RDMALocalBlock *)b)->src_index;
3548
3549 return (a_index < b_index) ? -1 : (a_index != b_index);
3550 }
3551
3552 /*
3553 * During each iteration of the migration, we listen for instructions
3554 * by the source VM to perform dynamic page registrations before they
3555 * can perform RDMA operations.
3556 *
3557 * We respond with the 'rkey'.
3558 *
3559 * Keep doing this until the source tells us to stop.
3560 */
3561 static int qemu_rdma_registration_handle(QEMUFile *f)
3562 {
3563 RDMAControlHeader reg_resp = { .len = sizeof(RDMARegisterResult),
3564 .type = RDMA_CONTROL_REGISTER_RESULT,
3565 .repeat = 0,
3566 };
3567 RDMAControlHeader unreg_resp = { .len = 0,
3568 .type = RDMA_CONTROL_UNREGISTER_FINISHED,
3569 .repeat = 0,
3570 };
3571 RDMAControlHeader blocks = { .type = RDMA_CONTROL_RAM_BLOCKS_RESULT,
3572 .repeat = 1 };
3573 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(qemu_file_get_ioc(f));
3574 Error *err = NULL;
3575 RDMAContext *rdma;
3576 RDMALocalBlocks *local;
3577 RDMAControlHeader head;
3578 RDMARegister *reg, *registers;
3579 RDMACompress *comp;
3580 RDMARegisterResult *reg_result;
3581 static RDMARegisterResult results[RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE];
3582 RDMALocalBlock *block;
3583 void *host_addr;
3584 int ret;
3585 int idx = 0;
3586 int count = 0;
3587 int i = 0;
3588
3589 RCU_READ_LOCK_GUARD();
3590 rdma = qatomic_rcu_read(&rioc->rdmain);
3591
3592 if (!rdma) {
3593 return -1;
3594 }
3595
3596 if (rdma_errored(rdma)) {
3597 return -1;
3598 }
3599
3600 local = &rdma->local_ram_blocks;
3601 do {
3602 trace_qemu_rdma_registration_handle_wait();
3603
3604 ret = qemu_rdma_exchange_recv(rdma, &head, RDMA_CONTROL_NONE, &err);
3605
3606 if (ret < 0) {
3607 error_report_err(err);
3608 break;
3609 }
3610
3611 if (head.repeat > RDMA_CONTROL_MAX_COMMANDS_PER_MESSAGE) {
3612 error_report("rdma: Too many requests in this message (%d)."
3613 "Bailing.", head.repeat);
3614 break;
3615 }
3616
3617 switch (head.type) {
3618 case RDMA_CONTROL_COMPRESS:
3619 comp = (RDMACompress *) rdma->wr_data[idx].control_curr;
3620 network_to_compress(comp);
3621
3622 trace_qemu_rdma_registration_handle_compress(comp->length,
3623 comp->block_idx,
3624 comp->offset);
3625 if (comp->block_idx >= rdma->local_ram_blocks.nb_blocks) {
3626 error_report("rdma: 'compress' bad block index %u (vs %d)",
3627 (unsigned int)comp->block_idx,
3628 rdma->local_ram_blocks.nb_blocks);
3629 goto err;
3630 }
3631 block = &(rdma->local_ram_blocks.block[comp->block_idx]);
3632
3633 host_addr = block->local_host_addr +
3634 (comp->offset - block->offset);
3635
3636 ram_handle_compressed(host_addr, comp->value, comp->length);
3637 break;
3638
3639 case RDMA_CONTROL_REGISTER_FINISHED:
3640 trace_qemu_rdma_registration_handle_finished();
3641 return 0;
3642
3643 case RDMA_CONTROL_RAM_BLOCKS_REQUEST:
3644 trace_qemu_rdma_registration_handle_ram_blocks();
3645
3646 /* Sort our local RAM Block list so it's the same as the source,
3647 * we can do this since we've filled in a src_index in the list
3648 * as we received the RAMBlock list earlier.
3649 */
3650 qsort(rdma->local_ram_blocks.block,
3651 rdma->local_ram_blocks.nb_blocks,
3652 sizeof(RDMALocalBlock), dest_ram_sort_func);
3653 for (i = 0; i < local->nb_blocks; i++) {
3654 local->block[i].index = i;
3655 }
3656
3657 if (rdma->pin_all) {
3658 ret = qemu_rdma_reg_whole_ram_blocks(rdma, &err);
3659 if (ret < 0) {
3660 error_report_err(err);
3661 goto err;
3662 }
3663 }
3664
3665 /*
3666 * Dest uses this to prepare to transmit the RAMBlock descriptions
3667 * to the source VM after connection setup.
3668 * Both sides use the "remote" structure to communicate and update
3669 * their "local" descriptions with what was sent.
3670 */
3671 for (i = 0; i < local->nb_blocks; i++) {
3672 rdma->dest_blocks[i].remote_host_addr =
3673 (uintptr_t)(local->block[i].local_host_addr);
3674
3675 if (rdma->pin_all) {
3676 rdma->dest_blocks[i].remote_rkey = local->block[i].mr->rkey;
3677 }
3678
3679 rdma->dest_blocks[i].offset = local->block[i].offset;
3680 rdma->dest_blocks[i].length = local->block[i].length;
3681
3682 dest_block_to_network(&rdma->dest_blocks[i]);
3683 trace_qemu_rdma_registration_handle_ram_blocks_loop(
3684 local->block[i].block_name,
3685 local->block[i].offset,
3686 local->block[i].length,
3687 local->block[i].local_host_addr,
3688 local->block[i].src_index);
3689 }
3690
3691 blocks.len = rdma->local_ram_blocks.nb_blocks
3692 * sizeof(RDMADestBlock);
3693
3694
3695 ret = qemu_rdma_post_send_control(rdma,
3696 (uint8_t *) rdma->dest_blocks, &blocks,
3697 &err);
3698
3699 if (ret < 0) {
3700 error_report_err(err);
3701 goto err;
3702 }
3703
3704 break;
3705 case RDMA_CONTROL_REGISTER_REQUEST:
3706 trace_qemu_rdma_registration_handle_register(head.repeat);
3707
3708 reg_resp.repeat = head.repeat;
3709 registers = (RDMARegister *) rdma->wr_data[idx].control_curr;
3710
3711 for (count = 0; count < head.repeat; count++) {
3712 uint64_t chunk;
3713 uint8_t *chunk_start, *chunk_end;
3714
3715 reg = &registers[count];
3716 network_to_register(reg);
3717
3718 reg_result = &results[count];
3719
3720 trace_qemu_rdma_registration_handle_register_loop(count,
3721 reg->current_index, reg->key.current_addr, reg->chunks);
3722
3723 if (reg->current_index >= rdma->local_ram_blocks.nb_blocks) {
3724 error_report("rdma: 'register' bad block index %u (vs %d)",
3725 (unsigned int)reg->current_index,
3726 rdma->local_ram_blocks.nb_blocks);
3727 goto err;
3728 }
3729 block = &(rdma->local_ram_blocks.block[reg->current_index]);
3730 if (block->is_ram_block) {
3731 if (block->offset > reg->key.current_addr) {
3732 error_report("rdma: bad register address for block %s"
3733 " offset: %" PRIx64 " current_addr: %" PRIx64,
3734 block->block_name, block->offset,
3735 reg->key.current_addr);
3736 goto err;
3737 }
3738 host_addr = (block->local_host_addr +
3739 (reg->key.current_addr - block->offset));
3740 chunk = ram_chunk_index(block->local_host_addr,
3741 (uint8_t *) host_addr);
3742 } else {
3743 chunk = reg->key.chunk;
3744 host_addr = block->local_host_addr +
3745 (reg->key.chunk * (1UL << RDMA_REG_CHUNK_SHIFT));
3746 /* Check for particularly bad chunk value */
3747 if (host_addr < (void *)block->local_host_addr) {
3748 error_report("rdma: bad chunk for block %s"
3749 " chunk: %" PRIx64,
3750 block->block_name, reg->key.chunk);
3751 goto err;
3752 }
3753 }
3754 chunk_start = ram_chunk_start(block, chunk);
3755 chunk_end = ram_chunk_end(block, chunk + reg->chunks);
3756 /* avoid "-Waddress-of-packed-member" warning */
3757 uint32_t tmp_rkey = 0;
3758 if (qemu_rdma_register_and_get_keys(rdma, block,
3759 (uintptr_t)host_addr, NULL, &tmp_rkey,
3760 chunk, chunk_start, chunk_end)) {
3761 error_report("cannot get rkey");
3762 goto err;
3763 }
3764 reg_result->rkey = tmp_rkey;
3765
3766 reg_result->host_addr = (uintptr_t)block->local_host_addr;
3767
3768 trace_qemu_rdma_registration_handle_register_rkey(
3769 reg_result->rkey);
3770
3771 result_to_network(reg_result);
3772 }
3773
3774 ret = qemu_rdma_post_send_control(rdma,
3775 (uint8_t *) results, &reg_resp, &err);
3776
3777 if (ret < 0) {
3778 error_report_err(err);
3779 goto err;
3780 }
3781 break;
3782 case RDMA_CONTROL_UNREGISTER_REQUEST:
3783 trace_qemu_rdma_registration_handle_unregister(head.repeat);
3784 unreg_resp.repeat = head.repeat;
3785 registers = (RDMARegister *) rdma->wr_data[idx].control_curr;
3786
3787 for (count = 0; count < head.repeat; count++) {
3788 reg = &registers[count];
3789 network_to_register(reg);
3790
3791 trace_qemu_rdma_registration_handle_unregister_loop(count,
3792 reg->current_index, reg->key.chunk);
3793
3794 block = &(rdma->local_ram_blocks.block[reg->current_index]);
3795
3796 ret = ibv_dereg_mr(block->pmr[reg->key.chunk]);
3797 block->pmr[reg->key.chunk] = NULL;
3798
3799 if (ret != 0) {
3800 perror("rdma unregistration chunk failed");
3801 goto err;
3802 }
3803
3804 rdma->total_registrations--;
3805
3806 trace_qemu_rdma_registration_handle_unregister_success(
3807 reg->key.chunk);
3808 }
3809
3810 ret = qemu_rdma_post_send_control(rdma, NULL, &unreg_resp, &err);
3811
3812 if (ret < 0) {
3813 error_report_err(err);
3814 goto err;
3815 }
3816 break;
3817 case RDMA_CONTROL_REGISTER_RESULT:
3818 error_report("Invalid RESULT message at dest.");
3819 goto err;
3820 default:
3821 error_report("Unknown control message %s", control_desc(head.type));
3822 goto err;
3823 }
3824 } while (1);
3825
3826 err:
3827 rdma->errored = true;
3828 return -1;
3829 }
3830
3831 /* Destination:
3832 * Called via a ram_control_load_hook during the initial RAM load section which
3833 * lists the RAMBlocks by name. This lets us know the order of the RAMBlocks
3834 * on the source.
3835 * We've already built our local RAMBlock list, but not yet sent the list to
3836 * the source.
3837 */
3838 static int
3839 rdma_block_notification_handle(QEMUFile *f, const char *name)
3840 {
3841 RDMAContext *rdma;
3842 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(qemu_file_get_ioc(f));
3843 int curr;
3844 int found = -1;
3845
3846 RCU_READ_LOCK_GUARD();
3847 rdma = qatomic_rcu_read(&rioc->rdmain);
3848
3849 if (!rdma) {
3850 return -1;
3851 }
3852
3853 /* Find the matching RAMBlock in our local list */
3854 for (curr = 0; curr < rdma->local_ram_blocks.nb_blocks; curr++) {
3855 if (!strcmp(rdma->local_ram_blocks.block[curr].block_name, name)) {
3856 found = curr;
3857 break;
3858 }
3859 }
3860
3861 if (found == -1) {
3862 error_report("RAMBlock '%s' not found on destination", name);
3863 return -1;
3864 }
3865
3866 rdma->local_ram_blocks.block[curr].src_index = rdma->next_src_index;
3867 trace_rdma_block_notification_handle(name, rdma->next_src_index);
3868 rdma->next_src_index++;
3869
3870 return 0;
3871 }
3872
3873 static int rdma_load_hook(QEMUFile *f, uint64_t flags, void *data)
3874 {
3875 switch (flags) {
3876 case RAM_CONTROL_BLOCK_REG:
3877 return rdma_block_notification_handle(f, data);
3878
3879 case RAM_CONTROL_HOOK:
3880 return qemu_rdma_registration_handle(f);
3881
3882 default:
3883 /* Shouldn't be called with any other values */
3884 abort();
3885 }
3886 }
3887
3888 static int qemu_rdma_registration_start(QEMUFile *f,
3889 uint64_t flags, void *data)
3890 {
3891 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(qemu_file_get_ioc(f));
3892 RDMAContext *rdma;
3893
3894 if (migration_in_postcopy()) {
3895 return 0;
3896 }
3897
3898 RCU_READ_LOCK_GUARD();
3899 rdma = qatomic_rcu_read(&rioc->rdmaout);
3900 if (!rdma) {
3901 return -1;
3902 }
3903
3904 if (rdma_errored(rdma)) {
3905 return -1;
3906 }
3907
3908 trace_qemu_rdma_registration_start(flags);
3909 qemu_put_be64(f, RAM_SAVE_FLAG_HOOK);
3910 qemu_fflush(f);
3911
3912 return 0;
3913 }
3914
3915 /*
3916 * Inform dest that dynamic registrations are done for now.
3917 * First, flush writes, if any.
3918 */
3919 static int qemu_rdma_registration_stop(QEMUFile *f,
3920 uint64_t flags, void *data)
3921 {
3922 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(qemu_file_get_ioc(f));
3923 Error *err = NULL;
3924 RDMAContext *rdma;
3925 RDMAControlHeader head = { .len = 0, .repeat = 1 };
3926 int ret;
3927
3928 if (migration_in_postcopy()) {
3929 return 0;
3930 }
3931
3932 RCU_READ_LOCK_GUARD();
3933 rdma = qatomic_rcu_read(&rioc->rdmaout);
3934 if (!rdma) {
3935 return -1;
3936 }
3937
3938 if (rdma_errored(rdma)) {
3939 return -1;
3940 }
3941
3942 qemu_fflush(f);
3943 ret = qemu_rdma_drain_cq(rdma);
3944
3945 if (ret < 0) {
3946 goto err;
3947 }
3948
3949 if (flags == RAM_CONTROL_SETUP) {
3950 RDMAControlHeader resp = {.type = RDMA_CONTROL_RAM_BLOCKS_RESULT };
3951 RDMALocalBlocks *local = &rdma->local_ram_blocks;
3952 int reg_result_idx, i, nb_dest_blocks;
3953
3954 head.type = RDMA_CONTROL_RAM_BLOCKS_REQUEST;
3955 trace_qemu_rdma_registration_stop_ram();
3956
3957 /*
3958 * Make sure that we parallelize the pinning on both sides.
3959 * For very large guests, doing this serially takes a really
3960 * long time, so we have to 'interleave' the pinning locally
3961 * with the control messages by performing the pinning on this
3962 * side before we receive the control response from the other
3963 * side that the pinning has completed.
3964 */
3965 ret = qemu_rdma_exchange_send(rdma, &head, NULL, &resp,
3966 &reg_result_idx, rdma->pin_all ?
3967 qemu_rdma_reg_whole_ram_blocks : NULL,
3968 &err);
3969 if (ret < 0) {
3970 error_report_err(err);
3971 return -1;
3972 }
3973
3974 nb_dest_blocks = resp.len / sizeof(RDMADestBlock);
3975
3976 /*
3977 * The protocol uses two different sets of rkeys (mutually exclusive):
3978 * 1. One key to represent the virtual address of the entire ram block.
3979 * (dynamic chunk registration disabled - pin everything with one rkey.)
3980 * 2. One to represent individual chunks within a ram block.
3981 * (dynamic chunk registration enabled - pin individual chunks.)
3982 *
3983 * Once the capability is successfully negotiated, the destination transmits
3984 * the keys to use (or sends them later) including the virtual addresses
3985 * and then propagates the remote ram block descriptions to his local copy.
3986 */
3987
3988 if (local->nb_blocks != nb_dest_blocks) {
3989 fprintf(stderr, "ram blocks mismatch (Number of blocks %d vs %d) "
3990 "Your QEMU command line parameters are probably "
3991 "not identical on both the source and destination.",
3992 local->nb_blocks, nb_dest_blocks);
3993 rdma->errored = true;
3994 return -1;
3995 }
3996
3997 qemu_rdma_move_header(rdma, reg_result_idx, &resp);
3998 memcpy(rdma->dest_blocks,
3999 rdma->wr_data[reg_result_idx].control_curr, resp.len);
4000 for (i = 0; i < nb_dest_blocks; i++) {
4001 network_to_dest_block(&rdma->dest_blocks[i]);
4002
4003 /* We require that the blocks are in the same order */
4004 if (rdma->dest_blocks[i].length != local->block[i].length) {
4005 fprintf(stderr, "Block %s/%d has a different length %" PRIu64
4006 "vs %" PRIu64, local->block[i].block_name, i,
4007 local->block[i].length,
4008 rdma->dest_blocks[i].length);
4009 rdma->errored = true;
4010 return -1;
4011 }
4012 local->block[i].remote_host_addr =
4013 rdma->dest_blocks[i].remote_host_addr;
4014 local->block[i].remote_rkey = rdma->dest_blocks[i].remote_rkey;
4015 }
4016 }
4017
4018 trace_qemu_rdma_registration_stop(flags);
4019
4020 head.type = RDMA_CONTROL_REGISTER_FINISHED;
4021 ret = qemu_rdma_exchange_send(rdma, &head, NULL, NULL, NULL, NULL, &err);
4022
4023 if (ret < 0) {
4024 error_report_err(err);
4025 goto err;
4026 }
4027
4028 return 0;
4029 err:
4030 rdma->errored = true;
4031 return -1;
4032 }
4033
4034 static const QEMUFileHooks rdma_read_hooks = {
4035 .hook_ram_load = rdma_load_hook,
4036 };
4037
4038 static const QEMUFileHooks rdma_write_hooks = {
4039 .before_ram_iterate = qemu_rdma_registration_start,
4040 .after_ram_iterate = qemu_rdma_registration_stop,
4041 .save_page = qemu_rdma_save_page,
4042 };
4043
4044
4045 static void qio_channel_rdma_finalize(Object *obj)
4046 {
4047 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(obj);
4048 if (rioc->rdmain) {
4049 qemu_rdma_cleanup(rioc->rdmain);
4050 g_free(rioc->rdmain);
4051 rioc->rdmain = NULL;
4052 }
4053 if (rioc->rdmaout) {
4054 qemu_rdma_cleanup(rioc->rdmaout);
4055 g_free(rioc->rdmaout);
4056 rioc->rdmaout = NULL;
4057 }
4058 }
4059
4060 static void qio_channel_rdma_class_init(ObjectClass *klass,
4061 void *class_data G_GNUC_UNUSED)
4062 {
4063 QIOChannelClass *ioc_klass = QIO_CHANNEL_CLASS(klass);
4064
4065 ioc_klass->io_writev = qio_channel_rdma_writev;
4066 ioc_klass->io_readv = qio_channel_rdma_readv;
4067 ioc_klass->io_set_blocking = qio_channel_rdma_set_blocking;
4068 ioc_klass->io_close = qio_channel_rdma_close;
4069 ioc_klass->io_create_watch = qio_channel_rdma_create_watch;
4070 ioc_klass->io_set_aio_fd_handler = qio_channel_rdma_set_aio_fd_handler;
4071 ioc_klass->io_shutdown = qio_channel_rdma_shutdown;
4072 }
4073
4074 static const TypeInfo qio_channel_rdma_info = {
4075 .parent = TYPE_QIO_CHANNEL,
4076 .name = TYPE_QIO_CHANNEL_RDMA,
4077 .instance_size = sizeof(QIOChannelRDMA),
4078 .instance_finalize = qio_channel_rdma_finalize,
4079 .class_init = qio_channel_rdma_class_init,
4080 };
4081
4082 static void qio_channel_rdma_register_types(void)
4083 {
4084 type_register_static(&qio_channel_rdma_info);
4085 }
4086
4087 type_init(qio_channel_rdma_register_types);
4088
4089 static QEMUFile *rdma_new_input(RDMAContext *rdma)
4090 {
4091 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(object_new(TYPE_QIO_CHANNEL_RDMA));
4092
4093 rioc->file = qemu_file_new_input(QIO_CHANNEL(rioc));
4094 rioc->rdmain = rdma;
4095 rioc->rdmaout = rdma->return_path;
4096 qemu_file_set_hooks(rioc->file, &rdma_read_hooks);
4097
4098 return rioc->file;
4099 }
4100
4101 static QEMUFile *rdma_new_output(RDMAContext *rdma)
4102 {
4103 QIOChannelRDMA *rioc = QIO_CHANNEL_RDMA(object_new(TYPE_QIO_CHANNEL_RDMA));
4104
4105 rioc->file = qemu_file_new_output(QIO_CHANNEL(rioc));
4106 rioc->rdmaout = rdma;
4107 rioc->rdmain = rdma->return_path;
4108 qemu_file_set_hooks(rioc->file, &rdma_write_hooks);
4109
4110 return rioc->file;
4111 }
4112
4113 static void rdma_accept_incoming_migration(void *opaque)
4114 {
4115 RDMAContext *rdma = opaque;
4116 int ret;
4117 QEMUFile *f;
4118 Error *local_err = NULL;
4119
4120 trace_qemu_rdma_accept_incoming_migration();
4121 ret = qemu_rdma_accept(rdma);
4122
4123 if (ret < 0) {
4124 fprintf(stderr, "RDMA ERROR: Migration initialization failed\n");
4125 return;
4126 }
4127
4128 trace_qemu_rdma_accept_incoming_migration_accepted();
4129
4130 if (rdma->is_return_path) {
4131 return;
4132 }
4133
4134 f = rdma_new_input(rdma);
4135 if (f == NULL) {
4136 fprintf(stderr, "RDMA ERROR: could not open RDMA for input\n");
4137 qemu_rdma_cleanup(rdma);
4138 return;
4139 }
4140
4141 rdma->migration_started_on_destination = 1;
4142 migration_fd_process_incoming(f, &local_err);
4143 if (local_err) {
4144 error_reportf_err(local_err, "RDMA ERROR:");
4145 }
4146 }
4147
4148 void rdma_start_incoming_migration(const char *host_port, Error **errp)
4149 {
4150 int ret;
4151 RDMAContext *rdma;
4152
4153 trace_rdma_start_incoming_migration();
4154
4155 /* Avoid ram_block_discard_disable(), cannot change during migration. */
4156 if (ram_block_discard_is_required()) {
4157 error_setg(errp, "RDMA: cannot disable RAM discard");
4158 return;
4159 }
4160
4161 rdma = qemu_rdma_data_init(host_port, errp);
4162 if (rdma == NULL) {
4163 goto err;
4164 }
4165
4166 ret = qemu_rdma_dest_init(rdma, errp);
4167 if (ret < 0) {
4168 goto err;
4169 }
4170
4171 trace_rdma_start_incoming_migration_after_dest_init();
4172
4173 ret = rdma_listen(rdma->listen_id, 5);
4174
4175 if (ret < 0) {
4176 error_setg(errp, "RDMA ERROR: listening on socket!");
4177 goto cleanup_rdma;
4178 }
4179
4180 trace_rdma_start_incoming_migration_after_rdma_listen();
4181
4182 qemu_set_fd_handler(rdma->channel->fd, rdma_accept_incoming_migration,
4183 NULL, (void *)(intptr_t)rdma);
4184 return;
4185
4186 cleanup_rdma:
4187 qemu_rdma_cleanup(rdma);
4188 err:
4189 if (rdma) {
4190 g_free(rdma->host);
4191 g_free(rdma->host_port);
4192 }
4193 g_free(rdma);
4194 }
4195
4196 void rdma_start_outgoing_migration(void *opaque,
4197 const char *host_port, Error **errp)
4198 {
4199 MigrationState *s = opaque;
4200 RDMAContext *rdma_return_path = NULL;
4201 RDMAContext *rdma;
4202 int ret;
4203
4204 /* Avoid ram_block_discard_disable(), cannot change during migration. */
4205 if (ram_block_discard_is_required()) {
4206 error_setg(errp, "RDMA: cannot disable RAM discard");
4207 return;
4208 }
4209
4210 rdma = qemu_rdma_data_init(host_port, errp);
4211 if (rdma == NULL) {
4212 goto err;
4213 }
4214
4215 ret = qemu_rdma_source_init(rdma, migrate_rdma_pin_all(), errp);
4216
4217 if (ret < 0) {
4218 goto err;
4219 }
4220
4221 trace_rdma_start_outgoing_migration_after_rdma_source_init();
4222 ret = qemu_rdma_connect(rdma, false, errp);
4223
4224 if (ret < 0) {
4225 goto err;
4226 }
4227
4228 /* RDMA postcopy need a separate queue pair for return path */
4229 if (migrate_postcopy() || migrate_return_path()) {
4230 rdma_return_path = qemu_rdma_data_init(host_port, errp);
4231
4232 if (rdma_return_path == NULL) {
4233 goto return_path_err;
4234 }
4235
4236 ret = qemu_rdma_source_init(rdma_return_path,
4237 migrate_rdma_pin_all(), errp);
4238
4239 if (ret < 0) {
4240 goto return_path_err;
4241 }
4242
4243 ret = qemu_rdma_connect(rdma_return_path, true, errp);
4244
4245 if (ret < 0) {
4246 goto return_path_err;
4247 }
4248
4249 rdma->return_path = rdma_return_path;
4250 rdma_return_path->return_path = rdma;
4251 rdma_return_path->is_return_path = true;
4252 }
4253
4254 trace_rdma_start_outgoing_migration_after_rdma_connect();
4255
4256 s->to_dst_file = rdma_new_output(rdma);
4257 migrate_fd_connect(s, NULL);
4258 return;
4259 return_path_err:
4260 qemu_rdma_cleanup(rdma);
4261 err:
4262 g_free(rdma);
4263 g_free(rdma_return_path);
4264 }