1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2 From: Maxim Levitsky <mlevitsk@redhat.com>
3 Date: Wed, 3 Aug 2022 18:50:11 +0300
4 Subject: [PATCH] KVM: x86: emulator/smm: preserve interrupt shadow in SMRAM
6 When #SMI is asserted, the CPU can be in interrupt shadow
9 It is not mandatory in Intel/AMD prm to have the #SMI
10 blocked during the shadow, and on top of
11 that, since neither SVM nor VMX has true support for SMI
12 window, waiting for one instruction would mean single stepping
15 Instead, allow #SMI in this case, but both reset the interrupt
16 window and stash its value in SMRAM to restore it on exit
19 This fixes rare failures seen mostly on windows guests on VMX,
20 when #SMI falls on the sti instruction which mainfest in
21 VM entry failure due to EFLAGS.IF not being set, but STI interrupt
22 window still being set in the VMCS.
24 Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
25 Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
27 arch/x86/kvm/emulate.c | 17 ++++++++++++++---
28 arch/x86/kvm/kvm_emulate.h | 10 ++++++----
29 arch/x86/kvm/x86.c | 12 ++++++++++++
30 3 files changed, 32 insertions(+), 7 deletions(-)
32 diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
33 index 4eb35a0a33a5..3e6ea2951e2b 100644
34 --- a/arch/x86/kvm/emulate.c
35 +++ b/arch/x86/kvm/emulate.c
36 @@ -2420,7 +2420,7 @@ static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
37 const struct kvm_smram_state_32 *smstate)
43 ctxt->eflags = smstate->eflags | X86_EFLAGS_FIXED;
44 ctxt->_eip = smstate->eip;
45 @@ -2455,8 +2455,16 @@ static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
47 ctxt->ops->set_smbase(ctxt, smstate->smbase);
49 - return rsm_enter_protected_mode(ctxt, smstate->cr0,
50 - smstate->cr3, smstate->cr4);
51 + r = rsm_enter_protected_mode(ctxt, smstate->cr0,
52 + smstate->cr3, smstate->cr4);
54 + if (r != X86EMUL_CONTINUE)
57 + ctxt->ops->set_int_shadow(ctxt, 0);
58 + ctxt->interruptibility = (u8)smstate->int_shadow;
60 + return X86EMUL_CONTINUE;
64 @@ -2505,6 +2513,9 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt,
65 rsm_load_seg_64(ctxt, &smstate->fs, VCPU_SREG_FS);
66 rsm_load_seg_64(ctxt, &smstate->gs, VCPU_SREG_GS);
68 + ctxt->ops->set_int_shadow(ctxt, 0);
69 + ctxt->interruptibility = (u8)smstate->int_shadow;
71 return X86EMUL_CONTINUE;
74 diff --git a/arch/x86/kvm/kvm_emulate.h b/arch/x86/kvm/kvm_emulate.h
75 index 3b37b3e17379..a64c190abf28 100644
76 --- a/arch/x86/kvm/kvm_emulate.h
77 +++ b/arch/x86/kvm/kvm_emulate.h
78 @@ -231,6 +231,7 @@ struct x86_emulate_ops {
79 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
81 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
82 + void (*set_int_shadow)(struct x86_emulate_ctxt *ctxt, u8 shadow);
84 unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
85 void (*exiting_smm)(struct x86_emulate_ctxt *ctxt);
86 @@ -497,7 +498,8 @@ struct kvm_smram_state_32 {
92 + u32 int_shadow; /* KVM extension */
93 u32 cr4; /* CR4 is not present in Intel/AMD SMRAM image */
96 @@ -545,6 +547,7 @@ static inline void __check_smram32_offsets(void)
97 __CHECK_SMRAM32_OFFSET(smbase, 0xFEF8);
98 __CHECK_SMRAM32_OFFSET(smm_revision, 0xFEFC);
99 __CHECK_SMRAM32_OFFSET(reserved2, 0xFF00);
100 + __CHECK_SMRAM32_OFFSET(int_shadow, 0xFF10);
101 __CHECK_SMRAM32_OFFSET(cr4, 0xFF14);
102 __CHECK_SMRAM32_OFFSET(reserved3, 0xFF18);
103 __CHECK_SMRAM32_OFFSET(ds, 0xFF2C);
104 @@ -604,7 +607,7 @@ struct kvm_smram_state_64 {
107 u32 io_restart_dword;
113 @@ -642,7 +645,6 @@ struct kvm_smram_state_64 {
114 u64 gprs[16]; /* GPRS in a reversed "natural" X86 order (R15/R14/../RCX/RAX.) */
118 static inline void __check_smram64_offsets(void)
120 #define __CHECK_SMRAM64_OFFSET(field, offset) \
121 @@ -663,7 +665,7 @@ static inline void __check_smram64_offsets(void)
122 __CHECK_SMRAM64_OFFSET(io_restart_rsi, 0xFEB0);
123 __CHECK_SMRAM64_OFFSET(io_restart_rdi, 0xFEB8);
124 __CHECK_SMRAM64_OFFSET(io_restart_dword, 0xFEC0);
125 - __CHECK_SMRAM64_OFFSET(reserved1, 0xFEC4);
126 + __CHECK_SMRAM64_OFFSET(int_shadow, 0xFEC4);
127 __CHECK_SMRAM64_OFFSET(io_inst_restart, 0xFEC8);
128 __CHECK_SMRAM64_OFFSET(auto_hlt_restart, 0xFEC9);
129 __CHECK_SMRAM64_OFFSET(reserved2, 0xFECA);
130 diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
131 index d00b82ee6ca4..4cefdd83a448 100644
132 --- a/arch/x86/kvm/x86.c
133 +++ b/arch/x86/kvm/x86.c
134 @@ -7299,6 +7299,11 @@ static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
135 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
138 +static void emulator_set_int_shadow(struct x86_emulate_ctxt *ctxt, u8 shadow)
140 + static_call(kvm_x86_set_interrupt_shadow)(emul_to_vcpu(ctxt), shadow);
143 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
145 return emul_to_vcpu(ctxt)->arch.hflags;
146 @@ -7368,6 +7373,7 @@ static const struct x86_emulate_ops emulate_ops = {
147 .guest_has_fxsr = emulator_guest_has_fxsr,
148 .guest_has_rdpid = emulator_guest_has_rdpid,
149 .set_nmi_mask = emulator_set_nmi_mask,
150 + .set_int_shadow = emulator_set_int_shadow,
151 .get_hflags = emulator_get_hflags,
152 .exiting_smm = emulator_exiting_smm,
153 .leave_smm = emulator_leave_smm,
154 @@ -9088,6 +9094,8 @@ static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, struct kvm_smram_stat
155 smram->cr4 = kvm_read_cr4(vcpu);
156 smram->smm_revision = 0x00020000;
157 smram->smbase = vcpu->arch.smbase;
159 + smram->int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
163 @@ -9136,6 +9144,8 @@ static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, struct kvm_smram_stat
164 enter_smm_save_seg_64(vcpu, &smram->ds, VCPU_SREG_DS);
165 enter_smm_save_seg_64(vcpu, &smram->fs, VCPU_SREG_FS);
166 enter_smm_save_seg_64(vcpu, &smram->gs, VCPU_SREG_GS);
168 + smram->int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
172 @@ -9172,6 +9182,8 @@ static void enter_smm(struct kvm_vcpu *vcpu)
173 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
174 kvm_rip_write(vcpu, 0x8000);
176 + static_call(kvm_x86_set_interrupt_shadow)(vcpu, 0);
178 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
179 static_call(kvm_x86_set_cr0)(vcpu, cr0);
180 vcpu->arch.cr0 = cr0;