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1 # -*- Mode: Python -*-
2 # vim: filetype=python
3
4 ##
5 # = CXL devices
6 ##
7
8 ##
9 # @CxlUncorErrorType:
10 #
11 # Type of uncorrectable CXL error to inject. These errors are
12 # reported via an AER uncorrectable internal error with additional
13 # information logged at the CXL device.
14 #
15 # @cache-data-parity: Data error such as data parity or data ECC error
16 # CXL.cache
17 #
18 # @cache-address-parity: Address parity or other errors associated
19 # with the address field on CXL.cache
20 #
21 # @cache-be-parity: Byte enable parity or other byte enable errors on
22 # CXL.cache
23 #
24 # @cache-data-ecc: ECC error on CXL.cache
25 #
26 # @mem-data-parity: Data error such as data parity or data ECC error
27 # on CXL.mem
28 #
29 # @mem-address-parity: Address parity or other errors associated with
30 # the address field on CXL.mem
31 #
32 # @mem-be-parity: Byte enable parity or other byte enable errors on
33 # CXL.mem.
34 #
35 # @mem-data-ecc: Data ECC error on CXL.mem.
36 #
37 # @reinit-threshold: REINIT threshold hit.
38 #
39 # @rsvd-encoding: Received unrecognized encoding.
40 #
41 # @poison-received: Received poison from the peer.
42 #
43 # @receiver-overflow: Buffer overflows (first 3 bits of header log
44 # indicate which)
45 #
46 # @internal: Component specific error
47 #
48 # @cxl-ide-tx: Integrity and data encryption tx error.
49 #
50 # @cxl-ide-rx: Integrity and data encryption rx error.
51 #
52 # Since: 8.0
53 ##
54
55 { 'enum': 'CxlUncorErrorType',
56 'data': ['cache-data-parity',
57 'cache-address-parity',
58 'cache-be-parity',
59 'cache-data-ecc',
60 'mem-data-parity',
61 'mem-address-parity',
62 'mem-be-parity',
63 'mem-data-ecc',
64 'reinit-threshold',
65 'rsvd-encoding',
66 'poison-received',
67 'receiver-overflow',
68 'internal',
69 'cxl-ide-tx',
70 'cxl-ide-rx'
71 ]
72 }
73
74 ##
75 # @CXLUncorErrorRecord:
76 #
77 # Record of a single error including header log.
78 #
79 # @type: Type of error
80 #
81 # @header: 16 DWORD of header.
82 #
83 # Since: 8.0
84 ##
85 { 'struct': 'CXLUncorErrorRecord',
86 'data': {
87 'type': 'CxlUncorErrorType',
88 'header': [ 'uint32' ]
89 }
90 }
91
92 ##
93 # @cxl-inject-uncorrectable-errors:
94 #
95 # Command to allow injection of multiple errors in one go. This
96 # allows testing of multiple header log handling in the OS.
97 #
98 # @path: CXL Type 3 device canonical QOM path
99 #
100 # @errors: Errors to inject
101 #
102 # Since: 8.0
103 ##
104 { 'command': 'cxl-inject-uncorrectable-errors',
105 'data': { 'path': 'str',
106 'errors': [ 'CXLUncorErrorRecord' ] }}
107
108 ##
109 # @CxlCorErrorType:
110 #
111 # Type of CXL correctable error to inject
112 #
113 # @cache-data-ecc: Data ECC error on CXL.cache
114 #
115 # @mem-data-ecc: Data ECC error on CXL.mem
116 #
117 # @crc-threshold: Component specific and applicable to 68 byte Flit
118 # mode only.
119 #
120 # @cache-poison-received: Received poison from a peer on CXL.cache.
121 #
122 # @mem-poison-received: Received poison from a peer on CXL.mem
123 #
124 # @physical: Received error indication from the physical layer.
125 #
126 # Since: 8.0
127 ##
128 { 'enum': 'CxlCorErrorType',
129 'data': ['cache-data-ecc',
130 'mem-data-ecc',
131 'crc-threshold',
132 'retry-threshold',
133 'cache-poison-received',
134 'mem-poison-received',
135 'physical']
136 }
137
138 ##
139 # @cxl-inject-correctable-error:
140 #
141 # Command to inject a single correctable error. Multiple error
142 # injection of this error type is not interesting as there is no
143 # associated header log. These errors are reported via AER as a
144 # correctable internal error, with additional detail available from
145 # the CXL device.
146 #
147 # @path: CXL Type 3 device canonical QOM path
148 #
149 # @type: Type of error.
150 #
151 # Since: 8.0
152 ##
153 {'command': 'cxl-inject-correctable-error',
154 'data': {'path': 'str', 'type': 'CxlCorErrorType'}}