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1 /*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20
21 #include "qemu-common.h"
22 #include "qom/cpu.h"
23 #include "sysemu/kvm.h"
24 #include "qemu/notify.h"
25 #include "qemu/log.h"
26 #include "qemu/error-report.h"
27 #include "sysemu/sysemu.h"
28
29 bool cpu_exists(int64_t id)
30 {
31 CPUState *cpu;
32
33 CPU_FOREACH(cpu) {
34 CPUClass *cc = CPU_GET_CLASS(cpu);
35
36 if (cc->get_arch_id(cpu) == id) {
37 return true;
38 }
39 }
40 return false;
41 }
42
43 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
44 {
45 char *str, *name, *featurestr;
46 CPUState *cpu;
47 ObjectClass *oc;
48 CPUClass *cc;
49 Error *err = NULL;
50
51 str = g_strdup(cpu_model);
52 name = strtok(str, ",");
53
54 oc = cpu_class_by_name(typename, name);
55 if (oc == NULL) {
56 g_free(str);
57 return NULL;
58 }
59
60 cpu = CPU(object_new(object_class_get_name(oc)));
61 cc = CPU_GET_CLASS(cpu);
62
63 featurestr = strtok(NULL, ",");
64 cc->parse_features(cpu, featurestr, &err);
65 g_free(str);
66 if (err != NULL) {
67 goto out;
68 }
69
70 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
71
72 out:
73 if (err != NULL) {
74 error_report_err(err);
75 object_unref(OBJECT(cpu));
76 return NULL;
77 }
78
79 return cpu;
80 }
81
82 bool cpu_paging_enabled(const CPUState *cpu)
83 {
84 CPUClass *cc = CPU_GET_CLASS(cpu);
85
86 return cc->get_paging_enabled(cpu);
87 }
88
89 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
90 {
91 return false;
92 }
93
94 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
95 Error **errp)
96 {
97 CPUClass *cc = CPU_GET_CLASS(cpu);
98
99 cc->get_memory_mapping(cpu, list, errp);
100 }
101
102 static void cpu_common_get_memory_mapping(CPUState *cpu,
103 MemoryMappingList *list,
104 Error **errp)
105 {
106 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
107 }
108
109 void cpu_reset_interrupt(CPUState *cpu, int mask)
110 {
111 cpu->interrupt_request &= ~mask;
112 }
113
114 void cpu_exit(CPUState *cpu)
115 {
116 cpu->exit_request = 1;
117 /* Ensure cpu_exec will see the exit request after TCG has exited. */
118 smp_wmb();
119 cpu->tcg_exit_req = 1;
120 }
121
122 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
123 void *opaque)
124 {
125 CPUClass *cc = CPU_GET_CLASS(cpu);
126
127 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
128 }
129
130 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
131 CPUState *cpu, void *opaque)
132 {
133 return -1;
134 }
135
136 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
137 int cpuid, void *opaque)
138 {
139 CPUClass *cc = CPU_GET_CLASS(cpu);
140
141 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
142 }
143
144 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
145 CPUState *cpu, int cpuid,
146 void *opaque)
147 {
148 return -1;
149 }
150
151 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
152 void *opaque)
153 {
154 CPUClass *cc = CPU_GET_CLASS(cpu);
155
156 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
157 }
158
159 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
160 CPUState *cpu, void *opaque)
161 {
162 return -1;
163 }
164
165 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
166 int cpuid, void *opaque)
167 {
168 CPUClass *cc = CPU_GET_CLASS(cpu);
169
170 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
171 }
172
173 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
174 CPUState *cpu, int cpuid,
175 void *opaque)
176 {
177 return -1;
178 }
179
180
181 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
182 {
183 return 0;
184 }
185
186 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
187 {
188 return 0;
189 }
190
191 bool target_words_bigendian(void);
192 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
193 {
194 return target_words_bigendian();
195 }
196
197 static void cpu_common_noop(CPUState *cpu)
198 {
199 }
200
201 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
202 {
203 return false;
204 }
205
206 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
207 int flags)
208 {
209 CPUClass *cc = CPU_GET_CLASS(cpu);
210
211 if (cc->dump_state) {
212 cpu_synchronize_state(cpu);
213 cc->dump_state(cpu, f, cpu_fprintf, flags);
214 }
215 }
216
217 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
218 int flags)
219 {
220 CPUClass *cc = CPU_GET_CLASS(cpu);
221
222 if (cc->dump_statistics) {
223 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
224 }
225 }
226
227 void cpu_reset(CPUState *cpu)
228 {
229 CPUClass *klass = CPU_GET_CLASS(cpu);
230
231 if (klass->reset != NULL) {
232 (*klass->reset)(cpu);
233 }
234 }
235
236 static void cpu_common_reset(CPUState *cpu)
237 {
238 CPUClass *cc = CPU_GET_CLASS(cpu);
239
240 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
241 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
242 log_cpu_state(cpu, cc->reset_dump_flags);
243 }
244
245 cpu->interrupt_request = 0;
246 cpu->current_tb = NULL;
247 cpu->halted = 0;
248 cpu->mem_io_pc = 0;
249 cpu->mem_io_vaddr = 0;
250 cpu->icount_extra = 0;
251 cpu->icount_decr.u32 = 0;
252 cpu->can_do_io = 1;
253 cpu->exception_index = -1;
254 cpu->crash_occurred = false;
255 memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
256 }
257
258 static bool cpu_common_has_work(CPUState *cs)
259 {
260 return false;
261 }
262
263 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
264 {
265 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
266
267 return cc->class_by_name(cpu_model);
268 }
269
270 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
271 {
272 return NULL;
273 }
274
275 static void cpu_common_parse_features(CPUState *cpu, char *features,
276 Error **errp)
277 {
278 char *featurestr; /* Single "key=value" string being parsed */
279 char *val;
280 Error *err = NULL;
281
282 featurestr = features ? strtok(features, ",") : NULL;
283
284 while (featurestr) {
285 val = strchr(featurestr, '=');
286 if (val) {
287 *val = 0;
288 val++;
289 object_property_parse(OBJECT(cpu), val, featurestr, &err);
290 if (err) {
291 error_propagate(errp, err);
292 return;
293 }
294 } else {
295 error_setg(errp, "Expected key=value format, found %s.",
296 featurestr);
297 return;
298 }
299 featurestr = strtok(NULL, ",");
300 }
301 }
302
303 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
304 {
305 CPUState *cpu = CPU(dev);
306
307 if (dev->hotplugged) {
308 cpu_synchronize_post_init(cpu);
309 cpu_resume(cpu);
310 }
311 }
312
313 static void cpu_common_initfn(Object *obj)
314 {
315 CPUState *cpu = CPU(obj);
316 CPUClass *cc = CPU_GET_CLASS(obj);
317
318 cpu->cpu_index = -1;
319 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
320 qemu_mutex_init(&cpu->work_mutex);
321 QTAILQ_INIT(&cpu->breakpoints);
322 QTAILQ_INIT(&cpu->watchpoints);
323 }
324
325 static void cpu_common_finalize(Object *obj)
326 {
327 cpu_exec_exit(CPU(obj));
328 }
329
330 static int64_t cpu_common_get_arch_id(CPUState *cpu)
331 {
332 return cpu->cpu_index;
333 }
334
335 static void cpu_class_init(ObjectClass *klass, void *data)
336 {
337 DeviceClass *dc = DEVICE_CLASS(klass);
338 CPUClass *k = CPU_CLASS(klass);
339
340 k->class_by_name = cpu_common_class_by_name;
341 k->parse_features = cpu_common_parse_features;
342 k->reset = cpu_common_reset;
343 k->get_arch_id = cpu_common_get_arch_id;
344 k->has_work = cpu_common_has_work;
345 k->get_paging_enabled = cpu_common_get_paging_enabled;
346 k->get_memory_mapping = cpu_common_get_memory_mapping;
347 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
348 k->write_elf32_note = cpu_common_write_elf32_note;
349 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
350 k->write_elf64_note = cpu_common_write_elf64_note;
351 k->gdb_read_register = cpu_common_gdb_read_register;
352 k->gdb_write_register = cpu_common_gdb_write_register;
353 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
354 k->debug_excp_handler = cpu_common_noop;
355 k->cpu_exec_enter = cpu_common_noop;
356 k->cpu_exec_exit = cpu_common_noop;
357 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
358 dc->realize = cpu_common_realizefn;
359 /*
360 * Reason: CPUs still need special care by board code: wiring up
361 * IRQs, adding reset handlers, halting non-first CPUs, ...
362 */
363 dc->cannot_instantiate_with_device_add_yet = true;
364 }
365
366 static const TypeInfo cpu_type_info = {
367 .name = TYPE_CPU,
368 .parent = TYPE_DEVICE,
369 .instance_size = sizeof(CPUState),
370 .instance_init = cpu_common_initfn,
371 .instance_finalize = cpu_common_finalize,
372 .abstract = true,
373 .class_size = sizeof(CPUClass),
374 .class_init = cpu_class_init,
375 };
376
377 static void cpu_register_types(void)
378 {
379 type_register_static(&cpu_type_info);
380 }
381
382 type_init(cpu_register_types)