qom/cpu.c

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "qapi/error.h"
  23 #include "qemu-common.h"
  24 #include "qom/cpu.h"
  25 #include "sysemu/hw_accel.h"
  26 #include "qemu/notify.h"
  27 #include "qemu/log.h"
  28 #include "exec/log.h"
  29 #include "exec/cpu-common.h"
  30 #include "qemu/error-report.h"
  31 #include "sysemu/sysemu.h"
  32 #include "hw/qdev-properties.h"
  33 #include "trace-root.h"
  34
  35 CPUInterruptHandler cpu_interrupt_handler;
  36
  37 CPUState *cpu_by_arch_id(int64_t id)
  38 {
  39     CPUState *cpu;
  40
  41     CPU_FOREACH(cpu) {
  42         CPUClass *cc = CPU_GET_CLASS(cpu);
  43
  44         if (cc->get_arch_id(cpu) == id) {
  45             return cpu;
  46         }
  47     }
  48     return NULL;
  49 }
  50
  51 bool cpu_exists(int64_t id)
  52 {
  53     return !!cpu_by_arch_id(id);
  54 }
  55
  56 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
  57 {
  58     CPUState *cpu = NULL;
  59     ObjectClass *oc;
  60     CPUClass *cc;
  61     Error *err = NULL;
  62     gchar **model_pieces;
  63
  64     model_pieces = g_strsplit(cpu_model, ",", 2);
  65
  66     oc = cpu_class_by_name(typename, model_pieces[0]);
  67     if (oc == NULL) {
  68         g_strfreev(model_pieces);
  69         return NULL;
  70     }
  71
  72     cc = CPU_CLASS(oc);
  73     /* TODO: all callers of cpu_generic_init() need to be converted to
  74      * call parse_features() only once, before calling cpu_generic_init().
  75      */
  76     cc->parse_features(object_class_get_name(oc), model_pieces[1], &err);
  77     g_strfreev(model_pieces);
  78     if (err != NULL) {
  79         goto out;
  80     }
  81
  82     cpu = CPU(object_new(object_class_get_name(oc)));
  83     object_property_set_bool(OBJECT(cpu), true, "realized", &err);
  84
  85 out:
  86     if (err != NULL) {
  87         error_report_err(err);
  88         object_unref(OBJECT(cpu));
  89         return NULL;
  90     }
  91
  92     return cpu;
  93 }
  94
  95 bool cpu_paging_enabled(const CPUState *cpu)
  96 {
  97     CPUClass *cc = CPU_GET_CLASS(cpu);
  98
  99     return cc->get_paging_enabled(cpu);
 100 }
 101
 102 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
 103 {
 104     return false;
 105 }
 106
 107 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 108                             Error **errp)
 109 {
 110     CPUClass *cc = CPU_GET_CLASS(cpu);
 111
 112     cc->get_memory_mapping(cpu, list, errp);
 113 }
 114
 115 static void cpu_common_get_memory_mapping(CPUState *cpu,
 116                                           MemoryMappingList *list,
 117                                           Error **errp)
 118 {
 119     error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
 120 }
 121
 122 /* Resetting the IRQ comes from across the code base so we take the
 123  * BQL here if we need to.  cpu_interrupt assumes it is held.*/
 124 void cpu_reset_interrupt(CPUState *cpu, int mask)
 125 {
 126     bool need_lock = !qemu_mutex_iothread_locked();
 127
 128     if (need_lock) {
 129         qemu_mutex_lock_iothread();
 130     }
 131     cpu->interrupt_request &= ~mask;
 132     if (need_lock) {
 133         qemu_mutex_unlock_iothread();
 134     }
 135 }
 136
 137 void cpu_exit(CPUState *cpu)
 138 {
 139     atomic_set(&cpu->exit_request, 1);
 140     /* Ensure cpu_exec will see the exit request after TCG has exited.  */
 141     smp_wmb();
 142     atomic_set(&cpu->icount_decr.u16.high, -1);
 143 }
 144
 145 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 146                              void *opaque)
 147 {
 148     CPUClass *cc = CPU_GET_CLASS(cpu);
 149
 150     return (*cc->write_elf32_qemunote)(f, cpu, opaque);
 151 }
 152
 153 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
 154                                            CPUState *cpu, void *opaque)
 155 {
 156     return 0;
 157 }
 158
 159 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 160                          int cpuid, void *opaque)
 161 {
 162     CPUClass *cc = CPU_GET_CLASS(cpu);
 163
 164     return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
 165 }
 166
 167 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
 168                                        CPUState *cpu, int cpuid,
 169                                        void *opaque)
 170 {
 171     return -1;
 172 }
 173
 174 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 175                              void *opaque)
 176 {
 177     CPUClass *cc = CPU_GET_CLASS(cpu);
 178
 179     return (*cc->write_elf64_qemunote)(f, cpu, opaque);
 180 }
 181
 182 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
 183                                            CPUState *cpu, void *opaque)
 184 {
 185     return 0;
 186 }
 187
 188 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 189                          int cpuid, void *opaque)
 190 {
 191     CPUClass *cc = CPU_GET_CLASS(cpu);
 192
 193     return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
 194 }
 195
 196 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
 197                                        CPUState *cpu, int cpuid,
 198                                        void *opaque)
 199 {
 200     return -1;
 201 }
 202
 203
 204 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
 205 {
 206     return 0;
 207 }
 208
 209 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
 210 {
 211     return 0;
 212 }
 213
 214 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
 215 {
 216     /* If no extra check is required, QEMU watchpoint match can be considered
 217      * as an architectural match.
 218      */
 219     return true;
 220 }
 221
 222 bool target_words_bigendian(void);
 223 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
 224 {
 225     return target_words_bigendian();
 226 }
 227
 228 static void cpu_common_noop(CPUState *cpu)
 229 {
 230 }
 231
 232 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
 233 {
 234     return false;
 235 }
 236
 237 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
 238 {
 239     CPUClass *cc = CPU_GET_CLASS(cpu);
 240     GuestPanicInformation *res = NULL;
 241
 242     if (cc->get_crash_info) {
 243         res = cc->get_crash_info(cpu);
 244     }
 245     return res;
 246 }
 247
 248 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 249                     int flags)
 250 {
 251     CPUClass *cc = CPU_GET_CLASS(cpu);
 252
 253     if (cc->dump_state) {
 254         cpu_synchronize_state(cpu);
 255         cc->dump_state(cpu, f, cpu_fprintf, flags);
 256     }
 257 }
 258
 259 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 260                          int flags)
 261 {
 262     CPUClass *cc = CPU_GET_CLASS(cpu);
 263
 264     if (cc->dump_statistics) {
 265         cc->dump_statistics(cpu, f, cpu_fprintf, flags);
 266     }
 267 }
 268
 269 void cpu_reset(CPUState *cpu)
 270 {
 271     CPUClass *klass = CPU_GET_CLASS(cpu);
 272
 273     if (klass->reset != NULL) {
 274         (*klass->reset)(cpu);
 275     }
 276
 277     trace_guest_cpu_reset(cpu);
 278 }
 279
 280 static void cpu_common_reset(CPUState *cpu)
 281 {
 282     CPUClass *cc = CPU_GET_CLASS(cpu);
 283
 284     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
 285         qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
 286         log_cpu_state(cpu, cc->reset_dump_flags);
 287     }
 288
 289     cpu->interrupt_request = 0;
 290     cpu->halted = 0;
 291     cpu->mem_io_pc = 0;
 292     cpu->mem_io_vaddr = 0;
 293     cpu->icount_extra = 0;
 294     cpu->icount_decr.u32 = 0;
 295     cpu->can_do_io = 1;
 296     cpu->exception_index = -1;
 297     cpu->crash_occurred = false;
 298
 299     if (tcg_enabled()) {
 300         cpu_tb_jmp_cache_clear(cpu);
 301
 302         tcg_flush_softmmu_tlb(cpu);
 303     }
 304 }
 305
 306 static bool cpu_common_has_work(CPUState *cs)
 307 {
 308     return false;
 309 }
 310
 311 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
 312 {
 313     CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
 314
 315     return cc->class_by_name(cpu_model);
 316 }
 317
 318 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
 319 {
 320     return NULL;
 321 }
 322
 323 static void cpu_common_parse_features(const char *typename, char *features,
 324                                       Error **errp)
 325 {
 326     char *featurestr; /* Single "key=value" string being parsed */
 327     char *val;
 328     static bool cpu_globals_initialized;
 329
 330     /* TODO: all callers of ->parse_features() need to be changed to
 331      * call it only once, so we can remove this check (or change it
 332      * to assert(!cpu_globals_initialized).
 333      * Current callers of ->parse_features() are:
 334      * - cpu_generic_init()
 335      */
 336     if (cpu_globals_initialized) {
 337         return;
 338     }
 339     cpu_globals_initialized = true;
 340
 341     featurestr = features ? strtok(features, ",") : NULL;
 342
 343     while (featurestr) {
 344         val = strchr(featurestr, '=');
 345         if (val) {
 346             GlobalProperty *prop = g_new0(typeof(*prop), 1);
 347             *val = 0;
 348             val++;
 349             prop->driver = typename;
 350             prop->property = g_strdup(featurestr);
 351             prop->value = g_strdup(val);
 352             prop->errp = &error_fatal;
 353             qdev_prop_register_global(prop);
 354         } else {
 355             error_setg(errp, "Expected key=value format, found %s.",
 356                        featurestr);
 357             return;
 358         }
 359         featurestr = strtok(NULL, ",");
 360     }
 361 }
 362
 363 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
 364 {
 365     CPUState *cpu = CPU(dev);
 366
 367     if (dev->hotplugged) {
 368         cpu_synchronize_post_init(cpu);
 369         cpu_resume(cpu);
 370     }
 371
 372     /* NOTE: latest generic point where the cpu is fully realized */
 373     trace_init_vcpu(cpu);
 374 }
 375
 376 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
 377 {
 378     CPUState *cpu = CPU(dev);
 379     /* NOTE: latest generic point before the cpu is fully unrealized */
 380     trace_fini_vcpu(cpu);
 381     cpu_exec_unrealizefn(cpu);
 382 }
 383
 384 static void cpu_common_initfn(Object *obj)
 385 {
 386     CPUState *cpu = CPU(obj);
 387     CPUClass *cc = CPU_GET_CLASS(obj);
 388
 389     cpu->cpu_index = UNASSIGNED_CPU_INDEX;
 390     cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
 391     /* *-user doesn't have configurable SMP topology */
 392     /* the default value is changed by qemu_init_vcpu() for softmmu */
 393     cpu->nr_cores = 1;
 394     cpu->nr_threads = 1;
 395
 396     qemu_mutex_init(&cpu->work_mutex);
 397     QTAILQ_INIT(&cpu->breakpoints);
 398     QTAILQ_INIT(&cpu->watchpoints);
 399
 400     cpu_exec_initfn(cpu);
 401 }
 402
 403 static void cpu_common_finalize(Object *obj)
 404 {
 405 }
 406
 407 static int64_t cpu_common_get_arch_id(CPUState *cpu)
 408 {
 409     return cpu->cpu_index;
 410 }
 411
 412 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
 413 {
 414     return addr;
 415 }
 416
 417 static void generic_handle_interrupt(CPUState *cpu, int mask)
 418 {
 419     cpu->interrupt_request |= mask;
 420
 421     if (!qemu_cpu_is_self(cpu)) {
 422         qemu_cpu_kick(cpu);
 423     }
 424 }
 425
 426 CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
 427
 428 static void cpu_class_init(ObjectClass *klass, void *data)
 429 {
 430     DeviceClass *dc = DEVICE_CLASS(klass);
 431     CPUClass *k = CPU_CLASS(klass);
 432
 433     k->class_by_name = cpu_common_class_by_name;
 434     k->parse_features = cpu_common_parse_features;
 435     k->reset = cpu_common_reset;
 436     k->get_arch_id = cpu_common_get_arch_id;
 437     k->has_work = cpu_common_has_work;
 438     k->get_paging_enabled = cpu_common_get_paging_enabled;
 439     k->get_memory_mapping = cpu_common_get_memory_mapping;
 440     k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
 441     k->write_elf32_note = cpu_common_write_elf32_note;
 442     k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
 443     k->write_elf64_note = cpu_common_write_elf64_note;
 444     k->gdb_read_register = cpu_common_gdb_read_register;
 445     k->gdb_write_register = cpu_common_gdb_write_register;
 446     k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
 447     k->debug_excp_handler = cpu_common_noop;
 448     k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
 449     k->cpu_exec_enter = cpu_common_noop;
 450     k->cpu_exec_exit = cpu_common_noop;
 451     k->cpu_exec_interrupt = cpu_common_exec_interrupt;
 452     k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
 453     set_bit(DEVICE_CATEGORY_CPU, dc->categories);
 454     dc->realize = cpu_common_realizefn;
 455     dc->unrealize = cpu_common_unrealizefn;
 456     dc->props = cpu_common_props;
 457     /*
 458      * Reason: CPUs still need special care by board code: wiring up
 459      * IRQs, adding reset handlers, halting non-first CPUs, ...
 460      */
 461     dc->user_creatable = false;
 462 }
 463
 464 static const TypeInfo cpu_type_info = {
 465     .name = TYPE_CPU,
 466     .parent = TYPE_DEVICE,
 467     .instance_size = sizeof(CPUState),
 468     .instance_init = cpu_common_initfn,
 469     .instance_finalize = cpu_common_finalize,
 470     .abstract = true,
 471     .class_size = sizeof(CPUClass),
 472     .class_init = cpu_class_init,
 473 };
 474
 475 static void cpu_register_types(void)
 476 {
 477     type_register_static(&cpu_type_info);
 478 }
 479
 480 type_init(cpu_register_types)