qtest.c

   1 /*
   2  * Test Server
   3  *
   4  * Copyright IBM, Corp. 2011
   5  *
   6  * Authors:
   7  *  Anthony Liguori   <aliguori@us.ibm.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10  * See the COPYING file in the top-level directory.
  11  *
  12  */
  13
  14 #include "qemu/osdep.h"
  15 #include "qapi/error.h"
  16 #include "qemu-common.h"
  17 #include "cpu.h"
  18 #include "sysemu/qtest.h"
  19 #include "hw/qdev.h"
  20 #include "sysemu/char.h"
  21 #include "exec/ioport.h"
  22 #include "exec/memory.h"
  23 #include "hw/irq.h"
  24 #include "sysemu/accel.h"
  25 #include "sysemu/sysemu.h"
  26 #include "sysemu/cpus.h"
  27 #include "qemu/config-file.h"
  28 #include "qemu/option.h"
  29 #include "qemu/error-report.h"
  30 #include "qemu/cutils.h"
  31
  32 #define MAX_IRQ 256
  33
  34 bool qtest_allowed;
  35
  36 static DeviceState *irq_intercept_dev;
  37 static FILE *qtest_log_fp;
  38 static CharDriverState *qtest_chr;
  39 static GString *inbuf;
  40 static int irq_levels[MAX_IRQ];
  41 static qemu_timeval start_time;
  42 static bool qtest_opened;
  43
  44 #define FMT_timeval "%ld.%06ld"
  45
  46 /**
  47  * QTest Protocol
  48  *
  49  * Line based protocol, request/response based.  Server can send async messages
  50  * so clients should always handle many async messages before the response
  51  * comes in.
  52  *
  53  * Valid requests
  54  *
  55  * Clock management:
  56  *
  57  * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL.  qtest commands
  58  * let you adjust the value of the clock (monotonically).  All the commands
  59  * return the current value of the clock in nanoseconds.
  60  *
  61  *  > clock_step
  62  *  < OK VALUE
  63  *
  64  *     Advance the clock to the next deadline.  Useful when waiting for
  65  *     asynchronous events.
  66  *
  67  *  > clock_step NS
  68  *  < OK VALUE
  69  *
  70  *     Advance the clock by NS nanoseconds.
  71  *
  72  *  > clock_set NS
  73  *  < OK VALUE
  74  *
  75  *     Advance the clock to NS nanoseconds (do nothing if it's already past).
  76  *
  77  * PIO and memory access:
  78  *
  79  *  > outb ADDR VALUE
  80  *  < OK
  81  *
  82  *  > outw ADDR VALUE
  83  *  < OK
  84  *
  85  *  > outl ADDR VALUE
  86  *  < OK
  87  *
  88  *  > inb ADDR
  89  *  < OK VALUE
  90  *
  91  *  > inw ADDR
  92  *  < OK VALUE
  93  *
  94  *  > inl ADDR
  95  *  < OK VALUE
  96  *
  97  *  > writeb ADDR VALUE
  98  *  < OK
  99  *
 100  *  > writew ADDR VALUE
 101  *  < OK
 102  *
 103  *  > writel ADDR VALUE
 104  *  < OK
 105  *
 106  *  > writeq ADDR VALUE
 107  *  < OK
 108  *
 109  *  > readb ADDR
 110  *  < OK VALUE
 111  *
 112  *  > readw ADDR
 113  *  < OK VALUE
 114  *
 115  *  > readl ADDR
 116  *  < OK VALUE
 117  *
 118  *  > readq ADDR
 119  *  < OK VALUE
 120  *
 121  *  > read ADDR SIZE
 122  *  < OK DATA
 123  *
 124  *  > write ADDR SIZE DATA
 125  *  < OK
 126  *
 127  *  > b64read ADDR SIZE
 128  *  < OK B64_DATA
 129  *
 130  *  > b64write ADDR SIZE B64_DATA
 131  *  < OK
 132  *
 133  *  > memset ADDR SIZE VALUE
 134  *  < OK
 135  *
 136  * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
 137  * For 'memset' a zero size is permitted and does nothing.
 138  *
 139  * DATA is an arbitrarily long hex number prefixed with '0x'.  If it's smaller
 140  * than the expected size, the value will be zero filled at the end of the data
 141  * sequence.
 142  *
 143  * B64_DATA is an arbitrarily long base64 encoded string.
 144  * If the sizes do not match, the data will be truncated.
 145  *
 146  * IRQ management:
 147  *
 148  *  > irq_intercept_in QOM-PATH
 149  *  < OK
 150  *
 151  *  > irq_intercept_out QOM-PATH
 152  *  < OK
 153  *
 154  * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
 155  * QOM-PATH.  When the pin is triggered, one of the following async messages
 156  * will be printed to the qtest stream:
 157  *
 158  *  IRQ raise NUM
 159  *  IRQ lower NUM
 160  *
 161  * where NUM is an IRQ number.  For the PC, interrupts can be intercepted
 162  * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
 163  * NUM=0 even though it is remapped to GSI 2).
 164  */
 165
 166 static int hex2nib(char ch)
 167 {
 168     if (ch >= '0' && ch <= '9') {
 169         return ch - '0';
 170     } else if (ch >= 'a' && ch <= 'f') {
 171         return 10 + (ch - 'a');
 172     } else if (ch >= 'A' && ch <= 'F') {
 173         return 10 + (ch - 'A');
 174     } else {
 175         return -1;
 176     }
 177 }
 178
 179 static void qtest_get_time(qemu_timeval *tv)
 180 {
 181     qemu_gettimeofday(tv);
 182     tv->tv_sec -= start_time.tv_sec;
 183     tv->tv_usec -= start_time.tv_usec;
 184     if (tv->tv_usec < 0) {
 185         tv->tv_usec += 1000000;
 186         tv->tv_sec -= 1;
 187     }
 188 }
 189
 190 static void qtest_send_prefix(CharDriverState *chr)
 191 {
 192     qemu_timeval tv;
 193
 194     if (!qtest_log_fp || !qtest_opened) {
 195         return;
 196     }
 197
 198     qtest_get_time(&tv);
 199     fprintf(qtest_log_fp, "[S +" FMT_timeval "] ",
 200             (long) tv.tv_sec, (long) tv.tv_usec);
 201 }
 202
 203 static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt, ...)
 204 {
 205     va_list ap;
 206
 207     if (!qtest_log_fp || !qtest_opened) {
 208         return;
 209     }
 210
 211     qtest_send_prefix(NULL);
 212
 213     va_start(ap, fmt);
 214     vfprintf(qtest_log_fp, fmt, ap);
 215     va_end(ap);
 216 }
 217
 218 static void do_qtest_send(CharDriverState *chr, const char *str, size_t len)
 219 {
 220     qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
 221     if (qtest_log_fp && qtest_opened) {
 222         fprintf(qtest_log_fp, "%s", str);
 223     }
 224 }
 225
 226 static void qtest_send(CharDriverState *chr, const char *str)
 227 {
 228     do_qtest_send(chr, str, strlen(str));
 229 }
 230
 231 static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharDriverState *chr,
 232                                            const char *fmt, ...)
 233 {
 234     va_list ap;
 235     gchar *buffer;
 236
 237     va_start(ap, fmt);
 238     buffer = g_strdup_vprintf(fmt, ap);
 239     qtest_send(chr, buffer);
 240     va_end(ap);
 241 }
 242
 243 static void qtest_irq_handler(void *opaque, int n, int level)
 244 {
 245     qemu_irq old_irq = *(qemu_irq *)opaque;
 246     qemu_set_irq(old_irq, level);
 247
 248     if (irq_levels[n] != level) {
 249         CharDriverState *chr = qtest_chr;
 250         irq_levels[n] = level;
 251         qtest_send_prefix(chr);
 252         qtest_sendf(chr, "IRQ %s %d\n",
 253                     level ? "raise" : "lower", n);
 254     }
 255 }
 256
 257 static void qtest_process_command(CharDriverState *chr, gchar **words)
 258 {
 259     const gchar *command;
 260
 261     g_assert(words);
 262
 263     command = words[0];
 264
 265     if (qtest_log_fp) {
 266         qemu_timeval tv;
 267         int i;
 268
 269         qtest_get_time(&tv);
 270         fprintf(qtest_log_fp, "[R +" FMT_timeval "]",
 271                 (long) tv.tv_sec, (long) tv.tv_usec);
 272         for (i = 0; words[i]; i++) {
 273             fprintf(qtest_log_fp, " %s", words[i]);
 274         }
 275         fprintf(qtest_log_fp, "\n");
 276     }
 277
 278     g_assert(command);
 279     if (strcmp(words[0], "irq_intercept_out") == 0
 280         || strcmp(words[0], "irq_intercept_in") == 0) {
 281         DeviceState *dev;
 282         NamedGPIOList *ngl;
 283
 284         g_assert(words[1]);
 285         dev = DEVICE(object_resolve_path(words[1], NULL));
 286         if (!dev) {
 287             qtest_send_prefix(chr);
 288             qtest_send(chr, "FAIL Unknown device\n");
 289             return;
 290         }
 291
 292         if (irq_intercept_dev) {
 293             qtest_send_prefix(chr);
 294             if (irq_intercept_dev != dev) {
 295                 qtest_send(chr, "FAIL IRQ intercept already enabled\n");
 296             } else {
 297                 qtest_send(chr, "OK\n");
 298             }
 299             return;
 300         }
 301
 302         QLIST_FOREACH(ngl, &dev->gpios, node) {
 303             /* We don't support intercept of named GPIOs yet */
 304             if (ngl->name) {
 305                 continue;
 306             }
 307             if (words[0][14] == 'o') {
 308                 int i;
 309                 for (i = 0; i < ngl->num_out; ++i) {
 310                     qemu_irq *disconnected = g_new0(qemu_irq, 1);
 311                     qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
 312                                                       disconnected, i);
 313
 314                     *disconnected = qdev_intercept_gpio_out(dev, icpt,
 315                                                             ngl->name, i);
 316                 }
 317             } else {
 318                 qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
 319                                       ngl->num_in);
 320             }
 321         }
 322         irq_intercept_dev = dev;
 323         qtest_send_prefix(chr);
 324         qtest_send(chr, "OK\n");
 325
 326     } else if (strcmp(words[0], "outb") == 0 ||
 327                strcmp(words[0], "outw") == 0 ||
 328                strcmp(words[0], "outl") == 0) {
 329         unsigned long addr;
 330         unsigned long value;
 331
 332         g_assert(words[1] && words[2]);
 333         g_assert(qemu_strtoul(words[1], NULL, 0, &addr) == 0);
 334         g_assert(qemu_strtoul(words[2], NULL, 0, &value) == 0);
 335         g_assert(addr <= 0xffff);
 336
 337         if (words[0][3] == 'b') {
 338             cpu_outb(addr, value);
 339         } else if (words[0][3] == 'w') {
 340             cpu_outw(addr, value);
 341         } else if (words[0][3] == 'l') {
 342             cpu_outl(addr, value);
 343         }
 344         qtest_send_prefix(chr);
 345         qtest_send(chr, "OK\n");
 346     } else if (strcmp(words[0], "inb") == 0 ||
 347         strcmp(words[0], "inw") == 0 ||
 348         strcmp(words[0], "inl") == 0) {
 349         unsigned long addr;
 350         uint32_t value = -1U;
 351
 352         g_assert(words[1]);
 353         g_assert(qemu_strtoul(words[1], NULL, 0, &addr) == 0);
 354         g_assert(addr <= 0xffff);
 355
 356         if (words[0][2] == 'b') {
 357             value = cpu_inb(addr);
 358         } else if (words[0][2] == 'w') {
 359             value = cpu_inw(addr);
 360         } else if (words[0][2] == 'l') {
 361             value = cpu_inl(addr);
 362         }
 363         qtest_send_prefix(chr);
 364         qtest_sendf(chr, "OK 0x%04x\n", value);
 365     } else if (strcmp(words[0], "writeb") == 0 ||
 366                strcmp(words[0], "writew") == 0 ||
 367                strcmp(words[0], "writel") == 0 ||
 368                strcmp(words[0], "writeq") == 0) {
 369         uint64_t addr;
 370         uint64_t value;
 371
 372         g_assert(words[1] && words[2]);
 373         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 374         g_assert(qemu_strtoull(words[2], NULL, 0, &value) == 0);
 375
 376         if (words[0][5] == 'b') {
 377             uint8_t data = value;
 378             cpu_physical_memory_write(addr, &data, 1);
 379         } else if (words[0][5] == 'w') {
 380             uint16_t data = value;
 381             tswap16s(&data);
 382             cpu_physical_memory_write(addr, &data, 2);
 383         } else if (words[0][5] == 'l') {
 384             uint32_t data = value;
 385             tswap32s(&data);
 386             cpu_physical_memory_write(addr, &data, 4);
 387         } else if (words[0][5] == 'q') {
 388             uint64_t data = value;
 389             tswap64s(&data);
 390             cpu_physical_memory_write(addr, &data, 8);
 391         }
 392         qtest_send_prefix(chr);
 393         qtest_send(chr, "OK\n");
 394     } else if (strcmp(words[0], "readb") == 0 ||
 395                strcmp(words[0], "readw") == 0 ||
 396                strcmp(words[0], "readl") == 0 ||
 397                strcmp(words[0], "readq") == 0) {
 398         uint64_t addr;
 399         uint64_t value = UINT64_C(-1);
 400
 401         g_assert(words[1]);
 402         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 403
 404         if (words[0][4] == 'b') {
 405             uint8_t data;
 406             cpu_physical_memory_read(addr, &data, 1);
 407             value = data;
 408         } else if (words[0][4] == 'w') {
 409             uint16_t data;
 410             cpu_physical_memory_read(addr, &data, 2);
 411             value = tswap16(data);
 412         } else if (words[0][4] == 'l') {
 413             uint32_t data;
 414             cpu_physical_memory_read(addr, &data, 4);
 415             value = tswap32(data);
 416         } else if (words[0][4] == 'q') {
 417             cpu_physical_memory_read(addr, &value, 8);
 418             tswap64s(&value);
 419         }
 420         qtest_send_prefix(chr);
 421         qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
 422     } else if (strcmp(words[0], "read") == 0) {
 423         uint64_t addr, len, i;
 424         uint8_t *data;
 425         char *enc;
 426
 427         g_assert(words[1] && words[2]);
 428         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 429         g_assert(qemu_strtoull(words[2], NULL, 0, &len) == 0);
 430
 431         data = g_malloc(len);
 432         cpu_physical_memory_read(addr, data, len);
 433
 434         enc = g_malloc(2 * len + 1);
 435         for (i = 0; i < len; i++) {
 436             sprintf(&enc[i * 2], "%02x", data[i]);
 437         }
 438
 439         qtest_send_prefix(chr);
 440         qtest_sendf(chr, "OK 0x%s\n", enc);
 441
 442         g_free(data);
 443         g_free(enc);
 444     } else if (strcmp(words[0], "b64read") == 0) {
 445         uint64_t addr, len;
 446         uint8_t *data;
 447         gchar *b64_data;
 448
 449         g_assert(words[1] && words[2]);
 450         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 451         g_assert(qemu_strtoull(words[2], NULL, 0, &len) == 0);
 452
 453         data = g_malloc(len);
 454         cpu_physical_memory_read(addr, data, len);
 455         b64_data = g_base64_encode(data, len);
 456         qtest_send_prefix(chr);
 457         qtest_sendf(chr, "OK %s\n", b64_data);
 458
 459         g_free(data);
 460         g_free(b64_data);
 461     } else if (strcmp(words[0], "write") == 0) {
 462         uint64_t addr, len, i;
 463         uint8_t *data;
 464         size_t data_len;
 465
 466         g_assert(words[1] && words[2] && words[3]);
 467         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 468         g_assert(qemu_strtoull(words[2], NULL, 0, &len) == 0);
 469
 470         data_len = strlen(words[3]);
 471         if (data_len < 3) {
 472             qtest_send(chr, "ERR invalid argument size\n");
 473             return;
 474         }
 475
 476         data = g_malloc(len);
 477         for (i = 0; i < len; i++) {
 478             if ((i * 2 + 4) <= data_len) {
 479                 data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
 480                 data[i] |= hex2nib(words[3][i * 2 + 3]);
 481             } else {
 482                 data[i] = 0;
 483             }
 484         }
 485         cpu_physical_memory_write(addr, data, len);
 486         g_free(data);
 487
 488         qtest_send_prefix(chr);
 489         qtest_send(chr, "OK\n");
 490     } else if (strcmp(words[0], "memset") == 0) {
 491         uint64_t addr, len;
 492         uint8_t *data;
 493         unsigned long pattern;
 494
 495         g_assert(words[1] && words[2] && words[3]);
 496         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 497         g_assert(qemu_strtoull(words[2], NULL, 0, &len) == 0);
 498         g_assert(qemu_strtoul(words[3], NULL, 0, &pattern) == 0);
 499
 500         if (len) {
 501             data = g_malloc(len);
 502             memset(data, pattern, len);
 503             cpu_physical_memory_write(addr, data, len);
 504             g_free(data);
 505         }
 506
 507         qtest_send_prefix(chr);
 508         qtest_send(chr, "OK\n");
 509     }  else if (strcmp(words[0], "b64write") == 0) {
 510         uint64_t addr, len;
 511         uint8_t *data;
 512         size_t data_len;
 513         gsize out_len;
 514
 515         g_assert(words[1] && words[2] && words[3]);
 516         g_assert(qemu_strtoull(words[1], NULL, 0, &addr) == 0);
 517         g_assert(qemu_strtoull(words[2], NULL, 0, &len) == 0);
 518
 519         data_len = strlen(words[3]);
 520         if (data_len < 3) {
 521             qtest_send(chr, "ERR invalid argument size\n");
 522             return;
 523         }
 524
 525         data = g_base64_decode_inplace(words[3], &out_len);
 526         if (out_len != len) {
 527             qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
 528                            "found %zu)\n",
 529                            len, out_len);
 530             out_len = MIN(out_len, len);
 531         }
 532
 533         cpu_physical_memory_write(addr, data, out_len);
 534
 535         qtest_send_prefix(chr);
 536         qtest_send(chr, "OK\n");
 537     } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
 538         int64_t ns;
 539
 540         if (words[1]) {
 541             g_assert(qemu_strtoll(words[1], NULL, 0, &ns) == 0);
 542         } else {
 543             ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
 544         }
 545         qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
 546         qtest_send_prefix(chr);
 547         qtest_sendf(chr, "OK %"PRIi64"\n",
 548                     (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 549     } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
 550         int64_t ns;
 551
 552         g_assert(words[1]);
 553         g_assert(qemu_strtoll(words[1], NULL, 0, &ns) == 0);
 554         qtest_clock_warp(ns);
 555         qtest_send_prefix(chr);
 556         qtest_sendf(chr, "OK %"PRIi64"\n",
 557                     (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 558     } else {
 559         qtest_send_prefix(chr);
 560         qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
 561     }
 562 }
 563
 564 static void qtest_process_inbuf(CharDriverState *chr, GString *inbuf)
 565 {
 566     char *end;
 567
 568     while ((end = strchr(inbuf->str, '\n')) != NULL) {
 569         size_t offset;
 570         GString *cmd;
 571         gchar **words;
 572
 573         offset = end - inbuf->str;
 574
 575         cmd = g_string_new_len(inbuf->str, offset);
 576         g_string_erase(inbuf, 0, offset + 1);
 577
 578         words = g_strsplit(cmd->str, " ", 0);
 579         qtest_process_command(chr, words);
 580         g_strfreev(words);
 581
 582         g_string_free(cmd, TRUE);
 583     }
 584 }
 585
 586 static void qtest_read(void *opaque, const uint8_t *buf, int size)
 587 {
 588     CharDriverState *chr = opaque;
 589
 590     g_string_append_len(inbuf, (const gchar *)buf, size);
 591     qtest_process_inbuf(chr, inbuf);
 592 }
 593
 594 static int qtest_can_read(void *opaque)
 595 {
 596     return 1024;
 597 }
 598
 599 static void qtest_event(void *opaque, int event)
 600 {
 601     int i;
 602
 603     switch (event) {
 604     case CHR_EVENT_OPENED:
 605         /*
 606          * We used to call qemu_system_reset() here, hoping we could
 607          * use the same process for multiple tests that way.  Never
 608          * used.  Injects an extra reset even when it's not used, and
 609          * that can mess up tests, e.g. -boot once.
 610          */
 611         for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
 612             irq_levels[i] = 0;
 613         }
 614         qemu_gettimeofday(&start_time);
 615         qtest_opened = true;
 616         if (qtest_log_fp) {
 617             fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n",
 618                     (long) start_time.tv_sec, (long) start_time.tv_usec);
 619         }
 620         break;
 621     case CHR_EVENT_CLOSED:
 622         qtest_opened = false;
 623         if (qtest_log_fp) {
 624             qemu_timeval tv;
 625             qtest_get_time(&tv);
 626             fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n",
 627                     (long) tv.tv_sec, (long) tv.tv_usec);
 628         }
 629         break;
 630     default:
 631         break;
 632     }
 633 }
 634
 635 static int qtest_init_accel(MachineState *ms)
 636 {
 637     QemuOpts *opts = qemu_opts_create(qemu_find_opts("icount"), NULL, 0,
 638                                       &error_abort);
 639     qemu_opt_set(opts, "shift", "0", &error_abort);
 640     configure_icount(opts, &error_abort);
 641     qemu_opts_del(opts);
 642     return 0;
 643 }
 644
 645 void qtest_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
 646 {
 647     CharDriverState *chr;
 648
 649     chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
 650
 651     if (chr == NULL) {
 652         error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
 653                    qtest_chrdev);
 654         return;
 655     }
 656
 657     if (qtest_log) {
 658         if (strcmp(qtest_log, "none") != 0) {
 659             qtest_log_fp = fopen(qtest_log, "w+");
 660         }
 661     } else {
 662         qtest_log_fp = stderr;
 663     }
 664
 665     qemu_chr_add_handlers(chr, qtest_can_read, qtest_read, qtest_event, chr);
 666     qemu_chr_fe_set_echo(chr, true);
 667
 668     inbuf = g_string_new("");
 669     qtest_chr = chr;
 670 }
 671
 672 bool qtest_driver(void)
 673 {
 674     return qtest_chr;
 675 }
 676
 677 static void qtest_accel_class_init(ObjectClass *oc, void *data)
 678 {
 679     AccelClass *ac = ACCEL_CLASS(oc);
 680     ac->name = "QTest";
 681     ac->available = qtest_available;
 682     ac->init_machine = qtest_init_accel;
 683     ac->allowed = &qtest_allowed;
 684 }
 685
 686 #define TYPE_QTEST_ACCEL ACCEL_CLASS_NAME("qtest")
 687
 688 static const TypeInfo qtest_accel_type = {
 689     .name = TYPE_QTEST_ACCEL,
 690     .parent = TYPE_ACCEL,
 691     .class_init = qtest_accel_class_init,
 692 };
 693
 694 static void qtest_type_init(void)
 695 {
 696     type_register_static(&qtest_accel_type);
 697 }
 698
 699 type_init(qtest_type_init);