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objtool: Add CONFIG_STACK_VALIDATION option
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1 # ==========================================================================
2 # Building
3 # ==========================================================================
4
5 src := $(obj)
6
7 PHONY := __build
8 __build:
9
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
13 obj-y :=
14 obj-m :=
15 lib-y :=
16 lib-m :=
17 always :=
18 targets :=
19 subdir-y :=
20 subdir-m :=
21 EXTRA_AFLAGS :=
22 EXTRA_CFLAGS :=
23 EXTRA_CPPFLAGS :=
24 EXTRA_LDFLAGS :=
25 asflags-y :=
26 ccflags-y :=
27 cppflags-y :=
28 ldflags-y :=
29
30 subdir-asflags-y :=
31 subdir-ccflags-y :=
32
33 # Read auto.conf if it exists, otherwise ignore
34 -include include/config/auto.conf
35
36 include scripts/Kbuild.include
37
38 # For backward compatibility check that these variables do not change
39 save-cflags := $(CFLAGS)
40
41 # The filename Kbuild has precedence over Makefile
42 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44 include $(kbuild-file)
45
46 # If the save-* variables changed error out
47 ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50 endif
51 endif
52
53 include scripts/Makefile.lib
54
55 ifdef host-progs
56 ifneq ($(hostprogs-y),$(host-progs))
57 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
58 hostprogs-y += $(host-progs)
59 endif
60 endif
61
62 # Do not include host rules unless needed
63 ifneq ($(hostprogs-y)$(hostprogs-m),)
64 include scripts/Makefile.host
65 endif
66
67 ifneq ($(KBUILD_SRC),)
68 # Create output directory if not already present
69 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
70
71 # Create directories for object files if directory does not exist
72 # Needed when obj-y := dir/file.o syntax is used
73 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
74 endif
75
76 ifndef obj
77 $(warning kbuild: Makefile.build is included improperly)
78 endif
79
80 # ===========================================================================
81
82 ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
83 lib-target := $(obj)/lib.a
84 endif
85
86 ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
87 builtin-target := $(obj)/built-in.o
88 endif
89
90 modorder-target := $(obj)/modules.order
91
92 # We keep a list of all modules in $(MODVERDIR)
93
94 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
95 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
96 $(subdir-ym) $(always)
97 @:
98
99 # Linus' kernel sanity checking tool
100 ifneq ($(KBUILD_CHECKSRC),0)
101 ifeq ($(KBUILD_CHECKSRC),2)
102 quiet_cmd_force_checksrc = CHECK $<
103 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
104 else
105 quiet_cmd_checksrc = CHECK $<
106 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
107 endif
108 endif
109
110 # Do section mismatch analysis for each module/built-in.o
111 ifdef CONFIG_DEBUG_SECTION_MISMATCH
112 cmd_secanalysis = ; scripts/mod/modpost $@
113 endif
114
115 # Compile C sources (.c)
116 # ---------------------------------------------------------------------------
117
118 # Default is built-in, unless we know otherwise
119 modkern_cflags = \
120 $(if $(part-of-module), \
121 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
122 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
123 quiet_modtag := $(empty) $(empty)
124
125 $(real-objs-m) : part-of-module := y
126 $(real-objs-m:.o=.i) : part-of-module := y
127 $(real-objs-m:.o=.s) : part-of-module := y
128 $(real-objs-m:.o=.lst): part-of-module := y
129
130 $(real-objs-m) : quiet_modtag := [M]
131 $(real-objs-m:.o=.i) : quiet_modtag := [M]
132 $(real-objs-m:.o=.s) : quiet_modtag := [M]
133 $(real-objs-m:.o=.lst): quiet_modtag := [M]
134
135 $(obj-m) : quiet_modtag := [M]
136
137 # Default for not multi-part modules
138 modname = $(basetarget)
139
140 $(multi-objs-m) : modname = $(modname-multi)
141 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
142 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
143 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
144 $(multi-objs-y) : modname = $(modname-multi)
145 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
146 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
147 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
148
149 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
150 cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
151
152 $(obj)/%.s: $(src)/%.c FORCE
153 $(call if_changed_dep,cc_s_c)
154
155 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
156 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
157
158 $(obj)/%.i: $(src)/%.c FORCE
159 $(call if_changed_dep,cc_i_c)
160
161 cmd_gensymtypes = \
162 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
163 $(GENKSYMS) $(if $(1), -T $(2)) \
164 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
165 $(if $(KBUILD_PRESERVE),-p) \
166 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
167
168 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
169 cmd_cc_symtypes_c = \
170 set -e; \
171 $(call cmd_gensymtypes,true,$@) >/dev/null; \
172 test -s $@ || rm -f $@
173
174 $(obj)/%.symtypes : $(src)/%.c FORCE
175 $(call cmd,cc_symtypes_c)
176
177 # C (.c) files
178 # The C file is compiled and updated dependency information is generated.
179 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
180
181 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
182
183 ifndef CONFIG_MODVERSIONS
184 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
185
186 else
187 # When module versioning is enabled the following steps are executed:
188 # o compile a .tmp_<file>.o from <file>.c
189 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
190 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
191 # are done.
192 # o otherwise, we calculate symbol versions using the good old
193 # genksyms on the preprocessed source and postprocess them in a way
194 # that they are usable as a linker script
195 # o generate <file>.o from .tmp_<file>.o using the linker to
196 # replace the unresolved symbols __crc_exported_symbol with
197 # the actual value of the checksum generated by genksyms
198
199 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
200 cmd_modversions = \
201 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
202 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
203 > $(@D)/.tmp_$(@F:.o=.ver); \
204 \
205 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
206 -T $(@D)/.tmp_$(@F:.o=.ver); \
207 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
208 else \
209 mv -f $(@D)/.tmp_$(@F) $@; \
210 fi;
211 endif
212
213 ifdef CONFIG_FTRACE_MCOUNT_RECORD
214 ifdef BUILD_C_RECORDMCOUNT
215 ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
216 RECORDMCOUNT_FLAGS = -w
217 endif
218 # Due to recursion, we must skip empty.o.
219 # The empty.o file is created in the make process in order to determine
220 # the target endianness and word size. It is made before all other C
221 # files, including recordmcount.
222 sub_cmd_record_mcount = \
223 if [ $(@) != "scripts/mod/empty.o" ]; then \
224 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
225 fi;
226 recordmcount_source := $(srctree)/scripts/recordmcount.c \
227 $(srctree)/scripts/recordmcount.h
228 else
229 sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
230 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
231 "$(if $(CONFIG_64BIT),64,32)" \
232 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
233 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
234 "$(if $(part-of-module),1,0)" "$(@)";
235 recordmcount_source := $(srctree)/scripts/recordmcount.pl
236 endif
237 cmd_record_mcount = \
238 if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
239 "$(CC_FLAGS_FTRACE)" ]; then \
240 $(sub_cmd_record_mcount) \
241 fi;
242 endif
243
244 ifdef CONFIG_STACK_VALIDATION
245
246 __objtool_obj := $(objtree)/tools/objtool/objtool
247
248 objtool_args = check
249 ifndef CONFIG_FRAME_POINTER
250 objtool_args += --no-fp
251 endif
252
253 # 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
254 # 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
255 # 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
256 cmd_objtool = $(if $(patsubst y%,, \
257 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
258 $(__objtool_obj) $(objtool_args) "$(@)";)
259 objtool_obj = $(if $(patsubst y%,, \
260 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
261 $(__objtool_obj))
262
263 endif # CONFIG_STACK_VALIDATION
264
265 define rule_cc_o_c
266 $(call echo-cmd,checksrc) $(cmd_checksrc) \
267 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
268 $(cmd_modversions) \
269 $(cmd_objtool) \
270 $(call echo-cmd,record_mcount) \
271 $(cmd_record_mcount) \
272 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
273 $(dot-target).tmp; \
274 rm -f $(depfile); \
275 mv -f $(dot-target).tmp $(dot-target).cmd
276 endef
277
278 define rule_as_o_S
279 $(call echo-cmd,as_o_S) $(cmd_as_o_S); \
280 $(cmd_objtool) \
281 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,as_o_S)' > \
282 $(dot-target).tmp; \
283 rm -f $(depfile); \
284 mv -f $(dot-target).tmp $(dot-target).cmd
285 endef
286
287 # Built-in and composite module parts
288 $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
289 $(call cmd,force_checksrc)
290 $(call if_changed_rule,cc_o_c)
291
292 # Single-part modules are special since we need to mark them in $(MODVERDIR)
293
294 $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
295 $(call cmd,force_checksrc)
296 $(call if_changed_rule,cc_o_c)
297 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
298
299 quiet_cmd_cc_lst_c = MKLST $@
300 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
301 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
302 System.map $(OBJDUMP) > $@
303
304 $(obj)/%.lst: $(src)/%.c FORCE
305 $(call if_changed_dep,cc_lst_c)
306
307 # Compile assembler sources (.S)
308 # ---------------------------------------------------------------------------
309
310 modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
311
312 $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
313 $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
314
315 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
316 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
317
318 $(obj)/%.s: $(src)/%.S FORCE
319 $(call if_changed_dep,as_s_S)
320
321 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
322 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
323
324 $(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
325 $(call if_changed_rule,as_o_S)
326
327 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
328 targets += $(extra-y) $(MAKECMDGOALS) $(always)
329
330 # Linker scripts preprocessor (.lds.S -> .lds)
331 # ---------------------------------------------------------------------------
332 quiet_cmd_cpp_lds_S = LDS $@
333 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
334 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
335
336 $(obj)/%.lds: $(src)/%.lds.S FORCE
337 $(call if_changed_dep,cpp_lds_S)
338
339 # ASN.1 grammar
340 # ---------------------------------------------------------------------------
341 quiet_cmd_asn1_compiler = ASN.1 $@
342 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
343 $(subst .h,.c,$@) $(subst .c,.h,$@)
344
345 .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
346
347 $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
348 $(call cmd,asn1_compiler)
349
350 # Build the compiled-in targets
351 # ---------------------------------------------------------------------------
352
353 # To build objects in subdirs, we need to descend into the directories
354 $(sort $(subdir-obj-y)): $(subdir-ym) ;
355
356 #
357 # Rule to compile a set of .o files into one .o file
358 #
359 ifdef builtin-target
360 quiet_cmd_link_o_target = LD $@
361 # If the list of objects to link is empty, just create an empty built-in.o
362 cmd_link_o_target = $(if $(strip $(obj-y)),\
363 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
364 $(cmd_secanalysis),\
365 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
366
367 $(builtin-target): $(obj-y) FORCE
368 $(call if_changed,link_o_target)
369
370 targets += $(builtin-target)
371 endif # builtin-target
372
373 #
374 # Rule to create modules.order file
375 #
376 # Create commands to either record .ko file or cat modules.order from
377 # a subdirectory
378 modorder-cmds = \
379 $(foreach m, $(modorder), \
380 $(if $(filter %/modules.order, $m), \
381 cat $m;, echo kernel/$m;))
382
383 $(modorder-target): $(subdir-ym) FORCE
384 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
385
386 #
387 # Rule to compile a set of .o files into one .a file
388 #
389 ifdef lib-target
390 quiet_cmd_link_l_target = AR $@
391 cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
392
393 $(lib-target): $(lib-y) FORCE
394 $(call if_changed,link_l_target)
395
396 targets += $(lib-target)
397 endif
398
399 #
400 # Rule to link composite objects
401 #
402 # Composite objects are specified in kbuild makefile as follows:
403 # <composite-object>-objs := <list of .o files>
404 # or
405 # <composite-object>-y := <list of .o files>
406 # or
407 # <composite-object>-m := <list of .o files>
408 # The -m syntax only works if <composite object> is a module
409 link_multi_deps = \
410 $(filter $(addprefix $(obj)/, \
411 $($(subst $(obj)/,,$(@:.o=-objs))) \
412 $($(subst $(obj)/,,$(@:.o=-y))) \
413 $($(subst $(obj)/,,$(@:.o=-m)))), $^)
414
415 quiet_cmd_link_multi-y = LD $@
416 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
417
418 quiet_cmd_link_multi-m = LD [M] $@
419 cmd_link_multi-m = $(cmd_link_multi-y)
420
421 $(multi-used-y): FORCE
422 $(call if_changed,link_multi-y)
423 $(call multi_depend, $(multi-used-y), .o, -objs -y)
424
425 $(multi-used-m): FORCE
426 $(call if_changed,link_multi-m)
427 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
428 $(call multi_depend, $(multi-used-m), .o, -objs -y -m)
429
430 targets += $(multi-used-y) $(multi-used-m)
431
432
433 # Descending
434 # ---------------------------------------------------------------------------
435
436 PHONY += $(subdir-ym)
437 $(subdir-ym):
438 $(Q)$(MAKE) $(build)=$@
439
440 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
441 # ---------------------------------------------------------------------------
442
443 PHONY += FORCE
444
445 FORCE:
446
447 # Read all saved command lines and dependencies for the $(targets) we
448 # may be building above, using $(if_changed{,_dep}). As an
449 # optimization, we don't need to read them if the target does not
450 # exist, we will rebuild anyway in that case.
451
452 targets := $(wildcard $(sort $(targets)))
453 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
454
455 ifneq ($(cmd_files),)
456 include $(cmd_files)
457 endif
458
459 # Declare the contents of the .PHONY variable as phony. We keep that
460 # information in a variable se we can use it in if_changed and friends.
461
462 .PHONY: $(PHONY)