scripts/Makefile.build

   1 # ==========================================================================
   2 # Building
   3 # ==========================================================================
   4
   5 src := $(obj)
   6
   7 PHONY := __build
   8 __build:
   9
  10 # Init all relevant variables used in kbuild files so
  11 # 1) they have correct type
  12 # 2) they do not inherit any value from the environment
  13 obj-y :=
  14 obj-m :=
  15 lib-y :=
  16 lib-m :=
  17 always :=
  18 targets :=
  19 subdir-y :=
  20 subdir-m :=
  21 EXTRA_AFLAGS   :=
  22 EXTRA_CFLAGS   :=
  23 EXTRA_CPPFLAGS :=
  24 EXTRA_LDFLAGS  :=
  25
  26 # Read .config if it exist, otherwise ignore
  27 -include include/config/auto.conf
  28
  29 include scripts/Kbuild.include
  30
  31 # The filename Kbuild has precedence over Makefile
  32 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  33 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
  34
  35 include scripts/Makefile.lib
  36
  37 ifdef host-progs
  38 ifneq ($(hostprogs-y),$(host-progs))
  39 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  40 hostprogs-y += $(host-progs)
  41 endif
  42 endif
  43
  44 # Do not include host rules unles needed
  45 ifneq ($(hostprogs-y)$(hostprogs-m),)
  46 include scripts/Makefile.host
  47 endif
  48
  49 ifneq ($(KBUILD_SRC),)
  50 # Create output directory if not already present
  51 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  52
  53 # Create directories for object files if directory does not exist
  54 # Needed when obj-y := dir/file.o syntax is used
  55 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  56 endif
  57
  58 ifndef obj
  59 $(warning kbuild: Makefile.build is included improperly)
  60 endif
  61
  62 # ===========================================================================
  63
  64 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  65 lib-target := $(obj)/lib.a
  66 endif
  67
  68 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  69 builtin-target := $(obj)/built-in.o
  70 endif
  71
  72 # We keep a list of all modules in $(MODVERDIR)
  73
  74 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  75          $(if $(KBUILD_MODULES),$(obj-m)) \
  76          $(subdir-ym) $(always)
  77         @:
  78
  79 # Linus' kernel sanity checking tool
  80 ifneq ($(KBUILD_CHECKSRC),0)
  81   ifeq ($(KBUILD_CHECKSRC),2)
  82     quiet_cmd_force_checksrc = CHECK   $<
  83           cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  84   else
  85       quiet_cmd_checksrc     = CHECK   $<
  86             cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  87   endif
  88 endif
  89
  90
  91 # Compile C sources (.c)
  92 # ---------------------------------------------------------------------------
  93
  94 # Default is built-in, unless we know otherwise
  95 modkern_cflags := $(CFLAGS_KERNEL)
  96 quiet_modtag := $(empty)   $(empty)
  97
  98 $(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
  99 $(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
 100 $(real-objs-m:.o=.s)  : modkern_cflags := $(CFLAGS_MODULE)
 101 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
 102
 103 $(real-objs-m)        : quiet_modtag := [M]
 104 $(real-objs-m:.o=.i)  : quiet_modtag := [M]
 105 $(real-objs-m:.o=.s)  : quiet_modtag := [M]
 106 $(real-objs-m:.o=.lst): quiet_modtag := [M]
 107
 108 $(obj-m)              : quiet_modtag := [M]
 109
 110 # Default for not multi-part modules
 111 modname = $(basetarget)
 112
 113 $(multi-objs-m)         : modname = $(modname-multi)
 114 $(multi-objs-m:.o=.i)   : modname = $(modname-multi)
 115 $(multi-objs-m:.o=.s)   : modname = $(modname-multi)
 116 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
 117 $(multi-objs-y)         : modname = $(modname-multi)
 118 $(multi-objs-y:.o=.i)   : modname = $(modname-multi)
 119 $(multi-objs-y:.o=.s)   : modname = $(modname-multi)
 120 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
 121
 122 quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
 123 cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
 124
 125 $(obj)/%.s: $(src)/%.c FORCE
 126         $(call if_changed_dep,cc_s_c)
 127
 128 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
 129 cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
 130
 131 $(obj)/%.i: $(src)/%.c FORCE
 132         $(call if_changed_dep,cc_i_c)
 133
 134 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
 135 cmd_cc_symtypes_c          = \
 136                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 137                 | $(GENKSYMS) -T $@ >/dev/null;                         \
 138                 test -s $@ || rm -f $@
 139
 140 $(obj)/%.symtypes : $(src)/%.c FORCE
 141         $(call if_changed_dep,cc_symtypes_c)
 142
 143 # C (.c) files
 144 # The C file is compiled and updated dependency information is generated.
 145 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 146
 147 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
 148
 149 ifndef CONFIG_MODVERSIONS
 150 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
 151
 152 else
 153 # When module versioning is enabled the following steps are executed:
 154 # o compile a .tmp_<file>.o from <file>.c
 155 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
 156 #   not export symbols, we just rename .tmp_<file>.o to <file>.o and
 157 #   are done.
 158 # o otherwise, we calculate symbol versions using the good old
 159 #   genksyms on the preprocessed source and postprocess them in a way
 160 #   that they are usable as a linker script
 161 # o generate <file>.o from .tmp_<file>.o using the linker to
 162 #   replace the unresolved symbols __crc_exported_symbol with
 163 #   the actual value of the checksum generated by genksyms
 164
 165 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
 166 cmd_modversions =                                                       \
 167         if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then     \
 168                 $(CPP) -D__GENKSYMS__ $(c_flags) $<                     \
 169                 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES),                  \
 170                               -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH)   \
 171                 > $(@D)/.tmp_$(@F:.o=.ver);                             \
 172                                                                         \
 173                 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)              \
 174                         -T $(@D)/.tmp_$(@F:.o=.ver);                    \
 175                 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);        \
 176         else                                                            \
 177                 mv -f $(@D)/.tmp_$(@F) $@;                              \
 178         fi;
 179 endif
 180
 181 define rule_cc_o_c
 182         $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
 183         $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
 184         $(cmd_modversions)                                                \
 185         scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
 186                                                       $(dot-target).tmp;  \
 187         rm -f $(depfile);                                                 \
 188         mv -f $(dot-target).tmp $(dot-target).cmd
 189 endef
 190
 191 # Built-in and composite module parts
 192 $(obj)/%.o: $(src)/%.c FORCE
 193         $(call cmd,force_checksrc)
 194         $(call if_changed_rule,cc_o_c)
 195
 196 # Single-part modules are special since we need to mark them in $(MODVERDIR)
 197
 198 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
 199         $(call cmd,force_checksrc)
 200         $(call if_changed_rule,cc_o_c)
 201         @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
 202
 203 quiet_cmd_cc_lst_c = MKLST   $@
 204       cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
 205                      $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
 206                                      System.map $(OBJDUMP) > $@
 207
 208 $(obj)/%.lst: $(src)/%.c FORCE
 209         $(call if_changed_dep,cc_lst_c)
 210
 211 # Compile assembler sources (.S)
 212 # ---------------------------------------------------------------------------
 213
 214 modkern_aflags := $(AFLAGS_KERNEL)
 215
 216 $(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
 217 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
 218
 219 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
 220 cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 221
 222 $(obj)/%.s: $(src)/%.S FORCE
 223         $(call if_changed_dep,as_s_S)
 224
 225 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 226 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 227
 228 $(obj)/%.o: $(src)/%.S FORCE
 229         $(call if_changed_dep,as_o_S)
 230
 231 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
 232 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 233
 234 # Linker scripts preprocessor (.lds.S -> .lds)
 235 # ---------------------------------------------------------------------------
 236 quiet_cmd_cpp_lds_S = LDS     $@
 237       cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
 238
 239 $(obj)/%.lds: $(src)/%.lds.S FORCE
 240         $(call if_changed_dep,cpp_lds_S)
 241
 242 # Build the compiled-in targets
 243 # ---------------------------------------------------------------------------
 244
 245 # To build objects in subdirs, we need to descend into the directories
 246 $(sort $(subdir-obj-y)): $(subdir-ym) ;
 247
 248 #
 249 # Rule to compile a set of .o files into one .o file
 250 #
 251 ifdef builtin-target
 252 quiet_cmd_link_o_target = LD      $@
 253 # If the list of objects to link is empty, just create an empty built-in.o
 254 cmd_link_o_target = $(if $(strip $(obj-y)),\
 255                       $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
 256                       rm -f $@; $(AR) rcs $@)
 257
 258 $(builtin-target): $(obj-y) FORCE
 259         $(call if_changed,link_o_target)
 260
 261 targets += $(builtin-target)
 262 endif # builtin-target
 263
 264 #
 265 # Rule to compile a set of .o files into one .a file
 266 #
 267 ifdef lib-target
 268 quiet_cmd_link_l_target = AR      $@
 269 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
 270
 271 $(lib-target): $(lib-y) FORCE
 272         $(call if_changed,link_l_target)
 273
 274 targets += $(lib-target)
 275 endif
 276
 277 #
 278 # Rule to link composite objects
 279 #
 280 #  Composite objects are specified in kbuild makefile as follows:
 281 #    <composite-object>-objs := <list of .o files>
 282 #  or
 283 #    <composite-object>-y    := <list of .o files>
 284 link_multi_deps =                     \
 285 $(filter $(addprefix $(obj)/,         \
 286 $($(subst $(obj)/,,$(@:.o=-objs)))    \
 287 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
 288
 289 quiet_cmd_link_multi-y = LD      $@
 290 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
 291
 292 quiet_cmd_link_multi-m = LD [M]  $@
 293 cmd_link_multi-m = $(cmd_link_multi-y)
 294
 295 # We would rather have a list of rules like
 296 #       foo.o: $(foo-objs)
 297 # but that's not so easy, so we rather make all composite objects depend
 298 # on the set of all their parts
 299 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
 300         $(call if_changed,link_multi-y)
 301
 302 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
 303         $(call if_changed,link_multi-m)
 304         @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
 305
 306 targets += $(multi-used-y) $(multi-used-m)
 307
 308
 309 # Descending
 310 # ---------------------------------------------------------------------------
 311
 312 PHONY += $(subdir-ym)
 313 $(subdir-ym):
 314         $(Q)$(MAKE) $(build)=$@
 315
 316 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 317 # ---------------------------------------------------------------------------
 318
 319 PHONY += FORCE
 320
 321 FORCE:
 322
 323 # Read all saved command lines and dependencies for the $(targets) we
 324 # may be building above, using $(if_changed{,_dep}). As an
 325 # optimization, we don't need to read them if the target does not
 326 # exist, we will rebuild anyway in that case.
 327
 328 targets := $(wildcard $(sort $(targets)))
 329 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 330
 331 ifneq ($(cmd_files),)
 332   include $(cmd_files)
 333 endif
 334
 335
 336 # Declare the contents of the .PHONY variable as phony.  We keep that
 337 # information in a variable se we can use it in if_changed and friends.
 338
 339 .PHONY: $(PHONY)