scripts/Makefile.build

   1 # ==========================================================================
   2 # Building
   3 # ==========================================================================
   4
   5 src := $(obj)
   6
   7 PHONY := __build
   8 __build:
   9
  10 # Init all relevant variables used in kbuild files so
  11 # 1) they have correct type
  12 # 2) they do not inherit any value from the environment
  13 obj-y :=
  14 obj-m :=
  15 lib-y :=
  16 lib-m :=
  17 always :=
  18 targets :=
  19 subdir-y :=
  20 subdir-m :=
  21 EXTRA_AFLAGS   :=
  22 EXTRA_CFLAGS   :=
  23 EXTRA_CPPFLAGS :=
  24 EXTRA_LDFLAGS  :=
  25 asflags-y  :=
  26 ccflags-y  :=
  27 cppflags-y :=
  28 ldflags-y  :=
  29
  30 subdir-asflags-y :=
  31 subdir-ccflags-y :=
  32
  33 # Read auto.conf if it exists, otherwise ignore
  34 -include include/config/auto.conf
  35
  36 include scripts/Kbuild.include
  37
  38 # For backward compatibility check that these variables do not change
  39 save-cflags := $(CFLAGS)
  40
  41 # The filename Kbuild has precedence over Makefile
  42 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  43 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  44 include $(kbuild-file)
  45
  46 # If the save-* variables changed error out
  47 ifeq ($(KBUILD_NOPEDANTIC),)
  48         ifneq ("$(save-cflags)","$(CFLAGS)")
  49                 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
  50         endif
  51 endif
  52 include scripts/Makefile.lib
  53
  54 ifdef host-progs
  55 ifneq ($(hostprogs-y),$(host-progs))
  56 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  57 hostprogs-y += $(host-progs)
  58 endif
  59 endif
  60
  61 # Do not include host rules unless needed
  62 ifneq ($(hostprogs-y)$(hostprogs-m),)
  63 include scripts/Makefile.host
  64 endif
  65
  66 ifneq ($(KBUILD_SRC),)
  67 # Create output directory if not already present
  68 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  69
  70 # Create directories for object files if directory does not exist
  71 # Needed when obj-y := dir/file.o syntax is used
  72 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  73 endif
  74
  75 ifndef obj
  76 $(warning kbuild: Makefile.build is included improperly)
  77 endif
  78
  79 # ===========================================================================
  80
  81 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  82 lib-target := $(obj)/lib.a
  83 endif
  84
  85 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
  86 builtin-target := $(obj)/built-in.o
  87 endif
  88
  89 modorder-target := $(obj)/modules.order
  90
  91 # We keep a list of all modules in $(MODVERDIR)
  92
  93 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  94          $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  95          $(subdir-ym) $(always)
  96         @:
  97
  98 # Linus' kernel sanity checking tool
  99 ifneq ($(KBUILD_CHECKSRC),0)
 100   ifeq ($(KBUILD_CHECKSRC),2)
 101     quiet_cmd_force_checksrc = CHECK   $<
 102           cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 103   else
 104       quiet_cmd_checksrc     = CHECK   $<
 105             cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 106   endif
 107 endif
 108
 109 # Do section mismatch analysis for each module/built-in.o
 110 ifdef CONFIG_DEBUG_SECTION_MISMATCH
 111   cmd_secanalysis = ; scripts/mod/modpost $@
 112 endif
 113
 114 # Compile C sources (.c)
 115 # ---------------------------------------------------------------------------
 116
 117 # Default is built-in, unless we know otherwise
 118 modkern_cflags =                                          \
 119         $(if $(part-of-module),                           \
 120                 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
 121                 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
 122 quiet_modtag := $(empty)   $(empty)
 123
 124 $(real-objs-m)        : part-of-module := y
 125 $(real-objs-m:.o=.i)  : part-of-module := y
 126 $(real-objs-m:.o=.s)  : part-of-module := y
 127 $(real-objs-m:.o=.lst): part-of-module := y
 128
 129 $(real-objs-m)        : quiet_modtag := [M]
 130 $(real-objs-m:.o=.i)  : quiet_modtag := [M]
 131 $(real-objs-m:.o=.s)  : quiet_modtag := [M]
 132 $(real-objs-m:.o=.lst): quiet_modtag := [M]
 133
 134 $(obj-m)              : quiet_modtag := [M]
 135
 136 # Default for not multi-part modules
 137 modname = $(basetarget)
 138
 139 $(multi-objs-m)         : modname = $(modname-multi)
 140 $(multi-objs-m:.o=.i)   : modname = $(modname-multi)
 141 $(multi-objs-m:.o=.s)   : modname = $(modname-multi)
 142 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
 143 $(multi-objs-y)         : modname = $(modname-multi)
 144 $(multi-objs-y:.o=.i)   : modname = $(modname-multi)
 145 $(multi-objs-y:.o=.s)   : modname = $(modname-multi)
 146 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
 147
 148 quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
 149 cmd_cc_s_c       = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
 150
 151 $(obj)/%.s: $(src)/%.c FORCE
 152         $(call if_changed_dep,cc_s_c)
 153
 154 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
 155 cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
 156
 157 $(obj)/%.i: $(src)/%.c FORCE
 158         $(call if_changed_dep,cc_i_c)
 159
 160 cmd_gensymtypes =                                                           \
 161     $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
 162     $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH)                              \
 163      $(if $(KBUILD_PRESERVE),-p)                                            \
 164      -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
 165
 166 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
 167 cmd_cc_symtypes_c =                                                         \
 168     set -e;                                                                 \
 169     $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
 170     test -s $@ || rm -f $@
 171
 172 $(obj)/%.symtypes : $(src)/%.c FORCE
 173         $(call cmd,cc_symtypes_c)
 174
 175 # C (.c) files
 176 # The C file is compiled and updated dependency information is generated.
 177 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 178
 179 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
 180
 181 ifndef CONFIG_MODVERSIONS
 182 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
 183
 184 else
 185 # When module versioning is enabled the following steps are executed:
 186 # o compile a .tmp_<file>.o from <file>.c
 187 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
 188 #   not export symbols, we just rename .tmp_<file>.o to <file>.o and
 189 #   are done.
 190 # o otherwise, we calculate symbol versions using the good old
 191 #   genksyms on the preprocessed source and postprocess them in a way
 192 #   that they are usable as a linker script
 193 # o generate <file>.o from .tmp_<file>.o using the linker to
 194 #   replace the unresolved symbols __crc_exported_symbol with
 195 #   the actual value of the checksum generated by genksyms
 196
 197 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
 198 cmd_modversions =                                                               \
 199         if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then             \
 200                 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))    \
 201                     > $(@D)/.tmp_$(@F:.o=.ver);                                 \
 202                                                                                 \
 203                 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)                      \
 204                         -T $(@D)/.tmp_$(@F:.o=.ver);                            \
 205                 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);                \
 206         else                                                                    \
 207                 mv -f $(@D)/.tmp_$(@F) $@;                                      \
 208         fi;
 209 endif
 210
 211 ifdef CONFIG_FTRACE_MCOUNT_RECORD
 212 ifdef BUILD_C_RECORDMCOUNT
 213 # Due to recursion, we must skip empty.o.
 214 # The empty.o file is created in the make process in order to determine
 215 #  the target endianness and word size. It is made before all other C
 216 #  files, including recordmcount.
 217 cmd_record_mcount = if [ $(@) != "scripts/mod/empty.o" ]; then                  \
 218                         $(objtree)/scripts/recordmcount "$(@)";                 \
 219                     fi;
 220 else
 221 cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
 222         "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
 223         "$(if $(CONFIG_64BIT),64,32)" \
 224         "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
 225         "$(if $(part-of-module),1,0)" "$(@)";
 226 endif
 227 endif
 228
 229 define rule_cc_o_c
 230         $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
 231         $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
 232         $(cmd_modversions)                                                \
 233         $(call echo-cmd,record_mcount)                                    \
 234         $(cmd_record_mcount)                                              \
 235         scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
 236                                                       $(dot-target).tmp;  \
 237         rm -f $(depfile);                                                 \
 238         mv -f $(dot-target).tmp $(dot-target).cmd
 239 endef
 240
 241 # Built-in and composite module parts
 242 $(obj)/%.o: $(src)/%.c FORCE
 243         $(call cmd,force_checksrc)
 244         $(call if_changed_rule,cc_o_c)
 245
 246 # Single-part modules are special since we need to mark them in $(MODVERDIR)
 247
 248 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
 249         $(call cmd,force_checksrc)
 250         $(call if_changed_rule,cc_o_c)
 251         @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
 252
 253 quiet_cmd_cc_lst_c = MKLST   $@
 254       cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
 255                      $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
 256                                      System.map $(OBJDUMP) > $@
 257
 258 $(obj)/%.lst: $(src)/%.c FORCE
 259         $(call if_changed_dep,cc_lst_c)
 260
 261 # Compile assembler sources (.S)
 262 # ---------------------------------------------------------------------------
 263
 264 modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
 265
 266 $(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
 267 $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
 268
 269 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
 270 cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 271
 272 $(obj)/%.s: $(src)/%.S FORCE
 273         $(call if_changed_dep,as_s_S)
 274
 275 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 276 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 277
 278 $(obj)/%.o: $(src)/%.S FORCE
 279         $(call if_changed_dep,as_o_S)
 280
 281 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
 282 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 283
 284 # Linker scripts preprocessor (.lds.S -> .lds)
 285 # ---------------------------------------------------------------------------
 286 quiet_cmd_cpp_lds_S = LDS     $@
 287       cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
 288                              -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
 289
 290 $(obj)/%.lds: $(src)/%.lds.S FORCE
 291         $(call if_changed_dep,cpp_lds_S)
 292
 293 # Build the compiled-in targets
 294 # ---------------------------------------------------------------------------
 295
 296 # To build objects in subdirs, we need to descend into the directories
 297 $(sort $(subdir-obj-y)): $(subdir-ym) ;
 298
 299 #
 300 # Rule to compile a set of .o files into one .o file
 301 #
 302 ifdef builtin-target
 303 quiet_cmd_link_o_target = LD      $@
 304 # If the list of objects to link is empty, just create an empty built-in.o
 305 cmd_link_o_target = $(if $(strip $(obj-y)),\
 306                       $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
 307                       $(cmd_secanalysis),\
 308                       rm -f $@; $(AR) rcs $@)
 309
 310 $(builtin-target): $(obj-y) FORCE
 311         $(call if_changed,link_o_target)
 312
 313 targets += $(builtin-target)
 314 endif # builtin-target
 315
 316 #
 317 # Rule to create modules.order file
 318 #
 319 # Create commands to either record .ko file or cat modules.order from
 320 # a subdirectory
 321 modorder-cmds =                                         \
 322         $(foreach m, $(modorder),                       \
 323                 $(if $(filter %/modules.order, $m),     \
 324                         cat $m;, echo kernel/$m;))
 325
 326 $(modorder-target): $(subdir-ym) FORCE
 327         $(Q)(cat /dev/null; $(modorder-cmds)) > $@
 328
 329 #
 330 # Rule to compile a set of .o files into one .a file
 331 #
 332 ifdef lib-target
 333 quiet_cmd_link_l_target = AR      $@
 334 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
 335
 336 $(lib-target): $(lib-y) FORCE
 337         $(call if_changed,link_l_target)
 338
 339 targets += $(lib-target)
 340 endif
 341
 342 #
 343 # Rule to link composite objects
 344 #
 345 #  Composite objects are specified in kbuild makefile as follows:
 346 #    <composite-object>-objs := <list of .o files>
 347 #  or
 348 #    <composite-object>-y    := <list of .o files>
 349 link_multi_deps =                     \
 350 $(filter $(addprefix $(obj)/,         \
 351 $($(subst $(obj)/,,$(@:.o=-objs)))    \
 352 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
 353
 354 quiet_cmd_link_multi-y = LD      $@
 355 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
 356
 357 quiet_cmd_link_multi-m = LD [M]  $@
 358 cmd_link_multi-m = $(cmd_link_multi-y)
 359
 360 # We would rather have a list of rules like
 361 #       foo.o: $(foo-objs)
 362 # but that's not so easy, so we rather make all composite objects depend
 363 # on the set of all their parts
 364 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
 365         $(call if_changed,link_multi-y)
 366
 367 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
 368         $(call if_changed,link_multi-m)
 369         @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
 370
 371 targets += $(multi-used-y) $(multi-used-m)
 372
 373
 374 # Descending
 375 # ---------------------------------------------------------------------------
 376
 377 PHONY += $(subdir-ym)
 378 $(subdir-ym):
 379         $(Q)$(MAKE) $(build)=$@
 380
 381 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 382 # ---------------------------------------------------------------------------
 383
 384 PHONY += FORCE
 385
 386 FORCE:
 387
 388 # Read all saved command lines and dependencies for the $(targets) we
 389 # may be building above, using $(if_changed{,_dep}). As an
 390 # optimization, we don't need to read them if the target does not
 391 # exist, we will rebuild anyway in that case.
 392
 393 targets := $(wildcard $(sort $(targets)))
 394 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 395
 396 ifneq ($(cmd_files),)
 397   include $(cmd_files)
 398 endif
 399
 400
 401 # Declare the contents of the .PHONY variable as phony.  We keep that
 402 # information in a variable se we can use it in if_changed and friends.
 403
 404 .PHONY: $(PHONY)