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1 # ==========================================================================
2 # Building
3 # ==========================================================================
4
5 src := $(obj)
6
7 .PHONY: __build
8 __build:
9
10 # Read .config if it exist, otherwise ignore
11 -include .config
12
13 # The filename Kbuild has precedence over Makefile
14 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
15 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
16
17 include scripts/Kbuild.include
18 include scripts/Makefile.lib
19
20 ifdef host-progs
21 ifneq ($(hostprogs-y),$(host-progs))
22 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
23 hostprogs-y += $(host-progs)
24 endif
25 endif
26
27 # Do not include host rules unles needed
28 ifneq ($(hostprogs-y)$(hostprogs-m),)
29 include scripts/Makefile.host
30 endif
31
32 ifneq ($(KBUILD_SRC),)
33 # Create output directory if not already present
34 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
35
36 # Create directories for object files if directory does not exist
37 # Needed when obj-y := dir/file.o syntax is used
38 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
39 endif
40
41
42 ifdef EXTRA_TARGETS
43 $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
44 endif
45
46 ifdef build-targets
47 $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
48 endif
49
50 ifdef export-objs
51 $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
52 endif
53
54 ifdef O_TARGET
55 $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
56 endif
57
58 ifdef L_TARGET
59 $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
60 endif
61
62 ifdef list-multi
63 $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
64 endif
65
66 ifndef obj
67 $(warning kbuild: Makefile.build is included improperly)
68 endif
69
70 # ===========================================================================
71
72 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
73 lib-target := $(obj)/lib.a
74 endif
75
76 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
77 builtin-target := $(obj)/built-in.o
78 endif
79
80 # We keep a list of all modules in $(MODVERDIR)
81
82 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
83 $(if $(KBUILD_MODULES),$(obj-m)) \
84 $(subdir-ym) $(always)
85 @:
86
87 # Linus' kernel sanity checking tool
88 ifneq ($(KBUILD_CHECKSRC),0)
89 ifeq ($(KBUILD_CHECKSRC),2)
90 quiet_cmd_force_checksrc = CHECK $<
91 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
92 else
93 quiet_cmd_checksrc = CHECK $<
94 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
95 endif
96 endif
97
98
99 # Compile C sources (.c)
100 # ---------------------------------------------------------------------------
101
102 # Default is built-in, unless we know otherwise
103 modkern_cflags := $(CFLAGS_KERNEL)
104 quiet_modtag := $(empty) $(empty)
105
106 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
107 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
108 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
109 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
110
111 $(real-objs-m) : quiet_modtag := [M]
112 $(real-objs-m:.o=.i) : quiet_modtag := [M]
113 $(real-objs-m:.o=.s) : quiet_modtag := [M]
114 $(real-objs-m:.o=.lst): quiet_modtag := [M]
115
116 $(obj-m) : quiet_modtag := [M]
117
118 # Default for not multi-part modules
119 modname = $(*F)
120
121 $(multi-objs-m) : modname = $(modname-multi)
122 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
123 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
124 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
125 $(multi-objs-y) : modname = $(modname-multi)
126 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
127 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
128 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
129
130 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
131 cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
132
133 %.s: %.c FORCE
134 $(call if_changed_dep,cc_s_c)
135
136 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
137 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
138
139 %.i: %.c FORCE
140 $(call if_changed_dep,cc_i_c)
141
142 # C (.c) files
143 # The C file is compiled and updated dependency information is generated.
144 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
145
146 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
147
148 ifndef CONFIG_MODVERSIONS
149 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
150
151 else
152 # When module versioning is enabled the following steps are executed:
153 # o compile a .tmp_<file>.o from <file>.c
154 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
155 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
156 # are done.
157 # o otherwise, we calculate symbol versions using the good old
158 # genksyms on the preprocessed source and postprocess them in a way
159 # that they are usable as a linker script
160 # o generate <file>.o from .tmp_<file>.o using the linker to
161 # replace the unresolved symbols __crc_exported_symbol with
162 # the actual value of the checksum generated by genksyms
163
164 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
165 cmd_modversions = \
166 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
167 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
168 | $(GENKSYMS) \
169 > $(@D)/.tmp_$(@F:.o=.ver); \
170 \
171 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
172 -T $(@D)/.tmp_$(@F:.o=.ver); \
173 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
174 else \
175 mv -f $(@D)/.tmp_$(@F) $@; \
176 fi;
177 endif
178
179 define rule_cc_o_c
180 $(if $($(quiet)cmd_checksrc),echo ' $($(quiet)cmd_checksrc)';) \
181 $(cmd_checksrc) \
182 $(if $($(quiet)cmd_cc_o_c),echo ' $(subst ','\'',$($(quiet)cmd_cc_o_c))';) \
183 $(cmd_cc_o_c); \
184 $(cmd_modversions) \
185 scripts/basic/fixdep $(depfile) $@ '$(subst ','\'',$(cmd_cc_o_c))' > $(@D)/.$(@F).tmp; \
186 rm -f $(depfile); \
187 mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
188 endef
189
190 # Built-in and composite module parts
191
192 %.o: %.c FORCE
193 $(call cmd,force_checksrc)
194 $(call if_changed_rule,cc_o_c)
195
196 # Single-part modules are special since we need to mark them in $(MODVERDIR)
197
198 $(single-used-m): %.o: %.c FORCE
199 $(call cmd,force_checksrc)
200 $(call if_changed_rule,cc_o_c)
201 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
202
203 quiet_cmd_cc_lst_c = MKLST $@
204 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
205 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
206 System.map $(OBJDUMP) > $@
207
208 %.lst: %.c FORCE
209 $(call if_changed_dep,cc_lst_c)
210
211 # Compile assembler sources (.S)
212 # ---------------------------------------------------------------------------
213
214 modkern_aflags := $(AFLAGS_KERNEL)
215
216 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
217 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
218
219 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
220 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
221
222 %.s: %.S FORCE
223 $(call if_changed_dep,as_s_S)
224
225 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
226 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
227
228 %.o: %.S FORCE
229 $(call if_changed_dep,as_o_S)
230
231 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
232 targets += $(extra-y) $(MAKECMDGOALS) $(always)
233
234 # Linker scripts preprocessor (.lds.S -> .lds)
235 # ---------------------------------------------------------------------------
236 quiet_cmd_cpp_lds_S = LDS $@
237 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
238
239 %.lds: %.lds.S FORCE
240 $(call if_changed_dep,cpp_lds_S)
241
242 # Build the compiled-in targets
243 # ---------------------------------------------------------------------------
244
245 # To build objects in subdirs, we need to descend into the directories
246 $(sort $(subdir-obj-y)): $(subdir-ym) ;
247
248 #
249 # Rule to compile a set of .o files into one .o file
250 #
251 ifdef builtin-target
252 quiet_cmd_link_o_target = LD $@
253 # If the list of objects to link is empty, just create an empty built-in.o
254 cmd_link_o_target = $(if $(strip $(obj-y)),\
255 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
256 rm -f $@; $(AR) rcs $@)
257
258 $(builtin-target): $(obj-y) FORCE
259 $(call if_changed,link_o_target)
260
261 targets += $(builtin-target)
262 endif # builtin-target
263
264 #
265 # Rule to compile a set of .o files into one .a file
266 #
267 ifdef lib-target
268 quiet_cmd_link_l_target = AR $@
269 cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
270
271 $(lib-target): $(lib-y) FORCE
272 $(call if_changed,link_l_target)
273
274 targets += $(lib-target)
275 endif
276
277 #
278 # Rule to link composite objects
279 #
280 # Composite objects are specified in kbuild makefile as follows:
281 # <composite-object>-objs := <list of .o files>
282 # or
283 # <composite-object>-y := <list of .o files>
284 link_multi_deps = \
285 $(filter $(addprefix $(obj)/, \
286 $($(subst $(obj)/,,$(@:.o=-objs))) \
287 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
288
289 quiet_cmd_link_multi-y = LD $@
290 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
291
292 quiet_cmd_link_multi-m = LD [M] $@
293 cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
294
295 # We would rather have a list of rules like
296 # foo.o: $(foo-objs)
297 # but that's not so easy, so we rather make all composite objects depend
298 # on the set of all their parts
299 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
300 $(call if_changed,link_multi-y)
301
302 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
303 $(call if_changed,link_multi-m)
304 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
305
306 targets += $(multi-used-y) $(multi-used-m)
307
308
309 # Descending
310 # ---------------------------------------------------------------------------
311
312 .PHONY: $(subdir-ym)
313 $(subdir-ym):
314 $(Q)$(MAKE) $(build)=$@
315
316 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
317 # ---------------------------------------------------------------------------
318
319 .PHONY: FORCE
320
321 FORCE:
322
323 # Read all saved command lines and dependencies for the $(targets) we
324 # may be building above, using $(if_changed{,_dep}). As an
325 # optimization, we don't need to read them if the target does not
326 # exist, we will rebuild anyway in that case.
327
328 targets := $(wildcard $(sort $(targets)))
329 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
330
331 ifneq ($(cmd_files),)
332 include $(cmd_files)
333 endif