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git.proxmox.com Git - mirror_qemu.git/blob - softmmu_header.h
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #define DATA_TYPE uint64_t
27 #define DATA_TYPE uint32_t
31 #define DATA_TYPE uint16_t
32 #define DATA_STYPE int16_t
36 #define DATA_TYPE uint8_t
37 #define DATA_STYPE int8_t
39 #error unsupported data size
44 #define CPU_MEM_INDEX 0
45 #define MMUSUFFIX _mmu
47 #elif ACCESS_TYPE == 1
49 #define CPU_MEM_INDEX 1
50 #define MMUSUFFIX _mmu
52 #elif ACCESS_TYPE == 2
55 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
56 #elif defined (TARGET_PPC)
57 #define CPU_MEM_INDEX (msr_pr)
59 #define MMUSUFFIX _mmu
61 #elif ACCESS_TYPE == 3
64 #define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
65 #elif defined (TARGET_PPC)
66 #define CPU_MEM_INDEX (msr_pr)
68 #define MMUSUFFIX _cmmu
71 #error invalid ACCESS_TYPE
75 #define RES_TYPE uint64_t
81 DATA_TYPE
REGPARM(1) glue(glue(__ld
, SUFFIX
), MMUSUFFIX
)(unsigned long addr
,
83 void REGPARM(2) glue(glue(__st
, SUFFIX
), MMUSUFFIX
)(unsigned long addr
, DATA_TYPE v
, int is_user
);
85 #if (DATA_SIZE <= 4) && defined(__i386__) && (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
87 static inline RES_TYPE
glue(glue(ld
, USUFFIX
), MEMSUFFIX
)(void *ptr
)
91 asm volatile ("movl %1, %%edx\n"
96 "leal %5(%%edx, %%ebp), %%edx\n"
97 "cmpl (%%edx), %%eax\n"
106 "addl 4(%%edx), %%eax\n"
108 "movzbl (%%eax), %0\n"
110 "movzwl (%%eax), %0\n"
114 #error unsupported size
119 "i" ((CPU_TLB_SIZE
- 1) << 3),
120 "i" (TARGET_PAGE_BITS
- 3),
121 "i" (TARGET_PAGE_MASK
| (DATA_SIZE
- 1)),
122 "m" (*(uint32_t *)offsetof(CPUState
, tlb_read
[CPU_MEM_INDEX
][0].address
)),
124 "m" (*(uint8_t *)&glue(glue(__ld
, SUFFIX
), MMUSUFFIX
))
125 : "%eax", "%ecx", "%edx", "memory", "cc");
130 static inline int glue(glue(lds
, SUFFIX
), MEMSUFFIX
)(void *ptr
)
134 asm volatile ("movl %1, %%edx\n"
139 "leal %5(%%edx, %%ebp), %%edx\n"
140 "cmpl (%%edx), %%eax\n"
151 #error unsupported size
155 "addl 4(%%edx), %%eax\n"
157 "movsbl (%%eax), %0\n"
159 "movswl (%%eax), %0\n"
161 #error unsupported size
166 "i" ((CPU_TLB_SIZE
- 1) << 3),
167 "i" (TARGET_PAGE_BITS
- 3),
168 "i" (TARGET_PAGE_MASK
| (DATA_SIZE
- 1)),
169 "m" (*(uint32_t *)offsetof(CPUState
, tlb_read
[CPU_MEM_INDEX
][0].address
)),
171 "m" (*(uint8_t *)&glue(glue(__ld
, SUFFIX
), MMUSUFFIX
))
172 : "%eax", "%ecx", "%edx", "memory", "cc");
177 static inline void glue(glue(st
, SUFFIX
), MEMSUFFIX
)(void *ptr
, RES_TYPE v
)
179 asm volatile ("movl %0, %%edx\n"
184 "leal %5(%%edx, %%ebp), %%edx\n"
185 "cmpl (%%edx), %%eax\n"
189 "movzbl %b1, %%edx\n"
191 "movzwl %w1, %%edx\n"
195 #error unsupported size
202 "addl 4(%%edx), %%eax\n"
204 "movb %b1, (%%eax)\n"
206 "movw %w1, (%%eax)\n"
210 #error unsupported size
215 /* NOTE: 'q' would be needed as constraint, but we could not use it
218 "i" ((CPU_TLB_SIZE
- 1) << 3),
219 "i" (TARGET_PAGE_BITS
- 3),
220 "i" (TARGET_PAGE_MASK
| (DATA_SIZE
- 1)),
221 "m" (*(uint32_t *)offsetof(CPUState
, tlb_write
[CPU_MEM_INDEX
][0].address
)),
223 "m" (*(uint8_t *)&glue(glue(__st
, SUFFIX
), MMUSUFFIX
))
224 : "%eax", "%ecx", "%edx", "memory", "cc");
229 /* generic load/store macros */
231 static inline RES_TYPE
glue(glue(ld
, USUFFIX
), MEMSUFFIX
)(void *ptr
)
235 unsigned long addr
, physaddr
;
238 addr
= (unsigned long)ptr
;
239 index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
240 is_user
= CPU_MEM_INDEX
;
241 if (__builtin_expect(env
->tlb_read
[is_user
][index
].address
!=
242 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))), 0)) {
243 res
= glue(glue(__ld
, SUFFIX
), MMUSUFFIX
)(addr
, is_user
);
245 physaddr
= addr
+ env
->tlb_read
[is_user
][index
].addend
;
246 res
= glue(glue(ld
, USUFFIX
), _raw
)((uint8_t *)physaddr
);
252 static inline int glue(glue(lds
, SUFFIX
), MEMSUFFIX
)(void *ptr
)
255 unsigned long addr
, physaddr
;
258 addr
= (unsigned long)ptr
;
259 index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
260 is_user
= CPU_MEM_INDEX
;
261 if (__builtin_expect(env
->tlb_read
[is_user
][index
].address
!=
262 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))), 0)) {
263 res
= (DATA_STYPE
)glue(glue(__ld
, SUFFIX
), MMUSUFFIX
)(addr
, is_user
);
265 physaddr
= addr
+ env
->tlb_read
[is_user
][index
].addend
;
266 res
= glue(glue(lds
, SUFFIX
), _raw
)((uint8_t *)physaddr
);
272 /* generic store macro */
274 static inline void glue(glue(st
, SUFFIX
), MEMSUFFIX
)(void *ptr
, RES_TYPE v
)
277 unsigned long addr
, physaddr
;
280 addr
= (unsigned long)ptr
;
281 index
= (addr
>> TARGET_PAGE_BITS
) & (CPU_TLB_SIZE
- 1);
282 is_user
= CPU_MEM_INDEX
;
283 if (__builtin_expect(env
->tlb_write
[is_user
][index
].address
!=
284 (addr
& (TARGET_PAGE_MASK
| (DATA_SIZE
- 1))), 0)) {
285 glue(glue(__st
, SUFFIX
), MMUSUFFIX
)(addr
, v
, is_user
);
287 physaddr
= addr
+ env
->tlb_write
[is_user
][index
].addend
;
288 glue(glue(st
, SUFFIX
), _raw
)((uint8_t *)physaddr
, v
);
295 static inline double glue(ldfq
, MEMSUFFIX
)(void *ptr
)
301 u
.i
= glue(ldq
, MEMSUFFIX
)(ptr
);
305 static inline void glue(stfq
, MEMSUFFIX
)(void *ptr
, double v
)
312 glue(stq
, MEMSUFFIX
)(ptr
, u
.i
);
314 #endif /* DATA_SIZE == 8 */
317 static inline float glue(ldfl
, MEMSUFFIX
)(void *ptr
)
323 u
.i
= glue(ldl
, MEMSUFFIX
)(ptr
);
327 static inline void glue(stfl
, MEMSUFFIX
)(void *ptr
, float v
)
334 glue(stl
, MEMSUFFIX
)(ptr
, u
.i
);
336 #endif /* DATA_SIZE == 4 */