sound/i2c/other/ak4113.c

   1 /*
   2  *  Routines for control of the AK4113 via I2C/4-wire serial interface
   3  *  IEC958 (S/PDIF) receiver by Asahi Kasei
   4  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   5  *  Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
   6  *
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/slab.h>
  25 #include <linux/delay.h>
  26 #include <linux/module.h>
  27 #include <sound/core.h>
  28 #include <sound/control.h>
  29 #include <sound/pcm.h>
  30 #include <sound/ak4113.h>
  31 #include <sound/asoundef.h>
  32 #include <sound/info.h>
  33
  34 MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
  35 MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
  36 MODULE_LICENSE("GPL");
  37
  38 #define AK4113_ADDR                     0x00 /* fixed address */
  39
  40 static void ak4113_stats(struct work_struct *work);
  41 static void ak4113_init_regs(struct ak4113 *chip);
  42
  43
  44 static void reg_write(struct ak4113 *ak4113, unsigned char reg,
  45                 unsigned char val)
  46 {
  47         ak4113->write(ak4113->private_data, reg, val);
  48         if (reg < sizeof(ak4113->regmap))
  49                 ak4113->regmap[reg] = val;
  50 }
  51
  52 static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
  53 {
  54         return ak4113->read(ak4113->private_data, reg);
  55 }
  56
  57 static void snd_ak4113_free(struct ak4113 *chip)
  58 {
  59         atomic_inc(&chip->wq_processing);       /* don't schedule new work */
  60         cancel_delayed_work_sync(&chip->work);
  61         kfree(chip);
  62 }
  63
  64 static int snd_ak4113_dev_free(struct snd_device *device)
  65 {
  66         struct ak4113 *chip = device->device_data;
  67         snd_ak4113_free(chip);
  68         return 0;
  69 }
  70
  71 int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
  72                 ak4113_write_t *write, const unsigned char *pgm,
  73                 void *private_data, struct ak4113 **r_ak4113)
  74 {
  75         struct ak4113 *chip;
  76         int err;
  77         unsigned char reg;
  78         static struct snd_device_ops ops = {
  79                 .dev_free =     snd_ak4113_dev_free,
  80         };
  81
  82         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  83         if (chip == NULL)
  84                 return -ENOMEM;
  85         spin_lock_init(&chip->lock);
  86         chip->card = card;
  87         chip->read = read;
  88         chip->write = write;
  89         chip->private_data = private_data;
  90         INIT_DELAYED_WORK(&chip->work, ak4113_stats);
  91         atomic_set(&chip->wq_processing, 0);
  92         mutex_init(&chip->reinit_mutex);
  93
  94         for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
  95                 chip->regmap[reg] = pgm[reg];
  96         ak4113_init_regs(chip);
  97
  98         chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
  99                         AK4113_CINT | AK4113_STC);
 100         chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
 101         chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
 102         err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
 103         if (err < 0)
 104                 goto __fail;
 105
 106         if (r_ak4113)
 107                 *r_ak4113 = chip;
 108         return 0;
 109
 110 __fail:
 111         snd_ak4113_free(chip);
 112         return err;
 113 }
 114 EXPORT_SYMBOL_GPL(snd_ak4113_create);
 115
 116 void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
 117                 unsigned char mask, unsigned char val)
 118 {
 119         if (reg >= AK4113_WRITABLE_REGS)
 120                 return;
 121         reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
 122 }
 123 EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
 124
 125 static void ak4113_init_regs(struct ak4113 *chip)
 126 {
 127         unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
 128
 129         /* bring the chip to reset state and powerdown state */
 130         reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
 131         udelay(200);
 132         /* release reset, but leave powerdown */
 133         reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
 134         udelay(200);
 135         for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
 136                 reg_write(chip, reg, chip->regmap[reg]);
 137         /* release powerdown, everything is initialized now */
 138         reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
 139 }
 140
 141 void snd_ak4113_reinit(struct ak4113 *chip)
 142 {
 143         if (atomic_inc_return(&chip->wq_processing) == 1)
 144                 cancel_delayed_work_sync(&chip->work);
 145         mutex_lock(&chip->reinit_mutex);
 146         ak4113_init_regs(chip);
 147         mutex_unlock(&chip->reinit_mutex);
 148         /* bring up statistics / event queing */
 149         if (atomic_dec_and_test(&chip->wq_processing))
 150                 schedule_delayed_work(&chip->work, HZ / 10);
 151 }
 152 EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
 153
 154 static unsigned int external_rate(unsigned char rcs1)
 155 {
 156         switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
 157         case AK4113_FS_8000HZ:
 158                 return 8000;
 159         case AK4113_FS_11025HZ:
 160                 return 11025;
 161         case AK4113_FS_16000HZ:
 162                 return 16000;
 163         case AK4113_FS_22050HZ:
 164                 return 22050;
 165         case AK4113_FS_24000HZ:
 166                 return 24000;
 167         case AK4113_FS_32000HZ:
 168                 return 32000;
 169         case AK4113_FS_44100HZ:
 170                 return 44100;
 171         case AK4113_FS_48000HZ:
 172                 return 48000;
 173         case AK4113_FS_64000HZ:
 174                 return 64000;
 175         case AK4113_FS_88200HZ:
 176                 return 88200;
 177         case AK4113_FS_96000HZ:
 178                 return 96000;
 179         case AK4113_FS_176400HZ:
 180                 return 176400;
 181         case AK4113_FS_192000HZ:
 182                 return 192000;
 183         default:
 184                 return 0;
 185         }
 186 }
 187
 188 static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
 189                                     struct snd_ctl_elem_info *uinfo)
 190 {
 191         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 192         uinfo->count = 1;
 193         uinfo->value.integer.min = 0;
 194         uinfo->value.integer.max = LONG_MAX;
 195         return 0;
 196 }
 197
 198 static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
 199                                    struct snd_ctl_elem_value *ucontrol)
 200 {
 201         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 202
 203         spin_lock_irq(&chip->lock);
 204         ucontrol->value.integer.value[0] =
 205                 chip->errors[kcontrol->private_value];
 206         chip->errors[kcontrol->private_value] = 0;
 207         spin_unlock_irq(&chip->lock);
 208         return 0;
 209 }
 210
 211 #define snd_ak4113_in_bit_info          snd_ctl_boolean_mono_info
 212
 213 static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
 214                                  struct snd_ctl_elem_value *ucontrol)
 215 {
 216         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 217         unsigned char reg = kcontrol->private_value & 0xff;
 218         unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
 219         unsigned char inv = (kcontrol->private_value >> 31) & 1;
 220
 221         ucontrol->value.integer.value[0] =
 222                 ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
 223         return 0;
 224 }
 225
 226 static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
 227                               struct snd_ctl_elem_info *uinfo)
 228 {
 229         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 230         uinfo->count = 1;
 231         uinfo->value.integer.min = 0;
 232         uinfo->value.integer.max = 5;
 233         return 0;
 234 }
 235
 236 static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
 237                              struct snd_ctl_elem_value *ucontrol)
 238 {
 239         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 240
 241         ucontrol->value.integer.value[0] =
 242                 (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
 243         return 0;
 244 }
 245
 246 static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
 247                              struct snd_ctl_elem_value *ucontrol)
 248 {
 249         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 250         int change;
 251         u8 old_val;
 252
 253         spin_lock_irq(&chip->lock);
 254         old_val = chip->regmap[AK4113_REG_IO1];
 255         change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
 256         if (change)
 257                 reg_write(chip, AK4113_REG_IO1,
 258                                 (old_val & (~AK4113_IPS(0xff))) |
 259                                 (AK4113_IPS(ucontrol->value.integer.value[0])));
 260         spin_unlock_irq(&chip->lock);
 261         return change;
 262 }
 263
 264 static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
 265                                 struct snd_ctl_elem_info *uinfo)
 266 {
 267         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 268         uinfo->count = 1;
 269         uinfo->value.integer.min = 0;
 270         uinfo->value.integer.max = 192000;
 271         return 0;
 272 }
 273
 274 static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
 275                                struct snd_ctl_elem_value *ucontrol)
 276 {
 277         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 278
 279         ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
 280                                 AK4113_REG_RCS1));
 281         return 0;
 282 }
 283
 284 static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
 285                 struct snd_ctl_elem_info *uinfo)
 286 {
 287         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 288         uinfo->count = 1;
 289         return 0;
 290 }
 291
 292 static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
 293                                 struct snd_ctl_elem_value *ucontrol)
 294 {
 295         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 296         unsigned i;
 297
 298         for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
 299                 ucontrol->value.iec958.status[i] = reg_read(chip,
 300                                 AK4113_REG_RXCSB0 + i);
 301         return 0;
 302 }
 303
 304 static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
 305                 struct snd_ctl_elem_info *uinfo)
 306 {
 307         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 308         uinfo->count = 1;
 309         return 0;
 310 }
 311
 312 static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
 313                                       struct snd_ctl_elem_value *ucontrol)
 314 {
 315         memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
 316         return 0;
 317 }
 318
 319 static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
 320                 struct snd_ctl_elem_info *uinfo)
 321 {
 322         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 323         uinfo->value.integer.min = 0;
 324         uinfo->value.integer.max = 0xffff;
 325         uinfo->count = 4;
 326         return 0;
 327 }
 328
 329 static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
 330                                  struct snd_ctl_elem_value *ucontrol)
 331 {
 332         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 333         unsigned short tmp;
 334
 335         ucontrol->value.integer.value[0] = 0xf8f2;
 336         ucontrol->value.integer.value[1] = 0x4e1f;
 337         tmp = reg_read(chip, AK4113_REG_Pc0) |
 338                 (reg_read(chip, AK4113_REG_Pc1) << 8);
 339         ucontrol->value.integer.value[2] = tmp;
 340         tmp = reg_read(chip, AK4113_REG_Pd0) |
 341                 (reg_read(chip, AK4113_REG_Pd1) << 8);
 342         ucontrol->value.integer.value[3] = tmp;
 343         return 0;
 344 }
 345
 346 static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
 347                 struct snd_ctl_elem_info *uinfo)
 348 {
 349         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 350         uinfo->count = AK4113_REG_QSUB_SIZE;
 351         return 0;
 352 }
 353
 354 static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
 355                                  struct snd_ctl_elem_value *ucontrol)
 356 {
 357         struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
 358         unsigned i;
 359
 360         for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
 361                 ucontrol->value.bytes.data[i] = reg_read(chip,
 362                                 AK4113_REG_QSUB_ADDR + i);
 363         return 0;
 364 }
 365
 366 /* Don't forget to change AK4113_CONTROLS define!!! */
 367 static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
 368 {
 369         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 370         .name =         "IEC958 Parity Errors",
 371         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 372                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 373         .info =         snd_ak4113_in_error_info,
 374         .get =          snd_ak4113_in_error_get,
 375         .private_value = AK4113_PARITY_ERRORS,
 376 },
 377 {
 378         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 379         .name =         "IEC958 V-Bit Errors",
 380         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 381                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 382         .info =         snd_ak4113_in_error_info,
 383         .get =          snd_ak4113_in_error_get,
 384         .private_value = AK4113_V_BIT_ERRORS,
 385 },
 386 {
 387         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 388         .name =         "IEC958 C-CRC Errors",
 389         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 390                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 391         .info =         snd_ak4113_in_error_info,
 392         .get =          snd_ak4113_in_error_get,
 393         .private_value = AK4113_CCRC_ERRORS,
 394 },
 395 {
 396         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 397         .name =         "IEC958 Q-CRC Errors",
 398         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 399                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 400         .info =         snd_ak4113_in_error_info,
 401         .get =          snd_ak4113_in_error_get,
 402         .private_value = AK4113_QCRC_ERRORS,
 403 },
 404 {
 405         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 406         .name =         "IEC958 External Rate",
 407         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 408                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 409         .info =         snd_ak4113_rate_info,
 410         .get =          snd_ak4113_rate_get,
 411 },
 412 {
 413         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 414         .name =         SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
 415         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
 416         .info =         snd_ak4113_spdif_mask_info,
 417         .get =          snd_ak4113_spdif_mask_get,
 418 },
 419 {
 420         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 421         .name =         SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
 422         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 423                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 424         .info =         snd_ak4113_spdif_info,
 425         .get =          snd_ak4113_spdif_get,
 426 },
 427 {
 428         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 429         .name =         "IEC958 Preamble Capture Default",
 430         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 431                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 432         .info =         snd_ak4113_spdif_pinfo,
 433         .get =          snd_ak4113_spdif_pget,
 434 },
 435 {
 436         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 437         .name =         "IEC958 Q-subcode Capture Default",
 438         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 439                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 440         .info =         snd_ak4113_spdif_qinfo,
 441         .get =          snd_ak4113_spdif_qget,
 442 },
 443 {
 444         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 445         .name =         "IEC958 Audio",
 446         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 447                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 448         .info =         snd_ak4113_in_bit_info,
 449         .get =          snd_ak4113_in_bit_get,
 450         .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
 451 },
 452 {
 453         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 454         .name =         "IEC958 Non-PCM Bitstream",
 455         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 456                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 457         .info =         snd_ak4113_in_bit_info,
 458         .get =          snd_ak4113_in_bit_get,
 459         .private_value = (0<<8) | AK4113_REG_RCS1,
 460 },
 461 {
 462         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 463         .name =         "IEC958 DTS Bitstream",
 464         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 465                 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 466         .info =         snd_ak4113_in_bit_info,
 467         .get =          snd_ak4113_in_bit_get,
 468         .private_value = (1<<8) | AK4113_REG_RCS1,
 469 },
 470 {
 471         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
 472         .name =         "AK4113 Input Select",
 473         .access =       SNDRV_CTL_ELEM_ACCESS_READ |
 474                 SNDRV_CTL_ELEM_ACCESS_WRITE,
 475         .info =         snd_ak4113_rx_info,
 476         .get =          snd_ak4113_rx_get,
 477         .put =          snd_ak4113_rx_put,
 478 }
 479 };
 480
 481 static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
 482                 struct snd_info_buffer *buffer)
 483 {
 484         struct ak4113 *ak4113 = entry->private_data;
 485         int reg, val;
 486         /* all ak4113 registers 0x00 - 0x1c */
 487         for (reg = 0; reg < 0x1d; reg++) {
 488                 val = reg_read(ak4113, reg);
 489                 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
 490         }
 491 }
 492
 493 static void snd_ak4113_proc_init(struct ak4113 *ak4113)
 494 {
 495         snd_card_ro_proc_new(ak4113->card, "ak4113", ak4113,
 496                              snd_ak4113_proc_regs_read);
 497 }
 498
 499 int snd_ak4113_build(struct ak4113 *ak4113,
 500                 struct snd_pcm_substream *cap_substream)
 501 {
 502         struct snd_kcontrol *kctl;
 503         unsigned int idx;
 504         int err;
 505
 506         if (snd_BUG_ON(!cap_substream))
 507                 return -EINVAL;
 508         ak4113->substream = cap_substream;
 509         for (idx = 0; idx < AK4113_CONTROLS; idx++) {
 510                 kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
 511                 if (kctl == NULL)
 512                         return -ENOMEM;
 513                 kctl->id.device = cap_substream->pcm->device;
 514                 kctl->id.subdevice = cap_substream->number;
 515                 err = snd_ctl_add(ak4113->card, kctl);
 516                 if (err < 0)
 517                         return err;
 518                 ak4113->kctls[idx] = kctl;
 519         }
 520         snd_ak4113_proc_init(ak4113);
 521         /* trigger workq */
 522         schedule_delayed_work(&ak4113->work, HZ / 10);
 523         return 0;
 524 }
 525 EXPORT_SYMBOL_GPL(snd_ak4113_build);
 526
 527 int snd_ak4113_external_rate(struct ak4113 *ak4113)
 528 {
 529         unsigned char rcs1;
 530
 531         rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
 532         return external_rate(rcs1);
 533 }
 534 EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
 535
 536 int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
 537 {
 538         struct snd_pcm_runtime *runtime =
 539                 ak4113->substream ? ak4113->substream->runtime : NULL;
 540         unsigned long _flags;
 541         int res = 0;
 542         unsigned char rcs0, rcs1, rcs2;
 543         unsigned char c0, c1;
 544
 545         rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
 546         if (flags & AK4113_CHECK_NO_STAT)
 547                 goto __rate;
 548         rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
 549         rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
 550         spin_lock_irqsave(&ak4113->lock, _flags);
 551         if (rcs0 & AK4113_PAR)
 552                 ak4113->errors[AK4113_PARITY_ERRORS]++;
 553         if (rcs0 & AK4113_V)
 554                 ak4113->errors[AK4113_V_BIT_ERRORS]++;
 555         if (rcs2 & AK4113_CCRC)
 556                 ak4113->errors[AK4113_CCRC_ERRORS]++;
 557         if (rcs2 & AK4113_QCRC)
 558                 ak4113->errors[AK4113_QCRC_ERRORS]++;
 559         c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
 560                                 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
 561                 (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
 562                          AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
 563         c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
 564                                 AK4113_DAT | 0xf0)) ^
 565                 (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
 566                          AK4113_DAT | 0xf0));
 567         ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
 568         ak4113->rcs1 = rcs1;
 569         ak4113->rcs2 = rcs2;
 570         spin_unlock_irqrestore(&ak4113->lock, _flags);
 571
 572         if (rcs0 & AK4113_PAR)
 573                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 574                                 &ak4113->kctls[0]->id);
 575         if (rcs0 & AK4113_V)
 576                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 577                                 &ak4113->kctls[1]->id);
 578         if (rcs2 & AK4113_CCRC)
 579                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 580                                 &ak4113->kctls[2]->id);
 581         if (rcs2 & AK4113_QCRC)
 582                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 583                                 &ak4113->kctls[3]->id);
 584
 585         /* rate change */
 586         if (c1 & 0xf0)
 587                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 588                                 &ak4113->kctls[4]->id);
 589
 590         if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
 591                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 592                                 &ak4113->kctls[6]->id);
 593         if (c0 & AK4113_QINT)
 594                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 595                                 &ak4113->kctls[8]->id);
 596
 597         if (c0 & AK4113_AUDION)
 598                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 599                                 &ak4113->kctls[9]->id);
 600         if (c1 & AK4113_NPCM)
 601                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 602                                 &ak4113->kctls[10]->id);
 603         if (c1 & AK4113_DTSCD)
 604                 snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
 605                                 &ak4113->kctls[11]->id);
 606
 607         if (ak4113->change_callback && (c0 | c1) != 0)
 608                 ak4113->change_callback(ak4113, c0, c1);
 609
 610 __rate:
 611         /* compare rate */
 612         res = external_rate(rcs1);
 613         if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
 614                         (runtime->rate != res)) {
 615                 snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
 616                 if (snd_pcm_running(ak4113->substream)) {
 617                         /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
 618                          * runtime->rate, res); */
 619                         snd_pcm_stop(ak4113->substream,
 620                                         SNDRV_PCM_STATE_DRAINING);
 621                         wake_up(&runtime->sleep);
 622                         res = 1;
 623                 }
 624                 snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
 625         }
 626         return res;
 627 }
 628 EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
 629
 630 static void ak4113_stats(struct work_struct *work)
 631 {
 632         struct ak4113 *chip = container_of(work, struct ak4113, work.work);
 633
 634         if (atomic_inc_return(&chip->wq_processing) == 1)
 635                 snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
 636
 637         if (atomic_dec_and_test(&chip->wq_processing))
 638                 schedule_delayed_work(&chip->work, HZ / 10);
 639 }
 640
 641 #ifdef CONFIG_PM
 642 void snd_ak4113_suspend(struct ak4113 *chip)
 643 {
 644         atomic_inc(&chip->wq_processing); /* don't schedule new work */
 645         cancel_delayed_work_sync(&chip->work);
 646 }
 647 EXPORT_SYMBOL(snd_ak4113_suspend);
 648
 649 void snd_ak4113_resume(struct ak4113 *chip)
 650 {
 651         atomic_dec(&chip->wq_processing);
 652         snd_ak4113_reinit(chip);
 653 }
 654 EXPORT_SYMBOL(snd_ak4113_resume);
 655 #endif