sound/oss/awe_hw.h

   1 /*
   2  * sound/awe_hw.h
   3  *
   4  * Access routines and definitions for the low level driver for the
   5  * Creative AWE32/SB32/AWE64 wave table synth.
   6  *   version 0.4.4; Jan. 4, 2000
   7  *
   8  * Copyright (C) 1996-2000 Takashi Iwai
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  */
  24
  25 #ifndef AWE_HW_H_DEF
  26 #define AWE_HW_H_DEF
  27
  28 /*
  29  * Emu-8000 control registers
  30  * name(channel)        reg, port
  31  */
  32
  33 #define awe_cmd_idx(reg,ch)     (((reg)<< 5) | (ch))
  34
  35 #define Data0    0              /* 0x620: doubleword r/w */
  36 #define Data1    1              /* 0xA20: doubleword r/w */
  37 #define Data2    2              /* 0xA22: word r/w */
  38 #define Data3    3              /* 0xE20: word r/w */
  39 #define Pointer  4              /* 0xE22 register pointer r/w */
  40
  41 #define AWE_CPF(ch)     awe_cmd_idx(0,ch), Data0        /* DW: current pitch and fractional address */
  42 #define AWE_PTRX(ch)    awe_cmd_idx(1,ch), Data0        /* DW: pitch target and reverb send */
  43 #define AWE_CVCF(ch)    awe_cmd_idx(2,ch), Data0        /* DW: current volume and filter cutoff */
  44 #define AWE_VTFT(ch)    awe_cmd_idx(3,ch), Data0        /* DW: volume and filter cutoff targets */
  45 #define AWE_0080(ch)    awe_cmd_idx(4,ch), Data0        /* DW: ?? */
  46 #define AWE_00A0(ch)    awe_cmd_idx(5,ch), Data0        /* DW: ?? */
  47 #define AWE_PSST(ch)    awe_cmd_idx(6,ch), Data0        /* DW: pan send and loop start address */
  48 #define AWE_CSL(ch)     awe_cmd_idx(7,ch), Data0        /* DW: chorus send and loop end address */
  49 #define AWE_CCCA(ch)    awe_cmd_idx(0,ch), Data1        /* DW: Q, control bits, and current address */
  50 #define AWE_HWCF4       awe_cmd_idx(1,9),  Data1        /* DW: config dw 4 */
  51 #define AWE_HWCF5       awe_cmd_idx(1,10), Data1        /* DW: config dw 5 */
  52 #define AWE_HWCF6       awe_cmd_idx(1,13), Data1        /* DW: config dw 6 */
  53 #define AWE_HWCF7       awe_cmd_idx(1,14), Data1        /* DW: config dw 7? (not documented) */
  54 #define AWE_SMALR       awe_cmd_idx(1,20), Data1        /* DW: sound memory address for left read */
  55 #define AWE_SMARR       awe_cmd_idx(1,21), Data1        /* DW:    for right read */
  56 #define AWE_SMALW       awe_cmd_idx(1,22), Data1        /* DW: sound memory address for left write */
  57 #define AWE_SMARW       awe_cmd_idx(1,23), Data1        /* DW:    for right write */
  58 #define AWE_SMLD        awe_cmd_idx(1,26), Data1        /* W: sound memory left data */
  59 #define AWE_SMRD        awe_cmd_idx(1,26), Data2        /* W:    right data */
  60 #define AWE_WC          awe_cmd_idx(1,27), Data2        /* W: sample counter */
  61 #define AWE_WC_Cmd      awe_cmd_idx(1,27)
  62 #define AWE_WC_Port     Data2
  63 #define AWE_HWCF1       awe_cmd_idx(1,29), Data1        /* W: config w 1 */
  64 #define AWE_HWCF2       awe_cmd_idx(1,30), Data1        /* W: config w 2 */
  65 #define AWE_HWCF3       awe_cmd_idx(1,31), Data1        /* W: config w 3 */
  66 #define AWE_INIT1(ch)   awe_cmd_idx(2,ch), Data1        /* W: init array 1 */
  67 #define AWE_INIT2(ch)   awe_cmd_idx(2,ch), Data2        /* W: init array 2 */
  68 #define AWE_INIT3(ch)   awe_cmd_idx(3,ch), Data1        /* W: init array 3 */
  69 #define AWE_INIT4(ch)   awe_cmd_idx(3,ch), Data2        /* W: init array 4 */
  70 #define AWE_ENVVOL(ch)  awe_cmd_idx(4,ch), Data1        /* W: volume envelope delay */
  71 #define AWE_DCYSUSV(ch) awe_cmd_idx(5,ch), Data1        /* W: volume envelope sustain and decay */
  72 #define AWE_ENVVAL(ch)  awe_cmd_idx(6,ch), Data1        /* W: modulation envelope delay */
  73 #define AWE_DCYSUS(ch)  awe_cmd_idx(7,ch), Data1        /* W: modulation envelope sustain and decay */
  74 #define AWE_ATKHLDV(ch) awe_cmd_idx(4,ch), Data2        /* W: volume envelope attack and hold */
  75 #define AWE_LFO1VAL(ch) awe_cmd_idx(5,ch), Data2        /* W: LFO#1 Delay */
  76 #define AWE_ATKHLD(ch)  awe_cmd_idx(6,ch), Data2        /* W: modulation envelope attack and hold */
  77 #define AWE_LFO2VAL(ch) awe_cmd_idx(7,ch), Data2        /* W: LFO#2 Delay */
  78 #define AWE_IP(ch)      awe_cmd_idx(0,ch), Data3        /* W: initial pitch */
  79 #define AWE_IFATN(ch)   awe_cmd_idx(1,ch), Data3        /* W: initial filter cutoff and attenuation */
  80 #define AWE_PEFE(ch)    awe_cmd_idx(2,ch), Data3        /* W: pitch and filter envelope heights */
  81 #define AWE_FMMOD(ch)   awe_cmd_idx(3,ch), Data3        /* W: vibrato and filter modulation freq */
  82 #define AWE_TREMFRQ(ch) awe_cmd_idx(4,ch), Data3        /* W: LFO#1 tremolo amount and freq */
  83 #define AWE_FM2FRQ2(ch) awe_cmd_idx(5,ch), Data3        /* W: LFO#2 vibrato amount and freq */
  84
  85 /* used during detection (returns ROM version?; not documented in ADIP) */
  86 #define AWE_U1          0xE0, Data3       /* (R)(W) used in initialization */
  87 #define AWE_U2(ch)      0xC0+(ch), Data3  /* (W)(W) used in init envelope  */
  88
  89
  90 #define AWE_MAX_VOICES          32
  91 #define AWE_NORMAL_VOICES       30      /*30&31 are reserved for DRAM refresh*/
  92
  93 #define AWE_MAX_CHANNELS        32      /* max midi channels (must >= voices) */
  94 #define AWE_MAX_LAYERS  AWE_MAX_VOICES  /* maximum number of multiple layers */
  95
  96 #define AWE_DRAM_OFFSET         0x200000
  97 #define AWE_MAX_DRAM_SIZE       (28 * 1024)     /* 28 MB is max onboard memory */
  98
  99 #endif