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[mirror_ubuntu-artful-kernel.git] / sound / oss / rme96xx.c
1 /* (C) 2000 Guenter Geiger <geiger@debian.org>
2 with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
3 based on es1370.c
4
5
6
7 * 10 Jan 2001: 0.1 initial version
8 * 19 Jan 2001: 0.2 fixed bug in select()
9 * 27 Apr 2001: 0.3 more than one card usable
10 * 11 May 2001: 0.4 fixed for SMP, included into kernel source tree
11 * 17 May 2001: 0.5 draining code didn't work on new cards
12 * 18 May 2001: 0.6 remove synchronize_irq() call
13 * 17 Jul 2001: 0.7 updated xrmectrl to make it work for newer cards
14 * 2 feb 2002: 0.8 fixed pci device handling, see below for patches from Heiko (Thanks!)
15 Marcus Meissner <Marcus.Meissner@caldera.de>
16
17 Modifications - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
18 HP20020108 fixed handling of "large" read()
19 HP20020116 towards REV 1.5 support, based on ALSA's card-rme9652.c
20 HP20020118 made mixer ioctl and handling of devices>1 more safe
21 HP20020201 fixed handling of "large" read() properly
22 added REV 1.5 S/P-DIF receiver support
23 SNDCTL_DSP_SPEED now returns the actual speed
24 * 10 Aug 2002: added synchronize_irq() again
25
26 TODO:
27 - test more than one card --- done
28 - check for pci IOREGION (see es1370) in rme96xx_probe ??
29 - error detection
30 - mmap interface
31 - mixer mmap interface
32 - mixer ioctl
33 - get rid of noise upon first open (why ??)
34 - allow multiple open (at least for read)
35 - allow multiple open for non overlapping regions
36 - recheck the multiple devices part (offsets of different devices, etc)
37 - do decent draining in _release --- done
38 - SMP support
39 - what about using fragstotal>2 for small fragsize? (HP20020118)
40 - add support for AFMT_S32_LE
41 */
42
43 #ifndef RMEVERSION
44 #define RMEVERSION "0.8"
45 #endif
46
47 #include <linux/module.h>
48 #include <linux/string.h>
49 #include <linux/sched.h>
50 #include <linux/sound.h>
51 #include <linux/soundcard.h>
52 #include <linux/pci.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/slab.h>
56 #include <linux/interrupt.h>
57 #include <linux/init.h>
58 #include <linux/interrupt.h>
59 #include <linux/poll.h>
60 #include <linux/wait.h>
61
62 #include <asm/dma.h>
63 #include <asm/page.h>
64
65 #include "rme96xx.h"
66
67 #define NR_DEVICE 2
68
69 static int devices = 1;
70 module_param(devices, int, 0);
71 MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
72
73
74 MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
75 MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
76 MODULE_LICENSE("GPL");
77
78
79 #ifdef DEBUG
80 #define DBG(x) printk("RME_DEBUG:");x
81 #define COMM(x) printk("RME_COMM: " x "\n");
82 #else
83 #define DBG(x) while (0) {}
84 #define COMM(x)
85 #endif
86
87 /*--------------------------------------------------------------------------
88 Preporcessor Macros and Definitions
89 --------------------------------------------------------------------------*/
90
91 #define RME96xx_MAGIC 0x6473
92
93 /* Registers-Space in offsets from base address with 16MByte size */
94
95 #define RME96xx_IO_EXTENT 16l*1024l*1024l
96 #define RME96xx_CHANNELS_PER_CARD 26
97
98 /* Write - Register */
99
100 /* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
101 #define RME96xx_num_of_init_regs 8
102
103 #define RME96xx_init_buffer (0/4)
104 #define RME96xx_play_buffer (32/4) /* pointer to 26x64kBit RAM from mainboard */
105 #define RME96xx_rec_buffer (36/4) /* pointer to 26x64kBit RAM from mainboard */
106 #define RME96xx_control_register (64/4) /* exact meaning see below */
107 #define RME96xx_irq_clear (96/4) /* irq acknowledge */
108 #define RME96xx_time_code (100/4) /* if used with alesis adat */
109 #define RME96xx_thru_base (128/4) /* 132...228 Thru for 26 channels */
110 #define RME96xx_thru_channels RME96xx_CHANNELS_PER_CARD
111
112 /* Read Register */
113
114 #define RME96xx_status_register 0 /* meaning see below */
115
116
117
118 /* Status Register: */
119 /* ------------------------------------------------------------------------ */
120 #define RME96xx_IRQ 0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
121 #define RME96xx_lock_2 0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
122 #define RME96xx_lock_1 0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
123 #define RME96xx_lock_0 0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
124
125 #define RME96xx_fs48 0x0000010 /* sample rate 0 ...44.1/88.2, 1 ... 48/96 Khz */
126 #define RME96xx_wsel_rd 0x0000020 /* if Word-Clock is used and valid then 1 */
127 #define RME96xx_buf_pos1 0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
128 #define RME96xx_buf_pos2 0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
129
130 #define RME96xx_buf_pos3 0x0000100 /* 10 bits = 1024 values */
131 #define RME96xx_buf_pos4 0x0000200 /* if we mask off the first 6 bits, we can take the status */
132 #define RME96xx_buf_pos5 0x0000400 /* register as sample counter in the hardware buffer */
133 #define RME96xx_buf_pos6 0x0000800
134
135 #define RME96xx_buf_pos7 0x0001000
136 #define RME96xx_buf_pos8 0x0002000
137 #define RME96xx_buf_pos9 0x0004000
138 #define RME96xx_buf_pos10 0x0008000
139
140 #define RME96xx_sync_2 0x0010000 /* if ADAT-IN3 synced to system clock */
141 #define RME96xx_sync_1 0x0020000 /* if ADAT-IN2 synced to system clock */
142 #define RME96xx_sync_0 0x0040000 /* if ADAT-IN1 synced to system clock */
143 #define RME96xx_DS_rd 0x0080000 /* 1=Double Speed, 0=Normal Speed */
144
145 #define RME96xx_tc_busy 0x0100000 /* 1=time-code copy in progress (960ms) */
146 #define RME96xx_tc_out 0x0200000 /* time-code out bit */
147 #define RME96xx_F_0 0x0400000 /* 000=64kHz, 100=88.2kHz, 011=96kHz */
148 #define RME96xx_F_1 0x0800000 /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
149
150 #define RME96xx_F_2 0x1000000 /* 001=Rev 1.5+ external Crystal Chip */
151 #define RME96xx_ERF 0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
152 #define RME96xx_buffer_id 0x4000000 /* toggles by each interrupt on rec/play */
153 #define RME96xx_tc_valid 0x8000000 /* 1 = a signal is detected on time-code input */
154 #define RME96xx_SPDIF_READ 0x10000000 /* byte available from Rev 1.5+ SPDIF interface */
155
156 /* Status Register Fields */
157
158 #define RME96xx_lock (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
159 #define RME96xx_sync (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
160 #define RME96xx_F (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
161 #define rme96xx_decode_spdif_rate(x) ((x)>>22)
162
163 /* Bit 6..15 : h/w buffer pointer */
164 #define RME96xx_buf_pos 0x000FFC0
165 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
166 Rev G EEPROMS and Rev 1.5 cards or later.
167 */
168 #define RME96xx_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME96xx_buf_pos))
169
170
171 /* Control-Register: */
172 /*--------------------------------------------------------------------------------*/
173
174 #define RME96xx_start_bit 0x0001 /* start record/play */
175 #define RME96xx_latency0 0x0002 /* Buffer size / latency */
176 #define RME96xx_latency1 0x0004 /* buffersize = 512Bytes * 2^n */
177 #define RME96xx_latency2 0x0008 /* 0=64samples ... 7=8192samples */
178
179 #define RME96xx_Master 0x0010 /* Clock Mode 1=Master, 0=Slave/Auto */
180 #define RME96xx_IE 0x0020 /* Interupt Enable */
181 #define RME96xx_freq 0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
182 #define RME96xx_freq1 0x0080 /* samplerate 0=32 kHz, 1=other rates ??? (from ALSA, but may be wrong) */
183 #define RME96xx_DS 0x0100 /* double speed 0=44.1/48, 1=88.2/96 Khz */
184 #define RME96xx_PRO 0x0200 /* SPDIF-OUT 0=consumer, 1=professional */
185 #define RME96xx_EMP 0x0400 /* SPDIF-OUT emphasis 0=off, 1=on */
186 #define RME96xx_Dolby 0x0800 /* SPDIF-OUT non-audio bit 1=set, 0=unset */
187
188 #define RME96xx_opt_out 0x1000 /* use 1st optical OUT as SPDIF: 1=yes, 0=no */
189 #define RME96xx_wsel 0x2000 /* use Wordclock as sync (overwrites master) */
190 #define RME96xx_inp_0 0x4000 /* SPDIF-IN 00=optical (ADAT1), */
191 #define RME96xx_inp_1 0x8000 /* 01=coaxial (Cinch), 10=internal CDROM */
192
193 #define RME96xx_SyncRef0 0x10000 /* preferred sync-source in autosync */
194 #define RME96xx_SyncRef1 0x20000 /* 00=ADAT1, 01=ADAT2, 10=ADAT3, 11=SPDIF */
195
196 #define RME96xx_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w SPDIF receiver */
197 #define RME96xx_SPDIF_SELECT (1<<19)
198 #define RME96xx_SPDIF_CLOCK (1<<20)
199 #define RME96xx_SPDIF_WRITE (1<<21)
200 #define RME96xx_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
201
202
203 #define RME96xx_ctrl_init (RME96xx_latency0 |\
204 RME96xx_Master |\
205 RME96xx_inp_1)
206
207
208
209 /* Control register fields and shortcuts */
210
211 #define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
212 #define RME96xx_inp (RME96xx_inp_0|RME96xx_inp_1)
213 #define RME96xx_SyncRef (RME96xx_SyncRef0|RME96xx_SyncRef1)
214 #define RME96xx_mixer_allowed (RME96xx_Master|RME96xx_PRO|RME96xx_EMP|RME96xx_Dolby|RME96xx_opt_out|RME96xx_wsel|RME96xx_inp|RME96xx_SyncRef|RME96xx_ADAT1_INTERNAL)
215
216 /* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit1 (??? HP20020201) */
217
218 #define RME96xx_SET_LATENCY(x) (((x)&0x7)<<1)
219 #define RME96xx_GET_LATENCY(x) (((x)>>1)&0x7)
220 #define RME96xx_SET_inp(x) (((x)&0x3)<<14)
221 #define RME96xx_GET_inp(x) (((x)>>14)&0x3)
222 #define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
223 #define RME96xx_GET_SyncRef(x) (((x)>>17)&0x3)
224
225
226 /* buffer sizes */
227 #define RME96xx_BYTES_PER_SAMPLE 4 /* sizeof(u32) */
228 #define RME_16K 16*1024
229
230 #define RME96xx_DMA_MAX_SAMPLES (RME_16K)
231 #define RME96xx_DMA_MAX_SIZE (RME_16K * RME96xx_BYTES_PER_SAMPLE)
232 #define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
233
234 #define RME96xx_NUM_OF_FRAGMENTS 2
235 #define RME96xx_FRAGMENT_MAX_SIZE (RME96xx_DMA_MAX_SIZE/2)
236 #define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
237 #define RME96xx_MAX_LATENCY 7 /* 16k samples */
238
239
240 #define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
241 #define RME96xx_MASK_DEVS 0x3 /* RME96xx_MAX_DEVS-1 */
242
243 #define RME_MESS "rme96xx:"
244 /*------------------------------------------------------------------------
245 Types, struct and function declarations
246 ------------------------------------------------------------------------*/
247
248
249 /* --------------------------------------------------------------------- */
250
251 static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
252
253 #define VALIDATE_STATE(s) \
254 ({ \
255 if (!(s) || (s)->magic != RME96xx_MAGIC) { \
256 printk(invalid_magic); \
257 return -ENXIO; \
258 } \
259 })
260
261 /* --------------------------------------------------------------------- */
262
263
264 static struct file_operations rme96xx_audio_fops;
265 static struct file_operations rme96xx_mixer_fops;
266 static int numcards;
267
268 typedef int32_t raw_sample_t;
269
270 typedef struct _rme96xx_info {
271
272 /* hardware settings */
273 int magic;
274 struct pci_dev * pcidev; /* pci_dev structure */
275 unsigned long __iomem *iobase;
276 unsigned int irq;
277
278 /* list of rme96xx devices */
279 struct list_head devs;
280
281 spinlock_t lock;
282
283 u32 *recbuf; /* memory for rec buffer */
284 u32 *playbuf; /* memory for play buffer */
285
286 u32 control_register;
287
288 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
289
290 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
291 char *card_name; /* hammerfall or hammerfall light names */
292
293 int open_count; /* unused ??? HP20020201 */
294
295 int rate;
296 int latency;
297 unsigned int fragsize;
298 int started;
299
300 int hwptr; /* can be negativ because of pci burst offset */
301 unsigned int hwbufid; /* set by interrupt, buffer which is written/read now */
302
303 struct dmabuf {
304
305 unsigned int format;
306 int formatshift;
307 int inchannels; /* number of channels for device */
308 int outchannels; /* number of channels for device */
309 int mono; /* if true, we play mono on 2 channels */
310 int inoffset; /* which channel is considered the first one */
311 int outoffset;
312
313 /* state */
314 int opened; /* open() made */
315 int started; /* first write/read */
316 int mmapped; /* mmap */
317 int open_mode;
318
319 struct _rme96xx_info *s;
320
321 /* pointer to read/write position in buffer */
322 unsigned readptr;
323 unsigned writeptr;
324
325 unsigned error; /* over/underruns cleared on sync again */
326
327 /* waiting and locking */
328 wait_queue_head_t wait;
329 struct semaphore open_sem;
330 wait_queue_head_t open_wait;
331
332 } dma[RME96xx_MAX_DEVS];
333
334 int dspnum[RME96xx_MAX_DEVS]; /* register with sound subsystem */
335 int mixer; /* register with sound subsystem */
336 } rme96xx_info;
337
338
339 /* fiddling with the card (first level hardware control) */
340
341 static inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
342 {
343
344 s->control_register|=mask;
345 writel(s->control_register,s->iobase + RME96xx_control_register);
346
347 }
348
349 static inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
350 {
351
352 s->control_register&=(~mask);
353 writel(s->control_register,s->iobase + RME96xx_control_register);
354
355 }
356
357 static inline int rme96xx_get_sample_rate_status(rme96xx_info* s)
358 {
359 int val;
360 u32 status;
361 status = readl(s->iobase + RME96xx_status_register);
362 val = (status & RME96xx_fs48) ? 48000 : 44100;
363 if (status & RME96xx_DS_rd)
364 val *= 2;
365 return val;
366 }
367
368 static inline int rme96xx_get_sample_rate_ctrl(rme96xx_info* s)
369 {
370 int val;
371 val = (s->control_register & RME96xx_freq) ? 48000 : 44100;
372 if (s->control_register & RME96xx_DS)
373 val *= 2;
374 return val;
375 }
376
377
378 /* code from ALSA card-rme9652.c for rev 1.5 SPDIF receiver HP 20020201 */
379
380 static void rme96xx_spdif_set_bit (rme96xx_info* s, int mask, int onoff)
381 {
382 if (onoff)
383 s->control_register |= mask;
384 else
385 s->control_register &= ~mask;
386
387 writel(s->control_register,s->iobase + RME96xx_control_register);
388 }
389
390 static void rme96xx_spdif_write_byte (rme96xx_info* s, const int val)
391 {
392 long mask;
393 long i;
394
395 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
396 if (val & mask)
397 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 1);
398 else
399 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_WRITE, 0);
400
401 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
402 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
403 }
404 }
405
406 static int rme96xx_spdif_read_byte (rme96xx_info* s)
407 {
408 long mask;
409 long val;
410 long i;
411
412 val = 0;
413
414 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
415 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 1);
416 if (readl(s->iobase + RME96xx_status_register) & RME96xx_SPDIF_READ)
417 val |= mask;
418 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_CLOCK, 0);
419 }
420
421 return val;
422 }
423
424 static void rme96xx_write_spdif_codec (rme96xx_info* s, const int address, const int data)
425 {
426 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
427 rme96xx_spdif_write_byte (s, 0x20);
428 rme96xx_spdif_write_byte (s, address);
429 rme96xx_spdif_write_byte (s, data);
430 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
431 }
432
433
434 static int rme96xx_spdif_read_codec (rme96xx_info* s, const int address)
435 {
436 int ret;
437
438 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
439 rme96xx_spdif_write_byte (s, 0x20);
440 rme96xx_spdif_write_byte (s, address);
441 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
442 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 1);
443
444 rme96xx_spdif_write_byte (s, 0x21);
445 ret = rme96xx_spdif_read_byte (s);
446 rme96xx_spdif_set_bit (s, RME96xx_SPDIF_SELECT, 0);
447
448 return ret;
449 }
450
451 static void rme96xx_initialize_spdif_receiver (rme96xx_info* s)
452 {
453 /* XXX what unsets this ? */
454 /* no idea ??? HP 20020201 */
455
456 s->control_register |= RME96xx_SPDIF_RESET;
457
458 rme96xx_write_spdif_codec (s, 4, 0x40);
459 rme96xx_write_spdif_codec (s, 17, 0x13);
460 rme96xx_write_spdif_codec (s, 6, 0x02);
461 }
462
463 static inline int rme96xx_spdif_sample_rate (rme96xx_info *s, int *spdifrate)
464 {
465 unsigned int rate_bits;
466
467 *spdifrate = 0x1;
468 if (readl(s->iobase + RME96xx_status_register) & RME96xx_ERF) {
469 return -1; /* error condition */
470 }
471
472 if (s->hw_rev == 15) {
473
474 int x, y, ret;
475
476 x = rme96xx_spdif_read_codec (s, 30);
477
478 if (x != 0)
479 y = 48000 * 64 / x;
480 else
481 y = 0;
482
483 if (y > 30400 && y < 33600) {ret = 32000; *spdifrate = 0x7;}
484 else if (y > 41900 && y < 46000) {ret = 44100; *spdifrate = 0x6;}
485 else if (y > 46000 && y < 50400) {ret = 48000; *spdifrate = 0x5;}
486 else if (y > 60800 && y < 67200) {ret = 64000; *spdifrate = 0x0;}
487 else if (y > 83700 && y < 92000) {ret = 88200; *spdifrate = 0x4;}
488 else if (y > 92000 && y < 100000) {ret = 96000; *spdifrate = 0x3;}
489 else {ret = 0; *spdifrate = 0x1;}
490 return ret;
491 }
492
493 rate_bits = readl(s->iobase + RME96xx_status_register) & RME96xx_F;
494
495 switch (*spdifrate = rme96xx_decode_spdif_rate(rate_bits)) {
496 case 0x7:
497 return 32000;
498 break;
499
500 case 0x6:
501 return 44100;
502 break;
503
504 case 0x5:
505 return 48000;
506 break;
507
508 case 0x4:
509 return 88200;
510 break;
511
512 case 0x3:
513 return 96000;
514 break;
515
516 case 0x0:
517 return 64000;
518 break;
519
520 default:
521 /* was an ALSA warning ...
522 snd_printk("%s: unknown S/PDIF input rate (bits = 0x%x)\n",
523 s->card_name, rate_bits);
524 */
525 return 0;
526 break;
527 }
528 }
529
530 /* end of code from ALSA card-rme9652.c */
531
532
533
534 /* the hwbuf in the status register seems to have some jitter, to get rid of
535 it, we first only let the numbers grow, to be on the secure side we
536 subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
537
538 /* the function returns the hardware pointer in bytes */
539 #define RME96xx_BURSTBYTES -64 /* bytes by which hwptr could be off */
540
541 static inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
542 {
543 unsigned long flags;
544 if (exact) {
545 unsigned int hwp;
546 /* the hwptr seems to be rather unreliable :(, so we don't use it */
547 spin_lock_irqsave(&s->lock,flags);
548
549 hwp = readl(s->iobase + RME96xx_status_register) & 0xffc0;
550 s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
551 // s->hwptr = hwp;
552
553 spin_unlock_irqrestore(&s->lock,flags);
554 return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
555 }
556 return (s->hwbufid ? s->fragsize : 0);
557 }
558
559 static inline void rme96xx_setlatency(rme96xx_info* s,int l)
560 {
561 s->latency = l;
562 s->fragsize = 1<<(8+l);
563 rme96xx_unset_ctrl(s,RME96xx_latency);
564 rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
565 }
566
567
568 static void rme96xx_clearbufs(struct dmabuf* dma)
569 {
570 int i,j;
571 unsigned long flags;
572
573 /* clear dmabufs */
574 for(i=0;i<devices;i++) {
575 for (j=0;j<dma->outchannels + dma->mono;j++)
576 memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
577 0, RME96xx_DMA_MAX_SIZE);
578 }
579 spin_lock_irqsave(&dma->s->lock,flags);
580 dma->writeptr = 0;
581 dma->readptr = 0;
582 spin_unlock_irqrestore(&dma->s->lock,flags);
583 }
584
585 static int rme96xx_startcard(rme96xx_info *s,int stop)
586 {
587 int i;
588 unsigned long flags;
589
590 COMM ("startcard");
591 if(s->control_register & RME96xx_IE){
592 /* disable interrupt first */
593
594 rme96xx_unset_ctrl( s,RME96xx_start_bit );
595 udelay(10);
596 rme96xx_unset_ctrl( s,RME96xx_IE);
597 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
598 s->started = 0;
599 spin_unlock_irqrestore(&s->lock,flags);
600 if (stop) {
601 COMM("Sound card stopped");
602 return 1;
603 }
604 }
605 COMM ("interrupt disabled");
606 /* first initialize all pointers on card */
607 for(i=0;i<RME96xx_num_of_init_regs;i++){
608 writel(0,s->iobase + i);
609 udelay(10); /* ?? */
610 }
611 COMM ("regs cleaned");
612
613 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
614 udelay(10);
615 s->started = 1;
616 s->hwptr = 0;
617 spin_unlock_irqrestore(&s->lock,flags);
618
619 rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
620
621
622 COMM("Sound card started");
623
624 return 1;
625 }
626
627
628 static inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
629 {
630 int cnt;
631 int swptr;
632 unsigned long flags;
633
634 spin_lock_irqsave(&dma->s->lock,flags);
635 swptr = dma->writeptr;
636 cnt = (hwp - swptr);
637
638 if (cnt < 0) {
639 cnt = ((dma->s->fragsize<<1) - swptr);
640 }
641 spin_unlock_irqrestore(&dma->s->lock,flags);
642 return cnt;
643 }
644
645 static inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
646 {
647 int cnt;
648 int swptr;
649 unsigned long flags;
650
651 spin_lock_irqsave(&dma->s->lock,flags);
652 swptr = dma->readptr;
653 cnt = (hwp - swptr);
654
655 if (cnt < 0) {
656 cnt = ((dma->s->fragsize<<1) - swptr);
657 }
658 spin_unlock_irqrestore(&dma->s->lock,flags);
659 return cnt;
660 }
661
662
663 static inline int rme96xx_copyfromuser(struct dmabuf* dma,const char __user * buffer,int count,int hop)
664 {
665 int swptr = dma->writeptr;
666 switch (dma->format) {
667 case AFMT_S32_BLOCKED:
668 {
669 char __user * buf = (char __user *)buffer;
670 int cnt = count/dma->outchannels;
671 int i;
672 for (i=0;i < dma->outchannels;i++) {
673 char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
674 hwbuf+=swptr;
675
676 if (copy_from_user(hwbuf,buf, cnt))
677 return -1;
678 buf+=hop;
679 }
680 swptr+=cnt;
681 break;
682 }
683 case AFMT_S16_LE:
684 {
685 int i,j;
686 int cnt = count/dma->outchannels;
687 for (i=0;i < dma->outchannels + dma->mono;i++) {
688 short __user * sbuf = (short __user *)buffer + i*(!dma->mono);
689 short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
690 hwbuf+=(swptr>>1);
691 for (j=0;j<(cnt>>1);j++) {
692 hwbuf++; /* skip the low 16 bits */
693 __get_user(*hwbuf++,sbuf++);
694 sbuf+=(dma->outchannels-1);
695 }
696 }
697 swptr += (cnt<<1);
698 break;
699 }
700 default:
701 printk(RME_MESS" unsupported format\n");
702 return -1;
703 } /* switch */
704
705 swptr&=((dma->s->fragsize<<1) -1);
706 dma->writeptr = swptr;
707
708 return 0;
709 }
710
711 /* The count argument is the number of bytes */
712 static inline int rme96xx_copytouser(struct dmabuf* dma,const char __user* buffer,int count,int hop)
713 {
714 int swptr = dma->readptr;
715 switch (dma->format) {
716 case AFMT_S32_BLOCKED:
717 {
718 char __user * buf = (char __user *)buffer;
719 int cnt = count/dma->inchannels;
720 int i;
721
722 for (i=0;i < dma->inchannels;i++) {
723 char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
724 hwbuf+=swptr;
725
726 if (copy_to_user(buf,hwbuf,cnt))
727 return -1;
728 buf+=hop;
729 }
730 swptr+=cnt;
731 break;
732 }
733 case AFMT_S16_LE:
734 {
735 int i,j;
736 int cnt = count/dma->inchannels;
737 for (i=0;i < dma->inchannels;i++) {
738 short __user * sbuf = (short __user *)buffer + i;
739 short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
740 hwbuf+=(swptr>>1);
741 for (j=0;j<(cnt>>1);j++) {
742 hwbuf++;
743 __put_user(*hwbuf++,sbuf++);
744 sbuf+=(dma->inchannels-1);
745 }
746 }
747 swptr += (cnt<<1);
748 break;
749 }
750 default:
751 printk(RME_MESS" unsupported format\n");
752 return -1;
753 } /* switch */
754
755 swptr&=((dma->s->fragsize<<1) -1);
756 dma->readptr = swptr;
757 return 0;
758 }
759
760
761 static irqreturn_t rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
762 {
763 int i;
764 rme96xx_info *s = (rme96xx_info *)dev_id;
765 struct dmabuf *db;
766 u32 status;
767 unsigned long flags;
768
769 status = readl(s->iobase + RME96xx_status_register);
770 if (!(status & RME96xx_IRQ)) {
771 return IRQ_NONE;
772 }
773
774 spin_lock_irqsave(&s->lock,flags);
775 writel(0,s->iobase + RME96xx_irq_clear);
776
777 s->hwbufid = (status & RME96xx_buffer_id)>>26;
778 if ((status & 0xffc0) <= 256) s->hwptr = 0;
779 for(i=0;i<devices;i++)
780 {
781 db = &(s->dma[i]);
782 if(db->started > 0)
783 wake_up(&(db->wait));
784 }
785 spin_unlock_irqrestore(&s->lock,flags);
786 return IRQ_HANDLED;
787 }
788
789
790
791 /*----------------------------------------------------------------------------
792 PCI detection and module initialization stuff
793 ----------------------------------------------------------------------------*/
794
795 static void* busmaster_malloc(int size) {
796 int pg; /* 2 s exponent of memory size */
797 char *buf;
798
799 DBG(printk("kernel malloc pages ..\n"));
800
801 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
802
803 buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
804
805 if (buf) {
806 struct page* page, *last_page;
807
808 page = virt_to_page(buf);
809 last_page = page + (1 << pg);
810 DBG(printk("setting reserved bit\n"));
811 while (page < last_page) {
812 SetPageReserved(page);
813 page++;
814 }
815 return buf;
816 }
817 DBG(printk("allocated %ld",(long)buf));
818 return NULL;
819 }
820
821 static void busmaster_free(void* ptr,int size) {
822 int pg;
823 struct page* page, *last_page;
824
825 if (ptr == NULL)
826 return;
827
828 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
829
830 page = virt_to_page(ptr);
831 last_page = page + (1 << pg);
832 while (page < last_page) {
833 ClearPageReserved(page);
834 page++;
835 }
836 DBG(printk("freeing pages\n"));
837 free_pages((unsigned long) ptr, pg);
838 DBG(printk("done\n"));
839 }
840
841 /* initialize those parts of the info structure which are not pci detectable resources */
842
843 static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
844
845 init_MUTEX(&dma->open_sem);
846 init_waitqueue_head(&dma->open_wait);
847 init_waitqueue_head(&dma->wait);
848 dma->s = s;
849 dma->error = 0;
850
851 dma->format = AFMT_S32_BLOCKED;
852 dma->formatshift = 0;
853 dma->inchannels = dma->outchannels = 1;
854 dma->inoffset = ioffset;
855 dma->outoffset = ooffset;
856
857 dma->opened=0;
858 dma->started=0;
859 dma->mmapped=0;
860 dma->open_mode=0;
861 dma->mono=0;
862
863 rme96xx_clearbufs(dma);
864 return 0;
865 }
866
867
868 static int rme96xx_init(rme96xx_info* s)
869 {
870 int i;
871 int status;
872 unsigned short rev;
873
874 DBG(printk("%s\n", __FUNCTION__));
875 numcards++;
876
877 s->magic = RME96xx_MAGIC;
878
879 spin_lock_init(&s->lock);
880
881 COMM ("setup busmaster memory")
882 s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
883 s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
884
885 if (!s->recbuf || !s->playbuf) {
886 printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
887 return -ENODEV;
888 }
889
890 COMM ("setting rec and playbuffers")
891
892 writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
893 writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
894
895 COMM ("initializing control register")
896 rme96xx_unset_ctrl(s,0xffffffff);
897 rme96xx_set_ctrl(s,RME96xx_ctrl_init);
898
899
900 COMM ("setup devices")
901 for (i=0;i < devices;i++) {
902 struct dmabuf * dma = &s->dma[i];
903 rme96xx_dmabuf_init(s,dma,2*i,2*i);
904 }
905
906 /* code from ALSA card-rme9652.c HP 20020201 */
907 /* Determine the h/w rev level of the card. This seems like
908 a particularly kludgy way to encode it, but its what RME
909 chose to do, so we follow them ...
910 */
911
912 status = readl(s->iobase + RME96xx_status_register);
913 if (rme96xx_decode_spdif_rate(status&RME96xx_F) == 1) {
914 s->hw_rev = 15;
915 } else {
916 s->hw_rev = 11;
917 }
918
919 /* Differentiate between the standard Hammerfall, and the
920 "Light", which does not have the expansion board. This
921 method comes from information received from Mathhias
922 Clausen at RME. Display the EEPROM and h/w revID where
923 relevant.
924 */
925
926 pci_read_config_word(s->pcidev, PCI_CLASS_REVISION, &rev);
927 switch (rev & 0xff) {
928 case 8: /* original eprom */
929 if (s->hw_rev == 15) {
930 s->card_name = "RME Digi9636 (Rev 1.5)";
931 } else {
932 s->card_name = "RME Digi9636";
933 }
934 break;
935 case 9: /* W36_G EPROM */
936 s->card_name = "RME Digi9636 (Rev G)";
937 break;
938 case 4: /* W52_G EPROM */
939 s->card_name = "RME Digi9652 (Rev G)";
940 break;
941 default:
942 case 3: /* original eprom */
943 if (s->hw_rev == 15) {
944 s->card_name = "RME Digi9652 (Rev 1.5)";
945 } else {
946 s->card_name = "RME Digi9652";
947 }
948 break;
949 }
950
951 printk(KERN_INFO RME_MESS" detected %s (hw_rev %d)\n",s->card_name,s->hw_rev);
952
953 if (s->hw_rev == 15)
954 rme96xx_initialize_spdif_receiver (s);
955
956 s->started = 0;
957 rme96xx_setlatency(s,7);
958
959 printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
960 return 0;
961 }
962
963
964 /* open uses this to figure out which device was opened .. this seems to be
965 unnecessary complex */
966
967 static LIST_HEAD(devs);
968
969 static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
970 {
971 int i;
972 rme96xx_info *s;
973
974 DBG(printk("%s\n", __FUNCTION__));
975
976 if (pcidev->irq == 0)
977 return -1;
978 if (!pci_dma_supported(pcidev, 0xffffffff)) {
979 printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
980 return -1;
981 }
982 if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
983 printk(KERN_WARNING RME_MESS" out of memory\n");
984 return -1;
985 }
986 memset(s, 0, sizeof(rme96xx_info));
987
988 s->pcidev = pcidev;
989 s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
990 s->irq = pcidev->irq;
991
992 DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
993
994 if (pci_enable_device(pcidev))
995 goto err_irq;
996 if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "rme96xx", s)) {
997 printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
998 goto err_irq;
999 }
1000
1001 /* initialize the card */
1002
1003 i = 0;
1004 if (rme96xx_init(s) < 0) {
1005 printk(KERN_ERR RME_MESS" initialization failed\n");
1006 goto err_devices;
1007 }
1008 for (i=0;i<devices;i++) {
1009 if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
1010 goto err_devices;
1011 }
1012
1013 if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
1014 goto err_devices;
1015
1016 pci_set_drvdata(pcidev, s);
1017 pcidev->dma_mask = 0xffffffff; /* ????? */
1018 /* put it into driver list */
1019 list_add_tail(&s->devs, &devs);
1020
1021 DBG(printk("initialization successful\n"));
1022 return 0;
1023
1024 /* error handler */
1025 err_devices:
1026 while (i--)
1027 unregister_sound_dsp(s->dspnum[i]);
1028 free_irq(s->irq,s);
1029 err_irq:
1030 kfree(s);
1031 return -1;
1032 }
1033
1034
1035 static void __devexit rme96xx_remove(struct pci_dev *dev)
1036 {
1037 int i;
1038 rme96xx_info *s = pci_get_drvdata(dev);
1039
1040 if (!s) {
1041 printk(KERN_ERR"device structure not valid\n");
1042 return ;
1043 }
1044
1045 if (s->started) rme96xx_startcard(s,0);
1046
1047 i = devices;
1048 while (i) {
1049 i--;
1050 unregister_sound_dsp(s->dspnum[i]);
1051 }
1052
1053 unregister_sound_mixer(s->mixer);
1054 synchronize_irq(s->irq);
1055 free_irq(s->irq,s);
1056 busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
1057 busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
1058 kfree(s);
1059 pci_set_drvdata(dev, NULL);
1060 }
1061
1062
1063 #ifndef PCI_VENDOR_ID_RME
1064 #define PCI_VENDOR_ID_RME 0x10ee
1065 #endif
1066 #ifndef PCI_DEVICE_ID_RME9652
1067 #define PCI_DEVICE_ID_RME9652 0x3fc4
1068 #endif
1069 #ifndef PCI_ANY_ID
1070 #define PCI_ANY_ID 0
1071 #endif
1072
1073 static struct pci_device_id id_table[] = {
1074 {
1075 .vendor = PCI_VENDOR_ID_RME,
1076 .device = PCI_DEVICE_ID_RME9652,
1077 .subvendor = PCI_ANY_ID,
1078 .subdevice = PCI_ANY_ID,
1079 },
1080 { 0, },
1081 };
1082
1083 MODULE_DEVICE_TABLE(pci, id_table);
1084
1085 static struct pci_driver rme96xx_driver = {
1086 .name = "rme96xx",
1087 .id_table = id_table,
1088 .probe = rme96xx_probe,
1089 .remove = __devexit_p(rme96xx_remove),
1090 };
1091
1092 static int __init init_rme96xx(void)
1093 {
1094 printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
1095 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1;
1096 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
1097 numcards = 0;
1098 return pci_module_init(&rme96xx_driver);
1099 }
1100
1101 static void __exit cleanup_rme96xx(void)
1102 {
1103 printk(KERN_INFO RME_MESS" unloading\n");
1104 pci_unregister_driver(&rme96xx_driver);
1105 }
1106
1107 module_init(init_rme96xx);
1108 module_exit(cleanup_rme96xx);
1109
1110
1111
1112
1113
1114 /*--------------------------------------------------------------------------
1115 Implementation of file operations
1116 ---------------------------------------------------------------------------*/
1117
1118 #define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
1119 /* AFTM_U8 is not (yet?) supported ... HP20020201 */
1120
1121 static int rme96xx_ioctl(struct inode *in, struct file *file, unsigned int cmd, unsigned long arg)
1122 {
1123 struct dmabuf * dma = (struct dmabuf *)file->private_data;
1124 rme96xx_info *s = dma->s;
1125 unsigned long flags;
1126 audio_buf_info abinfo;
1127 count_info cinfo;
1128 int count;
1129 int val = 0;
1130 void __user *argp = (void __user *)arg;
1131 int __user *p = argp;
1132
1133 VALIDATE_STATE(s);
1134
1135 DBG(printk("ioctl %ud\n",cmd));
1136
1137 switch (cmd) {
1138 case OSS_GETVERSION:
1139 return put_user(SOUND_VERSION, p);
1140
1141 case SNDCTL_DSP_SYNC:
1142 #if 0
1143 if (file->f_mode & FMODE_WRITE)
1144 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1145 #endif
1146 return 0;
1147
1148 case SNDCTL_DSP_SETDUPLEX:
1149 return 0;
1150
1151 case SNDCTL_DSP_GETCAPS:
1152 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1153
1154 case SNDCTL_DSP_RESET:
1155 // rme96xx_clearbufs(dma);
1156 return 0;
1157
1158 case SNDCTL_DSP_SPEED:
1159 if (get_user(val, p))
1160 return -EFAULT;
1161 if (val >= 0) {
1162 /* generally it's not a problem if we change the speed
1163 if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1164 return -EINVAL;
1165 */
1166 spin_lock_irqsave(&s->lock, flags);
1167
1168 switch (val) {
1169 case 44100:
1170 case 88200:
1171 rme96xx_unset_ctrl(s,RME96xx_freq);
1172 break;
1173 case 48000:
1174 case 96000:
1175 rme96xx_set_ctrl(s,RME96xx_freq);
1176 break;
1177 /* just report current rate as default
1178 e.g. use 0 to "select" current digital input rate
1179 default:
1180 rme96xx_unset_ctrl(s,RME96xx_freq);
1181 val = 44100;
1182 */
1183 }
1184 if (val > 50000)
1185 rme96xx_set_ctrl(s,RME96xx_DS);
1186 else
1187 rme96xx_unset_ctrl(s,RME96xx_DS);
1188 /* set val to actual value HP 20020201 */
1189 /* NOTE: if not "Sync Master", reported rate might be not yet "updated" ... but I don't want to insert a long udelay() here */
1190 if ((s->control_register & RME96xx_Master) && !(s->control_register & RME96xx_wsel))
1191 val = rme96xx_get_sample_rate_ctrl(s);
1192 else
1193 val = rme96xx_get_sample_rate_status(s);
1194 s->rate = val;
1195 spin_unlock_irqrestore(&s->lock, flags);
1196 }
1197 DBG(printk("speed set to %d\n",val));
1198 return put_user(val, p);
1199
1200 case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
1201 if (get_user(val, p))
1202 return -EFAULT;
1203
1204 if (!val) {
1205 DBG(printk("setting to mono\n"));
1206 dma->mono=1;
1207 dma->inchannels = 1;
1208 dma->outchannels = 1;
1209 }
1210 else {
1211 DBG(printk("setting to stereo\n"));
1212 dma->mono = 0;
1213 dma->inchannels = 2;
1214 dma->outchannels = 2;
1215 }
1216 return 0;
1217 case SNDCTL_DSP_CHANNELS:
1218 /* remember to check for resonable offset/channel pairs here */
1219 if (get_user(val, p))
1220 return -EFAULT;
1221
1222 if (file->f_mode & FMODE_WRITE) {
1223 if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1224 dma->outchannels = val;
1225 else
1226 dma->outchannels = val = 2;
1227 DBG(printk("setting to outchannels %d\n",val));
1228 }
1229 if (file->f_mode & FMODE_READ) {
1230 if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
1231 dma->inchannels = val;
1232 else
1233 dma->inchannels = val = 2;
1234 DBG(printk("setting to inchannels %d\n",val));
1235 }
1236
1237 dma->mono=0;
1238
1239 return put_user(val, p);
1240
1241 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1242 return put_user(RME96xx_FMT, p);
1243
1244 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1245 DBG(printk("setting to format %x\n",val));
1246 if (get_user(val, p))
1247 return -EFAULT;
1248 if (val != AFMT_QUERY) {
1249 if (val & RME96xx_FMT)
1250 dma->format = val;
1251 switch (dma->format) {
1252 case AFMT_S16_LE:
1253 dma->formatshift=1;
1254 break;
1255 case AFMT_S32_BLOCKED:
1256 dma->formatshift=0;
1257 break;
1258 }
1259 }
1260 return put_user(dma->format, p);
1261
1262 case SNDCTL_DSP_POST:
1263 return 0;
1264
1265 case SNDCTL_DSP_GETTRIGGER:
1266 val = 0;
1267 #if 0
1268 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1269 val |= PCM_ENABLE_INPUT;
1270 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1271 val |= PCM_ENABLE_OUTPUT;
1272 #endif
1273 return put_user(val, p);
1274
1275 case SNDCTL_DSP_SETTRIGGER:
1276 if (get_user(val, p))
1277 return -EFAULT;
1278 #if 0
1279 if (file->f_mode & FMODE_READ) {
1280 if (val & PCM_ENABLE_INPUT) {
1281 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1282 return ret;
1283 start_adc(s);
1284 } else
1285 stop_adc(s);
1286 }
1287 if (file->f_mode & FMODE_WRITE) {
1288 if (val & PCM_ENABLE_OUTPUT) {
1289 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1290 return ret;
1291 start_dac2(s);
1292 } else
1293 stop_dac2(s);
1294 }
1295 #endif
1296 return 0;
1297
1298 case SNDCTL_DSP_GETOSPACE:
1299 if (!(file->f_mode & FMODE_WRITE))
1300 return -EINVAL;
1301
1302 val = rme96xx_gethwptr(dma->s,0);
1303
1304
1305 count = rme96xx_getospace(dma,val);
1306 if (!s->started) count = s->fragsize*2;
1307 abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1308 abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1309 abinfo.fragstotal = 2;
1310 abinfo.fragments = (count > s->fragsize);
1311
1312 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1313
1314 case SNDCTL_DSP_GETISPACE:
1315 if (!(file->f_mode & FMODE_READ))
1316 return -EINVAL;
1317
1318 val = rme96xx_gethwptr(dma->s,0);
1319
1320 count = rme96xx_getispace(dma,val);
1321
1322 abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1323 abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;
1324 abinfo.fragstotal = 2;
1325 abinfo.fragments = count > s->fragsize;
1326 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1327
1328 case SNDCTL_DSP_NONBLOCK:
1329 file->f_flags |= O_NONBLOCK;
1330 return 0;
1331
1332 case SNDCTL_DSP_GETODELAY: /* What should this exactly do ? ,
1333 ATM it is just abinfo.bytes */
1334 if (!(file->f_mode & FMODE_WRITE))
1335 return -EINVAL;
1336
1337 val = rme96xx_gethwptr(dma->s,0);
1338 count = val - dma->readptr;
1339 if (count < 0)
1340 count += s->fragsize<<1;
1341
1342 return put_user(count, p);
1343
1344
1345 /* check out how to use mmaped mode (can only be blocked !!!) */
1346 case SNDCTL_DSP_GETIPTR:
1347 if (!(file->f_mode & FMODE_READ))
1348 return -EINVAL;
1349 val = rme96xx_gethwptr(dma->s,0);
1350 spin_lock_irqsave(&s->lock,flags);
1351 cinfo.bytes = s->fragsize<<1;
1352 count = val - dma->readptr;
1353 if (count < 0)
1354 count += s->fragsize<<1;
1355
1356 cinfo.blocks = (count > s->fragsize);
1357 cinfo.ptr = val;
1358 if (dma->mmapped)
1359 dma->readptr &= s->fragsize<<1;
1360 spin_unlock_irqrestore(&s->lock,flags);
1361
1362 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1363 return -EFAULT;
1364 return 0;
1365
1366 case SNDCTL_DSP_GETOPTR:
1367 if (!(file->f_mode & FMODE_READ))
1368 return -EINVAL;
1369 val = rme96xx_gethwptr(dma->s,0);
1370 spin_lock_irqsave(&s->lock,flags);
1371 cinfo.bytes = s->fragsize<<1;
1372 count = val - dma->writeptr;
1373 if (count < 0)
1374 count += s->fragsize<<1;
1375
1376 cinfo.blocks = (count > s->fragsize);
1377 cinfo.ptr = val;
1378 if (dma->mmapped)
1379 dma->writeptr &= s->fragsize<<1;
1380 spin_unlock_irqrestore(&s->lock,flags);
1381 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1382 return -EFAULT;
1383 return 0;
1384 case SNDCTL_DSP_GETBLKSIZE:
1385 return put_user(s->fragsize, p);
1386
1387 case SNDCTL_DSP_SETFRAGMENT:
1388 if (get_user(val, p))
1389 return -EFAULT;
1390 val&=0xffff;
1391 val -= 7;
1392 if (val < 0) val = 0;
1393 if (val > 7) val = 7;
1394 rme96xx_setlatency(s,val);
1395 return 0;
1396
1397 case SNDCTL_DSP_SUBDIVIDE:
1398 #if 0
1399 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1400 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1401 return -EINVAL;
1402 if (get_user(val, p))
1403 return -EFAULT;
1404 if (val != 1 && val != 2 && val != 4)
1405 return -EINVAL;
1406 if (file->f_mode & FMODE_READ)
1407 s->dma_adc.subdivision = val;
1408 if (file->f_mode & FMODE_WRITE)
1409 s->dma_dac2.subdivision = val;
1410 #endif
1411 return 0;
1412
1413 case SOUND_PCM_READ_RATE:
1414 /* HP20020201 */
1415 s->rate = rme96xx_get_sample_rate_status(s);
1416 return put_user(s->rate, p);
1417
1418 case SOUND_PCM_READ_CHANNELS:
1419 return put_user(dma->outchannels, p);
1420
1421 case SOUND_PCM_READ_BITS:
1422 switch (dma->format) {
1423 case AFMT_S32_BLOCKED:
1424 val = 32;
1425 break;
1426 case AFMT_S16_LE:
1427 val = 16;
1428 break;
1429 }
1430 return put_user(val, p);
1431
1432 case SOUND_PCM_WRITE_FILTER:
1433 case SNDCTL_DSP_SETSYNCRO:
1434 case SOUND_PCM_READ_FILTER:
1435 return -EINVAL;
1436
1437 }
1438
1439
1440 return -ENODEV;
1441 }
1442
1443
1444
1445 static int rme96xx_open(struct inode *in, struct file *f)
1446 {
1447 int minor = iminor(in);
1448 struct list_head *list;
1449 int devnum;
1450 rme96xx_info *s;
1451 struct dmabuf* dma;
1452 DECLARE_WAITQUEUE(wait, current);
1453
1454 DBG(printk("device num %d open\n",devnum));
1455
1456 nonseekable_open(in, f);
1457 for (list = devs.next; ; list = list->next) {
1458 if (list == &devs)
1459 return -ENODEV;
1460 s = list_entry(list, rme96xx_info, devs);
1461 for (devnum=0; devnum<devices; devnum++)
1462 if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1463 break;
1464 if (devnum<devices)
1465 break;
1466 }
1467 VALIDATE_STATE(s);
1468
1469 dma = &s->dma[devnum];
1470 f->private_data = dma;
1471 /* wait for device to become free */
1472 down(&dma->open_sem);
1473 while (dma->open_mode & f->f_mode) {
1474 if (f->f_flags & O_NONBLOCK) {
1475 up(&dma->open_sem);
1476 return -EBUSY;
1477 }
1478 add_wait_queue(&dma->open_wait, &wait);
1479 __set_current_state(TASK_INTERRUPTIBLE);
1480 up(&dma->open_sem);
1481 schedule();
1482 remove_wait_queue(&dma->open_wait, &wait);
1483 set_current_state(TASK_RUNNING);
1484 if (signal_pending(current))
1485 return -ERESTARTSYS;
1486 down(&dma->open_sem);
1487 }
1488
1489 COMM ("hardware open")
1490
1491 if (!dma->opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1492
1493 dma->open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1494 dma->opened = 1;
1495 up(&dma->open_sem);
1496
1497 DBG(printk("device num %d open finished\n",devnum));
1498 return 0;
1499 }
1500
1501 static int rme96xx_release(struct inode *in, struct file *file)
1502 {
1503 struct dmabuf * dma = (struct dmabuf*) file->private_data;
1504 /* int hwp; ... was unused HP20020201 */
1505 DBG(printk("%s\n", __FUNCTION__));
1506
1507 COMM ("draining")
1508 if (dma->open_mode & FMODE_WRITE) {
1509 #if 0 /* Why doesn't this work with some cards ?? */
1510 hwp = rme96xx_gethwptr(dma->s,0);
1511 while (rme96xx_getospace(dma,hwp)) {
1512 interruptible_sleep_on(&(dma->wait));
1513 hwp = rme96xx_gethwptr(dma->s,0);
1514 }
1515 #endif
1516 rme96xx_clearbufs(dma);
1517 }
1518
1519 dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1520
1521 if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1522 dma->opened = 0;
1523 if (dma->s->started) rme96xx_startcard(dma->s,1);
1524 }
1525
1526 wake_up(&dma->open_wait);
1527 up(&dma->open_sem);
1528
1529 return 0;
1530 }
1531
1532
1533 static ssize_t rme96xx_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1534 {
1535 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1536 ssize_t ret = 0;
1537 int cnt; /* number of bytes from "buffer" that will/can be used */
1538 int hop = count/dma->outchannels;
1539 int hwp;
1540 int exact = (file->f_flags & O_NONBLOCK);
1541
1542
1543 if(dma == NULL || (dma->s) == NULL)
1544 return -ENXIO;
1545
1546 if (dma->mmapped || !dma->opened)
1547 return -ENXIO;
1548
1549 if (!access_ok(VERIFY_READ, buffer, count))
1550 return -EFAULT;
1551
1552 if (! (dma->open_mode & FMODE_WRITE))
1553 return -ENXIO;
1554
1555 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1556 hwp = rme96xx_gethwptr(dma->s,0);
1557
1558 if(!(dma->started)){
1559 COMM ("first write")
1560
1561 dma->readptr = hwp;
1562 dma->writeptr = hwp;
1563 dma->started = 1;
1564 }
1565
1566 while (count > 0) {
1567 cnt = rme96xx_getospace(dma,hwp);
1568 cnt>>=dma->formatshift;
1569 cnt*=dma->outchannels;
1570 if (cnt > count)
1571 cnt = count;
1572
1573 if (cnt != 0) {
1574 if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1575 return ret ? ret : -EFAULT;
1576 count -= cnt;
1577 buffer += cnt;
1578 ret += cnt;
1579 if (count == 0) return ret;
1580 }
1581 if (file->f_flags & O_NONBLOCK)
1582 return ret ? ret : -EAGAIN;
1583
1584 if ((hwp - dma->writeptr) <= 0) {
1585 interruptible_sleep_on(&(dma->wait));
1586
1587 if (signal_pending(current))
1588 return ret ? ret : -ERESTARTSYS;
1589 }
1590
1591 hwp = rme96xx_gethwptr(dma->s,exact);
1592
1593 }; /* count > 0 */
1594
1595 return ret;
1596 }
1597
1598 static ssize_t rme96xx_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1599 {
1600 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1601 ssize_t ret = 0;
1602 int cnt; /* number of bytes from "buffer" that will/can be used */
1603 int hop = count/dma->inchannels;
1604 int hwp;
1605 int exact = (file->f_flags & O_NONBLOCK);
1606
1607
1608 if(dma == NULL || (dma->s) == NULL)
1609 return -ENXIO;
1610
1611 if (dma->mmapped || !dma->opened)
1612 return -ENXIO;
1613
1614 if (!access_ok(VERIFY_WRITE, buffer, count))
1615 return -EFAULT;
1616
1617 if (! (dma->open_mode & FMODE_READ))
1618 return -ENXIO;
1619
1620 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1621 hwp = rme96xx_gethwptr(dma->s,0);
1622
1623 if(!(dma->started)){
1624 COMM ("first read")
1625
1626 dma->writeptr = hwp;
1627 dma->readptr = hwp;
1628 dma->started = 1;
1629 }
1630
1631 while (count > 0) {
1632 cnt = rme96xx_getispace(dma,hwp);
1633 cnt>>=dma->formatshift;
1634 cnt*=dma->inchannels;
1635
1636 if (cnt > count)
1637 cnt = count;
1638
1639 if (cnt != 0) {
1640
1641 if (rme96xx_copytouser(dma,buffer,cnt,hop))
1642 return ret ? ret : -EFAULT;
1643
1644 count -= cnt;
1645 buffer += cnt;
1646 ret += cnt;
1647 if (count == 0) return ret;
1648 }
1649 if (file->f_flags & O_NONBLOCK)
1650 return ret ? ret : -EAGAIN;
1651
1652 if ((hwp - dma->readptr) <= 0) {
1653 interruptible_sleep_on(&(dma->wait));
1654
1655 if (signal_pending(current))
1656 return ret ? ret : -ERESTARTSYS;
1657 }
1658 hwp = rme96xx_gethwptr(dma->s,exact);
1659
1660 }; /* count > 0 */
1661
1662 return ret;
1663 }
1664
1665 static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1666 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1667 rme96xx_info* s = dma->s;
1668 unsigned long size;
1669
1670 VALIDATE_STATE(s);
1671 lock_kernel();
1672
1673 if (vma->vm_pgoff != 0) {
1674 unlock_kernel();
1675 return -EINVAL;
1676 }
1677 size = vma->vm_end - vma->vm_start;
1678 if (size > RME96xx_DMA_MAX_SIZE) {
1679 unlock_kernel();
1680 return -EINVAL;
1681 }
1682
1683
1684 if (vma->vm_flags & VM_WRITE) {
1685 if (!s->started) rme96xx_startcard(s,1);
1686
1687 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1688 unlock_kernel();
1689 return -EAGAIN;
1690 }
1691 }
1692 else if (vma->vm_flags & VM_READ) {
1693 if (!s->started) rme96xx_startcard(s,1);
1694 if (remap_pfn_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE) >> PAGE_SHIFT, size, vma->vm_page_prot)) {
1695 unlock_kernel();
1696 return -EAGAIN;
1697 }
1698 } else {
1699 unlock_kernel();
1700 return -EINVAL;
1701 }
1702
1703
1704 /* this is the mapping */
1705 vma->vm_flags &= ~VM_IO;
1706 dma->mmapped = 1;
1707 unlock_kernel();
1708 return 0;
1709 }
1710
1711 static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1712 {
1713 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1714 rme96xx_info* s = dma->s;
1715 unsigned int mask = 0;
1716 unsigned int hwp,cnt;
1717
1718 DBG(printk("rme96xx poll_wait ...\n"));
1719 VALIDATE_STATE(s);
1720
1721 if (!s->started) {
1722 mask |= POLLOUT | POLLWRNORM;
1723 }
1724 poll_wait(file, &dma->wait, wait);
1725
1726 hwp = rme96xx_gethwptr(dma->s,0);
1727
1728 DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1729
1730 cnt = rme96xx_getispace(dma,hwp);
1731
1732 if (file->f_mode & FMODE_READ)
1733 if (cnt > 0)
1734 mask |= POLLIN | POLLRDNORM;
1735
1736
1737
1738 cnt = rme96xx_getospace(dma,hwp);
1739
1740 if (file->f_mode & FMODE_WRITE)
1741 if (cnt > 0)
1742 mask |= POLLOUT | POLLWRNORM;
1743
1744
1745 // printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1746
1747 return mask;
1748 }
1749
1750
1751 static struct file_operations rme96xx_audio_fops = {
1752 .owner = THIS_MODULE,
1753 .read = rme96xx_read,
1754 .write = rme96xx_write,
1755 .poll = rme96xx_poll,
1756 .ioctl = rme96xx_ioctl,
1757 .mmap = rm96xx_mmap,
1758 .open = rme96xx_open,
1759 .release = rme96xx_release
1760 };
1761
1762 static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1763 {
1764 int minor = iminor(inode);
1765 struct list_head *list;
1766 rme96xx_info *s;
1767
1768 COMM ("mixer open");
1769
1770 nonseekable_open(inode, file);
1771 for (list = devs.next; ; list = list->next) {
1772 if (list == &devs)
1773 return -ENODEV;
1774 s = list_entry(list, rme96xx_info, devs);
1775 if (s->mixer== minor)
1776 break;
1777 }
1778 VALIDATE_STATE(s);
1779 file->private_data = s;
1780
1781 COMM ("mixer opened")
1782 return 0;
1783 }
1784
1785 static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1786 {
1787 rme96xx_info *s = (rme96xx_info *)file->private_data;
1788 u32 status;
1789 int spdifrate;
1790 void __user *argp = (void __user *)arg;
1791 int __user *p = argp;
1792
1793 status = readl(s->iobase + RME96xx_status_register);
1794 /* hack to convert rev 1.5 SPDIF rate to "crystalrate" format HP 20020201 */
1795 rme96xx_spdif_sample_rate(s,&spdifrate);
1796 status = (status & ~RME96xx_F) | ((spdifrate<<22) & RME96xx_F);
1797
1798 VALIDATE_STATE(s);
1799 if (cmd == SOUND_MIXER_PRIVATE1) {
1800 rme_mixer mixer;
1801 if (copy_from_user(&mixer,argp,sizeof(mixer)))
1802 return -EFAULT;
1803
1804 mixer.devnr &= RME96xx_MASK_DEVS;
1805 if (mixer.devnr >= devices)
1806 mixer.devnr = devices-1;
1807 if (file->f_mode & FMODE_WRITE && !s->dma[mixer.devnr].opened) {
1808 /* modify only if device not open */
1809 if (mixer.o_offset < 0)
1810 mixer.o_offset = 0;
1811 if (mixer.o_offset >= RME96xx_CHANNELS_PER_CARD)
1812 mixer.o_offset = RME96xx_CHANNELS_PER_CARD-1;
1813 if (mixer.i_offset < 0)
1814 mixer.i_offset = 0;
1815 if (mixer.i_offset >= RME96xx_CHANNELS_PER_CARD)
1816 mixer.i_offset = RME96xx_CHANNELS_PER_CARD-1;
1817 s->dma[mixer.devnr].outoffset = mixer.o_offset;
1818 s->dma[mixer.devnr].inoffset = mixer.i_offset;
1819 }
1820
1821 mixer.o_offset = s->dma[mixer.devnr].outoffset;
1822 mixer.i_offset = s->dma[mixer.devnr].inoffset;
1823
1824 return copy_to_user(argp, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1825 }
1826 if (cmd == SOUND_MIXER_PRIVATE2) {
1827 return put_user(status, p);
1828 }
1829 if (cmd == SOUND_MIXER_PRIVATE3) {
1830 u32 control;
1831 if (copy_from_user(&control,argp,sizeof(control)))
1832 return -EFAULT;
1833 if (file->f_mode & FMODE_WRITE) {
1834 s->control_register &= ~RME96xx_mixer_allowed;
1835 s->control_register |= control & RME96xx_mixer_allowed;
1836 writel(control,s->iobase + RME96xx_control_register);
1837 }
1838
1839 return put_user(s->control_register, p);
1840 }
1841 return -1;
1842 }
1843
1844
1845
1846 static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1847 {
1848 return 0;
1849 }
1850
1851 static /*const*/ struct file_operations rme96xx_mixer_fops = {
1852 .owner = THIS_MODULE,
1853 .ioctl = rme96xx_mixer_ioctl,
1854 .open = rme96xx_mixer_open,
1855 .release = rme96xx_mixer_release,
1856 };
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