1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Analog Devices 1889 audio driver
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
20 * SG DMA support (this will need *a lot* of work)
23 #include <linux/init.h>
24 #include <linux/pci.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/compiler.h>
29 #include <linux/delay.h>
30 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/pcm.h>
35 #include <sound/initval.h>
36 #include <sound/ac97_codec.h>
39 #include "ac97/ac97_id.h"
41 #define AD1889_DRVVER "Version: 1.7"
43 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
44 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45 MODULE_LICENSE("GPL");
47 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
;
48 module_param_array(index
, int, NULL
, 0444);
49 MODULE_PARM_DESC(index
, "Index value for the AD1889 soundcard.");
51 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
;
52 module_param_array(id
, charp
, NULL
, 0444);
53 MODULE_PARM_DESC(id
, "ID string for the AD1889 soundcard.");
55 static bool enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
;
56 module_param_array(enable
, bool, NULL
, 0444);
57 MODULE_PARM_DESC(enable
, "Enable AD1889 soundcard.");
59 static char *ac97_quirk
[SNDRV_CARDS
];
60 module_param_array(ac97_quirk
, charp
, NULL
, 0444);
61 MODULE_PARM_DESC(ac97_quirk
, "AC'97 workaround for strange hardware.");
63 #define DEVNAME "ad1889"
64 #define PFX DEVNAME ": "
66 /* keep track of some hw registers */
67 struct ad1889_register_state
{
68 u16 reg
; /* reg setup */
69 u32 addr
; /* dma base address */
70 unsigned long size
; /* DMA buffer size */
74 struct snd_card
*card
;
81 struct snd_ac97
*ac97
;
82 struct snd_ac97_bus
*ac97_bus
;
84 struct snd_info_entry
*proc
;
86 struct snd_pcm_substream
*psubs
;
87 struct snd_pcm_substream
*csubs
;
89 /* playback register state */
90 struct ad1889_register_state wave
;
91 struct ad1889_register_state ramc
;
97 ad1889_readw(struct snd_ad1889
*chip
, unsigned reg
)
99 return readw(chip
->iobase
+ reg
);
103 ad1889_writew(struct snd_ad1889
*chip
, unsigned reg
, u16 val
)
105 writew(val
, chip
->iobase
+ reg
);
109 ad1889_readl(struct snd_ad1889
*chip
, unsigned reg
)
111 return readl(chip
->iobase
+ reg
);
115 ad1889_writel(struct snd_ad1889
*chip
, unsigned reg
, u32 val
)
117 writel(val
, chip
->iobase
+ reg
);
121 ad1889_unmute(struct snd_ad1889
*chip
)
124 st
= ad1889_readw(chip
, AD_DS_WADA
) &
125 ~(AD_DS_WADA_RWAM
| AD_DS_WADA_LWAM
);
126 ad1889_writew(chip
, AD_DS_WADA
, st
);
127 ad1889_readw(chip
, AD_DS_WADA
);
131 ad1889_mute(struct snd_ad1889
*chip
)
134 st
= ad1889_readw(chip
, AD_DS_WADA
) | AD_DS_WADA_RWAM
| AD_DS_WADA_LWAM
;
135 ad1889_writew(chip
, AD_DS_WADA
, st
);
136 ad1889_readw(chip
, AD_DS_WADA
);
140 ad1889_load_adc_buffer_address(struct snd_ad1889
*chip
, u32 address
)
142 ad1889_writel(chip
, AD_DMA_ADCBA
, address
);
143 ad1889_writel(chip
, AD_DMA_ADCCA
, address
);
147 ad1889_load_adc_buffer_count(struct snd_ad1889
*chip
, u32 count
)
149 ad1889_writel(chip
, AD_DMA_ADCBC
, count
);
150 ad1889_writel(chip
, AD_DMA_ADCCC
, count
);
154 ad1889_load_adc_interrupt_count(struct snd_ad1889
*chip
, u32 count
)
156 ad1889_writel(chip
, AD_DMA_ADCIB
, count
);
157 ad1889_writel(chip
, AD_DMA_ADCIC
, count
);
161 ad1889_load_wave_buffer_address(struct snd_ad1889
*chip
, u32 address
)
163 ad1889_writel(chip
, AD_DMA_WAVBA
, address
);
164 ad1889_writel(chip
, AD_DMA_WAVCA
, address
);
168 ad1889_load_wave_buffer_count(struct snd_ad1889
*chip
, u32 count
)
170 ad1889_writel(chip
, AD_DMA_WAVBC
, count
);
171 ad1889_writel(chip
, AD_DMA_WAVCC
, count
);
175 ad1889_load_wave_interrupt_count(struct snd_ad1889
*chip
, u32 count
)
177 ad1889_writel(chip
, AD_DMA_WAVIB
, count
);
178 ad1889_writel(chip
, AD_DMA_WAVIC
, count
);
182 ad1889_channel_reset(struct snd_ad1889
*chip
, unsigned int channel
)
186 if (channel
& AD_CHAN_WAV
) {
187 /* Disable wave channel */
188 reg
= ad1889_readw(chip
, AD_DS_WSMC
) & ~AD_DS_WSMC_WAEN
;
189 ad1889_writew(chip
, AD_DS_WSMC
, reg
);
190 chip
->wave
.reg
= reg
;
193 reg
= ad1889_readw(chip
, AD_DMA_WAV
);
194 reg
&= AD_DMA_IM_DIS
;
196 ad1889_writew(chip
, AD_DMA_WAV
, reg
);
198 /* clear IRQ and address counters and pointers */
199 ad1889_load_wave_buffer_address(chip
, 0x0);
200 ad1889_load_wave_buffer_count(chip
, 0x0);
201 ad1889_load_wave_interrupt_count(chip
, 0x0);
204 ad1889_readw(chip
, AD_DMA_WAV
);
207 if (channel
& AD_CHAN_ADC
) {
208 /* Disable ADC channel */
209 reg
= ad1889_readw(chip
, AD_DS_RAMC
) & ~AD_DS_RAMC_ADEN
;
210 ad1889_writew(chip
, AD_DS_RAMC
, reg
);
211 chip
->ramc
.reg
= reg
;
213 reg
= ad1889_readw(chip
, AD_DMA_ADC
);
214 reg
&= AD_DMA_IM_DIS
;
216 ad1889_writew(chip
, AD_DMA_ADC
, reg
);
218 ad1889_load_adc_buffer_address(chip
, 0x0);
219 ad1889_load_adc_buffer_count(chip
, 0x0);
220 ad1889_load_adc_interrupt_count(chip
, 0x0);
223 ad1889_readw(chip
, AD_DMA_ADC
);
228 snd_ad1889_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
230 struct snd_ad1889
*chip
= ac97
->private_data
;
231 return ad1889_readw(chip
, AD_AC97_BASE
+ reg
);
235 snd_ad1889_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
237 struct snd_ad1889
*chip
= ac97
->private_data
;
238 ad1889_writew(chip
, AD_AC97_BASE
+ reg
, val
);
242 snd_ad1889_ac97_ready(struct snd_ad1889
*chip
)
244 int retry
= 400; /* average needs 352 msec */
246 while (!(ad1889_readw(chip
, AD_AC97_ACIC
) & AD_AC97_ACIC_ACRDY
)
248 usleep_range(1000, 2000);
250 dev_err(chip
->card
->dev
, "[%s] Link is not ready.\n",
254 dev_dbg(chip
->card
->dev
, "[%s] ready after %d ms\n", __func__
, 400 - retry
);
259 static const struct snd_pcm_hardware snd_ad1889_playback_hw
= {
260 .info
= SNDRV_PCM_INFO_MMAP
| SNDRV_PCM_INFO_INTERLEAVED
|
261 SNDRV_PCM_INFO_MMAP_VALID
| SNDRV_PCM_INFO_BLOCK_TRANSFER
,
262 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
263 .rates
= SNDRV_PCM_RATE_CONTINUOUS
| SNDRV_PCM_RATE_8000_48000
,
264 .rate_min
= 8000, /* docs say 7000, but we're lazy */
268 .buffer_bytes_max
= BUFFER_BYTES_MAX
,
269 .period_bytes_min
= PERIOD_BYTES_MIN
,
270 .period_bytes_max
= PERIOD_BYTES_MAX
,
271 .periods_min
= PERIODS_MIN
,
272 .periods_max
= PERIODS_MAX
,
276 static const struct snd_pcm_hardware snd_ad1889_capture_hw
= {
277 .info
= SNDRV_PCM_INFO_MMAP
| SNDRV_PCM_INFO_INTERLEAVED
|
278 SNDRV_PCM_INFO_MMAP_VALID
| SNDRV_PCM_INFO_BLOCK_TRANSFER
,
279 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
280 .rates
= SNDRV_PCM_RATE_48000
,
281 .rate_min
= 48000, /* docs say we could to VSR, but we're lazy */
285 .buffer_bytes_max
= BUFFER_BYTES_MAX
,
286 .period_bytes_min
= PERIOD_BYTES_MIN
,
287 .period_bytes_max
= PERIOD_BYTES_MAX
,
288 .periods_min
= PERIODS_MIN
,
289 .periods_max
= PERIODS_MAX
,
294 snd_ad1889_playback_open(struct snd_pcm_substream
*ss
)
296 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
297 struct snd_pcm_runtime
*rt
= ss
->runtime
;
300 rt
->hw
= snd_ad1889_playback_hw
;
306 snd_ad1889_capture_open(struct snd_pcm_substream
*ss
)
308 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
309 struct snd_pcm_runtime
*rt
= ss
->runtime
;
312 rt
->hw
= snd_ad1889_capture_hw
;
318 snd_ad1889_playback_close(struct snd_pcm_substream
*ss
)
320 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
326 snd_ad1889_capture_close(struct snd_pcm_substream
*ss
)
328 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
334 snd_ad1889_playback_prepare(struct snd_pcm_substream
*ss
)
336 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
337 struct snd_pcm_runtime
*rt
= ss
->runtime
;
338 unsigned int size
= snd_pcm_lib_buffer_bytes(ss
);
339 unsigned int count
= snd_pcm_lib_period_bytes(ss
);
342 ad1889_channel_reset(chip
, AD_CHAN_WAV
);
344 reg
= ad1889_readw(chip
, AD_DS_WSMC
);
346 /* Mask out 16-bit / Stereo */
347 reg
&= ~(AD_DS_WSMC_WA16
| AD_DS_WSMC_WAST
);
349 if (snd_pcm_format_width(rt
->format
) == 16)
350 reg
|= AD_DS_WSMC_WA16
;
352 if (rt
->channels
> 1)
353 reg
|= AD_DS_WSMC_WAST
;
355 /* let's make sure we don't clobber ourselves */
356 spin_lock_irq(&chip
->lock
);
358 chip
->wave
.size
= size
;
359 chip
->wave
.reg
= reg
;
360 chip
->wave
.addr
= rt
->dma_addr
;
362 ad1889_writew(chip
, AD_DS_WSMC
, chip
->wave
.reg
);
364 /* Set sample rates on the codec */
365 ad1889_writew(chip
, AD_DS_WAS
, rt
->rate
);
368 ad1889_load_wave_buffer_address(chip
, chip
->wave
.addr
);
369 ad1889_load_wave_buffer_count(chip
, size
);
370 ad1889_load_wave_interrupt_count(chip
, count
);
373 ad1889_readw(chip
, AD_DS_WSMC
);
375 spin_unlock_irq(&chip
->lock
);
377 dev_dbg(chip
->card
->dev
,
378 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
379 chip
->wave
.addr
, count
, size
, reg
, rt
->rate
);
384 snd_ad1889_capture_prepare(struct snd_pcm_substream
*ss
)
386 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
387 struct snd_pcm_runtime
*rt
= ss
->runtime
;
388 unsigned int size
= snd_pcm_lib_buffer_bytes(ss
);
389 unsigned int count
= snd_pcm_lib_period_bytes(ss
);
392 ad1889_channel_reset(chip
, AD_CHAN_ADC
);
394 reg
= ad1889_readw(chip
, AD_DS_RAMC
);
396 /* Mask out 16-bit / Stereo */
397 reg
&= ~(AD_DS_RAMC_AD16
| AD_DS_RAMC_ADST
);
399 if (snd_pcm_format_width(rt
->format
) == 16)
400 reg
|= AD_DS_RAMC_AD16
;
402 if (rt
->channels
> 1)
403 reg
|= AD_DS_RAMC_ADST
;
405 /* let's make sure we don't clobber ourselves */
406 spin_lock_irq(&chip
->lock
);
408 chip
->ramc
.size
= size
;
409 chip
->ramc
.reg
= reg
;
410 chip
->ramc
.addr
= rt
->dma_addr
;
412 ad1889_writew(chip
, AD_DS_RAMC
, chip
->ramc
.reg
);
415 ad1889_load_adc_buffer_address(chip
, chip
->ramc
.addr
);
416 ad1889_load_adc_buffer_count(chip
, size
);
417 ad1889_load_adc_interrupt_count(chip
, count
);
420 ad1889_readw(chip
, AD_DS_RAMC
);
422 spin_unlock_irq(&chip
->lock
);
424 dev_dbg(chip
->card
->dev
,
425 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
426 chip
->ramc
.addr
, count
, size
, reg
, rt
->rate
);
430 /* this is called in atomic context with IRQ disabled.
431 Must be as fast as possible and not sleep.
432 DMA should be *triggered* by this call.
433 The WSMC "WAEN" bit triggers DMA Wave On/Off */
435 snd_ad1889_playback_trigger(struct snd_pcm_substream
*ss
, int cmd
)
438 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
440 wsmc
= ad1889_readw(chip
, AD_DS_WSMC
);
443 case SNDRV_PCM_TRIGGER_START
:
444 /* enable DMA loop & interrupts */
445 ad1889_writew(chip
, AD_DMA_WAV
, AD_DMA_LOOP
| AD_DMA_IM_CNT
);
446 wsmc
|= AD_DS_WSMC_WAEN
;
447 /* 1 to clear CHSS bit */
448 ad1889_writel(chip
, AD_DMA_CHSS
, AD_DMA_CHSS_WAVS
);
451 case SNDRV_PCM_TRIGGER_STOP
:
453 wsmc
&= ~AD_DS_WSMC_WAEN
;
460 chip
->wave
.reg
= wsmc
;
461 ad1889_writew(chip
, AD_DS_WSMC
, wsmc
);
462 ad1889_readw(chip
, AD_DS_WSMC
); /* flush */
464 /* reset the chip when STOP - will disable IRQs */
465 if (cmd
== SNDRV_PCM_TRIGGER_STOP
)
466 ad1889_channel_reset(chip
, AD_CHAN_WAV
);
471 /* this is called in atomic context with IRQ disabled.
472 Must be as fast as possible and not sleep.
473 DMA should be *triggered* by this call.
474 The RAMC "ADEN" bit triggers DMA ADC On/Off */
476 snd_ad1889_capture_trigger(struct snd_pcm_substream
*ss
, int cmd
)
479 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
481 ramc
= ad1889_readw(chip
, AD_DS_RAMC
);
484 case SNDRV_PCM_TRIGGER_START
:
485 /* enable DMA loop & interrupts */
486 ad1889_writew(chip
, AD_DMA_ADC
, AD_DMA_LOOP
| AD_DMA_IM_CNT
);
487 ramc
|= AD_DS_RAMC_ADEN
;
488 /* 1 to clear CHSS bit */
489 ad1889_writel(chip
, AD_DMA_CHSS
, AD_DMA_CHSS_ADCS
);
491 case SNDRV_PCM_TRIGGER_STOP
:
492 ramc
&= ~AD_DS_RAMC_ADEN
;
498 chip
->ramc
.reg
= ramc
;
499 ad1889_writew(chip
, AD_DS_RAMC
, ramc
);
500 ad1889_readw(chip
, AD_DS_RAMC
); /* flush */
502 /* reset the chip when STOP - will disable IRQs */
503 if (cmd
== SNDRV_PCM_TRIGGER_STOP
)
504 ad1889_channel_reset(chip
, AD_CHAN_ADC
);
509 /* Called in atomic context with IRQ disabled */
510 static snd_pcm_uframes_t
511 snd_ad1889_playback_pointer(struct snd_pcm_substream
*ss
)
514 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
516 if (unlikely(!(chip
->wave
.reg
& AD_DS_WSMC_WAEN
)))
519 ptr
= ad1889_readl(chip
, AD_DMA_WAVCA
);
520 ptr
-= chip
->wave
.addr
;
522 if (snd_BUG_ON(ptr
>= chip
->wave
.size
))
525 return bytes_to_frames(ss
->runtime
, ptr
);
528 /* Called in atomic context with IRQ disabled */
529 static snd_pcm_uframes_t
530 snd_ad1889_capture_pointer(struct snd_pcm_substream
*ss
)
533 struct snd_ad1889
*chip
= snd_pcm_substream_chip(ss
);
535 if (unlikely(!(chip
->ramc
.reg
& AD_DS_RAMC_ADEN
)))
538 ptr
= ad1889_readl(chip
, AD_DMA_ADCCA
);
539 ptr
-= chip
->ramc
.addr
;
541 if (snd_BUG_ON(ptr
>= chip
->ramc
.size
))
544 return bytes_to_frames(ss
->runtime
, ptr
);
547 static const struct snd_pcm_ops snd_ad1889_playback_ops
= {
548 .open
= snd_ad1889_playback_open
,
549 .close
= snd_ad1889_playback_close
,
550 .prepare
= snd_ad1889_playback_prepare
,
551 .trigger
= snd_ad1889_playback_trigger
,
552 .pointer
= snd_ad1889_playback_pointer
,
555 static const struct snd_pcm_ops snd_ad1889_capture_ops
= {
556 .open
= snd_ad1889_capture_open
,
557 .close
= snd_ad1889_capture_close
,
558 .prepare
= snd_ad1889_capture_prepare
,
559 .trigger
= snd_ad1889_capture_trigger
,
560 .pointer
= snd_ad1889_capture_pointer
,
564 snd_ad1889_interrupt(int irq
, void *dev_id
)
567 struct snd_ad1889
*chip
= dev_id
;
569 st
= ad1889_readl(chip
, AD_DMA_DISR
);
572 ad1889_writel(chip
, AD_DMA_DISR
, st
);
579 if (st
& (AD_DMA_DISR_PMAI
|AD_DMA_DISR_PTAI
))
580 dev_dbg(chip
->card
->dev
,
581 "Unexpected master or target abort interrupt!\n");
583 if ((st
& AD_DMA_DISR_WAVI
) && chip
->psubs
)
584 snd_pcm_period_elapsed(chip
->psubs
);
585 if ((st
& AD_DMA_DISR_ADCI
) && chip
->csubs
)
586 snd_pcm_period_elapsed(chip
->csubs
);
592 snd_ad1889_pcm_init(struct snd_ad1889
*chip
, int device
)
597 err
= snd_pcm_new(chip
->card
, chip
->card
->driver
, device
, 1, 1, &pcm
);
601 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
,
602 &snd_ad1889_playback_ops
);
603 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
,
604 &snd_ad1889_capture_ops
);
606 pcm
->private_data
= chip
;
608 strcpy(pcm
->name
, chip
->card
->shortname
);
614 snd_pcm_set_managed_buffer_all(pcm
, SNDRV_DMA_TYPE_DEV
, &chip
->pci
->dev
,
615 BUFFER_BYTES_MAX
/ 2, BUFFER_BYTES_MAX
);
621 snd_ad1889_proc_read(struct snd_info_entry
*entry
, struct snd_info_buffer
*buffer
)
623 struct snd_ad1889
*chip
= entry
->private_data
;
627 reg
= ad1889_readw(chip
, AD_DS_WSMC
);
628 snd_iprintf(buffer
, "Wave output: %s\n",
629 (reg
& AD_DS_WSMC_WAEN
) ? "enabled" : "disabled");
630 snd_iprintf(buffer
, "Wave Channels: %s\n",
631 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
632 snd_iprintf(buffer
, "Wave Quality: %d-bit linear\n",
633 (reg
& AD_DS_WSMC_WA16
) ? 16 : 8);
635 /* WARQ is at offset 12 */
636 tmp
= (reg
& AD_DS_WSMC_WARQ
) ?
637 ((((reg
& AD_DS_WSMC_WARQ
) >> 12) & 0x01) ? 12 : 18) : 4;
638 tmp
/= (reg
& AD_DS_WSMC_WAST
) ? 2 : 1;
640 snd_iprintf(buffer
, "Wave FIFO: %d %s words\n\n", tmp
,
641 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
644 snd_iprintf(buffer
, "Synthesis output: %s\n",
645 reg
& AD_DS_WSMC_SYEN
? "enabled" : "disabled");
647 /* SYRQ is at offset 4 */
648 tmp
= (reg
& AD_DS_WSMC_SYRQ
) ?
649 ((((reg
& AD_DS_WSMC_SYRQ
) >> 4) & 0x01) ? 12 : 18) : 4;
650 tmp
/= (reg
& AD_DS_WSMC_WAST
) ? 2 : 1;
652 snd_iprintf(buffer
, "Synthesis FIFO: %d %s words\n\n", tmp
,
653 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
655 reg
= ad1889_readw(chip
, AD_DS_RAMC
);
656 snd_iprintf(buffer
, "ADC input: %s\n",
657 (reg
& AD_DS_RAMC_ADEN
) ? "enabled" : "disabled");
658 snd_iprintf(buffer
, "ADC Channels: %s\n",
659 (reg
& AD_DS_RAMC_ADST
) ? "stereo" : "mono");
660 snd_iprintf(buffer
, "ADC Quality: %d-bit linear\n",
661 (reg
& AD_DS_RAMC_AD16
) ? 16 : 8);
663 /* ACRQ is at offset 4 */
664 tmp
= (reg
& AD_DS_RAMC_ACRQ
) ?
665 ((((reg
& AD_DS_RAMC_ACRQ
) >> 4) & 0x01) ? 12 : 18) : 4;
666 tmp
/= (reg
& AD_DS_RAMC_ADST
) ? 2 : 1;
668 snd_iprintf(buffer
, "ADC FIFO: %d %s words\n\n", tmp
,
669 (reg
& AD_DS_RAMC_ADST
) ? "stereo" : "mono");
671 snd_iprintf(buffer
, "Resampler input: %s\n",
672 reg
& AD_DS_RAMC_REEN
? "enabled" : "disabled");
674 /* RERQ is at offset 12 */
675 tmp
= (reg
& AD_DS_RAMC_RERQ
) ?
676 ((((reg
& AD_DS_RAMC_RERQ
) >> 12) & 0x01) ? 12 : 18) : 4;
677 tmp
/= (reg
& AD_DS_RAMC_ADST
) ? 2 : 1;
679 snd_iprintf(buffer
, "Resampler FIFO: %d %s words\n\n", tmp
,
680 (reg
& AD_DS_WSMC_WAST
) ? "stereo" : "mono");
683 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
684 suggests that LSB is -3dB, which is more coherent with the logarithmic
685 nature of the dB scale */
686 reg
= ad1889_readw(chip
, AD_DS_WADA
);
687 snd_iprintf(buffer
, "Left: %s, -%d dB\n",
688 (reg
& AD_DS_WADA_LWAM
) ? "mute" : "unmute",
689 ((reg
& AD_DS_WADA_LWAA
) >> 8) * 3);
690 reg
= ad1889_readw(chip
, AD_DS_WADA
);
691 snd_iprintf(buffer
, "Right: %s, -%d dB\n",
692 (reg
& AD_DS_WADA_RWAM
) ? "mute" : "unmute",
693 (reg
& AD_DS_WADA_RWAA
) * 3);
695 reg
= ad1889_readw(chip
, AD_DS_WAS
);
696 snd_iprintf(buffer
, "Wave samplerate: %u Hz\n", reg
);
697 reg
= ad1889_readw(chip
, AD_DS_RES
);
698 snd_iprintf(buffer
, "Resampler samplerate: %u Hz\n", reg
);
702 snd_ad1889_proc_init(struct snd_ad1889
*chip
)
704 snd_card_ro_proc_new(chip
->card
, chip
->card
->driver
,
705 chip
, snd_ad1889_proc_read
);
708 static const struct ac97_quirk ac97_quirks
[] = {
710 .subvendor
= 0x11d4, /* AD */
711 .subdevice
= 0x1889, /* AD1889 */
712 .codec_id
= AC97_ID_AD1819
,
714 .type
= AC97_TUNE_HP_ONLY
720 snd_ad1889_ac97_xinit(struct snd_ad1889
*chip
)
724 reg
= ad1889_readw(chip
, AD_AC97_ACIC
);
725 reg
|= AD_AC97_ACIC_ACRD
; /* Reset Disable */
726 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
727 ad1889_readw(chip
, AD_AC97_ACIC
); /* flush posted write */
729 /* Interface Enable */
730 reg
|= AD_AC97_ACIC_ACIE
;
731 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
733 snd_ad1889_ac97_ready(chip
);
735 /* Audio Stream Output | Variable Sample Rate Mode */
736 reg
= ad1889_readw(chip
, AD_AC97_ACIC
);
737 reg
|= AD_AC97_ACIC_ASOE
| AD_AC97_ACIC_VSRM
;
738 ad1889_writew(chip
, AD_AC97_ACIC
, reg
);
739 ad1889_readw(chip
, AD_AC97_ACIC
); /* flush posted write */
744 snd_ad1889_ac97_bus_free(struct snd_ac97_bus
*bus
)
746 struct snd_ad1889
*chip
= bus
->private_data
;
747 chip
->ac97_bus
= NULL
;
751 snd_ad1889_ac97_free(struct snd_ac97
*ac97
)
753 struct snd_ad1889
*chip
= ac97
->private_data
;
758 snd_ad1889_ac97_init(struct snd_ad1889
*chip
, const char *quirk_override
)
761 struct snd_ac97_template ac97
;
762 static const struct snd_ac97_bus_ops ops
= {
763 .write
= snd_ad1889_ac97_write
,
764 .read
= snd_ad1889_ac97_read
,
767 /* doing that here, it works. */
768 snd_ad1889_ac97_xinit(chip
);
770 err
= snd_ac97_bus(chip
->card
, 0, &ops
, chip
, &chip
->ac97_bus
);
774 chip
->ac97_bus
->private_free
= snd_ad1889_ac97_bus_free
;
776 memset(&ac97
, 0, sizeof(ac97
));
777 ac97
.private_data
= chip
;
778 ac97
.private_free
= snd_ad1889_ac97_free
;
779 ac97
.pci
= chip
->pci
;
781 err
= snd_ac97_mixer(chip
->ac97_bus
, &ac97
, &chip
->ac97
);
785 snd_ac97_tune_hardware(chip
->ac97
, ac97_quirks
, quirk_override
);
791 snd_ad1889_free(struct snd_ad1889
*chip
)
796 spin_lock_irq(&chip
->lock
);
800 /* Turn off interrupt on count and zero DMA registers */
801 ad1889_channel_reset(chip
, AD_CHAN_WAV
| AD_CHAN_ADC
);
803 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
804 ad1889_writel(chip
, AD_DMA_DISR
, AD_DMA_DISR_PTAI
| AD_DMA_DISR_PMAI
);
805 ad1889_readl(chip
, AD_DMA_DISR
); /* flush, dammit! */
807 spin_unlock_irq(&chip
->lock
);
810 free_irq(chip
->irq
, chip
);
813 iounmap(chip
->iobase
);
814 pci_release_regions(chip
->pci
);
815 pci_disable_device(chip
->pci
);
821 snd_ad1889_dev_free(struct snd_device
*device
)
823 struct snd_ad1889
*chip
= device
->device_data
;
824 return snd_ad1889_free(chip
);
828 snd_ad1889_init(struct snd_ad1889
*chip
)
830 ad1889_writew(chip
, AD_DS_CCS
, AD_DS_CCS_CLKEN
); /* turn on clock */
831 ad1889_readw(chip
, AD_DS_CCS
); /* flush posted write */
833 usleep_range(10000, 11000);
835 /* enable Master and Target abort interrupts */
836 ad1889_writel(chip
, AD_DMA_DISR
, AD_DMA_DISR_PMAE
| AD_DMA_DISR_PTAE
);
842 snd_ad1889_create(struct snd_card
*card
,
844 struct snd_ad1889
**rchip
)
848 struct snd_ad1889
*chip
;
849 static const struct snd_device_ops ops
= {
850 .dev_free
= snd_ad1889_dev_free
,
855 if ((err
= pci_enable_device(pci
)) < 0)
858 /* check PCI availability (32bit DMA) */
859 if (dma_set_mask_and_coherent(&pci
->dev
, DMA_BIT_MASK(32))) {
860 dev_err(card
->dev
, "error setting 32-bit DMA mask.\n");
861 pci_disable_device(pci
);
865 /* allocate chip specific data with zero-filled memory */
866 if ((chip
= kzalloc(sizeof(*chip
), GFP_KERNEL
)) == NULL
) {
867 pci_disable_device(pci
);
872 card
->private_data
= chip
;
876 /* (1) PCI resource allocation */
877 if ((err
= pci_request_regions(pci
, card
->driver
)) < 0)
880 chip
->bar
= pci_resource_start(pci
, 0);
881 chip
->iobase
= pci_ioremap_bar(pci
, 0);
882 if (chip
->iobase
== NULL
) {
883 dev_err(card
->dev
, "unable to reserve region.\n");
890 spin_lock_init(&chip
->lock
); /* only now can we call ad1889_free */
892 if (request_irq(pci
->irq
, snd_ad1889_interrupt
,
893 IRQF_SHARED
, KBUILD_MODNAME
, chip
)) {
894 dev_err(card
->dev
, "cannot obtain IRQ %d\n", pci
->irq
);
895 snd_ad1889_free(chip
);
899 chip
->irq
= pci
->irq
;
900 card
->sync_irq
= chip
->irq
;
902 /* (2) initialization of the chip hardware */
903 if ((err
= snd_ad1889_init(chip
)) < 0) {
904 snd_ad1889_free(chip
);
908 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, chip
, &ops
)) < 0) {
909 snd_ad1889_free(chip
);
919 pci_disable_device(pci
);
925 snd_ad1889_probe(struct pci_dev
*pci
,
926 const struct pci_device_id
*pci_id
)
930 struct snd_card
*card
;
931 struct snd_ad1889
*chip
;
934 if (devno
>= SNDRV_CARDS
)
936 if (!enable
[devno
]) {
942 err
= snd_card_new(&pci
->dev
, index
[devno
], id
[devno
], THIS_MODULE
,
944 /* XXX REVISIT: we can probably allocate chip in this call */
948 strcpy(card
->driver
, "AD1889");
949 strcpy(card
->shortname
, "Analog Devices AD1889");
952 err
= snd_ad1889_create(card
, pci
, &chip
);
957 sprintf(card
->longname
, "%s at 0x%lx irq %i",
958 card
->shortname
, chip
->bar
, chip
->irq
);
961 /* register AC97 mixer */
962 err
= snd_ad1889_ac97_init(chip
, ac97_quirk
[devno
]);
966 err
= snd_ad1889_pcm_init(chip
, 0);
970 /* register proc interface */
971 snd_ad1889_proc_init(chip
);
974 err
= snd_card_register(card
);
979 pci_set_drvdata(pci
, card
);
990 snd_ad1889_remove(struct pci_dev
*pci
)
992 snd_card_free(pci_get_drvdata(pci
));
995 static const struct pci_device_id snd_ad1889_ids
[] = {
996 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES
, PCI_DEVICE_ID_AD1889JS
) },
999 MODULE_DEVICE_TABLE(pci
, snd_ad1889_ids
);
1001 static struct pci_driver ad1889_pci_driver
= {
1002 .name
= KBUILD_MODNAME
,
1003 .id_table
= snd_ad1889_ids
,
1004 .probe
= snd_ad1889_probe
,
1005 .remove
= snd_ad1889_remove
,
1008 module_pci_driver(ad1889_pci_driver
);