3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
12 * Wu Fengguang <wfg@linux.intel.com>
15 * Wu Fengguang <wfg@linux.intel.com>
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the Free
19 * Software Foundation; either version 2 of the License, or (at your option)
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software Foundation,
29 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include <sound/hdaudio.h>
41 #include <sound/hda_i915.h>
42 #include <sound/hda_chmap.h>
43 #include "hda_codec.h"
44 #include "hda_local.h"
47 static bool static_hdmi_pcm
;
48 module_param(static_hdmi_pcm
, bool, 0644);
49 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
51 #define is_haswell(codec) ((codec)->core.vendor_id == 0x80862807)
52 #define is_broadwell(codec) ((codec)->core.vendor_id == 0x80862808)
53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
57 || is_skylake(codec) || is_broxton(codec) \
58 || is_kabylake(codec))
60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
64 struct hdmi_spec_per_cvt
{
67 unsigned int channels_min
;
68 unsigned int channels_max
;
74 /* max. connections to a widget */
75 #define HDA_MAX_CONNECTIONS 32
77 struct hdmi_spec_per_pin
{
80 /* pin idx, different device entries on the same pin use the same idx */
83 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
87 struct hda_codec
*codec
;
88 struct hdmi_eld sink_eld
;
90 struct delayed_work work
;
91 struct hdmi_pcm
*pcm
; /* pointer to spec->pcm_rec[n] dynamically*/
92 int pcm_idx
; /* which pcm is attached. -1 means no pcm is attached */
94 bool setup
; /* the stream has been set up by prepare callback */
95 int channels
; /* current number of channels */
97 bool chmap_set
; /* channel-map override by ALSA API? */
98 unsigned char chmap
[8]; /* ALSA API channel-map */
99 #ifdef CONFIG_SND_PROC_FS
100 struct snd_info_entry
*proc_entry
;
104 /* operations used by generic code that can be overridden by patches */
106 int (*pin_get_eld
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
107 unsigned char *buf
, int *eld_size
);
109 void (*pin_setup_infoframe
)(struct hda_codec
*codec
, hda_nid_t pin_nid
,
110 int ca
, int active_channels
, int conn_type
);
112 /* enable/disable HBR (HD passthrough) */
113 int (*pin_hbr_setup
)(struct hda_codec
*codec
, hda_nid_t pin_nid
, bool hbr
);
115 int (*setup_stream
)(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
116 hda_nid_t pin_nid
, u32 stream_tag
, int format
);
118 void (*pin_cvt_fixup
)(struct hda_codec
*codec
,
119 struct hdmi_spec_per_pin
*per_pin
,
125 struct snd_jack
*jack
;
126 struct snd_kcontrol
*eld_ctl
;
131 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
132 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
135 * num_pins is the number of virtual pins
136 * for example, there are 3 pins, and each pin
137 * has 4 device entries, then the num_pins is 12
141 * num_nids is the number of real pins
142 * In the above example, num_nids is 3
146 * dev_num is the number of device entries
148 * In the above example, dev_num is 4
151 struct snd_array pins
; /* struct hdmi_spec_per_pin */
152 struct hdmi_pcm pcm_rec
[16];
153 struct mutex pcm_lock
;
154 /* pcm_bitmap means which pcms have been assigned to pins*/
155 unsigned long pcm_bitmap
;
156 int pcm_used
; /* counter of pcm_rec[] */
157 /* bitmap shows whether the pcm is opened in user space
158 * bit 0 means the first playback PCM (PCM3);
159 * bit 1 means the second playback PCM, and so on.
161 unsigned long pcm_in_use
;
163 struct hdmi_eld temp_eld
;
169 * Non-generic VIA/NVIDIA specific
171 struct hda_multi_out multiout
;
172 struct hda_pcm_stream pcm_playback
;
174 /* i915/powerwell (Haswell+/Valleyview+) specific */
175 bool use_acomp_notifier
; /* use i915 eld_notify callback for hotplug */
176 struct i915_audio_component_audio_ops i915_audio_ops
;
177 bool i915_bound
; /* was i915 bound in this driver? */
179 struct hdac_chmap chmap
;
182 #ifdef CONFIG_SND_HDA_I915
183 static inline bool codec_has_acomp(struct hda_codec
*codec
)
185 struct hdmi_spec
*spec
= codec
->spec
;
186 return spec
->use_acomp_notifier
;
189 #define codec_has_acomp(codec) false
192 struct hdmi_audio_infoframe
{
199 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
203 u8 LFEPBL01_LSV36_DM_INH7
;
206 struct dp_audio_infoframe
{
209 u8 ver
; /* 0x11 << 2 */
211 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
215 u8 LFEPBL01_LSV36_DM_INH7
;
218 union audio_infoframe
{
219 struct hdmi_audio_infoframe hdmi
;
220 struct dp_audio_infoframe dp
;
228 #define get_pin(spec, idx) \
229 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
230 #define get_cvt(spec, idx) \
231 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
232 /* obtain hdmi_pcm object assigned to idx */
233 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
234 /* obtain hda_pcm object assigned to idx */
235 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
237 static int pin_id_to_pin_index(struct hda_codec
*codec
,
238 hda_nid_t pin_nid
, int dev_id
)
240 struct hdmi_spec
*spec
= codec
->spec
;
242 struct hdmi_spec_per_pin
*per_pin
;
245 * (dev_id == -1) means it is NON-MST pin
246 * return the first virtual pin on this port
251 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
252 per_pin
= get_pin(spec
, pin_idx
);
253 if ((per_pin
->pin_nid
== pin_nid
) &&
254 (per_pin
->dev_id
== dev_id
))
258 codec_warn(codec
, "HDMI: pin nid %d not registered\n", pin_nid
);
262 static int hinfo_to_pcm_index(struct hda_codec
*codec
,
263 struct hda_pcm_stream
*hinfo
)
265 struct hdmi_spec
*spec
= codec
->spec
;
268 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++)
269 if (get_pcm_rec(spec
, pcm_idx
)->stream
== hinfo
)
272 codec_warn(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
276 static int hinfo_to_pin_index(struct hda_codec
*codec
,
277 struct hda_pcm_stream
*hinfo
)
279 struct hdmi_spec
*spec
= codec
->spec
;
280 struct hdmi_spec_per_pin
*per_pin
;
283 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
284 per_pin
= get_pin(spec
, pin_idx
);
286 per_pin
->pcm
->pcm
->stream
== hinfo
)
290 codec_dbg(codec
, "HDMI: hinfo %p not registered\n", hinfo
);
294 static struct hdmi_spec_per_pin
*pcm_idx_to_pin(struct hdmi_spec
*spec
,
298 struct hdmi_spec_per_pin
*per_pin
;
300 for (i
= 0; i
< spec
->num_pins
; i
++) {
301 per_pin
= get_pin(spec
, i
);
302 if (per_pin
->pcm_idx
== pcm_idx
)
308 static int cvt_nid_to_cvt_index(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
310 struct hdmi_spec
*spec
= codec
->spec
;
313 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
314 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
317 codec_warn(codec
, "HDMI: cvt nid %d not registered\n", cvt_nid
);
321 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
322 struct snd_ctl_elem_info
*uinfo
)
324 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
325 struct hdmi_spec
*spec
= codec
->spec
;
326 struct hdmi_spec_per_pin
*per_pin
;
327 struct hdmi_eld
*eld
;
330 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
332 pcm_idx
= kcontrol
->private_value
;
333 mutex_lock(&spec
->pcm_lock
);
334 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
336 /* no pin is bound to the pcm */
338 mutex_unlock(&spec
->pcm_lock
);
341 eld
= &per_pin
->sink_eld
;
342 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
343 mutex_unlock(&spec
->pcm_lock
);
348 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
349 struct snd_ctl_elem_value
*ucontrol
)
351 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
352 struct hdmi_spec
*spec
= codec
->spec
;
353 struct hdmi_spec_per_pin
*per_pin
;
354 struct hdmi_eld
*eld
;
357 pcm_idx
= kcontrol
->private_value
;
358 mutex_lock(&spec
->pcm_lock
);
359 per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
361 /* no pin is bound to the pcm */
362 memset(ucontrol
->value
.bytes
.data
, 0,
363 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
364 mutex_unlock(&spec
->pcm_lock
);
367 eld
= &per_pin
->sink_eld
;
369 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
) ||
370 eld
->eld_size
> ELD_MAX_SIZE
) {
371 mutex_unlock(&spec
->pcm_lock
);
376 memset(ucontrol
->value
.bytes
.data
, 0,
377 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
379 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
381 mutex_unlock(&spec
->pcm_lock
);
386 static struct snd_kcontrol_new eld_bytes_ctl
= {
387 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
388 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
390 .info
= hdmi_eld_ctl_info
,
391 .get
= hdmi_eld_ctl_get
,
394 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pcm_idx
,
397 struct snd_kcontrol
*kctl
;
398 struct hdmi_spec
*spec
= codec
->spec
;
401 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
404 kctl
->private_value
= pcm_idx
;
405 kctl
->id
.device
= device
;
407 /* no pin nid is associated with the kctl now
408 * tbd: associate pin nid to eld ctl later
410 err
= snd_hda_ctl_add(codec
, 0, kctl
);
414 get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
= kctl
;
419 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
420 int *packet_index
, int *byte_index
)
424 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
425 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
427 *packet_index
= val
>> 5;
428 *byte_index
= val
& 0x1f;
432 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
433 int packet_index
, int byte_index
)
437 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
439 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
442 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
445 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
448 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
450 struct hdmi_spec
*spec
= codec
->spec
;
454 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
455 snd_hda_codec_write(codec
, pin_nid
, 0,
456 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
458 if (spec
->dyn_pin_out
)
459 /* Disable pin out until stream is active */
462 /* Enable pin out: some machines with GM965 gets broken output
463 * when the pin is disabled or changed while using with HDMI
467 snd_hda_codec_write(codec
, pin_nid
, 0,
468 AC_VERB_SET_PIN_WIDGET_CONTROL
, pin_out
);
475 #ifdef CONFIG_SND_PROC_FS
476 static void print_eld_info(struct snd_info_entry
*entry
,
477 struct snd_info_buffer
*buffer
)
479 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
481 mutex_lock(&per_pin
->lock
);
482 snd_hdmi_print_eld_info(&per_pin
->sink_eld
, buffer
);
483 mutex_unlock(&per_pin
->lock
);
486 static void write_eld_info(struct snd_info_entry
*entry
,
487 struct snd_info_buffer
*buffer
)
489 struct hdmi_spec_per_pin
*per_pin
= entry
->private_data
;
491 mutex_lock(&per_pin
->lock
);
492 snd_hdmi_write_eld_info(&per_pin
->sink_eld
, buffer
);
493 mutex_unlock(&per_pin
->lock
);
496 static int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
, int index
)
499 struct hda_codec
*codec
= per_pin
->codec
;
500 struct snd_info_entry
*entry
;
503 snprintf(name
, sizeof(name
), "eld#%d.%d", codec
->addr
, index
);
504 err
= snd_card_proc_new(codec
->card
, name
, &entry
);
508 snd_info_set_text_ops(entry
, per_pin
, print_eld_info
);
509 entry
->c
.text
.write
= write_eld_info
;
510 entry
->mode
|= S_IWUSR
;
511 per_pin
->proc_entry
= entry
;
516 static void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
518 if (!per_pin
->codec
->bus
->shutdown
) {
519 snd_info_free_entry(per_pin
->proc_entry
);
520 per_pin
->proc_entry
= NULL
;
524 static inline int eld_proc_new(struct hdmi_spec_per_pin
*per_pin
,
529 static inline void eld_proc_free(struct hdmi_spec_per_pin
*per_pin
)
535 * Audio InfoFrame routines
539 * Enable Audio InfoFrame Transmission
541 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
544 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
545 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
550 * Disable Audio InfoFrame Transmission
552 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
555 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
556 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
560 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
562 #ifdef CONFIG_SND_DEBUG_VERBOSE
566 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
567 codec_dbg(codec
, "HDMI: ELD buf size is %d\n", size
);
569 for (i
= 0; i
< 8; i
++) {
570 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
571 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
572 codec_dbg(codec
, "HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
577 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
583 for (i
= 0; i
< 8; i
++) {
584 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
585 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
589 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
590 for (j
= 1; j
< 1000; j
++) {
591 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
592 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
594 codec_dbg(codec
, "dip index %d: %d != %d\n",
596 if (bi
== 0) /* byte index wrapped around */
600 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
606 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
608 u8
*bytes
= (u8
*)hdmi_ai
;
612 hdmi_ai
->checksum
= 0;
614 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
617 hdmi_ai
->checksum
= -sum
;
620 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
626 hdmi_debug_dip_size(codec
, pin_nid
);
627 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
629 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
630 for (i
= 0; i
< size
; i
++)
631 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
634 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
640 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
644 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
645 for (i
= 0; i
< size
; i
++) {
646 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
647 AC_VERB_GET_HDMI_DIP_DATA
, 0);
655 static void hdmi_pin_setup_infoframe(struct hda_codec
*codec
,
657 int ca
, int active_channels
,
660 union audio_infoframe ai
;
662 memset(&ai
, 0, sizeof(ai
));
663 if (conn_type
== 0) { /* HDMI */
664 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
666 hdmi_ai
->type
= 0x84;
669 hdmi_ai
->CC02_CT47
= active_channels
- 1;
671 hdmi_checksum_audio_infoframe(hdmi_ai
);
672 } else if (conn_type
== 1) { /* DisplayPort */
673 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
677 dp_ai
->ver
= 0x11 << 2;
678 dp_ai
->CC02_CT47
= active_channels
- 1;
681 codec_dbg(codec
, "HDMI: unknown connection type at pin %d\n",
687 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
688 * sizeof(*dp_ai) to avoid partial match/update problems when
689 * the user switches between HDMI/DP monitors.
691 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
694 "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
696 active_channels
, ca
);
697 hdmi_stop_infoframe_trans(codec
, pin_nid
);
698 hdmi_fill_audio_infoframe(codec
, pin_nid
,
699 ai
.bytes
, sizeof(ai
));
700 hdmi_start_infoframe_trans(codec
, pin_nid
);
704 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
,
705 struct hdmi_spec_per_pin
*per_pin
,
708 struct hdmi_spec
*spec
= codec
->spec
;
709 struct hdac_chmap
*chmap
= &spec
->chmap
;
710 hda_nid_t pin_nid
= per_pin
->pin_nid
;
711 int channels
= per_pin
->channels
;
713 struct hdmi_eld
*eld
;
719 /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
720 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
721 snd_hda_codec_write(codec
, pin_nid
, 0,
722 AC_VERB_SET_AMP_GAIN_MUTE
,
725 eld
= &per_pin
->sink_eld
;
727 ca
= snd_hdac_channel_allocation(&codec
->core
,
728 eld
->info
.spk_alloc
, channels
,
729 per_pin
->chmap_set
, non_pcm
, per_pin
->chmap
);
731 active_channels
= snd_hdac_get_active_channels(ca
);
733 chmap
->ops
.set_channel_count(&codec
->core
, per_pin
->cvt_nid
,
737 * always configure channel mapping, it may have been changed by the
738 * user in the meantime
740 snd_hdac_setup_channel_mapping(&spec
->chmap
,
741 pin_nid
, non_pcm
, ca
, channels
,
742 per_pin
->chmap
, per_pin
->chmap_set
);
744 spec
->ops
.pin_setup_infoframe(codec
, pin_nid
, ca
, active_channels
,
745 eld
->info
.conn_type
);
747 per_pin
->non_pcm
= non_pcm
;
754 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
756 static void check_presence_and_report(struct hda_codec
*codec
, hda_nid_t nid
,
759 struct hdmi_spec
*spec
= codec
->spec
;
760 int pin_idx
= pin_id_to_pin_index(codec
, nid
, dev_id
);
764 if (hdmi_present_sense(get_pin(spec
, pin_idx
), 1))
765 snd_hda_jack_report_sync(codec
);
768 static void jack_callback(struct hda_codec
*codec
,
769 struct hda_jack_callback
*jack
)
771 /* hda_jack don't support DP MST */
772 check_presence_and_report(codec
, jack
->nid
, 0);
775 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
777 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
778 struct hda_jack_tbl
*jack
;
779 int dev_entry
= (res
& AC_UNSOL_RES_DE
) >> AC_UNSOL_RES_DE_SHIFT
;
782 * assume DP MST uses dyn_pcm_assign and acomp and
784 * if DP MST supports unsol event, below code need
787 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
790 jack
->jack_dirty
= 1;
793 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
794 codec
->addr
, jack
->nid
, dev_entry
, !!(res
& AC_UNSOL_RES_IA
),
795 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
797 /* hda_jack don't support DP MST */
798 check_presence_and_report(codec
, jack
->nid
, 0);
801 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
803 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
804 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
805 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
806 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
809 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
824 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
826 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
827 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
829 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
830 codec_dbg(codec
, "Unexpected HDMI event tag 0x%x\n", tag
);
835 hdmi_intrinsic_event(codec
, res
);
837 hdmi_non_intrinsic_event(codec
, res
);
840 static void haswell_verify_D0(struct hda_codec
*codec
,
841 hda_nid_t cvt_nid
, hda_nid_t nid
)
845 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
846 * thus pins could only choose converter 0 for use. Make sure the
847 * converters are in correct power state */
848 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
849 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
851 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
852 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
855 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
856 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
857 codec_dbg(codec
, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
865 /* HBR should be Non-PCM, 8 channels */
866 #define is_hbr_format(format) \
867 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
869 static int hdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
872 int pinctl
, new_pinctl
;
874 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
875 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
876 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
879 return hbr
? -EINVAL
: 0;
881 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
883 new_pinctl
|= AC_PINCTL_EPT_HBR
;
885 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
888 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
890 pinctl
== new_pinctl
? "" : "new-",
893 if (pinctl
!= new_pinctl
)
894 snd_hda_codec_write(codec
, pin_nid
, 0,
895 AC_VERB_SET_PIN_WIDGET_CONTROL
,
903 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
904 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
906 struct hdmi_spec
*spec
= codec
->spec
;
909 err
= spec
->ops
.pin_hbr_setup(codec
, pin_nid
, is_hbr_format(format
));
912 codec_dbg(codec
, "hdmi_setup_stream: HBR is not supported\n");
916 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
920 /* Try to find an available converter
921 * If pin_idx is less then zero, just try to find an available converter.
922 * Otherwise, try to find an available converter and get the cvt mux index
925 static int hdmi_choose_cvt(struct hda_codec
*codec
,
926 int pin_idx
, int *cvt_id
)
928 struct hdmi_spec
*spec
= codec
->spec
;
929 struct hdmi_spec_per_pin
*per_pin
;
930 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
931 int cvt_idx
, mux_idx
= 0;
933 /* pin_idx < 0 means no pin will be bound to the converter */
937 per_pin
= get_pin(spec
, pin_idx
);
939 /* Dynamically assign converter to stream */
940 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
941 per_cvt
= get_cvt(spec
, cvt_idx
);
943 /* Must not already be assigned */
944 if (per_cvt
->assigned
)
948 /* Must be in pin's mux's list of converters */
949 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
950 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
952 /* Not in mux list */
953 if (mux_idx
== per_pin
->num_mux_nids
)
958 /* No free converters */
959 if (cvt_idx
== spec
->num_cvts
)
963 per_pin
->mux_idx
= mux_idx
;
971 /* Assure the pin select the right convetor */
972 static void intel_verify_pin_cvt_connect(struct hda_codec
*codec
,
973 struct hdmi_spec_per_pin
*per_pin
)
975 hda_nid_t pin_nid
= per_pin
->pin_nid
;
978 mux_idx
= per_pin
->mux_idx
;
979 curr
= snd_hda_codec_read(codec
, pin_nid
, 0,
980 AC_VERB_GET_CONNECT_SEL
, 0);
982 snd_hda_codec_write_cache(codec
, pin_nid
, 0,
983 AC_VERB_SET_CONNECT_SEL
,
987 /* get the mux index for the converter of the pins
988 * converter's mux index is the same for all pins on Intel platform
990 static int intel_cvt_id_to_mux_idx(struct hdmi_spec
*spec
,
995 for (i
= 0; i
< spec
->num_cvts
; i
++)
996 if (spec
->cvt_nids
[i
] == cvt_nid
)
1001 /* Intel HDMI workaround to fix audio routing issue:
1002 * For some Intel display codecs, pins share the same connection list.
1003 * So a conveter can be selected by multiple pins and playback on any of these
1004 * pins will generate sound on the external display, because audio flows from
1005 * the same converter to the display pipeline. Also muting one pin may make
1006 * other pins have no sound output.
1007 * So this function assures that an assigned converter for a pin is not selected
1008 * by any other pins.
1010 static void intel_not_share_assigned_cvt(struct hda_codec
*codec
,
1012 int dev_id
, int mux_idx
)
1014 struct hdmi_spec
*spec
= codec
->spec
;
1017 struct hdmi_spec_per_cvt
*per_cvt
;
1018 struct hdmi_spec_per_pin
*per_pin
;
1021 /* configure the pins connections */
1022 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1026 per_pin
= get_pin(spec
, pin_idx
);
1028 * pin not connected to monitor
1029 * no need to operate on it
1034 if ((per_pin
->pin_nid
== pin_nid
) &&
1035 (per_pin
->dev_id
== dev_id
))
1039 * if per_pin->dev_id >= dev_num,
1040 * snd_hda_get_dev_select() will fail,
1041 * and the following operation is unpredictable.
1042 * So skip this situation.
1044 dev_num
= snd_hda_get_num_devices(codec
, per_pin
->pin_nid
) + 1;
1045 if (per_pin
->dev_id
>= dev_num
)
1048 nid
= per_pin
->pin_nid
;
1051 * Calling this function should not impact
1052 * on the device entry selection
1053 * So let's save the dev id for each pin,
1054 * and restore it when return
1056 dev_id_saved
= snd_hda_get_dev_select(codec
, nid
);
1057 snd_hda_set_dev_select(codec
, nid
, per_pin
->dev_id
);
1058 curr
= snd_hda_codec_read(codec
, nid
, 0,
1059 AC_VERB_GET_CONNECT_SEL
, 0);
1060 if (curr
!= mux_idx
) {
1061 snd_hda_set_dev_select(codec
, nid
, dev_id_saved
);
1066 /* choose an unassigned converter. The conveters in the
1067 * connection list are in the same order as in the codec.
1069 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1070 per_cvt
= get_cvt(spec
, cvt_idx
);
1071 if (!per_cvt
->assigned
) {
1073 "choose cvt %d for pin nid %d\n",
1075 snd_hda_codec_write_cache(codec
, nid
, 0,
1076 AC_VERB_SET_CONNECT_SEL
,
1081 snd_hda_set_dev_select(codec
, nid
, dev_id_saved
);
1085 /* A wrapper of intel_not_share_asigned_cvt() */
1086 static void intel_not_share_assigned_cvt_nid(struct hda_codec
*codec
,
1087 hda_nid_t pin_nid
, int dev_id
, hda_nid_t cvt_nid
)
1090 struct hdmi_spec
*spec
= codec
->spec
;
1092 /* On Intel platform, the mapping of converter nid to
1093 * mux index of the pins are always the same.
1094 * The pin nid may be 0, this means all pins will not
1095 * share the converter.
1097 mux_idx
= intel_cvt_id_to_mux_idx(spec
, cvt_nid
);
1099 intel_not_share_assigned_cvt(codec
, pin_nid
, dev_id
, mux_idx
);
1102 /* skeleton caller of pin_cvt_fixup ops */
1103 static void pin_cvt_fixup(struct hda_codec
*codec
,
1104 struct hdmi_spec_per_pin
*per_pin
,
1107 struct hdmi_spec
*spec
= codec
->spec
;
1109 if (spec
->ops
.pin_cvt_fixup
)
1110 spec
->ops
.pin_cvt_fixup(codec
, per_pin
, cvt_nid
);
1113 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1114 * in dyn_pcm_assign mode.
1116 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream
*hinfo
,
1117 struct hda_codec
*codec
,
1118 struct snd_pcm_substream
*substream
)
1120 struct hdmi_spec
*spec
= codec
->spec
;
1121 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1122 int cvt_idx
, pcm_idx
;
1123 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1126 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1130 err
= hdmi_choose_cvt(codec
, -1, &cvt_idx
);
1134 per_cvt
= get_cvt(spec
, cvt_idx
);
1135 per_cvt
->assigned
= 1;
1136 hinfo
->nid
= per_cvt
->cvt_nid
;
1138 pin_cvt_fixup(codec
, NULL
, per_cvt
->cvt_nid
);
1140 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1141 /* todo: setup spdif ctls assign */
1143 /* Initially set the converter's capabilities */
1144 hinfo
->channels_min
= per_cvt
->channels_min
;
1145 hinfo
->channels_max
= per_cvt
->channels_max
;
1146 hinfo
->rates
= per_cvt
->rates
;
1147 hinfo
->formats
= per_cvt
->formats
;
1148 hinfo
->maxbps
= per_cvt
->maxbps
;
1150 /* Store the updated parameters */
1151 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1152 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1153 runtime
->hw
.formats
= hinfo
->formats
;
1154 runtime
->hw
.rates
= hinfo
->rates
;
1156 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1157 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1164 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1165 struct hda_codec
*codec
,
1166 struct snd_pcm_substream
*substream
)
1168 struct hdmi_spec
*spec
= codec
->spec
;
1169 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1170 int pin_idx
, cvt_idx
, pcm_idx
;
1171 struct hdmi_spec_per_pin
*per_pin
;
1172 struct hdmi_eld
*eld
;
1173 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1176 /* Validate hinfo */
1177 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1181 mutex_lock(&spec
->pcm_lock
);
1182 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1183 if (!spec
->dyn_pcm_assign
) {
1184 if (snd_BUG_ON(pin_idx
< 0)) {
1185 mutex_unlock(&spec
->pcm_lock
);
1189 /* no pin is assigned to the PCM
1190 * PA need pcm open successfully when probe
1193 err
= hdmi_pcm_open_no_pin(hinfo
, codec
, substream
);
1194 mutex_unlock(&spec
->pcm_lock
);
1199 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
);
1201 mutex_unlock(&spec
->pcm_lock
);
1205 per_cvt
= get_cvt(spec
, cvt_idx
);
1206 /* Claim converter */
1207 per_cvt
->assigned
= 1;
1209 set_bit(pcm_idx
, &spec
->pcm_in_use
);
1210 per_pin
= get_pin(spec
, pin_idx
);
1211 per_pin
->cvt_nid
= per_cvt
->cvt_nid
;
1212 hinfo
->nid
= per_cvt
->cvt_nid
;
1214 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
, per_pin
->dev_id
);
1215 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1216 AC_VERB_SET_CONNECT_SEL
,
1219 /* configure unused pins to choose other converters */
1220 pin_cvt_fixup(codec
, per_pin
, 0);
1222 snd_hda_spdif_ctls_assign(codec
, pcm_idx
, per_cvt
->cvt_nid
);
1224 /* Initially set the converter's capabilities */
1225 hinfo
->channels_min
= per_cvt
->channels_min
;
1226 hinfo
->channels_max
= per_cvt
->channels_max
;
1227 hinfo
->rates
= per_cvt
->rates
;
1228 hinfo
->formats
= per_cvt
->formats
;
1229 hinfo
->maxbps
= per_cvt
->maxbps
;
1231 eld
= &per_pin
->sink_eld
;
1232 /* Restrict capabilities by ELD if this isn't disabled */
1233 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1234 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1235 if (hinfo
->channels_min
> hinfo
->channels_max
||
1236 !hinfo
->rates
|| !hinfo
->formats
) {
1237 per_cvt
->assigned
= 0;
1239 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1240 mutex_unlock(&spec
->pcm_lock
);
1245 mutex_unlock(&spec
->pcm_lock
);
1246 /* Store the updated parameters */
1247 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1248 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1249 runtime
->hw
.formats
= hinfo
->formats
;
1250 runtime
->hw
.rates
= hinfo
->rates
;
1252 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1253 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1258 * HDA/HDMI auto parsing
1260 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1262 struct hdmi_spec
*spec
= codec
->spec
;
1263 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1264 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1266 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1268 "HDMI: pin %d wcaps %#x does not support connection list\n",
1269 pin_nid
, get_wcaps(codec
, pin_nid
));
1273 /* all the device entries on the same pin have the same conn list */
1274 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1276 HDA_MAX_CONNECTIONS
);
1281 static int hdmi_find_pcm_slot(struct hdmi_spec
*spec
,
1282 struct hdmi_spec_per_pin
*per_pin
)
1286 /* try the prefer PCM */
1287 if (!test_bit(per_pin
->pin_nid_idx
, &spec
->pcm_bitmap
))
1288 return per_pin
->pin_nid_idx
;
1290 /* have a second try; check the "reserved area" over num_pins */
1291 for (i
= spec
->num_nids
; i
< spec
->pcm_used
; i
++) {
1292 if (!test_bit(i
, &spec
->pcm_bitmap
))
1296 /* the last try; check the empty slots in pins */
1297 for (i
= 0; i
< spec
->num_nids
; i
++) {
1298 if (!test_bit(i
, &spec
->pcm_bitmap
))
1304 static void hdmi_attach_hda_pcm(struct hdmi_spec
*spec
,
1305 struct hdmi_spec_per_pin
*per_pin
)
1309 /* pcm already be attached to the pin */
1312 idx
= hdmi_find_pcm_slot(spec
, per_pin
);
1315 per_pin
->pcm_idx
= idx
;
1316 per_pin
->pcm
= get_hdmi_pcm(spec
, idx
);
1317 set_bit(idx
, &spec
->pcm_bitmap
);
1320 static void hdmi_detach_hda_pcm(struct hdmi_spec
*spec
,
1321 struct hdmi_spec_per_pin
*per_pin
)
1325 /* pcm already be detached from the pin */
1328 idx
= per_pin
->pcm_idx
;
1329 per_pin
->pcm_idx
= -1;
1330 per_pin
->pcm
= NULL
;
1331 if (idx
>= 0 && idx
< spec
->pcm_used
)
1332 clear_bit(idx
, &spec
->pcm_bitmap
);
1335 static int hdmi_get_pin_cvt_mux(struct hdmi_spec
*spec
,
1336 struct hdmi_spec_per_pin
*per_pin
, hda_nid_t cvt_nid
)
1340 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1341 if (per_pin
->mux_nids
[mux_idx
] == cvt_nid
)
1346 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
);
1348 static void hdmi_pcm_setup_pin(struct hdmi_spec
*spec
,
1349 struct hdmi_spec_per_pin
*per_pin
)
1351 struct hda_codec
*codec
= per_pin
->codec
;
1352 struct hda_pcm
*pcm
;
1353 struct hda_pcm_stream
*hinfo
;
1354 struct snd_pcm_substream
*substream
;
1358 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1359 pcm
= get_pcm_rec(spec
, per_pin
->pcm_idx
);
1362 if (!test_bit(per_pin
->pcm_idx
, &spec
->pcm_in_use
))
1365 /* hdmi audio only uses playback and one substream */
1366 hinfo
= pcm
->stream
;
1367 substream
= pcm
->pcm
->streams
[0].substream
;
1369 per_pin
->cvt_nid
= hinfo
->nid
;
1371 mux_idx
= hdmi_get_pin_cvt_mux(spec
, per_pin
, hinfo
->nid
);
1372 if (mux_idx
< per_pin
->num_mux_nids
) {
1373 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
1375 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1376 AC_VERB_SET_CONNECT_SEL
,
1379 snd_hda_spdif_ctls_assign(codec
, per_pin
->pcm_idx
, hinfo
->nid
);
1381 non_pcm
= check_non_pcm_per_cvt(codec
, hinfo
->nid
);
1382 if (substream
->runtime
)
1383 per_pin
->channels
= substream
->runtime
->channels
;
1384 per_pin
->setup
= true;
1385 per_pin
->mux_idx
= mux_idx
;
1387 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1390 static void hdmi_pcm_reset_pin(struct hdmi_spec
*spec
,
1391 struct hdmi_spec_per_pin
*per_pin
)
1393 if (per_pin
->pcm_idx
>= 0 && per_pin
->pcm_idx
< spec
->pcm_used
)
1394 snd_hda_spdif_ctls_unassign(per_pin
->codec
, per_pin
->pcm_idx
);
1396 per_pin
->chmap_set
= false;
1397 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1399 per_pin
->setup
= false;
1400 per_pin
->channels
= 0;
1403 /* update per_pin ELD from the given new ELD;
1404 * setup info frame and notification accordingly
1406 static void update_eld(struct hda_codec
*codec
,
1407 struct hdmi_spec_per_pin
*per_pin
,
1408 struct hdmi_eld
*eld
)
1410 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1411 struct hdmi_spec
*spec
= codec
->spec
;
1412 bool old_eld_valid
= pin_eld
->eld_valid
;
1416 /* for monitor disconnection, save pcm_idx firstly */
1417 pcm_idx
= per_pin
->pcm_idx
;
1418 if (spec
->dyn_pcm_assign
) {
1419 if (eld
->eld_valid
) {
1420 hdmi_attach_hda_pcm(spec
, per_pin
);
1421 hdmi_pcm_setup_pin(spec
, per_pin
);
1423 hdmi_pcm_reset_pin(spec
, per_pin
);
1424 hdmi_detach_hda_pcm(spec
, per_pin
);
1427 /* if pcm_idx == -1, it means this is in monitor connection event
1428 * we can get the correct pcm_idx now.
1431 pcm_idx
= per_pin
->pcm_idx
;
1434 snd_hdmi_show_eld(codec
, &eld
->info
);
1436 eld_changed
= (pin_eld
->eld_valid
!= eld
->eld_valid
);
1437 if (eld
->eld_valid
&& pin_eld
->eld_valid
)
1438 if (pin_eld
->eld_size
!= eld
->eld_size
||
1439 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1440 eld
->eld_size
) != 0)
1443 pin_eld
->monitor_present
= eld
->monitor_present
;
1444 pin_eld
->eld_valid
= eld
->eld_valid
;
1445 pin_eld
->eld_size
= eld
->eld_size
;
1447 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
, eld
->eld_size
);
1448 pin_eld
->info
= eld
->info
;
1451 * Re-setup pin and infoframe. This is needed e.g. when
1452 * - sink is first plugged-in
1453 * - transcoder can change during stream playback on Haswell
1454 * and this can make HW reset converter selection on a pin.
1456 if (eld
->eld_valid
&& !old_eld_valid
&& per_pin
->setup
) {
1457 pin_cvt_fixup(codec
, per_pin
, 0);
1458 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
1461 if (eld_changed
&& pcm_idx
>= 0)
1462 snd_ctl_notify(codec
->card
,
1463 SNDRV_CTL_EVENT_MASK_VALUE
|
1464 SNDRV_CTL_EVENT_MASK_INFO
,
1465 &get_hdmi_pcm(spec
, pcm_idx
)->eld_ctl
->id
);
1468 /* update ELD and jack state via HD-audio verbs */
1469 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin
*per_pin
,
1472 struct hda_jack_tbl
*jack
;
1473 struct hda_codec
*codec
= per_pin
->codec
;
1474 struct hdmi_spec
*spec
= codec
->spec
;
1475 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1476 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1478 * Always execute a GetPinSense verb here, even when called from
1479 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1480 * response's PD bit is not the real PD value, but indicates that
1481 * the real PD value changed. An older version of the HD-audio
1482 * specification worked this way. Hence, we just ignore the data in
1483 * the unsolicited response to avoid custom WARs.
1487 bool do_repoll
= false;
1489 present
= snd_hda_pin_sense(codec
, pin_nid
);
1491 mutex_lock(&per_pin
->lock
);
1492 eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1493 if (eld
->monitor_present
)
1494 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1496 eld
->eld_valid
= false;
1499 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1500 codec
->addr
, pin_nid
, eld
->monitor_present
, eld
->eld_valid
);
1502 if (eld
->eld_valid
) {
1503 if (spec
->ops
.pin_get_eld(codec
, pin_nid
, eld
->eld_buffer
,
1504 &eld
->eld_size
) < 0)
1505 eld
->eld_valid
= false;
1507 if (snd_hdmi_parse_eld(codec
, &eld
->info
, eld
->eld_buffer
,
1509 eld
->eld_valid
= false;
1511 if (!eld
->eld_valid
&& repoll
)
1516 schedule_delayed_work(&per_pin
->work
, msecs_to_jiffies(300));
1518 update_eld(codec
, per_pin
, eld
);
1520 ret
= !repoll
|| !eld
->monitor_present
|| eld
->eld_valid
;
1522 jack
= snd_hda_jack_tbl_get(codec
, pin_nid
);
1524 jack
->block_report
= !ret
;
1526 mutex_unlock(&per_pin
->lock
);
1530 static struct snd_jack
*pin_idx_to_jack(struct hda_codec
*codec
,
1531 struct hdmi_spec_per_pin
*per_pin
)
1533 struct hdmi_spec
*spec
= codec
->spec
;
1534 struct snd_jack
*jack
= NULL
;
1535 struct hda_jack_tbl
*jack_tbl
;
1537 /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1538 * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1539 * NULL even after snd_hda_jack_tbl_clear() is called to
1540 * free snd_jack. This may cause access invalid memory
1541 * when calling snd_jack_report
1543 if (per_pin
->pcm_idx
>= 0 && spec
->dyn_pcm_assign
)
1544 jack
= spec
->pcm_rec
[per_pin
->pcm_idx
].jack
;
1545 else if (!spec
->dyn_pcm_assign
) {
1547 * jack tbl doesn't support DP MST
1548 * DP MST will use dyn_pcm_assign,
1549 * so DP MST will never come here
1551 jack_tbl
= snd_hda_jack_tbl_get(codec
, per_pin
->pin_nid
);
1553 jack
= jack_tbl
->jack
;
1558 /* update ELD and jack state via audio component */
1559 static void sync_eld_via_acomp(struct hda_codec
*codec
,
1560 struct hdmi_spec_per_pin
*per_pin
)
1562 struct hdmi_spec
*spec
= codec
->spec
;
1563 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1564 struct snd_jack
*jack
= NULL
;
1567 mutex_lock(&per_pin
->lock
);
1568 eld
->monitor_present
= false;
1569 size
= snd_hdac_acomp_get_eld(&codec
->core
, per_pin
->pin_nid
,
1570 per_pin
->dev_id
, &eld
->monitor_present
,
1571 eld
->eld_buffer
, ELD_MAX_SIZE
);
1573 size
= min(size
, ELD_MAX_SIZE
);
1574 if (snd_hdmi_parse_eld(codec
, &eld
->info
,
1575 eld
->eld_buffer
, size
) < 0)
1580 eld
->eld_valid
= true;
1581 eld
->eld_size
= size
;
1583 eld
->eld_valid
= false;
1587 /* pcm_idx >=0 before update_eld() means it is in monitor
1588 * disconnected event. Jack must be fetched before update_eld()
1590 jack
= pin_idx_to_jack(codec
, per_pin
);
1591 update_eld(codec
, per_pin
, eld
);
1593 jack
= pin_idx_to_jack(codec
, per_pin
);
1596 snd_jack_report(jack
,
1597 eld
->monitor_present
? SND_JACK_AVOUT
: 0);
1599 mutex_unlock(&per_pin
->lock
);
1602 static bool hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1604 struct hda_codec
*codec
= per_pin
->codec
;
1605 struct hdmi_spec
*spec
= codec
->spec
;
1608 /* no temporary power up/down needed for component notifier */
1609 if (!codec_has_acomp(codec
))
1610 snd_hda_power_up_pm(codec
);
1612 mutex_lock(&spec
->pcm_lock
);
1613 if (codec_has_acomp(codec
)) {
1614 sync_eld_via_acomp(codec
, per_pin
);
1615 ret
= false; /* don't call snd_hda_jack_report_sync() */
1617 ret
= hdmi_present_sense_via_verbs(per_pin
, repoll
);
1619 mutex_unlock(&spec
->pcm_lock
);
1621 if (!codec_has_acomp(codec
))
1622 snd_hda_power_down_pm(codec
);
1627 static void hdmi_repoll_eld(struct work_struct
*work
)
1629 struct hdmi_spec_per_pin
*per_pin
=
1630 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1632 if (per_pin
->repoll_count
++ > 6)
1633 per_pin
->repoll_count
= 0;
1635 if (hdmi_present_sense(per_pin
, per_pin
->repoll_count
))
1636 snd_hda_jack_report_sync(per_pin
->codec
);
1639 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1642 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1644 struct hdmi_spec
*spec
= codec
->spec
;
1645 unsigned int caps
, config
;
1647 struct hdmi_spec_per_pin
*per_pin
;
1651 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1652 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1656 * For DP MST audio, Configuration Default is the same for
1657 * all device entries on the same pin
1659 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1660 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1664 * To simplify the implementation, malloc all
1665 * the virtual pins in the initialization statically
1667 if (is_haswell_plus(codec
)) {
1669 * On Intel platforms, device entries number is
1670 * changed dynamically. If there is a DP MST
1671 * hub connected, the device entries number is 3.
1672 * Otherwise, it is 1.
1673 * Here we manually set dev_num to 3, so that
1674 * we can initialize all the device entries when
1675 * bootup statically.
1679 } else if (spec
->dyn_pcm_assign
&& codec
->dp_mst
) {
1680 dev_num
= snd_hda_get_num_devices(codec
, pin_nid
) + 1;
1682 * spec->dev_num is the maxinum number of device entries
1683 * among all the pins
1685 spec
->dev_num
= (spec
->dev_num
> dev_num
) ?
1686 spec
->dev_num
: dev_num
;
1689 * If the platform doesn't support DP MST,
1690 * manually set dev_num to 1. This means
1691 * the pin has only one device entry.
1697 for (i
= 0; i
< dev_num
; i
++) {
1698 pin_idx
= spec
->num_pins
;
1699 per_pin
= snd_array_new(&spec
->pins
);
1704 if (spec
->dyn_pcm_assign
) {
1705 per_pin
->pcm
= NULL
;
1706 per_pin
->pcm_idx
= -1;
1708 per_pin
->pcm
= get_hdmi_pcm(spec
, pin_idx
);
1709 per_pin
->pcm_idx
= pin_idx
;
1711 per_pin
->pin_nid
= pin_nid
;
1712 per_pin
->pin_nid_idx
= spec
->num_nids
;
1713 per_pin
->dev_id
= i
;
1714 per_pin
->non_pcm
= false;
1715 snd_hda_set_dev_select(codec
, pin_nid
, i
);
1716 if (is_haswell_plus(codec
))
1717 intel_haswell_fixup_connect_list(codec
, pin_nid
);
1718 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1728 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1730 struct hdmi_spec
*spec
= codec
->spec
;
1731 struct hdmi_spec_per_cvt
*per_cvt
;
1735 chans
= get_wcaps(codec
, cvt_nid
);
1736 chans
= get_wcaps_channels(chans
);
1738 per_cvt
= snd_array_new(&spec
->cvts
);
1742 per_cvt
->cvt_nid
= cvt_nid
;
1743 per_cvt
->channels_min
= 2;
1745 per_cvt
->channels_max
= chans
;
1746 if (chans
> spec
->chmap
.channels_max
)
1747 spec
->chmap
.channels_max
= chans
;
1750 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1757 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1758 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1764 static int hdmi_parse_codec(struct hda_codec
*codec
)
1769 nodes
= snd_hda_get_sub_nodes(codec
, codec
->core
.afg
, &nid
);
1770 if (!nid
|| nodes
< 0) {
1771 codec_warn(codec
, "HDMI: failed to get afg sub nodes\n");
1775 for (i
= 0; i
< nodes
; i
++, nid
++) {
1779 caps
= get_wcaps(codec
, nid
);
1780 type
= get_wcaps_type(caps
);
1782 if (!(caps
& AC_WCAP_DIGITAL
))
1786 case AC_WID_AUD_OUT
:
1787 hdmi_add_cvt(codec
, nid
);
1790 hdmi_add_pin(codec
, nid
);
1800 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1802 struct hda_spdif_out
*spdif
;
1805 mutex_lock(&codec
->spdif_mutex
);
1806 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1807 /* Add sanity check to pass klockwork check.
1808 * This should never happen.
1810 if (WARN_ON(spdif
== NULL
))
1812 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1813 mutex_unlock(&codec
->spdif_mutex
);
1821 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1822 struct hda_codec
*codec
,
1823 unsigned int stream_tag
,
1824 unsigned int format
,
1825 struct snd_pcm_substream
*substream
)
1827 hda_nid_t cvt_nid
= hinfo
->nid
;
1828 struct hdmi_spec
*spec
= codec
->spec
;
1830 struct hdmi_spec_per_pin
*per_pin
;
1832 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1837 mutex_lock(&spec
->pcm_lock
);
1838 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1839 if (spec
->dyn_pcm_assign
&& pin_idx
< 0) {
1840 /* when dyn_pcm_assign and pcm is not bound to a pin
1841 * skip pin setup and return 0 to make audio playback
1844 pin_cvt_fixup(codec
, NULL
, cvt_nid
);
1845 snd_hda_codec_setup_stream(codec
, cvt_nid
,
1846 stream_tag
, 0, format
);
1847 mutex_unlock(&spec
->pcm_lock
);
1851 if (snd_BUG_ON(pin_idx
< 0)) {
1852 mutex_unlock(&spec
->pcm_lock
);
1855 per_pin
= get_pin(spec
, pin_idx
);
1856 pin_nid
= per_pin
->pin_nid
;
1858 /* Verify pin:cvt selections to avoid silent audio after S3.
1859 * After S3, the audio driver restores pin:cvt selections
1860 * but this can happen before gfx is ready and such selection
1861 * is overlooked by HW. Thus multiple pins can share a same
1862 * default convertor and mute control will affect each other,
1863 * which can cause a resumed audio playback become silent
1866 pin_cvt_fixup(codec
, per_pin
, 0);
1868 /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1869 /* Todo: add DP1.2 MST audio support later */
1870 if (codec_has_acomp(codec
))
1871 snd_hdac_sync_audio_rate(&codec
->core
, pin_nid
, per_pin
->dev_id
,
1874 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1875 mutex_lock(&per_pin
->lock
);
1876 per_pin
->channels
= substream
->runtime
->channels
;
1877 per_pin
->setup
= true;
1879 hdmi_setup_audio_infoframe(codec
, per_pin
, non_pcm
);
1880 mutex_unlock(&per_pin
->lock
);
1881 if (spec
->dyn_pin_out
) {
1882 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1883 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1884 snd_hda_codec_write(codec
, pin_nid
, 0,
1885 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1889 /* snd_hda_set_dev_select() has been called before */
1890 err
= spec
->ops
.setup_stream(codec
, cvt_nid
, pin_nid
,
1891 stream_tag
, format
);
1892 mutex_unlock(&spec
->pcm_lock
);
1896 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1897 struct hda_codec
*codec
,
1898 struct snd_pcm_substream
*substream
)
1900 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1904 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1905 struct hda_codec
*codec
,
1906 struct snd_pcm_substream
*substream
)
1908 struct hdmi_spec
*spec
= codec
->spec
;
1909 int cvt_idx
, pin_idx
, pcm_idx
;
1910 struct hdmi_spec_per_cvt
*per_cvt
;
1911 struct hdmi_spec_per_pin
*per_pin
;
1915 pcm_idx
= hinfo_to_pcm_index(codec
, hinfo
);
1916 if (snd_BUG_ON(pcm_idx
< 0))
1918 cvt_idx
= cvt_nid_to_cvt_index(codec
, hinfo
->nid
);
1919 if (snd_BUG_ON(cvt_idx
< 0))
1921 per_cvt
= get_cvt(spec
, cvt_idx
);
1923 snd_BUG_ON(!per_cvt
->assigned
);
1924 per_cvt
->assigned
= 0;
1927 mutex_lock(&spec
->pcm_lock
);
1928 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
1929 clear_bit(pcm_idx
, &spec
->pcm_in_use
);
1930 pin_idx
= hinfo_to_pin_index(codec
, hinfo
);
1931 if (spec
->dyn_pcm_assign
&& pin_idx
< 0) {
1932 mutex_unlock(&spec
->pcm_lock
);
1936 if (snd_BUG_ON(pin_idx
< 0)) {
1937 mutex_unlock(&spec
->pcm_lock
);
1940 per_pin
= get_pin(spec
, pin_idx
);
1942 if (spec
->dyn_pin_out
) {
1943 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1944 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1945 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1946 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1950 mutex_lock(&per_pin
->lock
);
1951 per_pin
->chmap_set
= false;
1952 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1954 per_pin
->setup
= false;
1955 per_pin
->channels
= 0;
1956 mutex_unlock(&per_pin
->lock
);
1957 mutex_unlock(&spec
->pcm_lock
);
1963 static const struct hda_pcm_ops generic_ops
= {
1964 .open
= hdmi_pcm_open
,
1965 .close
= hdmi_pcm_close
,
1966 .prepare
= generic_hdmi_playback_pcm_prepare
,
1967 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1970 static int hdmi_get_spk_alloc(struct hdac_device
*hdac
, int pcm_idx
)
1972 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1973 struct hdmi_spec
*spec
= codec
->spec
;
1974 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1979 return per_pin
->sink_eld
.info
.spk_alloc
;
1982 static void hdmi_get_chmap(struct hdac_device
*hdac
, int pcm_idx
,
1983 unsigned char *chmap
)
1985 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
1986 struct hdmi_spec
*spec
= codec
->spec
;
1987 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
1989 /* chmap is already set to 0 in caller */
1993 memcpy(chmap
, per_pin
->chmap
, ARRAY_SIZE(per_pin
->chmap
));
1996 static void hdmi_set_chmap(struct hdac_device
*hdac
, int pcm_idx
,
1997 unsigned char *chmap
, int prepared
)
1999 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2000 struct hdmi_spec
*spec
= codec
->spec
;
2001 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2005 mutex_lock(&per_pin
->lock
);
2006 per_pin
->chmap_set
= true;
2007 memcpy(per_pin
->chmap
, chmap
, ARRAY_SIZE(per_pin
->chmap
));
2009 hdmi_setup_audio_infoframe(codec
, per_pin
, per_pin
->non_pcm
);
2010 mutex_unlock(&per_pin
->lock
);
2013 static bool is_hdmi_pcm_attached(struct hdac_device
*hdac
, int pcm_idx
)
2015 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
2016 struct hdmi_spec
*spec
= codec
->spec
;
2017 struct hdmi_spec_per_pin
*per_pin
= pcm_idx_to_pin(spec
, pcm_idx
);
2019 return per_pin
? true:false;
2022 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
2024 struct hdmi_spec
*spec
= codec
->spec
;
2028 * for non-mst mode, pcm number is the same as before
2029 * for DP MST mode, pcm number is (nid number + dev_num - 1)
2030 * dev_num is the device entry number in a pin
2033 for (idx
= 0; idx
< spec
->num_nids
+ spec
->dev_num
- 1; idx
++) {
2034 struct hda_pcm
*info
;
2035 struct hda_pcm_stream
*pstr
;
2037 info
= snd_hda_codec_pcm_new(codec
, "HDMI %d", idx
);
2041 spec
->pcm_rec
[idx
].pcm
= info
;
2043 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2044 info
->own_chmap
= true;
2046 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2047 pstr
->substreams
= 1;
2048 pstr
->ops
= generic_ops
;
2049 /* pcm number is less than 16 */
2050 if (spec
->pcm_used
>= 16)
2052 /* other pstr fields are set in open */
2058 static void free_hdmi_jack_priv(struct snd_jack
*jack
)
2060 struct hdmi_pcm
*pcm
= jack
->private_data
;
2065 static int add_hdmi_jack_kctl(struct hda_codec
*codec
,
2066 struct hdmi_spec
*spec
,
2070 struct snd_jack
*jack
;
2073 err
= snd_jack_new(codec
->card
, name
, SND_JACK_AVOUT
, &jack
,
2078 spec
->pcm_rec
[pcm_idx
].jack
= jack
;
2079 jack
->private_data
= &spec
->pcm_rec
[pcm_idx
];
2080 jack
->private_free
= free_hdmi_jack_priv
;
2084 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pcm_idx
)
2086 char hdmi_str
[32] = "HDMI/DP";
2087 struct hdmi_spec
*spec
= codec
->spec
;
2088 struct hdmi_spec_per_pin
*per_pin
;
2089 struct hda_jack_tbl
*jack
;
2090 int pcmdev
= get_pcm_rec(spec
, pcm_idx
)->device
;
2095 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
2097 if (spec
->dyn_pcm_assign
)
2098 return add_hdmi_jack_kctl(codec
, spec
, pcm_idx
, hdmi_str
);
2100 /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2101 /* if !dyn_pcm_assign, it must be non-MST mode.
2102 * This means pcms and pins are statically mapped.
2103 * And pcm_idx is pin_idx.
2105 per_pin
= get_pin(spec
, pcm_idx
);
2106 phantom_jack
= !is_jack_detectable(codec
, per_pin
->pin_nid
);
2108 strncat(hdmi_str
, " Phantom",
2109 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
2110 ret
= snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
,
2114 jack
= snd_hda_jack_tbl_get(codec
, per_pin
->pin_nid
);
2117 /* assign jack->jack to pcm_rec[].jack to
2118 * align with dyn_pcm_assign mode
2120 spec
->pcm_rec
[pcm_idx
].jack
= jack
->jack
;
2124 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
2126 struct hdmi_spec
*spec
= codec
->spec
;
2128 int pin_idx
, pcm_idx
;
2131 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2132 err
= generic_hdmi_build_jack(codec
, pcm_idx
);
2136 /* create the spdif for each pcm
2137 * pin will be bound when monitor is connected
2139 if (spec
->dyn_pcm_assign
)
2140 err
= snd_hda_create_dig_out_ctls(codec
,
2141 0, spec
->cvt_nids
[0],
2144 struct hdmi_spec_per_pin
*per_pin
=
2145 get_pin(spec
, pcm_idx
);
2146 err
= snd_hda_create_dig_out_ctls(codec
,
2148 per_pin
->mux_nids
[0],
2153 snd_hda_spdif_ctls_unassign(codec
, pcm_idx
);
2155 /* add control for ELD Bytes */
2156 err
= hdmi_create_eld_ctl(codec
, pcm_idx
,
2157 get_pcm_rec(spec
, pcm_idx
)->device
);
2162 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2163 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2165 hdmi_present_sense(per_pin
, 0);
2168 /* add channel maps */
2169 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2170 struct hda_pcm
*pcm
;
2172 pcm
= get_pcm_rec(spec
, pcm_idx
);
2173 if (!pcm
|| !pcm
->pcm
)
2175 err
= snd_hdac_add_chmap_ctls(pcm
->pcm
, pcm_idx
, &spec
->chmap
);
2183 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
2185 struct hdmi_spec
*spec
= codec
->spec
;
2188 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2189 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2191 per_pin
->codec
= codec
;
2192 mutex_init(&per_pin
->lock
);
2193 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
2194 eld_proc_new(per_pin
, pin_idx
);
2199 static int generic_hdmi_init(struct hda_codec
*codec
)
2201 struct hdmi_spec
*spec
= codec
->spec
;
2204 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2205 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2206 hda_nid_t pin_nid
= per_pin
->pin_nid
;
2207 int dev_id
= per_pin
->dev_id
;
2209 snd_hda_set_dev_select(codec
, pin_nid
, dev_id
);
2210 hdmi_init_pin(codec
, pin_nid
);
2211 if (!codec_has_acomp(codec
))
2212 snd_hda_jack_detect_enable_callback(codec
, pin_nid
,
2213 codec
->jackpoll_interval
> 0 ?
2214 jack_callback
: NULL
);
2219 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
2221 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
2222 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
2225 static void hdmi_array_free(struct hdmi_spec
*spec
)
2227 snd_array_free(&spec
->pins
);
2228 snd_array_free(&spec
->cvts
);
2231 static void generic_spec_free(struct hda_codec
*codec
)
2233 struct hdmi_spec
*spec
= codec
->spec
;
2236 if (spec
->i915_bound
)
2237 snd_hdac_i915_exit(&codec
->bus
->core
);
2238 hdmi_array_free(spec
);
2242 codec
->dp_mst
= false;
2245 static void generic_hdmi_free(struct hda_codec
*codec
)
2247 struct hdmi_spec
*spec
= codec
->spec
;
2248 int pin_idx
, pcm_idx
;
2250 if (codec_has_acomp(codec
))
2251 snd_hdac_i915_register_notifier(NULL
);
2253 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2254 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2255 cancel_delayed_work_sync(&per_pin
->work
);
2256 eld_proc_free(per_pin
);
2259 for (pcm_idx
= 0; pcm_idx
< spec
->pcm_used
; pcm_idx
++) {
2260 if (spec
->pcm_rec
[pcm_idx
].jack
== NULL
)
2262 if (spec
->dyn_pcm_assign
)
2263 snd_device_free(codec
->card
,
2264 spec
->pcm_rec
[pcm_idx
].jack
);
2266 spec
->pcm_rec
[pcm_idx
].jack
= NULL
;
2269 generic_spec_free(codec
);
2273 static int generic_hdmi_resume(struct hda_codec
*codec
)
2275 struct hdmi_spec
*spec
= codec
->spec
;
2278 codec
->patch_ops
.init(codec
);
2279 regcache_sync(codec
->core
.regmap
);
2281 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
2282 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
2283 hdmi_present_sense(per_pin
, 1);
2289 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
2290 .init
= generic_hdmi_init
,
2291 .free
= generic_hdmi_free
,
2292 .build_pcms
= generic_hdmi_build_pcms
,
2293 .build_controls
= generic_hdmi_build_controls
,
2294 .unsol_event
= hdmi_unsol_event
,
2296 .resume
= generic_hdmi_resume
,
2300 static const struct hdmi_ops generic_standard_hdmi_ops
= {
2301 .pin_get_eld
= snd_hdmi_get_eld
,
2302 .pin_setup_infoframe
= hdmi_pin_setup_infoframe
,
2303 .pin_hbr_setup
= hdmi_pin_hbr_setup
,
2304 .setup_stream
= hdmi_setup_stream
,
2307 /* allocate codec->spec and assign/initialize generic parser ops */
2308 static int alloc_generic_hdmi(struct hda_codec
*codec
)
2310 struct hdmi_spec
*spec
;
2312 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2316 spec
->ops
= generic_standard_hdmi_ops
;
2317 spec
->dev_num
= 1; /* initialize to 1 */
2318 mutex_init(&spec
->pcm_lock
);
2319 snd_hdac_register_chmap_ops(&codec
->core
, &spec
->chmap
);
2321 spec
->chmap
.ops
.get_chmap
= hdmi_get_chmap
;
2322 spec
->chmap
.ops
.set_chmap
= hdmi_set_chmap
;
2323 spec
->chmap
.ops
.is_pcm_attached
= is_hdmi_pcm_attached
;
2324 spec
->chmap
.ops
.get_spk_alloc
= hdmi_get_spk_alloc
,
2327 hdmi_array_init(spec
, 4);
2329 codec
->patch_ops
= generic_hdmi_patch_ops
;
2334 /* generic HDMI parser */
2335 static int patch_generic_hdmi(struct hda_codec
*codec
)
2339 err
= alloc_generic_hdmi(codec
);
2343 err
= hdmi_parse_codec(codec
);
2345 generic_spec_free(codec
);
2349 generic_hdmi_init_per_pins(codec
);
2354 * Intel codec parsers and helpers
2357 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
2360 struct hdmi_spec
*spec
= codec
->spec
;
2364 nconns
= snd_hda_get_connections(codec
, nid
, conns
, ARRAY_SIZE(conns
));
2365 if (nconns
== spec
->num_cvts
&&
2366 !memcmp(conns
, spec
->cvt_nids
, spec
->num_cvts
* sizeof(hda_nid_t
)))
2369 /* override pins connection list */
2370 codec_dbg(codec
, "hdmi: haswell: override pin connection 0x%x\n", nid
);
2371 snd_hda_override_conn_list(codec
, nid
, spec
->num_cvts
, spec
->cvt_nids
);
2374 #define INTEL_VENDOR_NID 0x08
2375 #define INTEL_GET_VENDOR_VERB 0xf81
2376 #define INTEL_SET_VENDOR_VERB 0x781
2377 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2378 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2380 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
2383 unsigned int vendor_param
;
2385 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2386 INTEL_GET_VENDOR_VERB
, 0);
2387 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
2390 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
2391 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2392 INTEL_SET_VENDOR_VERB
, vendor_param
);
2393 if (vendor_param
== -1)
2397 snd_hda_codec_update_widgets(codec
);
2400 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
2402 unsigned int vendor_param
;
2404 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
2405 INTEL_GET_VENDOR_VERB
, 0);
2406 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
2409 /* enable DP1.2 mode */
2410 vendor_param
|= INTEL_EN_DP12
;
2411 snd_hdac_regmap_add_vendor_verb(&codec
->core
, INTEL_SET_VENDOR_VERB
);
2412 snd_hda_codec_write_cache(codec
, INTEL_VENDOR_NID
, 0,
2413 INTEL_SET_VENDOR_VERB
, vendor_param
);
2416 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2417 * Otherwise you may get severe h/w communication errors.
2419 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
2420 unsigned int power_state
)
2422 if (power_state
== AC_PWRST_D0
) {
2423 intel_haswell_enable_all_pins(codec
, false);
2424 intel_haswell_fixup_enable_dp12(codec
);
2427 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
2428 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
2431 static void intel_pin_eld_notify(void *audio_ptr
, int port
, int pipe
)
2433 struct hda_codec
*codec
= audio_ptr
;
2437 /* we assume only from port-B to port-D */
2438 if (port
< 1 || port
> 3)
2441 switch (codec
->core
.vendor_id
) {
2442 case 0x80860054: /* ILK */
2443 case 0x80862804: /* ILK */
2444 case 0x80862882: /* VLV */
2445 pin_nid
= port
+ 0x03;
2448 pin_nid
= port
+ 0x04;
2452 /* skip notification during system suspend (but not in runtime PM);
2453 * the state will be updated at resume
2455 if (snd_power_get_state(codec
->card
) != SNDRV_CTL_POWER_D0
)
2457 /* ditto during suspend/resume process itself */
2458 if (atomic_read(&(codec
)->core
.in_pm
))
2461 snd_hdac_i915_set_bclk(&codec
->bus
->core
);
2462 check_presence_and_report(codec
, pin_nid
, dev_id
);
2465 /* register i915 component pin_eld_notify callback */
2466 static void register_i915_notifier(struct hda_codec
*codec
)
2468 struct hdmi_spec
*spec
= codec
->spec
;
2470 spec
->use_acomp_notifier
= true;
2471 spec
->i915_audio_ops
.audio_ptr
= codec
;
2472 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2473 * will call pin_eld_notify with using audio_ptr pointer
2474 * We need make sure audio_ptr is really setup
2477 spec
->i915_audio_ops
.pin_eld_notify
= intel_pin_eld_notify
;
2478 snd_hdac_i915_register_notifier(&spec
->i915_audio_ops
);
2481 /* setup_stream ops override for HSW+ */
2482 static int i915_hsw_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
2483 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
2485 haswell_verify_D0(codec
, cvt_nid
, pin_nid
);
2486 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
2489 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2490 static void i915_pin_cvt_fixup(struct hda_codec
*codec
,
2491 struct hdmi_spec_per_pin
*per_pin
,
2495 snd_hda_set_dev_select(codec
, per_pin
->pin_nid
,
2497 intel_verify_pin_cvt_connect(codec
, per_pin
);
2498 intel_not_share_assigned_cvt(codec
, per_pin
->pin_nid
,
2499 per_pin
->dev_id
, per_pin
->mux_idx
);
2501 intel_not_share_assigned_cvt_nid(codec
, 0, 0, cvt_nid
);
2505 /* Intel Haswell and onwards; audio component with eld notifier */
2506 static int patch_i915_hsw_hdmi(struct hda_codec
*codec
)
2508 struct hdmi_spec
*spec
;
2511 /* HSW+ requires i915 binding */
2512 if (!codec
->bus
->core
.audio_component
) {
2513 codec_info(codec
, "No i915 binding for Intel HDMI/DP codec\n");
2517 err
= alloc_generic_hdmi(codec
);
2521 codec
->dp_mst
= true;
2522 spec
->dyn_pcm_assign
= true;
2524 intel_haswell_enable_all_pins(codec
, true);
2525 intel_haswell_fixup_enable_dp12(codec
);
2527 /* For Haswell/Broadwell, the controller is also in the power well and
2528 * can cover the codec power request, and so need not set this flag.
2530 if (!is_haswell(codec
) && !is_broadwell(codec
))
2531 codec
->core
.link_power_control
= 1;
2533 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
2534 codec
->depop_delay
= 0;
2535 codec
->auto_runtime_pm
= 1;
2537 spec
->ops
.setup_stream
= i915_hsw_setup_stream
;
2538 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2540 err
= hdmi_parse_codec(codec
);
2542 generic_spec_free(codec
);
2546 generic_hdmi_init_per_pins(codec
);
2547 register_i915_notifier(codec
);
2551 /* Intel Baytrail and Braswell; with eld notifier */
2552 static int patch_i915_byt_hdmi(struct hda_codec
*codec
)
2554 struct hdmi_spec
*spec
;
2557 /* requires i915 binding */
2558 if (!codec
->bus
->core
.audio_component
) {
2559 codec_info(codec
, "No i915 binding for Intel HDMI/DP codec\n");
2563 err
= alloc_generic_hdmi(codec
);
2568 /* For Valleyview/Cherryview, only the display codec is in the display
2569 * power well and can use link_power ops to request/release the power.
2571 codec
->core
.link_power_control
= 1;
2573 codec
->depop_delay
= 0;
2574 codec
->auto_runtime_pm
= 1;
2576 spec
->ops
.pin_cvt_fixup
= i915_pin_cvt_fixup
;
2578 err
= hdmi_parse_codec(codec
);
2580 generic_spec_free(codec
);
2584 generic_hdmi_init_per_pins(codec
);
2585 register_i915_notifier(codec
);
2589 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2590 static int patch_i915_cpt_hdmi(struct hda_codec
*codec
)
2592 struct hdmi_spec
*spec
;
2595 /* no i915 component should have been bound before this */
2596 if (WARN_ON(codec
->bus
->core
.audio_component
))
2599 err
= alloc_generic_hdmi(codec
);
2604 /* Try to bind with i915 now */
2605 err
= snd_hdac_i915_init(&codec
->bus
->core
);
2608 spec
->i915_bound
= true;
2610 err
= hdmi_parse_codec(codec
);
2614 generic_hdmi_init_per_pins(codec
);
2615 register_i915_notifier(codec
);
2619 generic_spec_free(codec
);
2624 * Shared non-generic implementations
2627 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2629 struct hdmi_spec
*spec
= codec
->spec
;
2630 struct hda_pcm
*info
;
2632 struct hda_pcm_stream
*pstr
;
2633 struct hdmi_spec_per_cvt
*per_cvt
;
2635 per_cvt
= get_cvt(spec
, 0);
2636 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2637 chans
= get_wcaps_channels(chans
);
2639 info
= snd_hda_codec_pcm_new(codec
, "HDMI 0");
2642 spec
->pcm_rec
[0].pcm
= info
;
2643 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2644 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2645 *pstr
= spec
->pcm_playback
;
2646 pstr
->nid
= per_cvt
->cvt_nid
;
2647 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2648 pstr
->channels_max
= chans
;
2653 /* unsolicited event for jack sensing */
2654 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2657 snd_hda_jack_set_dirty_all(codec
);
2658 snd_hda_jack_report_sync(codec
);
2661 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2662 * as long as spec->pins[] is set correctly
2664 #define simple_hdmi_build_jack generic_hdmi_build_jack
2666 static int simple_playback_build_controls(struct hda_codec
*codec
)
2668 struct hdmi_spec
*spec
= codec
->spec
;
2669 struct hdmi_spec_per_cvt
*per_cvt
;
2672 per_cvt
= get_cvt(spec
, 0);
2673 err
= snd_hda_create_dig_out_ctls(codec
, per_cvt
->cvt_nid
,
2678 return simple_hdmi_build_jack(codec
, 0);
2681 static int simple_playback_init(struct hda_codec
*codec
)
2683 struct hdmi_spec
*spec
= codec
->spec
;
2684 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2685 hda_nid_t pin
= per_pin
->pin_nid
;
2687 snd_hda_codec_write(codec
, pin
, 0,
2688 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2689 /* some codecs require to unmute the pin */
2690 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2691 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2693 snd_hda_jack_detect_enable(codec
, pin
);
2697 static void simple_playback_free(struct hda_codec
*codec
)
2699 struct hdmi_spec
*spec
= codec
->spec
;
2701 hdmi_array_free(spec
);
2706 * Nvidia specific implementations
2709 #define Nv_VERB_SET_Channel_Allocation 0xF79
2710 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2711 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2712 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2714 #define nvhdmi_master_con_nid_7x 0x04
2715 #define nvhdmi_master_pin_nid_7x 0x05
2717 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2718 /*front, rear, clfe, rear_surr */
2722 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2723 /* set audio protect on */
2724 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2725 /* enable digital output on pin widget */
2726 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2730 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2731 /* set audio protect on */
2732 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2733 /* enable digital output on pin widget */
2734 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2735 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2736 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2737 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2738 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2742 #ifdef LIMITED_RATE_FMT_SUPPORT
2743 /* support only the safe format and rate */
2744 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2745 #define SUPPORTED_MAXBPS 16
2746 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2748 /* support all rates and formats */
2749 #define SUPPORTED_RATES \
2750 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2751 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2752 SNDRV_PCM_RATE_192000)
2753 #define SUPPORTED_MAXBPS 24
2754 #define SUPPORTED_FORMATS \
2755 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2758 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2760 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2764 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2766 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2770 static unsigned int channels_2_6_8
[] = {
2774 static unsigned int channels_2_8
[] = {
2778 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
2779 .count
= ARRAY_SIZE(channels_2_6_8
),
2780 .list
= channels_2_6_8
,
2784 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
2785 .count
= ARRAY_SIZE(channels_2_8
),
2786 .list
= channels_2_8
,
2790 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
2791 struct hda_codec
*codec
,
2792 struct snd_pcm_substream
*substream
)
2794 struct hdmi_spec
*spec
= codec
->spec
;
2795 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
2797 switch (codec
->preset
->vendor_id
) {
2802 hw_constraints_channels
= &hw_constraints_2_8_channels
;
2805 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
2811 if (hw_constraints_channels
!= NULL
) {
2812 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
2813 SNDRV_PCM_HW_PARAM_CHANNELS
,
2814 hw_constraints_channels
);
2816 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
2817 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
2820 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
2823 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
2824 struct hda_codec
*codec
,
2825 struct snd_pcm_substream
*substream
)
2827 struct hdmi_spec
*spec
= codec
->spec
;
2828 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2831 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2832 struct hda_codec
*codec
,
2833 unsigned int stream_tag
,
2834 unsigned int format
,
2835 struct snd_pcm_substream
*substream
)
2837 struct hdmi_spec
*spec
= codec
->spec
;
2838 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
2839 stream_tag
, format
, substream
);
2842 static const struct hda_pcm_stream simple_pcm_playback
= {
2847 .open
= simple_playback_pcm_open
,
2848 .close
= simple_playback_pcm_close
,
2849 .prepare
= simple_playback_pcm_prepare
2853 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
2854 .build_controls
= simple_playback_build_controls
,
2855 .build_pcms
= simple_playback_build_pcms
,
2856 .init
= simple_playback_init
,
2857 .free
= simple_playback_free
,
2858 .unsol_event
= simple_hdmi_unsol_event
,
2861 static int patch_simple_hdmi(struct hda_codec
*codec
,
2862 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
2864 struct hdmi_spec
*spec
;
2865 struct hdmi_spec_per_cvt
*per_cvt
;
2866 struct hdmi_spec_per_pin
*per_pin
;
2868 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2873 hdmi_array_init(spec
, 1);
2875 spec
->multiout
.num_dacs
= 0; /* no analog */
2876 spec
->multiout
.max_channels
= 2;
2877 spec
->multiout
.dig_out_nid
= cvt_nid
;
2880 per_pin
= snd_array_new(&spec
->pins
);
2881 per_cvt
= snd_array_new(&spec
->cvts
);
2882 if (!per_pin
|| !per_cvt
) {
2883 simple_playback_free(codec
);
2886 per_cvt
->cvt_nid
= cvt_nid
;
2887 per_pin
->pin_nid
= pin_nid
;
2888 spec
->pcm_playback
= simple_pcm_playback
;
2890 codec
->patch_ops
= simple_hdmi_patch_ops
;
2895 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2898 unsigned int chanmask
;
2899 int chan
= channels
? (channels
- 1) : 1;
2918 /* Set the audio infoframe channel allocation and checksum fields. The
2919 * channel count is computed implicitly by the hardware. */
2920 snd_hda_codec_write(codec
, 0x1, 0,
2921 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2923 snd_hda_codec_write(codec
, 0x1, 0,
2924 Nv_VERB_SET_Info_Frame_Checksum
,
2925 (0x71 - chan
- chanmask
));
2928 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2929 struct hda_codec
*codec
,
2930 struct snd_pcm_substream
*substream
)
2932 struct hdmi_spec
*spec
= codec
->spec
;
2935 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2936 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2937 for (i
= 0; i
< 4; i
++) {
2938 /* set the stream id */
2939 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2940 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2941 /* set the stream format */
2942 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2943 AC_VERB_SET_STREAM_FORMAT
, 0);
2946 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2947 * streams are disabled. */
2948 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2950 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2953 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2954 struct hda_codec
*codec
,
2955 unsigned int stream_tag
,
2956 unsigned int format
,
2957 struct snd_pcm_substream
*substream
)
2960 unsigned int dataDCC2
, channel_id
;
2962 struct hdmi_spec
*spec
= codec
->spec
;
2963 struct hda_spdif_out
*spdif
;
2964 struct hdmi_spec_per_cvt
*per_cvt
;
2966 mutex_lock(&codec
->spdif_mutex
);
2967 per_cvt
= get_cvt(spec
, 0);
2968 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
2970 chs
= substream
->runtime
->channels
;
2974 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2975 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2976 snd_hda_codec_write(codec
,
2977 nvhdmi_master_con_nid_7x
,
2979 AC_VERB_SET_DIGI_CONVERT_1
,
2980 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2982 /* set the stream id */
2983 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2984 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2986 /* set the stream format */
2987 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2988 AC_VERB_SET_STREAM_FORMAT
, format
);
2990 /* turn on again (if needed) */
2991 /* enable and set the channel status audio/data flag */
2992 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2993 snd_hda_codec_write(codec
,
2994 nvhdmi_master_con_nid_7x
,
2996 AC_VERB_SET_DIGI_CONVERT_1
,
2997 spdif
->ctls
& 0xff);
2998 snd_hda_codec_write(codec
,
2999 nvhdmi_master_con_nid_7x
,
3001 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
3004 for (i
= 0; i
< 4; i
++) {
3010 /* turn off SPDIF once;
3011 *otherwise the IEC958 bits won't be updated
3013 if (codec
->spdif_status_reset
&&
3014 (spdif
->ctls
& AC_DIG1_ENABLE
))
3015 snd_hda_codec_write(codec
,
3016 nvhdmi_con_nids_7x
[i
],
3018 AC_VERB_SET_DIGI_CONVERT_1
,
3019 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
3020 /* set the stream id */
3021 snd_hda_codec_write(codec
,
3022 nvhdmi_con_nids_7x
[i
],
3024 AC_VERB_SET_CHANNEL_STREAMID
,
3025 (stream_tag
<< 4) | channel_id
);
3026 /* set the stream format */
3027 snd_hda_codec_write(codec
,
3028 nvhdmi_con_nids_7x
[i
],
3030 AC_VERB_SET_STREAM_FORMAT
,
3032 /* turn on again (if needed) */
3033 /* enable and set the channel status audio/data flag */
3034 if (codec
->spdif_status_reset
&&
3035 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
3036 snd_hda_codec_write(codec
,
3037 nvhdmi_con_nids_7x
[i
],
3039 AC_VERB_SET_DIGI_CONVERT_1
,
3040 spdif
->ctls
& 0xff);
3041 snd_hda_codec_write(codec
,
3042 nvhdmi_con_nids_7x
[i
],
3044 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
3048 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
3050 mutex_unlock(&codec
->spdif_mutex
);
3054 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
3058 .nid
= nvhdmi_master_con_nid_7x
,
3059 .rates
= SUPPORTED_RATES
,
3060 .maxbps
= SUPPORTED_MAXBPS
,
3061 .formats
= SUPPORTED_FORMATS
,
3063 .open
= simple_playback_pcm_open
,
3064 .close
= nvhdmi_8ch_7x_pcm_close
,
3065 .prepare
= nvhdmi_8ch_7x_pcm_prepare
3069 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
3071 struct hdmi_spec
*spec
;
3072 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
3073 nvhdmi_master_pin_nid_7x
);
3077 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
3078 /* override the PCM rates, etc, as the codec doesn't give full list */
3080 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
3081 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
3082 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
3086 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
3088 struct hdmi_spec
*spec
= codec
->spec
;
3089 int err
= simple_playback_build_pcms(codec
);
3091 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
3092 info
->own_chmap
= true;
3097 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
3099 struct hdmi_spec
*spec
= codec
->spec
;
3100 struct hda_pcm
*info
;
3101 struct snd_pcm_chmap
*chmap
;
3104 err
= simple_playback_build_controls(codec
);
3108 /* add channel maps */
3109 info
= get_pcm_rec(spec
, 0);
3110 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
3111 SNDRV_PCM_STREAM_PLAYBACK
,
3112 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
3115 switch (codec
->preset
->vendor_id
) {
3120 chmap
->channel_mask
= (1U << 2) | (1U << 8);
3123 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
3128 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
3130 struct hdmi_spec
*spec
;
3131 int err
= patch_nvhdmi_2ch(codec
);
3135 spec
->multiout
.max_channels
= 8;
3136 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
3137 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
3138 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
3139 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
3141 /* Initialize the audio infoframe channel mask and checksum to something
3143 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
3149 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3153 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap
*chmap
,
3154 struct hdac_cea_channel_speaker_allocation
*cap
, int channels
)
3156 if (cap
->ca_index
== 0x00 && channels
== 2)
3157 return SNDRV_CTL_TLVT_CHMAP_FIXED
;
3159 /* If the speaker allocation matches the channel count, it is OK. */
3160 if (cap
->channels
!= channels
)
3163 /* all channels are remappable freely */
3164 return SNDRV_CTL_TLVT_CHMAP_VAR
;
3167 static int nvhdmi_chmap_validate(struct hdac_chmap
*chmap
,
3168 int ca
, int chs
, unsigned char *map
)
3170 if (ca
== 0x00 && (map
[0] != SNDRV_CHMAP_FL
|| map
[1] != SNDRV_CHMAP_FR
))
3176 static int patch_nvhdmi(struct hda_codec
*codec
)
3178 struct hdmi_spec
*spec
;
3181 err
= patch_generic_hdmi(codec
);
3186 spec
->dyn_pin_out
= true;
3188 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3189 nvhdmi_chmap_cea_alloc_validate_get_type
;
3190 spec
->chmap
.ops
.chmap_validate
= nvhdmi_chmap_validate
;
3196 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3197 * accessed using vendor-defined verbs. These registers can be used for
3198 * interoperability between the HDA and HDMI drivers.
3201 /* Audio Function Group node */
3202 #define NVIDIA_AFG_NID 0x01
3205 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3206 * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3207 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3208 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3209 * additional bit (at position 30) to signal the validity of the format.
3211 * | 31 | 30 | 29 16 | 15 0 |
3212 * +---------+-------+--------+--------+
3213 * | TRIGGER | VALID | UNUSED | FORMAT |
3214 * +-----------------------------------|
3216 * Note that for the trigger bit to take effect it needs to change value
3217 * (i.e. it needs to be toggled).
3219 #define NVIDIA_GET_SCRATCH0 0xfa6
3220 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3221 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3222 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3223 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3224 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3225 #define NVIDIA_SCRATCH_VALID (1 << 6)
3227 #define NVIDIA_GET_SCRATCH1 0xfab
3228 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3229 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3230 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3231 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3234 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3235 * the format is invalidated so that the HDMI codec can be disabled.
3237 static void tegra_hdmi_set_format(struct hda_codec
*codec
, unsigned int format
)
3241 /* bits [31:30] contain the trigger and valid bits */
3242 value
= snd_hda_codec_read(codec
, NVIDIA_AFG_NID
, 0,
3243 NVIDIA_GET_SCRATCH0
, 0);
3244 value
= (value
>> 24) & 0xff;
3246 /* bits [15:0] are used to store the HDA format */
3247 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3248 NVIDIA_SET_SCRATCH0_BYTE0
,
3249 (format
>> 0) & 0xff);
3250 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3251 NVIDIA_SET_SCRATCH0_BYTE1
,
3252 (format
>> 8) & 0xff);
3254 /* bits [16:24] are unused */
3255 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3256 NVIDIA_SET_SCRATCH0_BYTE2
, 0);
3259 * Bit 30 signals that the data is valid and hence that HDMI audio can
3263 value
&= ~NVIDIA_SCRATCH_VALID
;
3265 value
|= NVIDIA_SCRATCH_VALID
;
3268 * Whenever the trigger bit is toggled, an interrupt is raised in the
3269 * HDMI codec. The HDMI driver will use that as trigger to update its
3272 value
^= NVIDIA_SCRATCH_TRIGGER
;
3274 snd_hda_codec_write(codec
, NVIDIA_AFG_NID
, 0,
3275 NVIDIA_SET_SCRATCH0_BYTE3
, value
);
3278 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream
*hinfo
,
3279 struct hda_codec
*codec
,
3280 unsigned int stream_tag
,
3281 unsigned int format
,
3282 struct snd_pcm_substream
*substream
)
3286 err
= generic_hdmi_playback_pcm_prepare(hinfo
, codec
, stream_tag
,
3291 /* notify the HDMI codec of the format change */
3292 tegra_hdmi_set_format(codec
, format
);
3297 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
3298 struct hda_codec
*codec
,
3299 struct snd_pcm_substream
*substream
)
3301 /* invalidate the format in the HDMI codec */
3302 tegra_hdmi_set_format(codec
, 0);
3304 return generic_hdmi_playback_pcm_cleanup(hinfo
, codec
, substream
);
3307 static struct hda_pcm
*hda_find_pcm_by_type(struct hda_codec
*codec
, int type
)
3309 struct hdmi_spec
*spec
= codec
->spec
;
3312 for (i
= 0; i
< spec
->num_pins
; i
++) {
3313 struct hda_pcm
*pcm
= get_pcm_rec(spec
, i
);
3315 if (pcm
->pcm_type
== type
)
3322 static int tegra_hdmi_build_pcms(struct hda_codec
*codec
)
3324 struct hda_pcm_stream
*stream
;
3325 struct hda_pcm
*pcm
;
3328 err
= generic_hdmi_build_pcms(codec
);
3332 pcm
= hda_find_pcm_by_type(codec
, HDA_PCM_TYPE_HDMI
);
3337 * Override ->prepare() and ->cleanup() operations to notify the HDMI
3338 * codec about format changes.
3340 stream
= &pcm
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
3341 stream
->ops
.prepare
= tegra_hdmi_pcm_prepare
;
3342 stream
->ops
.cleanup
= tegra_hdmi_pcm_cleanup
;
3347 static int patch_tegra_hdmi(struct hda_codec
*codec
)
3351 err
= patch_generic_hdmi(codec
);
3355 codec
->patch_ops
.build_pcms
= tegra_hdmi_build_pcms
;
3361 * ATI/AMD-specific implementations
3364 #define is_amdhdmi_rev3_or_later(codec) \
3365 ((codec)->core.vendor_id == 0x1002aa01 && \
3366 ((codec)->core.revision_id & 0xff00) >= 0x0300)
3367 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3369 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3370 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3371 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
3372 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
3373 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
3374 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
3375 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
3376 #define ATI_VERB_SET_HBR_CONTROL 0x77c
3377 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
3378 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
3379 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
3380 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
3381 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
3382 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3383 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
3384 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
3385 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
3386 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
3387 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
3388 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
3389 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
3390 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
3391 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
3392 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
3393 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
3395 /* AMD specific HDA cvt verbs */
3396 #define ATI_VERB_SET_RAMP_RATE 0x770
3397 #define ATI_VERB_GET_RAMP_RATE 0xf70
3399 #define ATI_OUT_ENABLE 0x1
3401 #define ATI_MULTICHANNEL_MODE_PAIRED 0
3402 #define ATI_MULTICHANNEL_MODE_SINGLE 1
3404 #define ATI_HBR_CAPABLE 0x01
3405 #define ATI_HBR_ENABLE 0x10
3407 static int atihdmi_pin_get_eld(struct hda_codec
*codec
, hda_nid_t nid
,
3408 unsigned char *buf
, int *eld_size
)
3410 /* call hda_eld.c ATI/AMD-specific function */
3411 return snd_hdmi_get_eld_ati(codec
, nid
, buf
, eld_size
,
3412 is_amdhdmi_rev3_or_later(codec
));
3415 static void atihdmi_pin_setup_infoframe(struct hda_codec
*codec
, hda_nid_t pin_nid
, int ca
,
3416 int active_channels
, int conn_type
)
3418 snd_hda_codec_write(codec
, pin_nid
, 0, ATI_VERB_SET_CHANNEL_ALLOCATION
, ca
);
3421 static int atihdmi_paired_swap_fc_lfe(int pos
)
3424 * ATI/AMD have automatic FC/LFE swap built-in
3425 * when in pairwise mapping mode.
3429 /* see channel_allocations[].speakers[] */
3438 static int atihdmi_paired_chmap_validate(struct hdac_chmap
*chmap
,
3439 int ca
, int chs
, unsigned char *map
)
3441 struct hdac_cea_channel_speaker_allocation
*cap
;
3444 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3446 cap
= snd_hdac_get_ch_alloc_from_ca(ca
);
3447 for (i
= 0; i
< chs
; ++i
) {
3448 int mask
= snd_hdac_chmap_to_spk_mask(map
[i
]);
3450 bool companion_ok
= false;
3455 for (j
= 0 + i
% 2; j
< 8; j
+= 2) {
3456 int chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
);
3457 if (cap
->speakers
[chan_idx
] == mask
) {
3458 /* channel is in a supported position */
3461 if (i
% 2 == 0 && i
+ 1 < chs
) {
3462 /* even channel, check the odd companion */
3463 int comp_chan_idx
= 7 - atihdmi_paired_swap_fc_lfe(j
+ 1);
3464 int comp_mask_req
= snd_hdac_chmap_to_spk_mask(map
[i
+1]);
3465 int comp_mask_act
= cap
->speakers
[comp_chan_idx
];
3467 if (comp_mask_req
== comp_mask_act
)
3468 companion_ok
= true;
3480 i
++; /* companion channel already checked */
3486 static int atihdmi_pin_set_slot_channel(struct hdac_device
*hdac
,
3487 hda_nid_t pin_nid
, int hdmi_slot
, int stream_channel
)
3489 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3491 int ati_channel_setup
= 0;
3496 if (!has_amd_full_remap_support(codec
)) {
3497 hdmi_slot
= atihdmi_paired_swap_fc_lfe(hdmi_slot
);
3499 /* In case this is an odd slot but without stream channel, do not
3500 * disable the slot since the corresponding even slot could have a
3501 * channel. In case neither have a channel, the slot pair will be
3502 * disabled when this function is called for the even slot. */
3503 if (hdmi_slot
% 2 != 0 && stream_channel
== 0xf)
3506 hdmi_slot
-= hdmi_slot
% 2;
3508 if (stream_channel
!= 0xf)
3509 stream_channel
-= stream_channel
% 2;
3512 verb
= ATI_VERB_SET_MULTICHANNEL_01
+ hdmi_slot
/2 + (hdmi_slot
% 2) * 0x00e;
3514 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3516 if (stream_channel
!= 0xf)
3517 ati_channel_setup
= (stream_channel
<< 4) | ATI_OUT_ENABLE
;
3519 return snd_hda_codec_write(codec
, pin_nid
, 0, verb
, ati_channel_setup
);
3522 static int atihdmi_pin_get_slot_channel(struct hdac_device
*hdac
,
3523 hda_nid_t pin_nid
, int asp_slot
)
3525 struct hda_codec
*codec
= container_of(hdac
, struct hda_codec
, core
);
3526 bool was_odd
= false;
3527 int ati_asp_slot
= asp_slot
;
3529 int ati_channel_setup
;
3534 if (!has_amd_full_remap_support(codec
)) {
3535 ati_asp_slot
= atihdmi_paired_swap_fc_lfe(asp_slot
);
3536 if (ati_asp_slot
% 2 != 0) {
3542 verb
= ATI_VERB_GET_MULTICHANNEL_01
+ ati_asp_slot
/2 + (ati_asp_slot
% 2) * 0x00e;
3544 ati_channel_setup
= snd_hda_codec_read(codec
, pin_nid
, 0, verb
, 0);
3546 if (!(ati_channel_setup
& ATI_OUT_ENABLE
))
3549 return ((ati_channel_setup
& 0xf0) >> 4) + !!was_odd
;
3552 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3553 struct hdac_chmap
*chmap
,
3554 struct hdac_cea_channel_speaker_allocation
*cap
,
3560 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3561 * we need to take that into account (a single channel may take 2
3562 * channel slots if we need to carry a silent channel next to it).
3563 * On Rev3+ AMD codecs this function is not used.
3567 /* We only produce even-numbered channel count TLVs */
3568 if ((channels
% 2) != 0)
3571 for (c
= 0; c
< 7; c
+= 2) {
3572 if (cap
->speakers
[c
] || cap
->speakers
[c
+1])
3576 if (chanpairs
* 2 != channels
)
3579 return SNDRV_CTL_TLVT_CHMAP_PAIRED
;
3582 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap
*hchmap
,
3583 struct hdac_cea_channel_speaker_allocation
*cap
,
3584 unsigned int *chmap
, int channels
)
3586 /* produce paired maps for pre-rev3 ATI/AMD codecs */
3590 for (c
= 7; c
>= 0; c
--) {
3591 int chan
= 7 - atihdmi_paired_swap_fc_lfe(7 - c
);
3592 int spk
= cap
->speakers
[chan
];
3594 /* add N/A channel if the companion channel is occupied */
3595 if (cap
->speakers
[chan
+ (chan
% 2 ? -1 : 1)])
3596 chmap
[count
++] = SNDRV_CHMAP_NA
;
3601 chmap
[count
++] = snd_hdac_spk_to_chmap(spk
);
3604 WARN_ON(count
!= channels
);
3607 static int atihdmi_pin_hbr_setup(struct hda_codec
*codec
, hda_nid_t pin_nid
,
3610 int hbr_ctl
, hbr_ctl_new
;
3612 hbr_ctl
= snd_hda_codec_read(codec
, pin_nid
, 0, ATI_VERB_GET_HBR_CONTROL
, 0);
3613 if (hbr_ctl
>= 0 && (hbr_ctl
& ATI_HBR_CAPABLE
)) {
3615 hbr_ctl_new
= hbr_ctl
| ATI_HBR_ENABLE
;
3617 hbr_ctl_new
= hbr_ctl
& ~ATI_HBR_ENABLE
;
3620 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3622 hbr_ctl
== hbr_ctl_new
? "" : "new-",
3625 if (hbr_ctl
!= hbr_ctl_new
)
3626 snd_hda_codec_write(codec
, pin_nid
, 0,
3627 ATI_VERB_SET_HBR_CONTROL
,
3636 static int atihdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
3637 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
3640 if (is_amdhdmi_rev3_or_later(codec
)) {
3641 int ramp_rate
= 180; /* default as per AMD spec */
3642 /* disable ramp-up/down for non-pcm as per AMD spec */
3643 if (format
& AC_FMT_TYPE_NON_PCM
)
3646 snd_hda_codec_write(codec
, cvt_nid
, 0, ATI_VERB_SET_RAMP_RATE
, ramp_rate
);
3649 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
3653 static int atihdmi_init(struct hda_codec
*codec
)
3655 struct hdmi_spec
*spec
= codec
->spec
;
3658 err
= generic_hdmi_init(codec
);
3663 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
3664 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
3666 /* make sure downmix information in infoframe is zero */
3667 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0, ATI_VERB_SET_DOWNMIX_INFO
, 0);
3669 /* enable channel-wise remap mode if supported */
3670 if (has_amd_full_remap_support(codec
))
3671 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
3672 ATI_VERB_SET_MULTICHANNEL_MODE
,
3673 ATI_MULTICHANNEL_MODE_SINGLE
);
3679 static int patch_atihdmi(struct hda_codec
*codec
)
3681 struct hdmi_spec
*spec
;
3682 struct hdmi_spec_per_cvt
*per_cvt
;
3685 err
= patch_generic_hdmi(codec
);
3690 codec
->patch_ops
.init
= atihdmi_init
;
3694 spec
->ops
.pin_get_eld
= atihdmi_pin_get_eld
;
3695 spec
->ops
.pin_setup_infoframe
= atihdmi_pin_setup_infoframe
;
3696 spec
->ops
.pin_hbr_setup
= atihdmi_pin_hbr_setup
;
3697 spec
->ops
.setup_stream
= atihdmi_setup_stream
;
3699 spec
->chmap
.ops
.pin_get_slot_channel
= atihdmi_pin_get_slot_channel
;
3700 spec
->chmap
.ops
.pin_set_slot_channel
= atihdmi_pin_set_slot_channel
;
3702 if (!has_amd_full_remap_support(codec
)) {
3703 /* override to ATI/AMD-specific versions with pairwise mapping */
3704 spec
->chmap
.ops
.chmap_cea_alloc_validate_get_type
=
3705 atihdmi_paired_chmap_cea_alloc_validate_get_type
;
3706 spec
->chmap
.ops
.cea_alloc_to_tlv_chmap
=
3707 atihdmi_paired_cea_alloc_to_tlv_chmap
;
3708 spec
->chmap
.ops
.chmap_validate
= atihdmi_paired_chmap_validate
;
3711 /* ATI/AMD converters do not advertise all of their capabilities */
3712 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
3713 per_cvt
= get_cvt(spec
, cvt_idx
);
3714 per_cvt
->channels_max
= max(per_cvt
->channels_max
, 8u);
3715 per_cvt
->rates
|= SUPPORTED_RATES
;
3716 per_cvt
->formats
|= SUPPORTED_FORMATS
;
3717 per_cvt
->maxbps
= max(per_cvt
->maxbps
, 24u);
3720 spec
->chmap
.channels_max
= max(spec
->chmap
.channels_max
, 8u);
3725 /* VIA HDMI Implementation */
3726 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
3727 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
3729 static int patch_via_hdmi(struct hda_codec
*codec
)
3731 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
3737 static const struct hda_device_id snd_hda_id_hdmi
[] = {
3738 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi
),
3739 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi
),
3740 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi
),
3741 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi
),
3742 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi
),
3743 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi
),
3744 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi
),
3745 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3746 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3747 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3748 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x
),
3749 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x
),
3750 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi
),
3751 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi
),
3752 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi
),
3753 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi
),
3754 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi
),
3755 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi
),
3756 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi
),
3757 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi
),
3758 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi
),
3759 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi
),
3760 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi
),
3761 /* 17 is known to be absent */
3762 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi
),
3763 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi
),
3764 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi
),
3765 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi
),
3766 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi
),
3767 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi
),
3768 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi
),
3769 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi
),
3770 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi
),
3771 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi
),
3772 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi
),
3773 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi
),
3774 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi
),
3775 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi
),
3776 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi
),
3777 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi
),
3778 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch
),
3779 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi
),
3780 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi
),
3781 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi
),
3782 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi
),
3783 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi
),
3784 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi
),
3785 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi
),
3786 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch
),
3787 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi
),
3788 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi
),
3789 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi
),
3790 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi
),
3791 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
3792 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi
),
3793 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi
),
3794 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi
),
3795 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi
),
3796 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi
),
3797 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi
),
3798 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi
),
3799 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi
),
3800 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi
),
3801 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi
),
3802 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi
),
3803 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi
),
3804 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi
),
3805 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi
),
3806 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi
),
3807 /* special ID for generic HDMI */
3808 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI
, "Generic HDMI", patch_generic_hdmi
),
3811 MODULE_DEVICE_TABLE(hdaudio
, snd_hda_id_hdmi
);
3813 MODULE_LICENSE("GPL");
3814 MODULE_DESCRIPTION("HDMI HD-audio codec");
3815 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3816 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3817 MODULE_ALIAS("snd-hda-codec-atihdmi");
3819 static struct hda_codec_driver hdmi_driver
= {
3820 .id
= snd_hda_id_hdmi
,
3823 module_hda_codec_driver(hdmi_driver
);