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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-artful-kernel.git] / sound / pci / ice1712 / ice1712.c
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <linux/delay.h>
51 #include <linux/interrupt.h>
52 #include <linux/init.h>
53 #include <linux/pci.h>
54 #include <linux/dma-mapping.h>
55 #include <linux/slab.h>
56 #include <linux/module.h>
57 #include <linux/mutex.h>
58
59 #include <sound/core.h>
60 #include <sound/cs8427.h>
61 #include <sound/info.h>
62 #include <sound/initval.h>
63 #include <sound/tlv.h>
64
65 #include <sound/asoundef.h>
66
67 #include "ice1712.h"
68
69 /* lowlevel routines */
70 #include "delta.h"
71 #include "ews.h"
72 #include "hoontech.h"
73
74 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
75 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76 MODULE_LICENSE("GPL");
77 MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
86 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
87 static char *model[SNDRV_CARDS];
88 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
89 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
90 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
91
92 module_param_array(index, int, NULL, 0444);
93 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94 module_param_array(id, charp, NULL, 0444);
95 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96 module_param_array(enable, bool, NULL, 0444);
97 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98 module_param_array(omni, bool, NULL, 0444);
99 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100 module_param_array(cs8427_timeout, int, NULL, 0444);
101 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102 module_param_array(model, charp, NULL, 0444);
103 MODULE_PARM_DESC(model, "Use the given board model.");
104 module_param_array(dxr_enable, int, NULL, 0444);
105 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
106
107
108 static const struct pci_device_id snd_ice1712_ids[] = {
109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
110 { 0, }
111 };
112
113 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
115 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
117
118 static int PRO_RATE_LOCKED;
119 static int PRO_RATE_RESET = 1;
120 static unsigned int PRO_RATE_DEFAULT = 44100;
121
122 /*
123 * Basic I/O
124 */
125
126 /* check whether the clock mode is spdif-in */
127 static inline int is_spdif_master(struct snd_ice1712 *ice)
128 {
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130 }
131
132 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
133 {
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135 }
136
137 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
138 {
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141 }
142
143 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
144 {
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147 }
148
149 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
150 unsigned short reg,
151 unsigned short val)
152 {
153 struct snd_ice1712 *ice = ac97->private_data;
154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172 }
173
174 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
175 unsigned short reg)
176 {
177 struct snd_ice1712 *ice = ac97->private_data;
178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197 }
198
199 /*
200 * pro ac97 section
201 */
202
203 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
204 unsigned short reg,
205 unsigned short val)
206 {
207 struct snd_ice1712 *ice = ac97->private_data;
208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226 }
227
228
229 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
230 unsigned short reg)
231 {
232 struct snd_ice1712 *ice = ac97->private_data;
233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252 }
253
254 /*
255 * consumer ac97 digital mix
256 */
257 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
258
259 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
260 {
261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
262
263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265 }
266
267 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268 {
269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270 unsigned char val, nval;
271
272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280 }
281
282 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288 };
289
290
291 /*
292 * gpio operations
293 */
294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
295 {
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298 }
299
300 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301 {
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303 }
304
305 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306 {
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308 }
309
310 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
311 {
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314 }
315
316 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
317 {
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319 }
320
321 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
322 {
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325 }
326
327 /*
328 *
329 * CS8427 interface
330 *
331 */
332
333 /*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
337 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
338 {
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
342
343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367 }
368
369 /*
370 * spdif callbacks
371 */
372 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
373 {
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375 }
376
377 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
378 {
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380 }
381
382 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
383 {
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385 }
386
387 /*
388 * create and initialize callbacks for cs8427 interface
389 */
390 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
391 {
392 int err;
393
394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
397 dev_err(ice->card->dev, "CS8427 initialization failed\n");
398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404 }
405
406 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407 {
408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419 }
420
421 /*
422 * Interrupt handler
423 */
424
425 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
426 {
427 struct snd_ice1712 *ice = dev_id;
428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
468 struct snd_pcm_substream *substream;
469 pbkstatus = inw(ICEDS(ice, INTSTAT));
470 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493 }
494
495
496 /*
497 * PCM part - misc
498 */
499
500 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
502 {
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504 }
505
506 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
507 {
508 return snd_pcm_lib_free_pages(substream);
509 }
510
511 /*
512 * PCM part - consumer I/O
513 */
514
515 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
516 int cmd)
517 {
518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
519 int result = 0;
520 u32 tmp;
521
522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538 }
539
540 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
541 int cmd)
542 {
543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
544 int result = 0;
545 u32 tmp;
546
547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563 }
564
565 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
566 int cmd)
567 {
568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
569 int result = 0;
570 u8 tmp;
571
572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584 }
585
586 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
587 {
588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617 }
618
619 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
620 {
621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
623 u32 period_size, rate, tmp, chn;
624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 tmp = 0x0064;
627 if (snd_pcm_format_width(runtime->format) == 16)
628 tmp &= ~0x04;
629 if (runtime->channels == 2)
630 tmp |= 0x08;
631 rate = (runtime->rate * 8192) / 375;
632 if (rate > 0x000fffff)
633 rate = 0x000fffff;
634 ice->playback_con_active_buf[substream->number] = 0;
635 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
636 chn = substream->number * 2;
637 spin_lock_irq(&ice->reg_lock);
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
645 if (runtime->channels == 2) {
646 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
648 }
649 spin_unlock_irq(&ice->reg_lock);
650 return 0;
651 }
652
653 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
654 {
655 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
656 struct snd_pcm_runtime *runtime = substream->runtime;
657 u32 period_size, buf_size;
658 u8 tmp;
659
660 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
661 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
662 tmp = 0x06;
663 if (snd_pcm_format_width(runtime->format) == 16)
664 tmp &= ~0x04;
665 if (runtime->channels == 2)
666 tmp &= ~0x02;
667 spin_lock_irq(&ice->reg_lock);
668 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
669 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
670 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
673 spin_unlock_irq(&ice->reg_lock);
674 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
675 return 0;
676 }
677
678 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
679 {
680 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
681 struct snd_pcm_runtime *runtime = substream->runtime;
682 size_t ptr;
683
684 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
685 return 0;
686 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
687 ptr = bytes_to_frames(substream->runtime, ptr);
688 if (ptr == runtime->buffer_size)
689 ptr = 0;
690 return ptr;
691 }
692
693 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
694 {
695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
696 u8 addr;
697 size_t ptr;
698
699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
700 return 0;
701 if (ice->playback_con_active_buf[substream->number])
702 addr = ICE1712_DSC_ADDR1;
703 else
704 addr = ICE1712_DSC_ADDR0;
705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
706 ice->playback_con_virt_addr[substream->number];
707 ptr = bytes_to_frames(substream->runtime, ptr);
708 if (ptr == substream->runtime->buffer_size)
709 ptr = 0;
710 return ptr;
711 }
712
713 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
714 {
715 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
716 size_t ptr;
717
718 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
719 return 0;
720 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
721 ptr = bytes_to_frames(substream->runtime, ptr);
722 if (ptr == substream->runtime->buffer_size)
723 ptr = 0;
724 return ptr;
725 }
726
727 static const struct snd_pcm_hardware snd_ice1712_playback = {
728 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
729 SNDRV_PCM_INFO_BLOCK_TRANSFER |
730 SNDRV_PCM_INFO_MMAP_VALID |
731 SNDRV_PCM_INFO_PAUSE),
732 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
733 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
734 .rate_min = 4000,
735 .rate_max = 48000,
736 .channels_min = 1,
737 .channels_max = 2,
738 .buffer_bytes_max = (64*1024),
739 .period_bytes_min = 64,
740 .period_bytes_max = (64*1024),
741 .periods_min = 1,
742 .periods_max = 1024,
743 .fifo_size = 0,
744 };
745
746 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
747 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
748 SNDRV_PCM_INFO_BLOCK_TRANSFER |
749 SNDRV_PCM_INFO_MMAP_VALID |
750 SNDRV_PCM_INFO_PAUSE),
751 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
752 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
753 .rate_min = 4000,
754 .rate_max = 48000,
755 .channels_min = 1,
756 .channels_max = 2,
757 .buffer_bytes_max = (128*1024),
758 .period_bytes_min = 64,
759 .period_bytes_max = (128*1024),
760 .periods_min = 2,
761 .periods_max = 2,
762 .fifo_size = 0,
763 };
764
765 static const struct snd_pcm_hardware snd_ice1712_capture = {
766 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
767 SNDRV_PCM_INFO_BLOCK_TRANSFER |
768 SNDRV_PCM_INFO_MMAP_VALID),
769 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
770 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
771 .rate_min = 4000,
772 .rate_max = 48000,
773 .channels_min = 1,
774 .channels_max = 2,
775 .buffer_bytes_max = (64*1024),
776 .period_bytes_min = 64,
777 .period_bytes_max = (64*1024),
778 .periods_min = 1,
779 .periods_max = 1024,
780 .fifo_size = 0,
781 };
782
783 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
784 {
785 struct snd_pcm_runtime *runtime = substream->runtime;
786 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
787
788 ice->playback_con_substream = substream;
789 runtime->hw = snd_ice1712_playback;
790 return 0;
791 }
792
793 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
794 {
795 struct snd_pcm_runtime *runtime = substream->runtime;
796 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
797 u32 tmp;
798
799 ice->playback_con_substream_ds[substream->number] = substream;
800 runtime->hw = snd_ice1712_playback_ds;
801 spin_lock_irq(&ice->reg_lock);
802 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
803 outw(tmp, ICEDS(ice, INTMASK));
804 spin_unlock_irq(&ice->reg_lock);
805 return 0;
806 }
807
808 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
809 {
810 struct snd_pcm_runtime *runtime = substream->runtime;
811 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
812
813 ice->capture_con_substream = substream;
814 runtime->hw = snd_ice1712_capture;
815 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
816 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
817 runtime->hw.rate_min = 48000;
818 return 0;
819 }
820
821 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
822 {
823 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
824
825 ice->playback_con_substream = NULL;
826 return 0;
827 }
828
829 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
830 {
831 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
832 u32 tmp;
833
834 spin_lock_irq(&ice->reg_lock);
835 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
836 outw(tmp, ICEDS(ice, INTMASK));
837 spin_unlock_irq(&ice->reg_lock);
838 ice->playback_con_substream_ds[substream->number] = NULL;
839 return 0;
840 }
841
842 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
843 {
844 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
845
846 ice->capture_con_substream = NULL;
847 return 0;
848 }
849
850 static const struct snd_pcm_ops snd_ice1712_playback_ops = {
851 .open = snd_ice1712_playback_open,
852 .close = snd_ice1712_playback_close,
853 .ioctl = snd_pcm_lib_ioctl,
854 .hw_params = snd_ice1712_hw_params,
855 .hw_free = snd_ice1712_hw_free,
856 .prepare = snd_ice1712_playback_prepare,
857 .trigger = snd_ice1712_playback_trigger,
858 .pointer = snd_ice1712_playback_pointer,
859 };
860
861 static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
862 .open = snd_ice1712_playback_ds_open,
863 .close = snd_ice1712_playback_ds_close,
864 .ioctl = snd_pcm_lib_ioctl,
865 .hw_params = snd_ice1712_hw_params,
866 .hw_free = snd_ice1712_hw_free,
867 .prepare = snd_ice1712_playback_ds_prepare,
868 .trigger = snd_ice1712_playback_ds_trigger,
869 .pointer = snd_ice1712_playback_ds_pointer,
870 };
871
872 static const struct snd_pcm_ops snd_ice1712_capture_ops = {
873 .open = snd_ice1712_capture_open,
874 .close = snd_ice1712_capture_close,
875 .ioctl = snd_pcm_lib_ioctl,
876 .hw_params = snd_ice1712_hw_params,
877 .hw_free = snd_ice1712_hw_free,
878 .prepare = snd_ice1712_capture_prepare,
879 .trigger = snd_ice1712_capture_trigger,
880 .pointer = snd_ice1712_capture_pointer,
881 };
882
883 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device)
884 {
885 struct snd_pcm *pcm;
886 int err;
887
888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
889 if (err < 0)
890 return err;
891
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
894
895 pcm->private_data = ice;
896 pcm->info_flags = 0;
897 strcpy(pcm->name, "ICE1712 consumer");
898 ice->pcm = pcm;
899
900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
902
903 dev_warn(ice->card->dev,
904 "Consumer PCM code does not work well at the moment --jk\n");
905
906 return 0;
907 }
908
909 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device)
910 {
911 struct snd_pcm *pcm;
912 int err;
913
914 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
915 if (err < 0)
916 return err;
917
918 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
919
920 pcm->private_data = ice;
921 pcm->info_flags = 0;
922 strcpy(pcm->name, "ICE1712 consumer (DS)");
923 ice->pcm_ds = pcm;
924
925 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
926 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
927
928 return 0;
929 }
930
931 /*
932 * PCM code - professional part (multitrack)
933 */
934
935 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
936 32000, 44100, 48000, 64000, 88200, 96000 };
937
938 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
939 .count = ARRAY_SIZE(rates),
940 .list = rates,
941 .mask = 0,
942 };
943
944 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
945 int cmd)
946 {
947 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
948 switch (cmd) {
949 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
950 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
951 {
952 unsigned int what;
953 unsigned int old;
954 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
955 return -EINVAL;
956 what = ICE1712_PLAYBACK_PAUSE;
957 snd_pcm_trigger_done(substream, substream);
958 spin_lock(&ice->reg_lock);
959 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
960 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
961 old |= what;
962 else
963 old &= ~what;
964 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
965 spin_unlock(&ice->reg_lock);
966 break;
967 }
968 case SNDRV_PCM_TRIGGER_START:
969 case SNDRV_PCM_TRIGGER_STOP:
970 {
971 unsigned int what = 0;
972 unsigned int old;
973 struct snd_pcm_substream *s;
974
975 snd_pcm_group_for_each_entry(s, substream) {
976 if (s == ice->playback_pro_substream) {
977 what |= ICE1712_PLAYBACK_START;
978 snd_pcm_trigger_done(s, substream);
979 } else if (s == ice->capture_pro_substream) {
980 what |= ICE1712_CAPTURE_START_SHADOW;
981 snd_pcm_trigger_done(s, substream);
982 }
983 }
984 spin_lock(&ice->reg_lock);
985 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
986 if (cmd == SNDRV_PCM_TRIGGER_START)
987 old |= what;
988 else
989 old &= ~what;
990 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
991 spin_unlock(&ice->reg_lock);
992 break;
993 }
994 default:
995 return -EINVAL;
996 }
997 return 0;
998 }
999
1000 /*
1001 */
1002 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1003 {
1004 unsigned long flags;
1005 unsigned char val, old;
1006 unsigned int i;
1007
1008 switch (rate) {
1009 case 8000: val = 6; break;
1010 case 9600: val = 3; break;
1011 case 11025: val = 10; break;
1012 case 12000: val = 2; break;
1013 case 16000: val = 5; break;
1014 case 22050: val = 9; break;
1015 case 24000: val = 1; break;
1016 case 32000: val = 4; break;
1017 case 44100: val = 8; break;
1018 case 48000: val = 0; break;
1019 case 64000: val = 15; break;
1020 case 88200: val = 11; break;
1021 case 96000: val = 7; break;
1022 default:
1023 snd_BUG();
1024 val = 0;
1025 rate = 48000;
1026 break;
1027 }
1028
1029 spin_lock_irqsave(&ice->reg_lock, flags);
1030 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1031 ICE1712_PLAYBACK_PAUSE|
1032 ICE1712_PLAYBACK_START)) {
1033 __out:
1034 spin_unlock_irqrestore(&ice->reg_lock, flags);
1035 return;
1036 }
1037 if (!force && is_pro_rate_locked(ice))
1038 goto __out;
1039
1040 old = inb(ICEMT(ice, RATE));
1041 if (!force && old == val)
1042 goto __out;
1043
1044 ice->cur_rate = rate;
1045 outb(val, ICEMT(ice, RATE));
1046 spin_unlock_irqrestore(&ice->reg_lock, flags);
1047
1048 if (ice->gpio.set_pro_rate)
1049 ice->gpio.set_pro_rate(ice, rate);
1050 for (i = 0; i < ice->akm_codecs; i++) {
1051 if (ice->akm[i].ops.set_rate_val)
1052 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1053 }
1054 if (ice->spdif.ops.setup_rate)
1055 ice->spdif.ops.setup_rate(ice, rate);
1056 }
1057
1058 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1059 {
1060 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1061
1062 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1063 spin_lock_irq(&ice->reg_lock);
1064 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1065 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1066 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1067 spin_unlock_irq(&ice->reg_lock);
1068
1069 return 0;
1070 }
1071
1072 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1073 struct snd_pcm_hw_params *hw_params)
1074 {
1075 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1076
1077 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1078 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1079 }
1080
1081 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1082 {
1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1084
1085 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1086 spin_lock_irq(&ice->reg_lock);
1087 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1088 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1089 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1090 spin_unlock_irq(&ice->reg_lock);
1091 return 0;
1092 }
1093
1094 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1095 struct snd_pcm_hw_params *hw_params)
1096 {
1097 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1098
1099 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1100 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1101 }
1102
1103 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1104 {
1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1106 size_t ptr;
1107
1108 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1109 return 0;
1110 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1111 ptr = bytes_to_frames(substream->runtime, ptr);
1112 if (ptr == substream->runtime->buffer_size)
1113 ptr = 0;
1114 return ptr;
1115 }
1116
1117 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1118 {
1119 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1120 size_t ptr;
1121
1122 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1123 return 0;
1124 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1125 ptr = bytes_to_frames(substream->runtime, ptr);
1126 if (ptr == substream->runtime->buffer_size)
1127 ptr = 0;
1128 return ptr;
1129 }
1130
1131 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1132 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1133 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1134 SNDRV_PCM_INFO_MMAP_VALID |
1135 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1136 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1137 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1138 .rate_min = 4000,
1139 .rate_max = 96000,
1140 .channels_min = 10,
1141 .channels_max = 10,
1142 .buffer_bytes_max = (256*1024),
1143 .period_bytes_min = 10 * 4 * 2,
1144 .period_bytes_max = 131040,
1145 .periods_min = 1,
1146 .periods_max = 1024,
1147 .fifo_size = 0,
1148 };
1149
1150 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1151 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1152 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1153 SNDRV_PCM_INFO_MMAP_VALID |
1154 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1155 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1156 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1157 .rate_min = 4000,
1158 .rate_max = 96000,
1159 .channels_min = 12,
1160 .channels_max = 12,
1161 .buffer_bytes_max = (256*1024),
1162 .period_bytes_min = 12 * 4 * 2,
1163 .period_bytes_max = 131040,
1164 .periods_min = 1,
1165 .periods_max = 1024,
1166 .fifo_size = 0,
1167 };
1168
1169 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1170 {
1171 struct snd_pcm_runtime *runtime = substream->runtime;
1172 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1173
1174 ice->playback_pro_substream = substream;
1175 runtime->hw = snd_ice1712_playback_pro;
1176 snd_pcm_set_sync(substream);
1177 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1178 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1179 if (is_pro_rate_locked(ice)) {
1180 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1181 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1182 }
1183
1184 if (ice->spdif.ops.open)
1185 ice->spdif.ops.open(ice, substream);
1186
1187 return 0;
1188 }
1189
1190 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1191 {
1192 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1193 struct snd_pcm_runtime *runtime = substream->runtime;
1194
1195 ice->capture_pro_substream = substream;
1196 runtime->hw = snd_ice1712_capture_pro;
1197 snd_pcm_set_sync(substream);
1198 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1199 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1200 if (is_pro_rate_locked(ice)) {
1201 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1202 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1203 }
1204
1205 return 0;
1206 }
1207
1208 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1209 {
1210 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1211
1212 if (PRO_RATE_RESET)
1213 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1214 ice->playback_pro_substream = NULL;
1215 if (ice->spdif.ops.close)
1216 ice->spdif.ops.close(ice, substream);
1217
1218 return 0;
1219 }
1220
1221 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1222 {
1223 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1224
1225 if (PRO_RATE_RESET)
1226 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1227 ice->capture_pro_substream = NULL;
1228 return 0;
1229 }
1230
1231 static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1232 .open = snd_ice1712_playback_pro_open,
1233 .close = snd_ice1712_playback_pro_close,
1234 .ioctl = snd_pcm_lib_ioctl,
1235 .hw_params = snd_ice1712_playback_pro_hw_params,
1236 .hw_free = snd_ice1712_hw_free,
1237 .prepare = snd_ice1712_playback_pro_prepare,
1238 .trigger = snd_ice1712_pro_trigger,
1239 .pointer = snd_ice1712_playback_pro_pointer,
1240 };
1241
1242 static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1243 .open = snd_ice1712_capture_pro_open,
1244 .close = snd_ice1712_capture_pro_close,
1245 .ioctl = snd_pcm_lib_ioctl,
1246 .hw_params = snd_ice1712_capture_pro_hw_params,
1247 .hw_free = snd_ice1712_hw_free,
1248 .prepare = snd_ice1712_capture_pro_prepare,
1249 .trigger = snd_ice1712_pro_trigger,
1250 .pointer = snd_ice1712_capture_pro_pointer,
1251 };
1252
1253 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device)
1254 {
1255 struct snd_pcm *pcm;
1256 int err;
1257
1258 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1259 if (err < 0)
1260 return err;
1261
1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1264
1265 pcm->private_data = ice;
1266 pcm->info_flags = 0;
1267 strcpy(pcm->name, "ICE1712 multi");
1268
1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1270 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1271
1272 ice->pcm_pro = pcm;
1273
1274 if (ice->cs8427) {
1275 /* assign channels to iec958 */
1276 err = snd_cs8427_iec958_build(ice->cs8427,
1277 pcm->streams[0].substream,
1278 pcm->streams[1].substream);
1279 if (err < 0)
1280 return err;
1281 }
1282
1283 return snd_ice1712_build_pro_mixer(ice);
1284 }
1285
1286 /*
1287 * Mixer section
1288 */
1289
1290 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1291 {
1292 unsigned int vol = ice->pro_volumes[index];
1293 unsigned short val = 0;
1294
1295 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1296 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1297 outb(index, ICEMT(ice, MONITOR_INDEX));
1298 outw(val, ICEMT(ice, MONITOR_VOLUME));
1299 }
1300
1301 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1302
1303 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1304 {
1305 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1306 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1307 kcontrol->private_value;
1308
1309 spin_lock_irq(&ice->reg_lock);
1310 ucontrol->value.integer.value[0] =
1311 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1312 ucontrol->value.integer.value[1] =
1313 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1314 spin_unlock_irq(&ice->reg_lock);
1315 return 0;
1316 }
1317
1318 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1319 {
1320 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1321 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1322 kcontrol->private_value;
1323 unsigned int nval, change;
1324
1325 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1326 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1327 spin_lock_irq(&ice->reg_lock);
1328 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1329 change = nval != ice->pro_volumes[priv_idx];
1330 ice->pro_volumes[priv_idx] = nval;
1331 snd_ice1712_update_volume(ice, priv_idx);
1332 spin_unlock_irq(&ice->reg_lock);
1333 return change;
1334 }
1335
1336 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1337 {
1338 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1339 uinfo->count = 2;
1340 uinfo->value.integer.min = 0;
1341 uinfo->value.integer.max = 96;
1342 return 0;
1343 }
1344
1345 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1346 {
1347 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1348 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1349 kcontrol->private_value;
1350
1351 spin_lock_irq(&ice->reg_lock);
1352 ucontrol->value.integer.value[0] =
1353 (ice->pro_volumes[priv_idx] >> 0) & 127;
1354 ucontrol->value.integer.value[1] =
1355 (ice->pro_volumes[priv_idx] >> 16) & 127;
1356 spin_unlock_irq(&ice->reg_lock);
1357 return 0;
1358 }
1359
1360 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1361 {
1362 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1363 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1364 kcontrol->private_value;
1365 unsigned int nval, change;
1366
1367 nval = (ucontrol->value.integer.value[0] & 127) |
1368 ((ucontrol->value.integer.value[1] & 127) << 16);
1369 spin_lock_irq(&ice->reg_lock);
1370 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1371 change = nval != ice->pro_volumes[priv_idx];
1372 ice->pro_volumes[priv_idx] = nval;
1373 snd_ice1712_update_volume(ice, priv_idx);
1374 spin_unlock_irq(&ice->reg_lock);
1375 return change;
1376 }
1377
1378 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1379
1380 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1381 {
1382 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1383 .name = "Multi Playback Switch",
1384 .info = snd_ice1712_pro_mixer_switch_info,
1385 .get = snd_ice1712_pro_mixer_switch_get,
1386 .put = snd_ice1712_pro_mixer_switch_put,
1387 .private_value = 0,
1388 .count = 10,
1389 },
1390 {
1391 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1392 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1393 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1394 .name = "Multi Playback Volume",
1395 .info = snd_ice1712_pro_mixer_volume_info,
1396 .get = snd_ice1712_pro_mixer_volume_get,
1397 .put = snd_ice1712_pro_mixer_volume_put,
1398 .private_value = 0,
1399 .count = 10,
1400 .tlv = { .p = db_scale_playback }
1401 },
1402 };
1403
1404 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1406 .name = "H/W Multi Capture Switch",
1407 .info = snd_ice1712_pro_mixer_switch_info,
1408 .get = snd_ice1712_pro_mixer_switch_get,
1409 .put = snd_ice1712_pro_mixer_switch_put,
1410 .private_value = 10,
1411 };
1412
1413 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1414 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1415 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1416 .info = snd_ice1712_pro_mixer_switch_info,
1417 .get = snd_ice1712_pro_mixer_switch_get,
1418 .put = snd_ice1712_pro_mixer_switch_put,
1419 .private_value = 18,
1420 .count = 2,
1421 };
1422
1423 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1424 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1425 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1426 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1427 .name = "H/W Multi Capture Volume",
1428 .info = snd_ice1712_pro_mixer_volume_info,
1429 .get = snd_ice1712_pro_mixer_volume_get,
1430 .put = snd_ice1712_pro_mixer_volume_put,
1431 .private_value = 10,
1432 .tlv = { .p = db_scale_playback }
1433 };
1434
1435 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1436 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1437 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1438 .info = snd_ice1712_pro_mixer_volume_info,
1439 .get = snd_ice1712_pro_mixer_volume_get,
1440 .put = snd_ice1712_pro_mixer_volume_put,
1441 .private_value = 18,
1442 .count = 2,
1443 };
1444
1445 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1446 {
1447 struct snd_card *card = ice->card;
1448 unsigned int idx;
1449 int err;
1450
1451 /* multi-channel mixer */
1452 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1453 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1454 if (err < 0)
1455 return err;
1456 }
1457
1458 if (ice->num_total_adcs > 0) {
1459 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1460 tmp.count = ice->num_total_adcs;
1461 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1462 if (err < 0)
1463 return err;
1464 }
1465
1466 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1467 if (err < 0)
1468 return err;
1469
1470 if (ice->num_total_adcs > 0) {
1471 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1472 tmp.count = ice->num_total_adcs;
1473 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1474 if (err < 0)
1475 return err;
1476 }
1477
1478 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1479 if (err < 0)
1480 return err;
1481
1482 /* initialize volumes */
1483 for (idx = 0; idx < 10; idx++) {
1484 ice->pro_volumes[idx] = 0x80008000; /* mute */
1485 snd_ice1712_update_volume(ice, idx);
1486 }
1487 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1488 ice->pro_volumes[idx] = 0x80008000; /* mute */
1489 snd_ice1712_update_volume(ice, idx);
1490 }
1491 for (idx = 18; idx < 20; idx++) {
1492 ice->pro_volumes[idx] = 0x80008000; /* mute */
1493 snd_ice1712_update_volume(ice, idx);
1494 }
1495 return 0;
1496 }
1497
1498 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1499 {
1500 struct snd_ice1712 *ice = ac97->private_data;
1501 ice->ac97 = NULL;
1502 }
1503
1504 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1505 {
1506 int err, bus_num = 0;
1507 struct snd_ac97_template ac97;
1508 struct snd_ac97_bus *pbus;
1509 static struct snd_ac97_bus_ops con_ops = {
1510 .write = snd_ice1712_ac97_write,
1511 .read = snd_ice1712_ac97_read,
1512 };
1513 static struct snd_ac97_bus_ops pro_ops = {
1514 .write = snd_ice1712_pro_ac97_write,
1515 .read = snd_ice1712_pro_ac97_read,
1516 };
1517
1518 if (ice_has_con_ac97(ice)) {
1519 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1520 if (err < 0)
1521 return err;
1522 memset(&ac97, 0, sizeof(ac97));
1523 ac97.private_data = ice;
1524 ac97.private_free = snd_ice1712_mixer_free_ac97;
1525 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1526 if (err < 0)
1527 dev_warn(ice->card->dev,
1528 "cannot initialize ac97 for consumer, skipped\n");
1529 else {
1530 return snd_ctl_add(ice->card,
1531 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97,
1532 ice));
1533 }
1534 }
1535
1536 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1537 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1538 if (err < 0)
1539 return err;
1540 memset(&ac97, 0, sizeof(ac97));
1541 ac97.private_data = ice;
1542 ac97.private_free = snd_ice1712_mixer_free_ac97;
1543 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1544 if (err < 0)
1545 dev_warn(ice->card->dev,
1546 "cannot initialize pro ac97, skipped\n");
1547 else
1548 return 0;
1549 }
1550 /* I2S mixer only */
1551 strcat(ice->card->mixername, "ICE1712 - multitrack");
1552 return 0;
1553 }
1554
1555 /*
1556 *
1557 */
1558
1559 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1560 {
1561 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1562 }
1563
1564 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1565 struct snd_info_buffer *buffer)
1566 {
1567 struct snd_ice1712 *ice = entry->private_data;
1568 unsigned int idx;
1569
1570 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1571 snd_iprintf(buffer, "EEPROM:\n");
1572
1573 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1574 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1575 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1576 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1577 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1578 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1579 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1580 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1581 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1582 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1583 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1584 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1585 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1586 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1587 for (idx = 0; idx < 4; idx++)
1588 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1589 for (idx = 0; idx < 4; idx++)
1590 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1591 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1592 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1593
1594 snd_iprintf(buffer, "\nRegisters:\n");
1595 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1596 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1597 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1598 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1599 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1600 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1601 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1602 }
1603
1604 static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1605 {
1606 struct snd_info_entry *entry;
1607
1608 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1609 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1610 }
1611
1612 /*
1613 *
1614 */
1615
1616 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1617 struct snd_ctl_elem_info *uinfo)
1618 {
1619 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1620 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1621 return 0;
1622 }
1623
1624 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1625 struct snd_ctl_elem_value *ucontrol)
1626 {
1627 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1628
1629 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1630 return 0;
1631 }
1632
1633 static const struct snd_kcontrol_new snd_ice1712_eeprom = {
1634 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1635 .name = "ICE1712 EEPROM",
1636 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1637 .info = snd_ice1712_eeprom_info,
1638 .get = snd_ice1712_eeprom_get
1639 };
1640
1641 /*
1642 */
1643 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1644 struct snd_ctl_elem_info *uinfo)
1645 {
1646 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1647 uinfo->count = 1;
1648 return 0;
1649 }
1650
1651 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1652 struct snd_ctl_elem_value *ucontrol)
1653 {
1654 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1655 if (ice->spdif.ops.default_get)
1656 ice->spdif.ops.default_get(ice, ucontrol);
1657 return 0;
1658 }
1659
1660 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1662 {
1663 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1664 if (ice->spdif.ops.default_put)
1665 return ice->spdif.ops.default_put(ice, ucontrol);
1666 return 0;
1667 }
1668
1669 static const struct snd_kcontrol_new snd_ice1712_spdif_default =
1670 {
1671 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1672 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1673 .info = snd_ice1712_spdif_info,
1674 .get = snd_ice1712_spdif_default_get,
1675 .put = snd_ice1712_spdif_default_put
1676 };
1677
1678 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
1680 {
1681 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1682 if (ice->spdif.ops.default_get) {
1683 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1684 IEC958_AES0_PROFESSIONAL |
1685 IEC958_AES0_CON_NOT_COPYRIGHT |
1686 IEC958_AES0_CON_EMPHASIS;
1687 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1688 IEC958_AES1_CON_CATEGORY;
1689 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1690 } else {
1691 ucontrol->value.iec958.status[0] = 0xff;
1692 ucontrol->value.iec958.status[1] = 0xff;
1693 ucontrol->value.iec958.status[2] = 0xff;
1694 ucontrol->value.iec958.status[3] = 0xff;
1695 ucontrol->value.iec958.status[4] = 0xff;
1696 }
1697 return 0;
1698 }
1699
1700 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1701 struct snd_ctl_elem_value *ucontrol)
1702 {
1703 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1704 if (ice->spdif.ops.default_get) {
1705 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1706 IEC958_AES0_PROFESSIONAL |
1707 IEC958_AES0_PRO_FS |
1708 IEC958_AES0_PRO_EMPHASIS;
1709 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1710 } else {
1711 ucontrol->value.iec958.status[0] = 0xff;
1712 ucontrol->value.iec958.status[1] = 0xff;
1713 ucontrol->value.iec958.status[2] = 0xff;
1714 ucontrol->value.iec958.status[3] = 0xff;
1715 ucontrol->value.iec958.status[4] = 0xff;
1716 }
1717 return 0;
1718 }
1719
1720 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1721 {
1722 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1723 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1724 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1725 .info = snd_ice1712_spdif_info,
1726 .get = snd_ice1712_spdif_maskc_get,
1727 };
1728
1729 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1730 {
1731 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1732 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1733 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1734 .info = snd_ice1712_spdif_info,
1735 .get = snd_ice1712_spdif_maskp_get,
1736 };
1737
1738 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1739 struct snd_ctl_elem_value *ucontrol)
1740 {
1741 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1742 if (ice->spdif.ops.stream_get)
1743 ice->spdif.ops.stream_get(ice, ucontrol);
1744 return 0;
1745 }
1746
1747 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1748 struct snd_ctl_elem_value *ucontrol)
1749 {
1750 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1751 if (ice->spdif.ops.stream_put)
1752 return ice->spdif.ops.stream_put(ice, ucontrol);
1753 return 0;
1754 }
1755
1756 static const struct snd_kcontrol_new snd_ice1712_spdif_stream =
1757 {
1758 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1759 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1760 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1761 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1762 .info = snd_ice1712_spdif_info,
1763 .get = snd_ice1712_spdif_stream_get,
1764 .put = snd_ice1712_spdif_stream_put
1765 };
1766
1767 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1768 struct snd_ctl_elem_value *ucontrol)
1769 {
1770 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1771 unsigned char mask = kcontrol->private_value & 0xff;
1772 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1773
1774 snd_ice1712_save_gpio_status(ice);
1775 ucontrol->value.integer.value[0] =
1776 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1777 snd_ice1712_restore_gpio_status(ice);
1778 return 0;
1779 }
1780
1781 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1783 {
1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1785 unsigned char mask = kcontrol->private_value & 0xff;
1786 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1787 unsigned int val, nval;
1788
1789 if (kcontrol->private_value & (1 << 31))
1790 return -EPERM;
1791 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1792 snd_ice1712_save_gpio_status(ice);
1793 val = snd_ice1712_gpio_read(ice);
1794 nval |= val & ~mask;
1795 if (val != nval)
1796 snd_ice1712_gpio_write(ice, nval);
1797 snd_ice1712_restore_gpio_status(ice);
1798 return val != nval;
1799 }
1800
1801 /*
1802 * rate
1803 */
1804 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_info *uinfo)
1806 {
1807 static const char * const texts[] = {
1808 "8000", /* 0: 6 */
1809 "9600", /* 1: 3 */
1810 "11025", /* 2: 10 */
1811 "12000", /* 3: 2 */
1812 "16000", /* 4: 5 */
1813 "22050", /* 5: 9 */
1814 "24000", /* 6: 1 */
1815 "32000", /* 7: 4 */
1816 "44100", /* 8: 8 */
1817 "48000", /* 9: 0 */
1818 "64000", /* 10: 15 */
1819 "88200", /* 11: 11 */
1820 "96000", /* 12: 7 */
1821 "IEC958 Input", /* 13: -- */
1822 };
1823 return snd_ctl_enum_info(uinfo, 1, 14, texts);
1824 }
1825
1826 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1827 struct snd_ctl_elem_value *ucontrol)
1828 {
1829 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1830 static const unsigned char xlate[16] = {
1831 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1832 };
1833 unsigned char val;
1834
1835 spin_lock_irq(&ice->reg_lock);
1836 if (is_spdif_master(ice)) {
1837 ucontrol->value.enumerated.item[0] = 13;
1838 } else {
1839 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1840 if (val == 255) {
1841 snd_BUG();
1842 val = 0;
1843 }
1844 ucontrol->value.enumerated.item[0] = val;
1845 }
1846 spin_unlock_irq(&ice->reg_lock);
1847 return 0;
1848 }
1849
1850 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1851 struct snd_ctl_elem_value *ucontrol)
1852 {
1853 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1854 static const unsigned int xrate[13] = {
1855 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1856 32000, 44100, 48000, 64000, 88200, 96000
1857 };
1858 unsigned char oval;
1859 int change = 0;
1860
1861 spin_lock_irq(&ice->reg_lock);
1862 oval = inb(ICEMT(ice, RATE));
1863 if (ucontrol->value.enumerated.item[0] == 13) {
1864 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1865 } else {
1866 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1867 spin_unlock_irq(&ice->reg_lock);
1868 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1869 spin_lock_irq(&ice->reg_lock);
1870 }
1871 change = inb(ICEMT(ice, RATE)) != oval;
1872 spin_unlock_irq(&ice->reg_lock);
1873
1874 if ((oval & ICE1712_SPDIF_MASTER) !=
1875 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1876 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1877
1878 return change;
1879 }
1880
1881 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1882 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1883 .name = "Multi Track Internal Clock",
1884 .info = snd_ice1712_pro_internal_clock_info,
1885 .get = snd_ice1712_pro_internal_clock_get,
1886 .put = snd_ice1712_pro_internal_clock_put
1887 };
1888
1889 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1890 struct snd_ctl_elem_info *uinfo)
1891 {
1892 static const char * const texts[] = {
1893 "8000", /* 0: 6 */
1894 "9600", /* 1: 3 */
1895 "11025", /* 2: 10 */
1896 "12000", /* 3: 2 */
1897 "16000", /* 4: 5 */
1898 "22050", /* 5: 9 */
1899 "24000", /* 6: 1 */
1900 "32000", /* 7: 4 */
1901 "44100", /* 8: 8 */
1902 "48000", /* 9: 0 */
1903 "64000", /* 10: 15 */
1904 "88200", /* 11: 11 */
1905 "96000", /* 12: 7 */
1906 /* "IEC958 Input", 13: -- */
1907 };
1908 return snd_ctl_enum_info(uinfo, 1, 13, texts);
1909 }
1910
1911 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1912 struct snd_ctl_elem_value *ucontrol)
1913 {
1914 int val;
1915 static const unsigned int xrate[13] = {
1916 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1917 32000, 44100, 48000, 64000, 88200, 96000
1918 };
1919
1920 for (val = 0; val < 13; val++) {
1921 if (xrate[val] == PRO_RATE_DEFAULT)
1922 break;
1923 }
1924
1925 ucontrol->value.enumerated.item[0] = val;
1926 return 0;
1927 }
1928
1929 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1930 struct snd_ctl_elem_value *ucontrol)
1931 {
1932 static const unsigned int xrate[13] = {
1933 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1934 32000, 44100, 48000, 64000, 88200, 96000
1935 };
1936 unsigned char oval;
1937 int change = 0;
1938
1939 oval = PRO_RATE_DEFAULT;
1940 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1941 change = PRO_RATE_DEFAULT != oval;
1942
1943 return change;
1944 }
1945
1946 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1948 .name = "Multi Track Internal Clock Default",
1949 .info = snd_ice1712_pro_internal_clock_default_info,
1950 .get = snd_ice1712_pro_internal_clock_default_get,
1951 .put = snd_ice1712_pro_internal_clock_default_put
1952 };
1953
1954 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1955
1956 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1957 struct snd_ctl_elem_value *ucontrol)
1958 {
1959 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1960 return 0;
1961 }
1962
1963 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1965 {
1966 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1967 int change = 0, nval;
1968
1969 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1970 spin_lock_irq(&ice->reg_lock);
1971 change = PRO_RATE_LOCKED != nval;
1972 PRO_RATE_LOCKED = nval;
1973 spin_unlock_irq(&ice->reg_lock);
1974 return change;
1975 }
1976
1977 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1978 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1979 .name = "Multi Track Rate Locking",
1980 .info = snd_ice1712_pro_rate_locking_info,
1981 .get = snd_ice1712_pro_rate_locking_get,
1982 .put = snd_ice1712_pro_rate_locking_put
1983 };
1984
1985 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1986
1987 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1989 {
1990 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
1991 return 0;
1992 }
1993
1994 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1995 struct snd_ctl_elem_value *ucontrol)
1996 {
1997 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1998 int change = 0, nval;
1999
2000 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2001 spin_lock_irq(&ice->reg_lock);
2002 change = PRO_RATE_RESET != nval;
2003 PRO_RATE_RESET = nval;
2004 spin_unlock_irq(&ice->reg_lock);
2005 return change;
2006 }
2007
2008 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
2009 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2010 .name = "Multi Track Rate Reset",
2011 .info = snd_ice1712_pro_rate_reset_info,
2012 .get = snd_ice1712_pro_rate_reset_get,
2013 .put = snd_ice1712_pro_rate_reset_put
2014 };
2015
2016 /*
2017 * routing
2018 */
2019 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2020 struct snd_ctl_elem_info *uinfo)
2021 {
2022 static const char * const texts[] = {
2023 "PCM Out", /* 0 */
2024 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2025 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2026 "IEC958 In L", "IEC958 In R", /* 9-10 */
2027 "Digital Mixer", /* 11 - optional */
2028 };
2029 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2030 return snd_ctl_enum_info(uinfo, 1, num_items, texts);
2031 }
2032
2033 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2034 struct snd_ctl_elem_value *ucontrol)
2035 {
2036 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2037 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2038 unsigned int val, cval;
2039
2040 spin_lock_irq(&ice->reg_lock);
2041 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2042 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2043 spin_unlock_irq(&ice->reg_lock);
2044
2045 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2046 val &= 3;
2047 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2048 if (val == 1 && idx < 2)
2049 ucontrol->value.enumerated.item[0] = 11;
2050 else if (val == 2)
2051 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2052 else if (val == 3)
2053 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2054 else
2055 ucontrol->value.enumerated.item[0] = 0;
2056 return 0;
2057 }
2058
2059 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061 {
2062 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2063 int change, shift;
2064 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2065 unsigned int val, old_val, nval;
2066
2067 /* update PSDOUT */
2068 if (ucontrol->value.enumerated.item[0] >= 11)
2069 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2070 else if (ucontrol->value.enumerated.item[0] >= 9)
2071 nval = 3; /* spdif in */
2072 else if (ucontrol->value.enumerated.item[0] >= 1)
2073 nval = 2; /* analog in */
2074 else
2075 nval = 0; /* pcm */
2076 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2077 spin_lock_irq(&ice->reg_lock);
2078 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2079 val &= ~(0x03 << shift);
2080 val |= nval << shift;
2081 change = val != old_val;
2082 if (change)
2083 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2084 spin_unlock_irq(&ice->reg_lock);
2085 if (nval < 2) /* dig mixer of pcm */
2086 return change;
2087
2088 /* update CAPTURE */
2089 spin_lock_irq(&ice->reg_lock);
2090 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2091 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2092 if (nval == 2) { /* analog in */
2093 nval = ucontrol->value.enumerated.item[0] - 1;
2094 val &= ~(0x07 << shift);
2095 val |= nval << shift;
2096 } else { /* spdif in */
2097 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2098 val &= ~(0x08 << shift);
2099 val |= nval << shift;
2100 }
2101 if (val != old_val) {
2102 change = 1;
2103 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2104 }
2105 spin_unlock_irq(&ice->reg_lock);
2106 return change;
2107 }
2108
2109 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2110 struct snd_ctl_elem_value *ucontrol)
2111 {
2112 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2113 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2114 unsigned int val, cval;
2115 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2116 cval = (val >> (idx * 4 + 8)) & 0x0f;
2117 val = (val >> (idx * 2)) & 0x03;
2118 if (val == 1)
2119 ucontrol->value.enumerated.item[0] = 11;
2120 else if (val == 2)
2121 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2122 else if (val == 3)
2123 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2124 else
2125 ucontrol->value.enumerated.item[0] = 0;
2126 return 0;
2127 }
2128
2129 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2130 struct snd_ctl_elem_value *ucontrol)
2131 {
2132 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2133 int change, shift;
2134 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2135 unsigned int val, old_val, nval;
2136
2137 /* update SPDOUT */
2138 spin_lock_irq(&ice->reg_lock);
2139 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2140 if (ucontrol->value.enumerated.item[0] >= 11)
2141 nval = 1;
2142 else if (ucontrol->value.enumerated.item[0] >= 9)
2143 nval = 3;
2144 else if (ucontrol->value.enumerated.item[0] >= 1)
2145 nval = 2;
2146 else
2147 nval = 0;
2148 shift = idx * 2;
2149 val &= ~(0x03 << shift);
2150 val |= nval << shift;
2151 shift = idx * 4 + 8;
2152 if (nval == 2) {
2153 nval = ucontrol->value.enumerated.item[0] - 1;
2154 val &= ~(0x07 << shift);
2155 val |= nval << shift;
2156 } else if (nval == 3) {
2157 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2158 val &= ~(0x08 << shift);
2159 val |= nval << shift;
2160 }
2161 change = val != old_val;
2162 if (change)
2163 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2164 spin_unlock_irq(&ice->reg_lock);
2165 return change;
2166 }
2167
2168 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
2169 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2170 .name = "H/W Playback Route",
2171 .info = snd_ice1712_pro_route_info,
2172 .get = snd_ice1712_pro_route_analog_get,
2173 .put = snd_ice1712_pro_route_analog_put,
2174 };
2175
2176 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
2177 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2178 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2179 .info = snd_ice1712_pro_route_info,
2180 .get = snd_ice1712_pro_route_spdif_get,
2181 .put = snd_ice1712_pro_route_spdif_put,
2182 .count = 2,
2183 };
2184
2185
2186 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2187 struct snd_ctl_elem_info *uinfo)
2188 {
2189 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2190 uinfo->count = 1;
2191 uinfo->value.integer.min = 0;
2192 uinfo->value.integer.max = 255;
2193 return 0;
2194 }
2195
2196 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2197 struct snd_ctl_elem_value *ucontrol)
2198 {
2199 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2200
2201 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2202 return 0;
2203 }
2204
2205 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207 {
2208 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2209 int change;
2210
2211 spin_lock_irq(&ice->reg_lock);
2212 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2213 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2214 spin_unlock_irq(&ice->reg_lock);
2215 return change;
2216 }
2217
2218 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
2219 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2220 .name = "Multi Track Volume Rate",
2221 .info = snd_ice1712_pro_volume_rate_info,
2222 .get = snd_ice1712_pro_volume_rate_get,
2223 .put = snd_ice1712_pro_volume_rate_put
2224 };
2225
2226 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2227 struct snd_ctl_elem_info *uinfo)
2228 {
2229 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2230 uinfo->count = 22;
2231 uinfo->value.integer.min = 0;
2232 uinfo->value.integer.max = 255;
2233 return 0;
2234 }
2235
2236 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2237 struct snd_ctl_elem_value *ucontrol)
2238 {
2239 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2240 int idx;
2241
2242 spin_lock_irq(&ice->reg_lock);
2243 for (idx = 0; idx < 22; idx++) {
2244 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2245 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2246 }
2247 spin_unlock_irq(&ice->reg_lock);
2248 return 0;
2249 }
2250
2251 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2252 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2253 .name = "Multi Track Peak",
2254 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2255 .info = snd_ice1712_pro_peak_info,
2256 .get = snd_ice1712_pro_peak_get
2257 };
2258
2259 /*
2260 *
2261 */
2262
2263 /*
2264 * list of available boards
2265 */
2266 static struct snd_ice1712_card_info *card_tables[] = {
2267 snd_ice1712_hoontech_cards,
2268 snd_ice1712_delta_cards,
2269 snd_ice1712_ews_cards,
2270 NULL,
2271 };
2272
2273 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2274 unsigned char dev,
2275 unsigned char addr)
2276 {
2277 long t = 0x10000;
2278
2279 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2280 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2281 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2282 return inb(ICEREG(ice, I2C_DATA));
2283 }
2284
2285 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2286 const char *modelname)
2287 {
2288 int dev = 0xa0; /* EEPROM device address */
2289 unsigned int i, size;
2290 struct snd_ice1712_card_info * const *tbl, *c;
2291
2292 if (!modelname || !*modelname) {
2293 ice->eeprom.subvendor = 0;
2294 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2295 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2296 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2297 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2298 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2299 if (ice->eeprom.subvendor == 0 ||
2300 ice->eeprom.subvendor == (unsigned int)-1) {
2301 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2302 u16 vendor, device;
2303 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2304 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2305 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2306 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2307 dev_err(ice->card->dev,
2308 "No valid ID is found\n");
2309 return -ENXIO;
2310 }
2311 }
2312 }
2313 for (tbl = card_tables; *tbl; tbl++) {
2314 for (c = *tbl; c->subvendor; c++) {
2315 if (modelname && c->model && !strcmp(modelname, c->model)) {
2316 dev_info(ice->card->dev,
2317 "Using board model %s\n", c->name);
2318 ice->eeprom.subvendor = c->subvendor;
2319 } else if (c->subvendor != ice->eeprom.subvendor)
2320 continue;
2321 if (!c->eeprom_size || !c->eeprom_data)
2322 goto found;
2323 /* if the EEPROM is given by the driver, use it */
2324 dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2325 ice->eeprom.version = 1;
2326 ice->eeprom.size = c->eeprom_size + 6;
2327 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2328 goto read_skipped;
2329 }
2330 }
2331 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2332 ice->eeprom.subvendor);
2333
2334 found:
2335 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2336 if (ice->eeprom.size < 6)
2337 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2338 else if (ice->eeprom.size > 32) {
2339 dev_err(ice->card->dev,
2340 "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2341 return -EIO;
2342 }
2343 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2344 if (ice->eeprom.version != 1) {
2345 dev_err(ice->card->dev, "invalid EEPROM version %i\n",
2346 ice->eeprom.version);
2347 /* return -EIO; */
2348 }
2349 size = ice->eeprom.size - 6;
2350 for (i = 0; i < size; i++)
2351 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2352
2353 read_skipped:
2354 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2355 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2356 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2357
2358 return 0;
2359 }
2360
2361
2362
2363 static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2364 {
2365 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2366 udelay(200);
2367 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2368 udelay(200);
2369 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2370 !ice->dxr_enable)
2371 /* Set eeprom value to limit active ADCs and DACs to 6;
2372 * Also disable AC97 as no hardware in standard 6fire card/box
2373 * Note: DXR extensions are not currently supported
2374 */
2375 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2376 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2377 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2378 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2379 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2380 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2381 ice->gpio.write_mask = ice->eeprom.gpiomask;
2382 ice->gpio.direction = ice->eeprom.gpiodir;
2383 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2384 ice->eeprom.gpiomask);
2385 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2386 ice->eeprom.gpiodir);
2387 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2388 ice->eeprom.gpiostate);
2389 } else {
2390 ice->gpio.write_mask = 0xc0;
2391 ice->gpio.direction = 0xff;
2392 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2393 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2394 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2395 ICE1712_STDSP24_CLOCK_BIT);
2396 }
2397 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2398 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2399 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2400 udelay(100);
2401 outb(0, ICEREG(ice, AC97_CMD));
2402 udelay(200);
2403 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2404 }
2405 snd_ice1712_set_pro_rate(ice, 48000, 1);
2406 /* unmask used interrupts */
2407 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2408 ICE1712_IRQ_MPU2 : 0) |
2409 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2410 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2411 ICEREG(ice, IRQMASK));
2412 outb(0x00, ICEMT(ice, IRQ));
2413
2414 return 0;
2415 }
2416
2417 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2418 {
2419 int err;
2420 struct snd_kcontrol *kctl;
2421
2422 if (snd_BUG_ON(!ice->pcm_pro))
2423 return -EIO;
2424 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2425 if (err < 0)
2426 return err;
2427 kctl->id.device = ice->pcm_pro->device;
2428 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2429 if (err < 0)
2430 return err;
2431 kctl->id.device = ice->pcm_pro->device;
2432 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2433 if (err < 0)
2434 return err;
2435 kctl->id.device = ice->pcm_pro->device;
2436 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2437 if (err < 0)
2438 return err;
2439 kctl->id.device = ice->pcm_pro->device;
2440 ice->spdif.stream_ctl = kctl;
2441 return 0;
2442 }
2443
2444
2445 static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2446 {
2447 int err;
2448
2449 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2450 if (err < 0)
2451 return err;
2452 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2453 if (err < 0)
2454 return err;
2455 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2456 if (err < 0)
2457 return err;
2458
2459 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2460 if (err < 0)
2461 return err;
2462 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2463 if (err < 0)
2464 return err;
2465
2466 if (ice->num_total_dacs > 0) {
2467 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2468 tmp.count = ice->num_total_dacs;
2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2470 if (err < 0)
2471 return err;
2472 }
2473
2474 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2475 if (err < 0)
2476 return err;
2477
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2479 if (err < 0)
2480 return err;
2481 return snd_ctl_add(ice->card,
2482 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2483 }
2484
2485 static int snd_ice1712_free(struct snd_ice1712 *ice)
2486 {
2487 if (!ice->port)
2488 goto __hw_end;
2489 /* mask all interrupts */
2490 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
2491 outb(0xff, ICEREG(ice, IRQMASK));
2492 /* --- */
2493 __hw_end:
2494 if (ice->irq >= 0)
2495 free_irq(ice->irq, ice);
2496
2497 if (ice->port)
2498 pci_release_regions(ice->pci);
2499 snd_ice1712_akm4xxx_free(ice);
2500 pci_disable_device(ice->pci);
2501 kfree(ice->spec);
2502 kfree(ice);
2503 return 0;
2504 }
2505
2506 static int snd_ice1712_dev_free(struct snd_device *device)
2507 {
2508 struct snd_ice1712 *ice = device->device_data;
2509 return snd_ice1712_free(ice);
2510 }
2511
2512 static int snd_ice1712_create(struct snd_card *card,
2513 struct pci_dev *pci,
2514 const char *modelname,
2515 int omni,
2516 int cs8427_timeout,
2517 int dxr_enable,
2518 struct snd_ice1712 **r_ice1712)
2519 {
2520 struct snd_ice1712 *ice;
2521 int err;
2522 static struct snd_device_ops ops = {
2523 .dev_free = snd_ice1712_dev_free,
2524 };
2525
2526 *r_ice1712 = NULL;
2527
2528 /* enable PCI device */
2529 err = pci_enable_device(pci);
2530 if (err < 0)
2531 return err;
2532 /* check, if we can restrict PCI DMA transfers to 28 bits */
2533 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 ||
2534 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) {
2535 dev_err(card->dev,
2536 "architecture does not support 28bit PCI busmaster DMA\n");
2537 pci_disable_device(pci);
2538 return -ENXIO;
2539 }
2540
2541 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2542 if (ice == NULL) {
2543 pci_disable_device(pci);
2544 return -ENOMEM;
2545 }
2546 ice->omni = omni ? 1 : 0;
2547 if (cs8427_timeout < 1)
2548 cs8427_timeout = 1;
2549 else if (cs8427_timeout > 1000)
2550 cs8427_timeout = 1000;
2551 ice->cs8427_timeout = cs8427_timeout;
2552 ice->dxr_enable = dxr_enable;
2553 spin_lock_init(&ice->reg_lock);
2554 mutex_init(&ice->gpio_mutex);
2555 mutex_init(&ice->i2c_mutex);
2556 mutex_init(&ice->open_mutex);
2557 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2558 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2559 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2560 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2561 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2562 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2563
2564 ice->spdif.cs8403_bits =
2565 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2566 0x10 | /* no emphasis */
2567 0x20); /* PCM encoder/decoder */
2568 ice->card = card;
2569 ice->pci = pci;
2570 ice->irq = -1;
2571 pci_set_master(pci);
2572 /* disable legacy emulation */
2573 pci_write_config_word(ice->pci, 0x40, 0x807f);
2574 pci_write_config_word(ice->pci, 0x42, 0x0006);
2575 snd_ice1712_proc_init(ice);
2576 synchronize_irq(pci->irq);
2577
2578 card->private_data = ice;
2579
2580 err = pci_request_regions(pci, "ICE1712");
2581 if (err < 0) {
2582 kfree(ice);
2583 pci_disable_device(pci);
2584 return err;
2585 }
2586 ice->port = pci_resource_start(pci, 0);
2587 ice->ddma_port = pci_resource_start(pci, 1);
2588 ice->dmapath_port = pci_resource_start(pci, 2);
2589 ice->profi_port = pci_resource_start(pci, 3);
2590
2591 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2592 KBUILD_MODNAME, ice)) {
2593 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2594 snd_ice1712_free(ice);
2595 return -EIO;
2596 }
2597
2598 ice->irq = pci->irq;
2599
2600 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2601 snd_ice1712_free(ice);
2602 return -EIO;
2603 }
2604 if (snd_ice1712_chip_init(ice) < 0) {
2605 snd_ice1712_free(ice);
2606 return -EIO;
2607 }
2608
2609 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2610 if (err < 0) {
2611 snd_ice1712_free(ice);
2612 return err;
2613 }
2614
2615 *r_ice1712 = ice;
2616 return 0;
2617 }
2618
2619
2620 /*
2621 *
2622 * Registration
2623 *
2624 */
2625
2626 static struct snd_ice1712_card_info no_matched;
2627
2628 static int snd_ice1712_probe(struct pci_dev *pci,
2629 const struct pci_device_id *pci_id)
2630 {
2631 static int dev;
2632 struct snd_card *card;
2633 struct snd_ice1712 *ice;
2634 int pcm_dev = 0, err;
2635 struct snd_ice1712_card_info * const *tbl, *c;
2636
2637 if (dev >= SNDRV_CARDS)
2638 return -ENODEV;
2639 if (!enable[dev]) {
2640 dev++;
2641 return -ENOENT;
2642 }
2643
2644 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2645 0, &card);
2646 if (err < 0)
2647 return err;
2648
2649 strcpy(card->driver, "ICE1712");
2650 strcpy(card->shortname, "ICEnsemble ICE1712");
2651
2652 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2653 cs8427_timeout[dev], dxr_enable[dev], &ice);
2654 if (err < 0) {
2655 snd_card_free(card);
2656 return err;
2657 }
2658
2659 for (tbl = card_tables; *tbl; tbl++) {
2660 for (c = *tbl; c->subvendor; c++) {
2661 if (c->subvendor == ice->eeprom.subvendor) {
2662 ice->card_info = c;
2663 strcpy(card->shortname, c->name);
2664 if (c->driver) /* specific driver? */
2665 strcpy(card->driver, c->driver);
2666 if (c->chip_init) {
2667 err = c->chip_init(ice);
2668 if (err < 0) {
2669 snd_card_free(card);
2670 return err;
2671 }
2672 }
2673 goto __found;
2674 }
2675 }
2676 }
2677 c = &no_matched;
2678 __found:
2679
2680 err = snd_ice1712_pcm_profi(ice, pcm_dev++);
2681 if (err < 0) {
2682 snd_card_free(card);
2683 return err;
2684 }
2685
2686 if (ice_has_con_ac97(ice)) {
2687 err = snd_ice1712_pcm(ice, pcm_dev++);
2688 if (err < 0) {
2689 snd_card_free(card);
2690 return err;
2691 }
2692 }
2693
2694 err = snd_ice1712_ac97_mixer(ice);
2695 if (err < 0) {
2696 snd_card_free(card);
2697 return err;
2698 }
2699
2700 err = snd_ice1712_build_controls(ice);
2701 if (err < 0) {
2702 snd_card_free(card);
2703 return err;
2704 }
2705
2706 if (c->build_controls) {
2707 err = c->build_controls(ice);
2708 if (err < 0) {
2709 snd_card_free(card);
2710 return err;
2711 }
2712 }
2713
2714 if (ice_has_con_ac97(ice)) {
2715 err = snd_ice1712_pcm_ds(ice, pcm_dev++);
2716 if (err < 0) {
2717 snd_card_free(card);
2718 return err;
2719 }
2720 }
2721
2722 if (!c->no_mpu401) {
2723 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2724 ICEREG(ice, MPU1_CTRL),
2725 c->mpu401_1_info_flags |
2726 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2727 -1, &ice->rmidi[0]);
2728 if (err < 0) {
2729 snd_card_free(card);
2730 return err;
2731 }
2732 if (c->mpu401_1_name)
2733 /* Preferred name available in card_info */
2734 snprintf(ice->rmidi[0]->name,
2735 sizeof(ice->rmidi[0]->name),
2736 "%s %d", c->mpu401_1_name, card->number);
2737
2738 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2739 /* 2nd port used */
2740 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2741 ICEREG(ice, MPU2_CTRL),
2742 c->mpu401_2_info_flags |
2743 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2744 -1, &ice->rmidi[1]);
2745
2746 if (err < 0) {
2747 snd_card_free(card);
2748 return err;
2749 }
2750 if (c->mpu401_2_name)
2751 /* Preferred name available in card_info */
2752 snprintf(ice->rmidi[1]->name,
2753 sizeof(ice->rmidi[1]->name),
2754 "%s %d", c->mpu401_2_name,
2755 card->number);
2756 }
2757 }
2758
2759 snd_ice1712_set_input_clock_source(ice, 0);
2760
2761 sprintf(card->longname, "%s at 0x%lx, irq %i",
2762 card->shortname, ice->port, ice->irq);
2763
2764 err = snd_card_register(card);
2765 if (err < 0) {
2766 snd_card_free(card);
2767 return err;
2768 }
2769 pci_set_drvdata(pci, card);
2770 dev++;
2771 return 0;
2772 }
2773
2774 static void snd_ice1712_remove(struct pci_dev *pci)
2775 {
2776 struct snd_card *card = pci_get_drvdata(pci);
2777 struct snd_ice1712 *ice = card->private_data;
2778
2779 if (ice->card_info && ice->card_info->chip_exit)
2780 ice->card_info->chip_exit(ice);
2781 snd_card_free(card);
2782 }
2783
2784 #ifdef CONFIG_PM_SLEEP
2785 static int snd_ice1712_suspend(struct device *dev)
2786 {
2787 struct snd_card *card = dev_get_drvdata(dev);
2788 struct snd_ice1712 *ice = card->private_data;
2789
2790 if (!ice->pm_suspend_enabled)
2791 return 0;
2792
2793 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2794
2795 snd_pcm_suspend_all(ice->pcm);
2796 snd_pcm_suspend_all(ice->pcm_pro);
2797 snd_pcm_suspend_all(ice->pcm_ds);
2798 snd_ac97_suspend(ice->ac97);
2799
2800 spin_lock_irq(&ice->reg_lock);
2801 ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2802 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2803 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2804 spin_unlock_irq(&ice->reg_lock);
2805
2806 if (ice->pm_suspend)
2807 ice->pm_suspend(ice);
2808 return 0;
2809 }
2810
2811 static int snd_ice1712_resume(struct device *dev)
2812 {
2813 struct snd_card *card = dev_get_drvdata(dev);
2814 struct snd_ice1712 *ice = card->private_data;
2815 int rate;
2816
2817 if (!ice->pm_suspend_enabled)
2818 return 0;
2819
2820 if (ice->cur_rate)
2821 rate = ice->cur_rate;
2822 else
2823 rate = PRO_RATE_DEFAULT;
2824
2825 if (snd_ice1712_chip_init(ice) < 0) {
2826 snd_card_disconnect(card);
2827 return -EIO;
2828 }
2829
2830 ice->cur_rate = rate;
2831
2832 if (ice->pm_resume)
2833 ice->pm_resume(ice);
2834
2835 if (ice->pm_saved_is_spdif_master) {
2836 /* switching to external clock via SPDIF */
2837 spin_lock_irq(&ice->reg_lock);
2838 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2839 ICEMT(ice, RATE));
2840 spin_unlock_irq(&ice->reg_lock);
2841 snd_ice1712_set_input_clock_source(ice, 1);
2842 } else {
2843 /* internal on-card clock */
2844 snd_ice1712_set_pro_rate(ice, rate, 1);
2845 snd_ice1712_set_input_clock_source(ice, 0);
2846 }
2847
2848 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2849 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2850
2851 snd_ac97_resume(ice->ac97);
2852
2853 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2854 return 0;
2855 }
2856
2857 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2858 #define SND_VT1712_PM_OPS &snd_ice1712_pm
2859 #else
2860 #define SND_VT1712_PM_OPS NULL
2861 #endif /* CONFIG_PM_SLEEP */
2862
2863 static struct pci_driver ice1712_driver = {
2864 .name = KBUILD_MODNAME,
2865 .id_table = snd_ice1712_ids,
2866 .probe = snd_ice1712_probe,
2867 .remove = snd_ice1712_remove,
2868 .driver = {
2869 .pm = SND_VT1712_PM_OPS,
2870 },
2871 };
2872
2873 module_pci_driver(ice1712_driver);
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