2 * ALSA driver for RME Digi9652 audio interfaces
4 * Copyright (c) 1999 IEM - Winfried Ritsch
5 * Copyright (c) 1999-2001 Paul Davis
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/module.h>
29 #include <sound/core.h>
30 #include <sound/control.h>
31 #include <sound/pcm.h>
32 #include <sound/info.h>
33 #include <sound/asoundef.h>
34 #include <sound/initval.h>
36 #include <asm/current.h>
39 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 0-MAX */
40 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
41 static bool enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
42 static bool precise_ptr
[SNDRV_CARDS
]; /* Enable precise pointer */
44 module_param_array(index
, int, NULL
, 0444);
45 MODULE_PARM_DESC(index
, "Index value for RME Digi9652 (Hammerfall) soundcard.");
46 module_param_array(id
, charp
, NULL
, 0444);
47 MODULE_PARM_DESC(id
, "ID string for RME Digi9652 (Hammerfall) soundcard.");
48 module_param_array(enable
, bool, NULL
, 0444);
49 MODULE_PARM_DESC(enable
, "Enable/disable specific RME96{52,36} soundcards.");
50 module_param_array(precise_ptr
, bool, NULL
, 0444);
51 MODULE_PARM_DESC(precise_ptr
, "Enable precise pointer (doesn't work reliably).");
52 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
53 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
54 MODULE_LICENSE("GPL");
55 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
56 "{RME,Hammerfall-Light}}");
58 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
59 capture, one for playback. Both the ADAT and S/PDIF channels appear
60 to the host CPU in the same block of memory. There is no functional
61 difference between them in terms of access.
63 The Hammerfall Light is identical to the Hammerfall, except that it
64 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
67 #define RME9652_NCHANNELS 26
68 #define RME9636_NCHANNELS 18
70 /* Preferred sync source choices - used by "sync_pref" control switch */
72 #define RME9652_SYNC_FROM_SPDIF 0
73 #define RME9652_SYNC_FROM_ADAT1 1
74 #define RME9652_SYNC_FROM_ADAT2 2
75 #define RME9652_SYNC_FROM_ADAT3 3
77 /* Possible sources of S/PDIF input */
79 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
80 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
81 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
83 /* ------------- Status-Register bits --------------------- */
85 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
86 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
87 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
88 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
89 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
90 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
91 /* bits 6-15 encode h/w buffer pointer position */
92 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
93 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
94 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
95 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
96 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
97 #define RME9652_tc_out (1<<21) /* time-code out bit */
98 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
99 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
100 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
101 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
102 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
103 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
104 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
106 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
107 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
108 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
109 #define rme9652_decode_spdif_rate(x) ((x)>>22)
111 /* Bit 6..15 : h/w buffer pointer */
113 #define RME9652_buf_pos 0x000FFC0
115 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
116 Rev G EEPROMS and Rev 1.5 cards or later.
119 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
121 /* amount of io space we remap for register access. i'm not sure we
122 even need this much, but 1K is nice round number :)
125 #define RME9652_IO_EXTENT 1024
127 #define RME9652_init_buffer 0
128 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
129 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
130 #define RME9652_control_register 64
131 #define RME9652_irq_clear 96
132 #define RME9652_time_code 100 /* useful if used with alesis adat */
133 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
135 /* Read-only registers */
137 /* Writing to any of the register locations writes to the status
138 register. We'll use the first location as our point of access.
141 #define RME9652_status_register 0
143 /* --------- Control-Register Bits ---------------- */
146 #define RME9652_start_bit (1<<0) /* start record/play */
147 /* bits 1-3 encode buffersize/latency */
148 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
149 #define RME9652_IE (1<<5) /* Interrupt Enable */
150 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
151 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
152 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
153 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
154 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
155 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
156 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
157 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
158 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
159 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
160 #define RME9652_SyncPref_ADAT2 (1<<16)
161 #define RME9652_SyncPref_ADAT3 (1<<17)
162 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
163 #define RME9652_SPDIF_SELECT (1<<19)
164 #define RME9652_SPDIF_CLOCK (1<<20)
165 #define RME9652_SPDIF_WRITE (1<<21)
166 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
168 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
170 #define RME9652_latency 0x0e
171 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
172 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
174 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
175 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
176 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
178 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
179 #define RME9652_SyncPref_ADAT1 0
180 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
182 /* the size of a substream (1 mono data stream) */
184 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
185 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
187 /* the size of the area we need to allocate for DMA transfers. the
188 size is the same regardless of the number of channels - the
189 9636 still uses the same memory area.
191 Note that we allocate 1 more channel than is apparently needed
192 because the h/w seems to write 1 byte beyond the end of the last
196 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
197 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
205 void __iomem
*iobase
;
209 u32 control_register
; /* cached value */
210 u32 thru_bits
; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
213 u32 creg_spdif_stream
;
215 char *card_name
; /* hammerfall or hammerfall light names */
217 size_t hw_offsetmask
; /* &-with status register to get real hw_offset */
218 size_t prev_hw_offset
; /* previous hw offset */
219 size_t max_jitter
; /* maximum jitter in frames for
221 size_t period_bytes
; /* guess what this is */
223 unsigned char ds_channels
;
224 unsigned char ss_channels
; /* different for hammerfall/hammerfall-light */
226 struct snd_dma_buffer playback_dma_buf
;
227 struct snd_dma_buffer capture_dma_buf
;
229 unsigned char *capture_buffer
; /* suitably aligned address */
230 unsigned char *playback_buffer
; /* suitably aligned address */
235 struct snd_pcm_substream
*capture_substream
;
236 struct snd_pcm_substream
*playback_substream
;
239 int passthru
; /* non-zero if doing pass-thru */
240 int hw_rev
; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
242 int last_spdif_sample_rate
; /* so that we can catch externally ... */
243 int last_adat_sample_rate
; /* ... induced rate changes */
247 struct snd_card
*card
;
250 struct snd_kcontrol
*spdif_ctl
;
254 /* These tables map the ALSA channels 1..N to the channels that we
255 need to use in order to find the relevant channel buffer. RME
256 refer to this kind of mapping as between "the ADAT channel and
257 the DMA channel." We index it using the logical audio channel,
258 and the value is the DMA channel (i.e. channel buffer number)
259 where the data for that channel can be read/written from/to.
262 static char channel_map_9652_ss
[26] = {
263 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
264 18, 19, 20, 21, 22, 23, 24, 25
267 static char channel_map_9636_ss
[26] = {
268 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
269 /* channels 16 and 17 are S/PDIF */
271 /* channels 18-25 don't exist */
272 -1, -1, -1, -1, -1, -1, -1, -1
275 static char channel_map_9652_ds
[26] = {
276 /* ADAT channels are remapped */
277 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
278 /* channels 12 and 13 are S/PDIF */
280 /* others don't exist */
281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
284 static char channel_map_9636_ds
[26] = {
285 /* ADAT channels are remapped */
286 1, 3, 5, 7, 9, 11, 13, 15,
287 /* channels 8 and 9 are S/PDIF */
289 /* others don't exist */
290 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
293 static int snd_hammerfall_get_buffer(struct pci_dev
*pci
, struct snd_dma_buffer
*dmab
, size_t size
)
295 dmab
->dev
.type
= SNDRV_DMA_TYPE_DEV
;
296 dmab
->dev
.dev
= snd_dma_pci_data(pci
);
297 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
303 static void snd_hammerfall_free_buffer(struct snd_dma_buffer
*dmab
, struct pci_dev
*pci
)
306 snd_dma_free_pages(dmab
);
310 static const struct pci_device_id snd_rme9652_ids
[] = {
314 .subvendor
= PCI_ANY_ID
,
315 .subdevice
= PCI_ANY_ID
,
316 }, /* RME Digi9652 */
320 MODULE_DEVICE_TABLE(pci
, snd_rme9652_ids
);
322 static inline void rme9652_write(struct snd_rme9652
*rme9652
, int reg
, int val
)
324 writel(val
, rme9652
->iobase
+ reg
);
327 static inline unsigned int rme9652_read(struct snd_rme9652
*rme9652
, int reg
)
329 return readl(rme9652
->iobase
+ reg
);
332 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652
*rme9652
)
337 spin_lock_irqsave(&rme9652
->lock
, flags
);
338 if ((rme9652
->playback_pid
!= rme9652
->capture_pid
) &&
339 (rme9652
->playback_pid
>= 0) && (rme9652
->capture_pid
>= 0)) {
342 spin_unlock_irqrestore(&rme9652
->lock
, flags
);
346 static inline int rme9652_adat_sample_rate(struct snd_rme9652
*rme9652
)
348 if (rme9652_running_double_speed(rme9652
)) {
349 return (rme9652_read(rme9652
, RME9652_status_register
) &
350 RME9652_fs48
) ? 96000 : 88200;
352 return (rme9652_read(rme9652
, RME9652_status_register
) &
353 RME9652_fs48
) ? 48000 : 44100;
357 static inline void rme9652_compute_period_size(struct snd_rme9652
*rme9652
)
361 i
= rme9652
->control_register
& RME9652_latency
;
362 rme9652
->period_bytes
= 1 << ((rme9652_decode_latency(i
) + 8));
363 rme9652
->hw_offsetmask
=
364 (rme9652
->period_bytes
* 2 - 1) & RME9652_buf_pos
;
365 rme9652
->max_jitter
= 80;
368 static snd_pcm_uframes_t
rme9652_hw_pointer(struct snd_rme9652
*rme9652
)
371 unsigned int offset
, frag
;
372 snd_pcm_uframes_t period_size
= rme9652
->period_bytes
/ 4;
373 snd_pcm_sframes_t delta
;
375 status
= rme9652_read(rme9652
, RME9652_status_register
);
376 if (!rme9652
->precise_ptr
)
377 return (status
& RME9652_buffer_id
) ? period_size
: 0;
378 offset
= status
& RME9652_buf_pos
;
380 /* The hardware may give a backward movement for up to 80 frames
381 Martin Kirst <martin.kirst@freenet.de> knows the details.
384 delta
= rme9652
->prev_hw_offset
- offset
;
386 if (delta
<= (snd_pcm_sframes_t
)rme9652
->max_jitter
* 4)
387 offset
= rme9652
->prev_hw_offset
;
389 rme9652
->prev_hw_offset
= offset
;
390 offset
&= rme9652
->hw_offsetmask
;
392 frag
= status
& RME9652_buffer_id
;
394 if (offset
< period_size
) {
395 if (offset
> rme9652
->max_jitter
) {
397 dev_err(rme9652
->card
->dev
,
398 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
402 offset
-= rme9652
->max_jitter
;
404 offset
+= period_size
* 2;
406 if (offset
> period_size
+ rme9652
->max_jitter
) {
408 dev_err(rme9652
->card
->dev
,
409 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
413 offset
-= rme9652
->max_jitter
;
419 static inline void rme9652_reset_hw_pointer(struct snd_rme9652
*rme9652
)
423 /* reset the FIFO pointer to zero. We do this by writing to 8
424 registers, each of which is a 32bit wide register, and set
425 them all to zero. Note that s->iobase is a pointer to
426 int32, not pointer to char.
429 for (i
= 0; i
< 8; i
++) {
430 rme9652_write(rme9652
, i
* 4, 0);
433 rme9652
->prev_hw_offset
= 0;
436 static inline void rme9652_start(struct snd_rme9652
*s
)
438 s
->control_register
|= (RME9652_IE
| RME9652_start_bit
);
439 rme9652_write(s
, RME9652_control_register
, s
->control_register
);
442 static inline void rme9652_stop(struct snd_rme9652
*s
)
444 s
->control_register
&= ~(RME9652_start_bit
| RME9652_IE
);
445 rme9652_write(s
, RME9652_control_register
, s
->control_register
);
448 static int rme9652_set_interrupt_interval(struct snd_rme9652
*s
,
454 spin_lock_irq(&s
->lock
);
456 if ((restart
= s
->running
)) {
467 s
->control_register
&= ~RME9652_latency
;
468 s
->control_register
|= rme9652_encode_latency(n
);
470 rme9652_write(s
, RME9652_control_register
, s
->control_register
);
472 rme9652_compute_period_size(s
);
477 spin_unlock_irq(&s
->lock
);
482 static int rme9652_set_rate(struct snd_rme9652
*rme9652
, int rate
)
485 int reject_if_open
= 0;
488 if (!snd_rme9652_use_is_exclusive (rme9652
)) {
492 /* Changing from a "single speed" to a "double speed" rate is
493 not allowed if any substreams are open. This is because
494 such a change causes a shift in the location of
495 the DMA buffers and a reduction in the number of available
498 Note that a similar but essentially insoluble problem
499 exists for externally-driven rate changes. All we can do
500 is to flag rate changes in the read/write routines.
503 spin_lock_irq(&rme9652
->lock
);
504 xrate
= rme9652_adat_sample_rate(rme9652
);
529 rate
= RME9652_DS
| RME9652_freq
;
532 spin_unlock_irq(&rme9652
->lock
);
536 if (reject_if_open
&& (rme9652
->capture_pid
>= 0 || rme9652
->playback_pid
>= 0)) {
537 spin_unlock_irq(&rme9652
->lock
);
541 if ((restart
= rme9652
->running
)) {
542 rme9652_stop(rme9652
);
544 rme9652
->control_register
&= ~(RME9652_freq
| RME9652_DS
);
545 rme9652
->control_register
|= rate
;
546 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
549 rme9652_start(rme9652
);
552 if (rate
& RME9652_DS
) {
553 if (rme9652
->ss_channels
== RME9652_NCHANNELS
) {
554 rme9652
->channel_map
= channel_map_9652_ds
;
556 rme9652
->channel_map
= channel_map_9636_ds
;
559 if (rme9652
->ss_channels
== RME9652_NCHANNELS
) {
560 rme9652
->channel_map
= channel_map_9652_ss
;
562 rme9652
->channel_map
= channel_map_9636_ss
;
566 spin_unlock_irq(&rme9652
->lock
);
570 static void rme9652_set_thru(struct snd_rme9652
*rme9652
, int channel
, int enable
)
574 rme9652
->passthru
= 0;
578 /* set thru for all channels */
581 for (i
= 0; i
< RME9652_NCHANNELS
; i
++) {
582 rme9652
->thru_bits
|= (1 << i
);
583 rme9652_write(rme9652
, RME9652_thru_base
+ i
* 4, 1);
586 for (i
= 0; i
< RME9652_NCHANNELS
; i
++) {
587 rme9652
->thru_bits
&= ~(1 << i
);
588 rme9652_write(rme9652
, RME9652_thru_base
+ i
* 4, 0);
595 mapped_channel
= rme9652
->channel_map
[channel
];
598 rme9652
->thru_bits
|= (1 << mapped_channel
);
600 rme9652
->thru_bits
&= ~(1 << mapped_channel
);
603 rme9652_write(rme9652
,
604 RME9652_thru_base
+ mapped_channel
* 4,
609 static int rme9652_set_passthru(struct snd_rme9652
*rme9652
, int onoff
)
612 rme9652_set_thru(rme9652
, -1, 1);
614 /* we don't want interrupts, so do a
615 custom version of rme9652_start().
618 rme9652
->control_register
=
620 rme9652_encode_latency(7) |
623 rme9652_reset_hw_pointer(rme9652
);
625 rme9652_write(rme9652
, RME9652_control_register
,
626 rme9652
->control_register
);
627 rme9652
->passthru
= 1;
629 rme9652_set_thru(rme9652
, -1, 0);
630 rme9652_stop(rme9652
);
631 rme9652
->passthru
= 0;
637 static void rme9652_spdif_set_bit (struct snd_rme9652
*rme9652
, int mask
, int onoff
)
640 rme9652
->control_register
|= mask
;
642 rme9652
->control_register
&= ~mask
;
644 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
647 static void rme9652_spdif_write_byte (struct snd_rme9652
*rme9652
, const int val
)
652 for (i
= 0, mask
= 0x80; i
< 8; i
++, mask
>>= 1) {
654 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_WRITE
, 1);
656 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_WRITE
, 0);
658 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_CLOCK
, 1);
659 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_CLOCK
, 0);
663 static int rme9652_spdif_read_byte (struct snd_rme9652
*rme9652
)
671 for (i
= 0, mask
= 0x80; i
< 8; i
++, mask
>>= 1) {
672 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_CLOCK
, 1);
673 if (rme9652_read (rme9652
, RME9652_status_register
) & RME9652_SPDIF_READ
)
675 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_CLOCK
, 0);
681 static void rme9652_write_spdif_codec (struct snd_rme9652
*rme9652
, const int address
, const int data
)
683 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 1);
684 rme9652_spdif_write_byte (rme9652
, 0x20);
685 rme9652_spdif_write_byte (rme9652
, address
);
686 rme9652_spdif_write_byte (rme9652
, data
);
687 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 0);
691 static int rme9652_spdif_read_codec (struct snd_rme9652
*rme9652
, const int address
)
695 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 1);
696 rme9652_spdif_write_byte (rme9652
, 0x20);
697 rme9652_spdif_write_byte (rme9652
, address
);
698 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 0);
699 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 1);
701 rme9652_spdif_write_byte (rme9652
, 0x21);
702 ret
= rme9652_spdif_read_byte (rme9652
);
703 rme9652_spdif_set_bit (rme9652
, RME9652_SPDIF_SELECT
, 0);
708 static void rme9652_initialize_spdif_receiver (struct snd_rme9652
*rme9652
)
710 /* XXX what unsets this ? */
712 rme9652
->control_register
|= RME9652_SPDIF_RESET
;
714 rme9652_write_spdif_codec (rme9652
, 4, 0x40);
715 rme9652_write_spdif_codec (rme9652
, 17, 0x13);
716 rme9652_write_spdif_codec (rme9652
, 6, 0x02);
719 static inline int rme9652_spdif_sample_rate(struct snd_rme9652
*s
)
721 unsigned int rate_bits
;
723 if (rme9652_read(s
, RME9652_status_register
) & RME9652_ERF
) {
724 return -1; /* error condition */
727 if (s
->hw_rev
== 15) {
731 x
= rme9652_spdif_read_codec (s
, 30);
738 if (y
> 30400 && y
< 33600) ret
= 32000;
739 else if (y
> 41900 && y
< 46000) ret
= 44100;
740 else if (y
> 46000 && y
< 50400) ret
= 48000;
741 else if (y
> 60800 && y
< 67200) ret
= 64000;
742 else if (y
> 83700 && y
< 92000) ret
= 88200;
743 else if (y
> 92000 && y
< 100000) ret
= 96000;
748 rate_bits
= rme9652_read(s
, RME9652_status_register
) & RME9652_F
;
750 switch (rme9652_decode_spdif_rate(rate_bits
)) {
776 dev_err(s
->card
->dev
,
777 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
778 s
->card_name
, rate_bits
);
784 /*-----------------------------------------------------------------------------
786 ----------------------------------------------------------------------------*/
788 static u32
snd_rme9652_convert_from_aes(struct snd_aes_iec958
*aes
)
791 val
|= (aes
->status
[0] & IEC958_AES0_PROFESSIONAL
) ? RME9652_PRO
: 0;
792 val
|= (aes
->status
[0] & IEC958_AES0_NONAUDIO
) ? RME9652_Dolby
: 0;
793 if (val
& RME9652_PRO
)
794 val
|= (aes
->status
[0] & IEC958_AES0_PRO_EMPHASIS_5015
) ? RME9652_EMP
: 0;
796 val
|= (aes
->status
[0] & IEC958_AES0_CON_EMPHASIS_5015
) ? RME9652_EMP
: 0;
800 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958
*aes
, u32 val
)
802 aes
->status
[0] = ((val
& RME9652_PRO
) ? IEC958_AES0_PROFESSIONAL
: 0) |
803 ((val
& RME9652_Dolby
) ? IEC958_AES0_NONAUDIO
: 0);
804 if (val
& RME9652_PRO
)
805 aes
->status
[0] |= (val
& RME9652_EMP
) ? IEC958_AES0_PRO_EMPHASIS_5015
: 0;
807 aes
->status
[0] |= (val
& RME9652_EMP
) ? IEC958_AES0_CON_EMPHASIS_5015
: 0;
810 static int snd_rme9652_control_spdif_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
812 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
817 static int snd_rme9652_control_spdif_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
819 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
821 snd_rme9652_convert_to_aes(&ucontrol
->value
.iec958
, rme9652
->creg_spdif
);
825 static int snd_rme9652_control_spdif_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
827 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
831 val
= snd_rme9652_convert_from_aes(&ucontrol
->value
.iec958
);
832 spin_lock_irq(&rme9652
->lock
);
833 change
= val
!= rme9652
->creg_spdif
;
834 rme9652
->creg_spdif
= val
;
835 spin_unlock_irq(&rme9652
->lock
);
839 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
841 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
846 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
848 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
850 snd_rme9652_convert_to_aes(&ucontrol
->value
.iec958
, rme9652
->creg_spdif_stream
);
854 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
856 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
860 val
= snd_rme9652_convert_from_aes(&ucontrol
->value
.iec958
);
861 spin_lock_irq(&rme9652
->lock
);
862 change
= val
!= rme9652
->creg_spdif_stream
;
863 rme9652
->creg_spdif_stream
= val
;
864 rme9652
->control_register
&= ~(RME9652_PRO
| RME9652_Dolby
| RME9652_EMP
);
865 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
|= val
);
866 spin_unlock_irq(&rme9652
->lock
);
870 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
872 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
877 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
879 ucontrol
->value
.iec958
.status
[0] = kcontrol
->private_value
;
883 #define RME9652_ADAT1_IN(xname, xindex) \
884 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
885 .info = snd_rme9652_info_adat1_in, \
886 .get = snd_rme9652_get_adat1_in, \
887 .put = snd_rme9652_put_adat1_in }
889 static unsigned int rme9652_adat1_in(struct snd_rme9652
*rme9652
)
891 if (rme9652
->control_register
& RME9652_ADAT1_INTERNAL
)
896 static int rme9652_set_adat1_input(struct snd_rme9652
*rme9652
, int internal
)
901 rme9652
->control_register
|= RME9652_ADAT1_INTERNAL
;
903 rme9652
->control_register
&= ~RME9652_ADAT1_INTERNAL
;
906 /* XXX do we actually need to stop the card when we do this ? */
908 if ((restart
= rme9652
->running
)) {
909 rme9652_stop(rme9652
);
912 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
915 rme9652_start(rme9652
);
921 static int snd_rme9652_info_adat1_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
923 static const char * const texts
[2] = {"ADAT1", "Internal"};
925 return snd_ctl_enum_info(uinfo
, 1, 2, texts
);
928 static int snd_rme9652_get_adat1_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
930 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
932 spin_lock_irq(&rme9652
->lock
);
933 ucontrol
->value
.enumerated
.item
[0] = rme9652_adat1_in(rme9652
);
934 spin_unlock_irq(&rme9652
->lock
);
938 static int snd_rme9652_put_adat1_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
940 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
944 if (!snd_rme9652_use_is_exclusive(rme9652
))
946 val
= ucontrol
->value
.enumerated
.item
[0] % 2;
947 spin_lock_irq(&rme9652
->lock
);
948 change
= val
!= rme9652_adat1_in(rme9652
);
950 rme9652_set_adat1_input(rme9652
, val
);
951 spin_unlock_irq(&rme9652
->lock
);
955 #define RME9652_SPDIF_IN(xname, xindex) \
956 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
957 .info = snd_rme9652_info_spdif_in, \
958 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
960 static unsigned int rme9652_spdif_in(struct snd_rme9652
*rme9652
)
962 return rme9652_decode_spdif_in(rme9652
->control_register
&
966 static int rme9652_set_spdif_input(struct snd_rme9652
*rme9652
, int in
)
970 rme9652
->control_register
&= ~RME9652_inp
;
971 rme9652
->control_register
|= rme9652_encode_spdif_in(in
);
973 if ((restart
= rme9652
->running
)) {
974 rme9652_stop(rme9652
);
977 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
980 rme9652_start(rme9652
);
986 static int snd_rme9652_info_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
988 static const char * const texts
[3] = {"ADAT1", "Coaxial", "Internal"};
990 return snd_ctl_enum_info(uinfo
, 1, 3, texts
);
993 static int snd_rme9652_get_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
995 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
997 spin_lock_irq(&rme9652
->lock
);
998 ucontrol
->value
.enumerated
.item
[0] = rme9652_spdif_in(rme9652
);
999 spin_unlock_irq(&rme9652
->lock
);
1003 static int snd_rme9652_put_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1005 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1009 if (!snd_rme9652_use_is_exclusive(rme9652
))
1011 val
= ucontrol
->value
.enumerated
.item
[0] % 3;
1012 spin_lock_irq(&rme9652
->lock
);
1013 change
= val
!= rme9652_spdif_in(rme9652
);
1015 rme9652_set_spdif_input(rme9652
, val
);
1016 spin_unlock_irq(&rme9652
->lock
);
1020 #define RME9652_SPDIF_OUT(xname, xindex) \
1021 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1022 .info = snd_rme9652_info_spdif_out, \
1023 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1025 static int rme9652_spdif_out(struct snd_rme9652
*rme9652
)
1027 return (rme9652
->control_register
& RME9652_opt_out
) ? 1 : 0;
1030 static int rme9652_set_spdif_output(struct snd_rme9652
*rme9652
, int out
)
1035 rme9652
->control_register
|= RME9652_opt_out
;
1037 rme9652
->control_register
&= ~RME9652_opt_out
;
1040 if ((restart
= rme9652
->running
)) {
1041 rme9652_stop(rme9652
);
1044 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
1047 rme9652_start(rme9652
);
1053 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1055 static int snd_rme9652_get_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1057 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1059 spin_lock_irq(&rme9652
->lock
);
1060 ucontrol
->value
.integer
.value
[0] = rme9652_spdif_out(rme9652
);
1061 spin_unlock_irq(&rme9652
->lock
);
1065 static int snd_rme9652_put_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1067 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1071 if (!snd_rme9652_use_is_exclusive(rme9652
))
1073 val
= ucontrol
->value
.integer
.value
[0] & 1;
1074 spin_lock_irq(&rme9652
->lock
);
1075 change
= (int)val
!= rme9652_spdif_out(rme9652
);
1076 rme9652_set_spdif_output(rme9652
, val
);
1077 spin_unlock_irq(&rme9652
->lock
);
1081 #define RME9652_SYNC_MODE(xname, xindex) \
1082 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1083 .info = snd_rme9652_info_sync_mode, \
1084 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1086 static int rme9652_sync_mode(struct snd_rme9652
*rme9652
)
1088 if (rme9652
->control_register
& RME9652_wsel
) {
1090 } else if (rme9652
->control_register
& RME9652_Master
) {
1097 static int rme9652_set_sync_mode(struct snd_rme9652
*rme9652
, int mode
)
1103 rme9652
->control_register
&=
1104 ~(RME9652_Master
| RME9652_wsel
);
1107 rme9652
->control_register
=
1108 (rme9652
->control_register
& ~RME9652_wsel
) | RME9652_Master
;
1111 rme9652
->control_register
|=
1112 (RME9652_Master
| RME9652_wsel
);
1116 if ((restart
= rme9652
->running
)) {
1117 rme9652_stop(rme9652
);
1120 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
1123 rme9652_start(rme9652
);
1129 static int snd_rme9652_info_sync_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1131 static const char * const texts
[3] = {
1132 "AutoSync", "Master", "Word Clock"
1135 return snd_ctl_enum_info(uinfo
, 1, 3, texts
);
1138 static int snd_rme9652_get_sync_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1140 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1142 spin_lock_irq(&rme9652
->lock
);
1143 ucontrol
->value
.enumerated
.item
[0] = rme9652_sync_mode(rme9652
);
1144 spin_unlock_irq(&rme9652
->lock
);
1148 static int snd_rme9652_put_sync_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1150 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1154 val
= ucontrol
->value
.enumerated
.item
[0] % 3;
1155 spin_lock_irq(&rme9652
->lock
);
1156 change
= (int)val
!= rme9652_sync_mode(rme9652
);
1157 rme9652_set_sync_mode(rme9652
, val
);
1158 spin_unlock_irq(&rme9652
->lock
);
1162 #define RME9652_SYNC_PREF(xname, xindex) \
1163 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1164 .info = snd_rme9652_info_sync_pref, \
1165 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1167 static int rme9652_sync_pref(struct snd_rme9652
*rme9652
)
1169 switch (rme9652
->control_register
& RME9652_SyncPref_Mask
) {
1170 case RME9652_SyncPref_ADAT1
:
1171 return RME9652_SYNC_FROM_ADAT1
;
1172 case RME9652_SyncPref_ADAT2
:
1173 return RME9652_SYNC_FROM_ADAT2
;
1174 case RME9652_SyncPref_ADAT3
:
1175 return RME9652_SYNC_FROM_ADAT3
;
1176 case RME9652_SyncPref_SPDIF
:
1177 return RME9652_SYNC_FROM_SPDIF
;
1183 static int rme9652_set_sync_pref(struct snd_rme9652
*rme9652
, int pref
)
1187 rme9652
->control_register
&= ~RME9652_SyncPref_Mask
;
1189 case RME9652_SYNC_FROM_ADAT1
:
1190 rme9652
->control_register
|= RME9652_SyncPref_ADAT1
;
1192 case RME9652_SYNC_FROM_ADAT2
:
1193 rme9652
->control_register
|= RME9652_SyncPref_ADAT2
;
1195 case RME9652_SYNC_FROM_ADAT3
:
1196 rme9652
->control_register
|= RME9652_SyncPref_ADAT3
;
1198 case RME9652_SYNC_FROM_SPDIF
:
1199 rme9652
->control_register
|= RME9652_SyncPref_SPDIF
;
1203 if ((restart
= rme9652
->running
)) {
1204 rme9652_stop(rme9652
);
1207 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
1210 rme9652_start(rme9652
);
1216 static int snd_rme9652_info_sync_pref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1218 static const char * const texts
[4] = {
1219 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1221 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1223 return snd_ctl_enum_info(uinfo
, 1,
1224 rme9652
->ss_channels
== RME9652_NCHANNELS
? 4 : 3,
1228 static int snd_rme9652_get_sync_pref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1230 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1232 spin_lock_irq(&rme9652
->lock
);
1233 ucontrol
->value
.enumerated
.item
[0] = rme9652_sync_pref(rme9652
);
1234 spin_unlock_irq(&rme9652
->lock
);
1238 static int snd_rme9652_put_sync_pref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1240 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1244 if (!snd_rme9652_use_is_exclusive(rme9652
))
1246 max
= rme9652
->ss_channels
== RME9652_NCHANNELS
? 4 : 3;
1247 val
= ucontrol
->value
.enumerated
.item
[0] % max
;
1248 spin_lock_irq(&rme9652
->lock
);
1249 change
= (int)val
!= rme9652_sync_pref(rme9652
);
1250 rme9652_set_sync_pref(rme9652
, val
);
1251 spin_unlock_irq(&rme9652
->lock
);
1255 static int snd_rme9652_info_thru(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1257 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1258 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
1259 uinfo
->count
= rme9652
->ss_channels
;
1260 uinfo
->value
.integer
.min
= 0;
1261 uinfo
->value
.integer
.max
= 1;
1265 static int snd_rme9652_get_thru(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1267 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1269 u32 thru_bits
= rme9652
->thru_bits
;
1271 for (k
= 0; k
< rme9652
->ss_channels
; ++k
) {
1272 ucontrol
->value
.integer
.value
[k
] = !!(thru_bits
& (1 << k
));
1277 static int snd_rme9652_put_thru(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1279 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1284 if (!snd_rme9652_use_is_exclusive(rme9652
))
1287 for (chn
= 0; chn
< rme9652
->ss_channels
; ++chn
) {
1288 if (ucontrol
->value
.integer
.value
[chn
])
1289 thru_bits
|= 1 << chn
;
1292 spin_lock_irq(&rme9652
->lock
);
1293 change
= thru_bits
^ rme9652
->thru_bits
;
1295 for (chn
= 0; chn
< rme9652
->ss_channels
; ++chn
) {
1296 if (!(change
& (1 << chn
)))
1298 rme9652_set_thru(rme9652
,chn
,thru_bits
&(1<<chn
));
1301 spin_unlock_irq(&rme9652
->lock
);
1305 #define RME9652_PASSTHRU(xname, xindex) \
1306 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1307 .info = snd_rme9652_info_passthru, \
1308 .put = snd_rme9652_put_passthru, \
1309 .get = snd_rme9652_get_passthru }
1311 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1313 static int snd_rme9652_get_passthru(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1315 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1317 spin_lock_irq(&rme9652
->lock
);
1318 ucontrol
->value
.integer
.value
[0] = rme9652
->passthru
;
1319 spin_unlock_irq(&rme9652
->lock
);
1323 static int snd_rme9652_put_passthru(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1325 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1330 if (!snd_rme9652_use_is_exclusive(rme9652
))
1333 val
= ucontrol
->value
.integer
.value
[0] & 1;
1334 spin_lock_irq(&rme9652
->lock
);
1335 change
= (ucontrol
->value
.integer
.value
[0] != rme9652
->passthru
);
1337 err
= rme9652_set_passthru(rme9652
, val
);
1338 spin_unlock_irq(&rme9652
->lock
);
1339 return err
? err
: change
;
1342 /* Read-only switches */
1344 #define RME9652_SPDIF_RATE(xname, xindex) \
1345 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1346 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1347 .info = snd_rme9652_info_spdif_rate, \
1348 .get = snd_rme9652_get_spdif_rate }
1350 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1352 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1354 uinfo
->value
.integer
.min
= 0;
1355 uinfo
->value
.integer
.max
= 96000;
1359 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1361 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1363 spin_lock_irq(&rme9652
->lock
);
1364 ucontrol
->value
.integer
.value
[0] = rme9652_spdif_sample_rate(rme9652
);
1365 spin_unlock_irq(&rme9652
->lock
);
1369 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1370 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1371 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1372 .info = snd_rme9652_info_adat_sync, \
1373 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1375 static int snd_rme9652_info_adat_sync(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1377 static const char * const texts
[4] = {
1378 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1381 return snd_ctl_enum_info(uinfo
, 1, 4, texts
);
1384 static int snd_rme9652_get_adat_sync(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1386 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1387 unsigned int mask1
, mask2
, val
;
1389 switch (kcontrol
->private_value
) {
1390 case 0: mask1
= RME9652_lock_0
; mask2
= RME9652_sync_0
; break;
1391 case 1: mask1
= RME9652_lock_1
; mask2
= RME9652_sync_1
; break;
1392 case 2: mask1
= RME9652_lock_2
; mask2
= RME9652_sync_2
; break;
1393 default: return -EINVAL
;
1395 val
= rme9652_read(rme9652
, RME9652_status_register
);
1396 ucontrol
->value
.enumerated
.item
[0] = (val
& mask1
) ? 1 : 0;
1397 ucontrol
->value
.enumerated
.item
[0] |= (val
& mask2
) ? 2 : 0;
1401 #define RME9652_TC_VALID(xname, xindex) \
1402 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1403 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1404 .info = snd_rme9652_info_tc_valid, \
1405 .get = snd_rme9652_get_tc_valid }
1407 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1409 static int snd_rme9652_get_tc_valid(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1411 struct snd_rme9652
*rme9652
= snd_kcontrol_chip(kcontrol
);
1413 ucontrol
->value
.integer
.value
[0] =
1414 (rme9652_read(rme9652
, RME9652_status_register
) & RME9652_tc_valid
) ? 1 : 0;
1418 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1420 /* FIXME: this routine needs a port to the new control API --jk */
1422 static int snd_rme9652_get_tc_value(void *private_data
,
1423 snd_kswitch_t
*kswitch
,
1424 snd_switch_t
*uswitch
)
1426 struct snd_rme9652
*s
= (struct snd_rme9652
*) private_data
;
1430 uswitch
->type
= SNDRV_SW_TYPE_DWORD
;
1432 if ((rme9652_read(s
, RME9652_status_register
) &
1433 RME9652_tc_valid
) == 0) {
1434 uswitch
->value
.data32
[0] = 0;
1438 /* timecode request */
1440 rme9652_write(s
, RME9652_time_code
, 0);
1442 /* XXX bug alert: loop-based timing !!!! */
1444 for (i
= 0; i
< 50; i
++) {
1445 if (!(rme9652_read(s
, i
* 4) & RME9652_tc_busy
))
1449 if (!(rme9652_read(s
, i
* 4) & RME9652_tc_busy
)) {
1455 for (i
= 0; i
< 32; i
++) {
1458 if (rme9652_read(s
, i
* 4) & RME9652_tc_out
)
1459 value
|= 0x80000000;
1462 if (value
> 2 * 60 * 48000) {
1463 value
-= 2 * 60 * 48000;
1468 uswitch
->value
.data32
[0] = value
;
1473 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1475 static struct snd_kcontrol_new snd_rme9652_controls
[] = {
1477 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1478 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,DEFAULT
),
1479 .info
= snd_rme9652_control_spdif_info
,
1480 .get
= snd_rme9652_control_spdif_get
,
1481 .put
= snd_rme9652_control_spdif_put
,
1484 .access
= SNDRV_CTL_ELEM_ACCESS_READWRITE
| SNDRV_CTL_ELEM_ACCESS_INACTIVE
,
1485 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1486 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PCM_STREAM
),
1487 .info
= snd_rme9652_control_spdif_stream_info
,
1488 .get
= snd_rme9652_control_spdif_stream_get
,
1489 .put
= snd_rme9652_control_spdif_stream_put
,
1492 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
1493 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1494 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,CON_MASK
),
1495 .info
= snd_rme9652_control_spdif_mask_info
,
1496 .get
= snd_rme9652_control_spdif_mask_get
,
1497 .private_value
= IEC958_AES0_NONAUDIO
|
1498 IEC958_AES0_PROFESSIONAL
|
1499 IEC958_AES0_CON_EMPHASIS
,
1502 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
1503 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
1504 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PRO_MASK
),
1505 .info
= snd_rme9652_control_spdif_mask_info
,
1506 .get
= snd_rme9652_control_spdif_mask_get
,
1507 .private_value
= IEC958_AES0_NONAUDIO
|
1508 IEC958_AES0_PROFESSIONAL
|
1509 IEC958_AES0_PRO_EMPHASIS
,
1511 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1512 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1513 RME9652_SYNC_MODE("Sync Mode", 0),
1514 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1516 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
1517 .name
= "Channels Thru",
1519 .info
= snd_rme9652_info_thru
,
1520 .get
= snd_rme9652_get_thru
,
1521 .put
= snd_rme9652_put_thru
,
1523 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1524 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1525 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1526 RME9652_TC_VALID("Timecode Valid", 0),
1527 RME9652_PASSTHRU("Passthru", 0)
1530 static struct snd_kcontrol_new snd_rme9652_adat3_check
=
1531 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1533 static struct snd_kcontrol_new snd_rme9652_adat1_input
=
1534 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1536 static int snd_rme9652_create_controls(struct snd_card
*card
, struct snd_rme9652
*rme9652
)
1540 struct snd_kcontrol
*kctl
;
1542 for (idx
= 0; idx
< ARRAY_SIZE(snd_rme9652_controls
); idx
++) {
1543 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_rme9652_controls
[idx
], rme9652
))) < 0)
1545 if (idx
== 1) /* IEC958 (S/PDIF) Stream */
1546 rme9652
->spdif_ctl
= kctl
;
1549 if (rme9652
->ss_channels
== RME9652_NCHANNELS
)
1550 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_rme9652_adat3_check
, rme9652
))) < 0)
1553 if (rme9652
->hw_rev
>= 15)
1554 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_rme9652_adat1_input
, rme9652
))) < 0)
1560 /*------------------------------------------------------------
1562 ------------------------------------------------------------*/
1565 snd_rme9652_proc_read(struct snd_info_entry
*entry
, struct snd_info_buffer
*buffer
)
1567 struct snd_rme9652
*rme9652
= (struct snd_rme9652
*) entry
->private_data
;
1568 u32 thru_bits
= rme9652
->thru_bits
;
1569 int show_auto_sync_source
= 0;
1571 unsigned int status
;
1574 status
= rme9652_read(rme9652
, RME9652_status_register
);
1576 snd_iprintf(buffer
, "%s (Card #%d)\n", rme9652
->card_name
, rme9652
->card
->number
+ 1);
1577 snd_iprintf(buffer
, "Buffers: capture %p playback %p\n",
1578 rme9652
->capture_buffer
, rme9652
->playback_buffer
);
1579 snd_iprintf(buffer
, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1580 rme9652
->irq
, rme9652
->port
, (unsigned long)rme9652
->iobase
);
1581 snd_iprintf(buffer
, "Control register: %x\n", rme9652
->control_register
);
1583 snd_iprintf(buffer
, "\n");
1585 x
= 1 << (6 + rme9652_decode_latency(rme9652
->control_register
&
1588 snd_iprintf(buffer
, "Latency: %d samples (2 periods of %lu bytes)\n",
1589 x
, (unsigned long) rme9652
->period_bytes
);
1590 snd_iprintf(buffer
, "Hardware pointer (frames): %ld\n",
1591 rme9652_hw_pointer(rme9652
));
1592 snd_iprintf(buffer
, "Passthru: %s\n",
1593 rme9652
->passthru
? "yes" : "no");
1595 if ((rme9652
->control_register
& (RME9652_Master
| RME9652_wsel
)) == 0) {
1596 snd_iprintf(buffer
, "Clock mode: autosync\n");
1597 show_auto_sync_source
= 1;
1598 } else if (rme9652
->control_register
& RME9652_wsel
) {
1599 if (status
& RME9652_wsel_rd
) {
1600 snd_iprintf(buffer
, "Clock mode: word clock\n");
1602 snd_iprintf(buffer
, "Clock mode: word clock (no signal)\n");
1605 snd_iprintf(buffer
, "Clock mode: master\n");
1608 if (show_auto_sync_source
) {
1609 switch (rme9652
->control_register
& RME9652_SyncPref_Mask
) {
1610 case RME9652_SyncPref_ADAT1
:
1611 snd_iprintf(buffer
, "Pref. sync source: ADAT1\n");
1613 case RME9652_SyncPref_ADAT2
:
1614 snd_iprintf(buffer
, "Pref. sync source: ADAT2\n");
1616 case RME9652_SyncPref_ADAT3
:
1617 snd_iprintf(buffer
, "Pref. sync source: ADAT3\n");
1619 case RME9652_SyncPref_SPDIF
:
1620 snd_iprintf(buffer
, "Pref. sync source: IEC958\n");
1623 snd_iprintf(buffer
, "Pref. sync source: ???\n");
1627 if (rme9652
->hw_rev
>= 15)
1628 snd_iprintf(buffer
, "\nADAT1 Input source: %s\n",
1629 (rme9652
->control_register
& RME9652_ADAT1_INTERNAL
) ?
1630 "Internal" : "ADAT1 optical");
1632 snd_iprintf(buffer
, "\n");
1634 switch (rme9652_decode_spdif_in(rme9652
->control_register
&
1636 case RME9652_SPDIFIN_OPTICAL
:
1637 snd_iprintf(buffer
, "IEC958 input: ADAT1\n");
1639 case RME9652_SPDIFIN_COAXIAL
:
1640 snd_iprintf(buffer
, "IEC958 input: Coaxial\n");
1642 case RME9652_SPDIFIN_INTERN
:
1643 snd_iprintf(buffer
, "IEC958 input: Internal\n");
1646 snd_iprintf(buffer
, "IEC958 input: ???\n");
1650 if (rme9652
->control_register
& RME9652_opt_out
) {
1651 snd_iprintf(buffer
, "IEC958 output: Coaxial & ADAT1\n");
1653 snd_iprintf(buffer
, "IEC958 output: Coaxial only\n");
1656 if (rme9652
->control_register
& RME9652_PRO
) {
1657 snd_iprintf(buffer
, "IEC958 quality: Professional\n");
1659 snd_iprintf(buffer
, "IEC958 quality: Consumer\n");
1662 if (rme9652
->control_register
& RME9652_EMP
) {
1663 snd_iprintf(buffer
, "IEC958 emphasis: on\n");
1665 snd_iprintf(buffer
, "IEC958 emphasis: off\n");
1668 if (rme9652
->control_register
& RME9652_Dolby
) {
1669 snd_iprintf(buffer
, "IEC958 Dolby: on\n");
1671 snd_iprintf(buffer
, "IEC958 Dolby: off\n");
1674 i
= rme9652_spdif_sample_rate(rme9652
);
1678 "IEC958 sample rate: error flag set\n");
1679 } else if (i
== 0) {
1680 snd_iprintf(buffer
, "IEC958 sample rate: undetermined\n");
1682 snd_iprintf(buffer
, "IEC958 sample rate: %d\n", i
);
1685 snd_iprintf(buffer
, "\n");
1687 snd_iprintf(buffer
, "ADAT Sample rate: %dHz\n",
1688 rme9652_adat_sample_rate(rme9652
));
1692 x
= status
& RME9652_sync_0
;
1693 if (status
& RME9652_lock_0
) {
1694 snd_iprintf(buffer
, "ADAT1: %s\n", x
? "Sync" : "Lock");
1696 snd_iprintf(buffer
, "ADAT1: No Lock\n");
1699 x
= status
& RME9652_sync_1
;
1700 if (status
& RME9652_lock_1
) {
1701 snd_iprintf(buffer
, "ADAT2: %s\n", x
? "Sync" : "Lock");
1703 snd_iprintf(buffer
, "ADAT2: No Lock\n");
1706 x
= status
& RME9652_sync_2
;
1707 if (status
& RME9652_lock_2
) {
1708 snd_iprintf(buffer
, "ADAT3: %s\n", x
? "Sync" : "Lock");
1710 snd_iprintf(buffer
, "ADAT3: No Lock\n");
1713 snd_iprintf(buffer
, "\n");
1715 snd_iprintf(buffer
, "Timecode signal: %s\n",
1716 (status
& RME9652_tc_valid
) ? "yes" : "no");
1720 snd_iprintf(buffer
, "Punch Status:\n\n");
1722 for (i
= 0; i
< rme9652
->ss_channels
; i
++) {
1723 if (thru_bits
& (1 << i
)) {
1724 snd_iprintf(buffer
, "%2d: on ", i
+ 1);
1726 snd_iprintf(buffer
, "%2d: off ", i
+ 1);
1729 if (((i
+ 1) % 8) == 0) {
1730 snd_iprintf(buffer
, "\n");
1734 snd_iprintf(buffer
, "\n");
1737 static void snd_rme9652_proc_init(struct snd_rme9652
*rme9652
)
1739 struct snd_info_entry
*entry
;
1741 if (! snd_card_proc_new(rme9652
->card
, "rme9652", &entry
))
1742 snd_info_set_text_ops(entry
, rme9652
, snd_rme9652_proc_read
);
1745 static void snd_rme9652_free_buffers(struct snd_rme9652
*rme9652
)
1747 snd_hammerfall_free_buffer(&rme9652
->capture_dma_buf
, rme9652
->pci
);
1748 snd_hammerfall_free_buffer(&rme9652
->playback_dma_buf
, rme9652
->pci
);
1751 static int snd_rme9652_free(struct snd_rme9652
*rme9652
)
1753 if (rme9652
->irq
>= 0)
1754 rme9652_stop(rme9652
);
1755 snd_rme9652_free_buffers(rme9652
);
1757 if (rme9652
->irq
>= 0)
1758 free_irq(rme9652
->irq
, (void *)rme9652
);
1759 if (rme9652
->iobase
)
1760 iounmap(rme9652
->iobase
);
1762 pci_release_regions(rme9652
->pci
);
1764 pci_disable_device(rme9652
->pci
);
1768 static int snd_rme9652_initialize_memory(struct snd_rme9652
*rme9652
)
1770 unsigned long pb_bus
, cb_bus
;
1772 if (snd_hammerfall_get_buffer(rme9652
->pci
, &rme9652
->capture_dma_buf
, RME9652_DMA_AREA_BYTES
) < 0 ||
1773 snd_hammerfall_get_buffer(rme9652
->pci
, &rme9652
->playback_dma_buf
, RME9652_DMA_AREA_BYTES
) < 0) {
1774 if (rme9652
->capture_dma_buf
.area
)
1775 snd_dma_free_pages(&rme9652
->capture_dma_buf
);
1776 dev_err(rme9652
->card
->dev
,
1777 "%s: no buffers available\n", rme9652
->card_name
);
1781 /* Align to bus-space 64K boundary */
1783 cb_bus
= ALIGN(rme9652
->capture_dma_buf
.addr
, 0x10000ul
);
1784 pb_bus
= ALIGN(rme9652
->playback_dma_buf
.addr
, 0x10000ul
);
1786 /* Tell the card where it is */
1788 rme9652_write(rme9652
, RME9652_rec_buffer
, cb_bus
);
1789 rme9652_write(rme9652
, RME9652_play_buffer
, pb_bus
);
1791 rme9652
->capture_buffer
= rme9652
->capture_dma_buf
.area
+ (cb_bus
- rme9652
->capture_dma_buf
.addr
);
1792 rme9652
->playback_buffer
= rme9652
->playback_dma_buf
.area
+ (pb_bus
- rme9652
->playback_dma_buf
.addr
);
1797 static void snd_rme9652_set_defaults(struct snd_rme9652
*rme9652
)
1801 /* ASSUMPTION: rme9652->lock is either held, or
1802 there is no need to hold it (e.g. during module
1808 SPDIF Input via Coax
1810 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1811 which implies 2 4096 sample, 32Kbyte periods).
1813 if rev 1.5, initialize the S/PDIF receiver.
1817 rme9652
->control_register
=
1818 RME9652_inp_0
| rme9652_encode_latency(7);
1820 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
);
1822 rme9652_reset_hw_pointer(rme9652
);
1823 rme9652_compute_period_size(rme9652
);
1825 /* default: thru off for all channels */
1827 for (k
= 0; k
< RME9652_NCHANNELS
; ++k
)
1828 rme9652_write(rme9652
, RME9652_thru_base
+ k
* 4, 0);
1830 rme9652
->thru_bits
= 0;
1831 rme9652
->passthru
= 0;
1833 /* set a default rate so that the channel map is set up */
1835 rme9652_set_rate(rme9652
, 48000);
1838 static irqreturn_t
snd_rme9652_interrupt(int irq
, void *dev_id
)
1840 struct snd_rme9652
*rme9652
= (struct snd_rme9652
*) dev_id
;
1842 if (!(rme9652_read(rme9652
, RME9652_status_register
) & RME9652_IRQ
)) {
1846 rme9652_write(rme9652
, RME9652_irq_clear
, 0);
1848 if (rme9652
->capture_substream
) {
1849 snd_pcm_period_elapsed(rme9652
->pcm
->streams
[SNDRV_PCM_STREAM_CAPTURE
].substream
);
1852 if (rme9652
->playback_substream
) {
1853 snd_pcm_period_elapsed(rme9652
->pcm
->streams
[SNDRV_PCM_STREAM_PLAYBACK
].substream
);
1858 static snd_pcm_uframes_t
snd_rme9652_hw_pointer(struct snd_pcm_substream
*substream
)
1860 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1861 return rme9652_hw_pointer(rme9652
);
1864 static char *rme9652_channel_buffer_location(struct snd_rme9652
*rme9652
,
1871 if (snd_BUG_ON(channel
< 0 || channel
>= RME9652_NCHANNELS
))
1874 if ((mapped_channel
= rme9652
->channel_map
[channel
]) < 0) {
1878 if (stream
== SNDRV_PCM_STREAM_CAPTURE
) {
1879 return rme9652
->capture_buffer
+
1880 (mapped_channel
* RME9652_CHANNEL_BUFFER_BYTES
);
1882 return rme9652
->playback_buffer
+
1883 (mapped_channel
* RME9652_CHANNEL_BUFFER_BYTES
);
1887 static int snd_rme9652_playback_copy(struct snd_pcm_substream
*substream
, int channel
,
1888 snd_pcm_uframes_t pos
, void __user
*src
, snd_pcm_uframes_t count
)
1890 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1893 if (snd_BUG_ON(pos
+ count
> RME9652_CHANNEL_BUFFER_BYTES
/ 4))
1896 channel_buf
= rme9652_channel_buffer_location (rme9652
,
1897 substream
->pstr
->stream
,
1899 if (snd_BUG_ON(!channel_buf
))
1901 if (copy_from_user(channel_buf
+ pos
* 4, src
, count
* 4))
1906 static int snd_rme9652_capture_copy(struct snd_pcm_substream
*substream
, int channel
,
1907 snd_pcm_uframes_t pos
, void __user
*dst
, snd_pcm_uframes_t count
)
1909 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1912 if (snd_BUG_ON(pos
+ count
> RME9652_CHANNEL_BUFFER_BYTES
/ 4))
1915 channel_buf
= rme9652_channel_buffer_location (rme9652
,
1916 substream
->pstr
->stream
,
1918 if (snd_BUG_ON(!channel_buf
))
1920 if (copy_to_user(dst
, channel_buf
+ pos
* 4, count
* 4))
1925 static int snd_rme9652_hw_silence(struct snd_pcm_substream
*substream
, int channel
,
1926 snd_pcm_uframes_t pos
, snd_pcm_uframes_t count
)
1928 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1931 channel_buf
= rme9652_channel_buffer_location (rme9652
,
1932 substream
->pstr
->stream
,
1934 if (snd_BUG_ON(!channel_buf
))
1936 memset(channel_buf
+ pos
* 4, 0, count
* 4);
1940 static int snd_rme9652_reset(struct snd_pcm_substream
*substream
)
1942 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1943 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1944 struct snd_pcm_substream
*other
;
1945 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
1946 other
= rme9652
->capture_substream
;
1948 other
= rme9652
->playback_substream
;
1949 if (rme9652
->running
)
1950 runtime
->status
->hw_ptr
= rme9652_hw_pointer(rme9652
);
1952 runtime
->status
->hw_ptr
= 0;
1954 struct snd_pcm_substream
*s
;
1955 struct snd_pcm_runtime
*oruntime
= other
->runtime
;
1956 snd_pcm_group_for_each_entry(s
, substream
) {
1958 oruntime
->status
->hw_ptr
= runtime
->status
->hw_ptr
;
1966 static int snd_rme9652_hw_params(struct snd_pcm_substream
*substream
,
1967 struct snd_pcm_hw_params
*params
)
1969 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
1974 spin_lock_irq(&rme9652
->lock
);
1976 if (substream
->pstr
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
1977 rme9652
->control_register
&= ~(RME9652_PRO
| RME9652_Dolby
| RME9652_EMP
);
1978 rme9652_write(rme9652
, RME9652_control_register
, rme9652
->control_register
|= rme9652
->creg_spdif_stream
);
1979 this_pid
= rme9652
->playback_pid
;
1980 other_pid
= rme9652
->capture_pid
;
1982 this_pid
= rme9652
->capture_pid
;
1983 other_pid
= rme9652
->playback_pid
;
1986 if ((other_pid
> 0) && (this_pid
!= other_pid
)) {
1988 /* The other stream is open, and not by the same
1989 task as this one. Make sure that the parameters
1990 that matter are the same.
1993 if ((int)params_rate(params
) !=
1994 rme9652_adat_sample_rate(rme9652
)) {
1995 spin_unlock_irq(&rme9652
->lock
);
1996 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
2000 if (params_period_size(params
) != rme9652
->period_bytes
/ 4) {
2001 spin_unlock_irq(&rme9652
->lock
);
2002 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
2008 spin_unlock_irq(&rme9652
->lock
);
2012 spin_unlock_irq(&rme9652
->lock
);
2015 /* how to make sure that the rate matches an externally-set one ?
2018 if ((err
= rme9652_set_rate(rme9652
, params_rate(params
))) < 0) {
2019 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
2023 if ((err
= rme9652_set_interrupt_interval(rme9652
, params_period_size(params
))) < 0) {
2024 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
2031 static int snd_rme9652_channel_info(struct snd_pcm_substream
*substream
,
2032 struct snd_pcm_channel_info
*info
)
2034 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2037 if (snd_BUG_ON(info
->channel
>= RME9652_NCHANNELS
))
2040 if ((chn
= rme9652
->channel_map
[info
->channel
]) < 0) {
2044 info
->offset
= chn
* RME9652_CHANNEL_BUFFER_BYTES
;
2050 static int snd_rme9652_ioctl(struct snd_pcm_substream
*substream
,
2051 unsigned int cmd
, void *arg
)
2054 case SNDRV_PCM_IOCTL1_RESET
:
2056 return snd_rme9652_reset(substream
);
2058 case SNDRV_PCM_IOCTL1_CHANNEL_INFO
:
2060 struct snd_pcm_channel_info
*info
= arg
;
2061 return snd_rme9652_channel_info(substream
, info
);
2067 return snd_pcm_lib_ioctl(substream
, cmd
, arg
);
2070 static void rme9652_silence_playback(struct snd_rme9652
*rme9652
)
2072 memset(rme9652
->playback_buffer
, 0, RME9652_DMA_AREA_BYTES
);
2075 static int snd_rme9652_trigger(struct snd_pcm_substream
*substream
,
2078 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2079 struct snd_pcm_substream
*other
;
2081 spin_lock(&rme9652
->lock
);
2082 running
= rme9652
->running
;
2084 case SNDRV_PCM_TRIGGER_START
:
2085 running
|= 1 << substream
->stream
;
2087 case SNDRV_PCM_TRIGGER_STOP
:
2088 running
&= ~(1 << substream
->stream
);
2092 spin_unlock(&rme9652
->lock
);
2095 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
2096 other
= rme9652
->capture_substream
;
2098 other
= rme9652
->playback_substream
;
2101 struct snd_pcm_substream
*s
;
2102 snd_pcm_group_for_each_entry(s
, substream
) {
2104 snd_pcm_trigger_done(s
, substream
);
2105 if (cmd
== SNDRV_PCM_TRIGGER_START
)
2106 running
|= 1 << s
->stream
;
2108 running
&= ~(1 << s
->stream
);
2112 if (cmd
== SNDRV_PCM_TRIGGER_START
) {
2113 if (!(running
& (1 << SNDRV_PCM_STREAM_PLAYBACK
)) &&
2114 substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
2115 rme9652_silence_playback(rme9652
);
2118 substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
2119 rme9652_silence_playback(rme9652
);
2122 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
2123 rme9652_silence_playback(rme9652
);
2126 snd_pcm_trigger_done(substream
, substream
);
2127 if (!rme9652
->running
&& running
)
2128 rme9652_start(rme9652
);
2129 else if (rme9652
->running
&& !running
)
2130 rme9652_stop(rme9652
);
2131 rme9652
->running
= running
;
2132 spin_unlock(&rme9652
->lock
);
2137 static int snd_rme9652_prepare(struct snd_pcm_substream
*substream
)
2139 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2140 unsigned long flags
;
2143 spin_lock_irqsave(&rme9652
->lock
, flags
);
2144 if (!rme9652
->running
)
2145 rme9652_reset_hw_pointer(rme9652
);
2146 spin_unlock_irqrestore(&rme9652
->lock
, flags
);
2150 static struct snd_pcm_hardware snd_rme9652_playback_subinfo
=
2152 .info
= (SNDRV_PCM_INFO_MMAP
|
2153 SNDRV_PCM_INFO_MMAP_VALID
|
2154 SNDRV_PCM_INFO_NONINTERLEAVED
|
2155 SNDRV_PCM_INFO_SYNC_START
|
2156 SNDRV_PCM_INFO_DOUBLE
),
2157 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
2158 .rates
= (SNDRV_PCM_RATE_44100
|
2159 SNDRV_PCM_RATE_48000
|
2160 SNDRV_PCM_RATE_88200
|
2161 SNDRV_PCM_RATE_96000
),
2166 .buffer_bytes_max
= RME9652_CHANNEL_BUFFER_BYTES
* 26,
2167 .period_bytes_min
= (64 * 4) * 10,
2168 .period_bytes_max
= (8192 * 4) * 26,
2174 static struct snd_pcm_hardware snd_rme9652_capture_subinfo
=
2176 .info
= (SNDRV_PCM_INFO_MMAP
|
2177 SNDRV_PCM_INFO_MMAP_VALID
|
2178 SNDRV_PCM_INFO_NONINTERLEAVED
|
2179 SNDRV_PCM_INFO_SYNC_START
),
2180 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
2181 .rates
= (SNDRV_PCM_RATE_44100
|
2182 SNDRV_PCM_RATE_48000
|
2183 SNDRV_PCM_RATE_88200
|
2184 SNDRV_PCM_RATE_96000
),
2189 .buffer_bytes_max
= RME9652_CHANNEL_BUFFER_BYTES
*26,
2190 .period_bytes_min
= (64 * 4) * 10,
2191 .period_bytes_max
= (8192 * 4) * 26,
2197 static unsigned int period_sizes
[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2199 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes
= {
2200 .count
= ARRAY_SIZE(period_sizes
),
2201 .list
= period_sizes
,
2205 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params
*params
,
2206 struct snd_pcm_hw_rule
*rule
)
2208 struct snd_rme9652
*rme9652
= rule
->private;
2209 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
2210 unsigned int list
[2] = { rme9652
->ds_channels
, rme9652
->ss_channels
};
2211 return snd_interval_list(c
, 2, list
, 0);
2214 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params
*params
,
2215 struct snd_pcm_hw_rule
*rule
)
2217 struct snd_rme9652
*rme9652
= rule
->private;
2218 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
2219 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
2220 if (r
->min
> 48000) {
2221 struct snd_interval t
= {
2222 .min
= rme9652
->ds_channels
,
2223 .max
= rme9652
->ds_channels
,
2226 return snd_interval_refine(c
, &t
);
2227 } else if (r
->max
< 88200) {
2228 struct snd_interval t
= {
2229 .min
= rme9652
->ss_channels
,
2230 .max
= rme9652
->ss_channels
,
2233 return snd_interval_refine(c
, &t
);
2238 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params
*params
,
2239 struct snd_pcm_hw_rule
*rule
)
2241 struct snd_rme9652
*rme9652
= rule
->private;
2242 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
2243 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
2244 if (c
->min
>= rme9652
->ss_channels
) {
2245 struct snd_interval t
= {
2250 return snd_interval_refine(r
, &t
);
2251 } else if (c
->max
<= rme9652
->ds_channels
) {
2252 struct snd_interval t
= {
2257 return snd_interval_refine(r
, &t
);
2262 static int snd_rme9652_playback_open(struct snd_pcm_substream
*substream
)
2264 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2265 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
2267 spin_lock_irq(&rme9652
->lock
);
2269 snd_pcm_set_sync(substream
);
2271 runtime
->hw
= snd_rme9652_playback_subinfo
;
2272 runtime
->dma_area
= rme9652
->playback_buffer
;
2273 runtime
->dma_bytes
= RME9652_DMA_AREA_BYTES
;
2275 if (rme9652
->capture_substream
== NULL
) {
2276 rme9652_stop(rme9652
);
2277 rme9652_set_thru(rme9652
, -1, 0);
2280 rme9652
->playback_pid
= current
->pid
;
2281 rme9652
->playback_substream
= substream
;
2283 spin_unlock_irq(&rme9652
->lock
);
2285 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
2286 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hw_constraints_period_sizes
);
2287 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
2288 snd_rme9652_hw_rule_channels
, rme9652
,
2289 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
2290 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
2291 snd_rme9652_hw_rule_channels_rate
, rme9652
,
2292 SNDRV_PCM_HW_PARAM_RATE
, -1);
2293 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
2294 snd_rme9652_hw_rule_rate_channels
, rme9652
,
2295 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
2297 rme9652
->creg_spdif_stream
= rme9652
->creg_spdif
;
2298 rme9652
->spdif_ctl
->vd
[0].access
&= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
2299 snd_ctl_notify(rme9652
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
2300 SNDRV_CTL_EVENT_MASK_INFO
, &rme9652
->spdif_ctl
->id
);
2304 static int snd_rme9652_playback_release(struct snd_pcm_substream
*substream
)
2306 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2308 spin_lock_irq(&rme9652
->lock
);
2310 rme9652
->playback_pid
= -1;
2311 rme9652
->playback_substream
= NULL
;
2313 spin_unlock_irq(&rme9652
->lock
);
2315 rme9652
->spdif_ctl
->vd
[0].access
|= SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
2316 snd_ctl_notify(rme9652
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
2317 SNDRV_CTL_EVENT_MASK_INFO
, &rme9652
->spdif_ctl
->id
);
2322 static int snd_rme9652_capture_open(struct snd_pcm_substream
*substream
)
2324 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2325 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
2327 spin_lock_irq(&rme9652
->lock
);
2329 snd_pcm_set_sync(substream
);
2331 runtime
->hw
= snd_rme9652_capture_subinfo
;
2332 runtime
->dma_area
= rme9652
->capture_buffer
;
2333 runtime
->dma_bytes
= RME9652_DMA_AREA_BYTES
;
2335 if (rme9652
->playback_substream
== NULL
) {
2336 rme9652_stop(rme9652
);
2337 rme9652_set_thru(rme9652
, -1, 0);
2340 rme9652
->capture_pid
= current
->pid
;
2341 rme9652
->capture_substream
= substream
;
2343 spin_unlock_irq(&rme9652
->lock
);
2345 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
2346 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hw_constraints_period_sizes
);
2347 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
2348 snd_rme9652_hw_rule_channels
, rme9652
,
2349 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
2350 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
2351 snd_rme9652_hw_rule_channels_rate
, rme9652
,
2352 SNDRV_PCM_HW_PARAM_RATE
, -1);
2353 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
2354 snd_rme9652_hw_rule_rate_channels
, rme9652
,
2355 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
2359 static int snd_rme9652_capture_release(struct snd_pcm_substream
*substream
)
2361 struct snd_rme9652
*rme9652
= snd_pcm_substream_chip(substream
);
2363 spin_lock_irq(&rme9652
->lock
);
2365 rme9652
->capture_pid
= -1;
2366 rme9652
->capture_substream
= NULL
;
2368 spin_unlock_irq(&rme9652
->lock
);
2372 static struct snd_pcm_ops snd_rme9652_playback_ops
= {
2373 .open
= snd_rme9652_playback_open
,
2374 .close
= snd_rme9652_playback_release
,
2375 .ioctl
= snd_rme9652_ioctl
,
2376 .hw_params
= snd_rme9652_hw_params
,
2377 .prepare
= snd_rme9652_prepare
,
2378 .trigger
= snd_rme9652_trigger
,
2379 .pointer
= snd_rme9652_hw_pointer
,
2380 .copy
= snd_rme9652_playback_copy
,
2381 .silence
= snd_rme9652_hw_silence
,
2384 static struct snd_pcm_ops snd_rme9652_capture_ops
= {
2385 .open
= snd_rme9652_capture_open
,
2386 .close
= snd_rme9652_capture_release
,
2387 .ioctl
= snd_rme9652_ioctl
,
2388 .hw_params
= snd_rme9652_hw_params
,
2389 .prepare
= snd_rme9652_prepare
,
2390 .trigger
= snd_rme9652_trigger
,
2391 .pointer
= snd_rme9652_hw_pointer
,
2392 .copy
= snd_rme9652_capture_copy
,
2395 static int snd_rme9652_create_pcm(struct snd_card
*card
,
2396 struct snd_rme9652
*rme9652
)
2398 struct snd_pcm
*pcm
;
2401 if ((err
= snd_pcm_new(card
,
2403 0, 1, 1, &pcm
)) < 0) {
2408 pcm
->private_data
= rme9652
;
2409 strcpy(pcm
->name
, rme9652
->card_name
);
2411 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &snd_rme9652_playback_ops
);
2412 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &snd_rme9652_capture_ops
);
2414 pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
2419 static int snd_rme9652_create(struct snd_card
*card
,
2420 struct snd_rme9652
*rme9652
,
2423 struct pci_dev
*pci
= rme9652
->pci
;
2429 rme9652
->card
= card
;
2431 pci_read_config_word(rme9652
->pci
, PCI_CLASS_REVISION
, &rev
);
2433 switch (rev
& 0xff) {
2445 if ((err
= pci_enable_device(pci
)) < 0)
2448 spin_lock_init(&rme9652
->lock
);
2450 if ((err
= pci_request_regions(pci
, "rme9652")) < 0)
2452 rme9652
->port
= pci_resource_start(pci
, 0);
2453 rme9652
->iobase
= ioremap_nocache(rme9652
->port
, RME9652_IO_EXTENT
);
2454 if (rme9652
->iobase
== NULL
) {
2455 dev_err(card
->dev
, "unable to remap region 0x%lx-0x%lx\n",
2456 rme9652
->port
, rme9652
->port
+ RME9652_IO_EXTENT
- 1);
2460 if (request_irq(pci
->irq
, snd_rme9652_interrupt
, IRQF_SHARED
,
2461 KBUILD_MODNAME
, rme9652
)) {
2462 dev_err(card
->dev
, "unable to request IRQ %d\n", pci
->irq
);
2465 rme9652
->irq
= pci
->irq
;
2466 rme9652
->precise_ptr
= precise_ptr
;
2468 /* Determine the h/w rev level of the card. This seems like
2469 a particularly kludgy way to encode it, but its what RME
2470 chose to do, so we follow them ...
2473 status
= rme9652_read(rme9652
, RME9652_status_register
);
2474 if (rme9652_decode_spdif_rate(status
&RME9652_F
) == 1) {
2475 rme9652
->hw_rev
= 15;
2477 rme9652
->hw_rev
= 11;
2480 /* Differentiate between the standard Hammerfall, and the
2481 "Light", which does not have the expansion board. This
2482 method comes from information received from Mathhias
2483 Clausen at RME. Display the EEPROM and h/w revID where
2488 case 8: /* original eprom */
2489 strcpy(card
->driver
, "RME9636");
2490 if (rme9652
->hw_rev
== 15) {
2491 rme9652
->card_name
= "RME Digi9636 (Rev 1.5)";
2493 rme9652
->card_name
= "RME Digi9636";
2495 rme9652
->ss_channels
= RME9636_NCHANNELS
;
2497 case 9: /* W36_G EPROM */
2498 strcpy(card
->driver
, "RME9636");
2499 rme9652
->card_name
= "RME Digi9636 (Rev G)";
2500 rme9652
->ss_channels
= RME9636_NCHANNELS
;
2502 case 4: /* W52_G EPROM */
2503 strcpy(card
->driver
, "RME9652");
2504 rme9652
->card_name
= "RME Digi9652 (Rev G)";
2505 rme9652
->ss_channels
= RME9652_NCHANNELS
;
2507 case 3: /* original eprom */
2508 strcpy(card
->driver
, "RME9652");
2509 if (rme9652
->hw_rev
== 15) {
2510 rme9652
->card_name
= "RME Digi9652 (Rev 1.5)";
2512 rme9652
->card_name
= "RME Digi9652";
2514 rme9652
->ss_channels
= RME9652_NCHANNELS
;
2518 rme9652
->ds_channels
= (rme9652
->ss_channels
- 2) / 2 + 2;
2520 pci_set_master(rme9652
->pci
);
2522 if ((err
= snd_rme9652_initialize_memory(rme9652
)) < 0) {
2526 if ((err
= snd_rme9652_create_pcm(card
, rme9652
)) < 0) {
2530 if ((err
= snd_rme9652_create_controls(card
, rme9652
)) < 0) {
2534 snd_rme9652_proc_init(rme9652
);
2536 rme9652
->last_spdif_sample_rate
= -1;
2537 rme9652
->last_adat_sample_rate
= -1;
2538 rme9652
->playback_pid
= -1;
2539 rme9652
->capture_pid
= -1;
2540 rme9652
->capture_substream
= NULL
;
2541 rme9652
->playback_substream
= NULL
;
2543 snd_rme9652_set_defaults(rme9652
);
2545 if (rme9652
->hw_rev
== 15) {
2546 rme9652_initialize_spdif_receiver (rme9652
);
2552 static void snd_rme9652_card_free(struct snd_card
*card
)
2554 struct snd_rme9652
*rme9652
= (struct snd_rme9652
*) card
->private_data
;
2557 snd_rme9652_free(rme9652
);
2560 static int snd_rme9652_probe(struct pci_dev
*pci
,
2561 const struct pci_device_id
*pci_id
)
2564 struct snd_rme9652
*rme9652
;
2565 struct snd_card
*card
;
2568 if (dev
>= SNDRV_CARDS
)
2575 err
= snd_card_new(&pci
->dev
, index
[dev
], id
[dev
], THIS_MODULE
,
2576 sizeof(struct snd_rme9652
), &card
);
2581 rme9652
= (struct snd_rme9652
*) card
->private_data
;
2582 card
->private_free
= snd_rme9652_card_free
;
2586 if ((err
= snd_rme9652_create(card
, rme9652
, precise_ptr
[dev
])) < 0) {
2587 snd_card_free(card
);
2591 strcpy(card
->shortname
, rme9652
->card_name
);
2593 sprintf(card
->longname
, "%s at 0x%lx, irq %d",
2594 card
->shortname
, rme9652
->port
, rme9652
->irq
);
2597 if ((err
= snd_card_register(card
)) < 0) {
2598 snd_card_free(card
);
2601 pci_set_drvdata(pci
, card
);
2606 static void snd_rme9652_remove(struct pci_dev
*pci
)
2608 snd_card_free(pci_get_drvdata(pci
));
2611 static struct pci_driver rme9652_driver
= {
2612 .name
= KBUILD_MODNAME
,
2613 .id_table
= snd_rme9652_ids
,
2614 .probe
= snd_rme9652_probe
,
2615 .remove
= snd_rme9652_remove
,
2618 module_pci_driver(rme9652_driver
);