2 * eti_b1_wm8731 -- SoC audio for AT91RM9200-based Endrelia ETI_B1 board.
4 * Author: Frank Mandarino <fmandarino@endrelia.com>
5 * Endrelia Technologies Inc.
6 * Created: Mar 29, 2006
10 * Copyright 2005 Wolfson Microelectronics PLC.
11 * Copyright 2005 Openedhand Ltd.
13 * Authors: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
14 * Richard Purdie <richard@openedhand.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the
18 * Free Software Foundation; either version 2 of the License, or (at your
19 * option) any later version.
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/version.h>
26 #include <linux/kernel.h>
27 #include <linux/clk.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
36 #include <asm/hardware.h>
37 #include <asm/arch/gpio.h>
39 #include "../codecs/wm8731.h"
44 #define DBG(x...) printk(KERN_INFO "eti_b1_wm8731: " x)
49 static struct clk
*pck1_clk
;
50 static struct clk
*pllb_clk
;
53 static int eti_b1_startup(struct snd_pcm_substream
*substream
)
55 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
56 struct snd_soc_dai
*codec_dai
= rtd
->dai
->codec_dai
;
57 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
60 /* cpu clock is the AT91 master clock sent to the SSC */
61 ret
= snd_soc_dai_set_sysclk(cpu_dai
, AT91_SYSCLK_MCK
,
62 60000000, SND_SOC_CLOCK_IN
);
66 /* codec system clock is supplied by PCK1, set to 12MHz */
67 ret
= snd_soc_dai_set_sysclk(codec_dai
, WM8731_SYSCLK
,
68 12000000, SND_SOC_CLOCK_IN
);
72 /* Start PCK1 clock. */
74 DBG("pck1 started\n");
79 static void eti_b1_shutdown(struct snd_pcm_substream
*substream
)
81 /* Stop PCK1 clock. */
82 clk_disable(pck1_clk
);
83 DBG("pck1 stopped\n");
86 static int eti_b1_hw_params(struct snd_pcm_substream
*substream
,
87 struct snd_pcm_hw_params
*params
)
89 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
90 struct snd_soc_dai
*codec_dai
= rtd
->dai
->codec_dai
;
91 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
94 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
98 /* set codec DAI configuration */
99 ret
= snd_soc_dai_set_fmt(codec_dai
, SND_SOC_DAIFMT_I2S
|
100 SND_SOC_DAIFMT_NB_NF
| SND_SOC_DAIFMT_CBS_CFS
);
104 /* set cpu DAI configuration */
105 ret
= snd_soc_dai_set_fmt(cpu_dai
, SND_SOC_DAIFMT_I2S
|
106 SND_SOC_DAIFMT_NB_NF
| SND_SOC_DAIFMT_CBS_CFS
);
111 * The SSC clock dividers depend on the sample rate. The CMR.DIV
112 * field divides the system master clock MCK to drive the SSC TK
113 * signal which provides the codec BCLK. The TCMR.PERIOD and
114 * RCMR.PERIOD fields further divide the BCLK signal to drive
115 * the SSC TF and RF signals which provide the codec DACLRC and
118 * The dividers were determined through trial and error, where a
119 * CMR.DIV value is chosen such that the resulting BCLK value is
120 * divisible, or almost divisible, by (2 * sample rate), and then
121 * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
123 rate
= params_rate(params
);
127 cmr_div
= 25; /* BCLK = 60MHz/(2*25) = 1.2MHz */
128 period
= 74; /* LRC = BCLK/(2*(74+1)) = 8000Hz */
131 cmr_div
= 7; /* BCLK = 60MHz/(2*7) ~= 4.28571428MHz */
132 period
= 66; /* LRC = BCLK/(2*(66+1)) = 31982.942Hz */
135 cmr_div
= 13; /* BCLK = 60MHz/(2*13) ~= 2.3076923MHz */
136 period
= 23; /* LRC = BCLK/(2*(23+1)) = 48076.923Hz */
139 printk(KERN_WARNING
"unsupported rate %d on ETI-B1 board\n", rate
);
143 /* set the MCK divider for BCLK */
144 ret
= snd_soc_dai_set_clkdiv(cpu_dai
, AT91SSC_CMR_DIV
, cmr_div
);
148 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
149 /* set the BCLK divider for DACLRC */
150 ret
= snd_soc_dai_set_clkdiv(cpu_dai
,
151 AT91SSC_TCMR_PERIOD
, period
);
153 /* set the BCLK divider for ADCLRC */
154 ret
= snd_soc_dai_set_clkdiv(cpu_dai
,
155 AT91SSC_RCMR_PERIOD
, period
);
160 #else /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
162 * Codec in Master Mode.
165 /* set codec DAI configuration */
166 ret
= snd_soc_dai_set_fmt(codec_dai
, SND_SOC_DAIFMT_I2S
|
167 SND_SOC_DAIFMT_NB_NF
| SND_SOC_DAIFMT_CBM_CFM
);
171 /* set cpu DAI configuration */
172 ret
= snd_soc_dai_set_fmt(cpu_dai
, SND_SOC_DAIFMT_I2S
|
173 SND_SOC_DAIFMT_NB_NF
| SND_SOC_DAIFMT_CBM_CFM
);
177 #endif /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
182 static struct snd_soc_ops eti_b1_ops
= {
183 .startup
= eti_b1_startup
,
184 .hw_params
= eti_b1_hw_params
,
185 .shutdown
= eti_b1_shutdown
,
189 static const struct snd_soc_dapm_widget eti_b1_dapm_widgets
[] = {
190 SND_SOC_DAPM_MIC("Int Mic", NULL
),
191 SND_SOC_DAPM_SPK("Ext Spk", NULL
),
194 static const struct snd_soc_dapm_route intercon
[] = {
196 /* speaker connected to LHPOUT */
197 {"Ext Spk", NULL
, "LHPOUT"},
199 /* mic is connected to Mic Jack, with WM8731 Mic Bias */
200 {"MICIN", NULL
, "Mic Bias"},
201 {"Mic Bias", NULL
, "Int Mic"},
205 * Logic for a wm8731 as connected on a Endrelia ETI-B1 board.
207 static int eti_b1_wm8731_init(struct snd_soc_codec
*codec
)
209 DBG("eti_b1_wm8731_init() called\n");
211 /* Add specific widgets */
212 snd_soc_dapm_new_controls(codec
, eti_b1_dapm_widgets
,
213 ARRAY_SIZE(eti_b1_dapm_widgets
));
215 /* Set up specific audio path interconnects */
216 snd_soc_dapm_add_route(codec
, intercon
, ARRAY_SIZE(intercon
));
219 snd_soc_dapm_disable_pin(codec
, "RLINEIN");
220 snd_soc_dapm_disable_pin(codec
, "LLINEIN");
222 /* always connected */
223 snd_soc_dapm_enable_pin(codec
, "Int Mic");
224 snd_soc_dapm_enable_pin(codec
, "Ext Spk");
226 snd_soc_dapm_sync(codec
);
231 static struct snd_soc_dai_link eti_b1_dai
= {
233 .stream_name
= "WM8731 PCM",
234 .cpu_dai
= &at91_ssc_dai
[1],
235 .codec_dai
= &wm8731_dai
,
236 .init
= eti_b1_wm8731_init
,
240 static struct snd_soc_machine snd_soc_machine_eti_b1
= {
241 .name
= "ETI_B1_WM8731",
242 .dai_link
= &eti_b1_dai
,
246 static struct wm8731_setup_data eti_b1_wm8731_setup
= {
250 static struct snd_soc_device eti_b1_snd_devdata
= {
251 .machine
= &snd_soc_machine_eti_b1
,
252 .platform
= &at91_soc_platform
,
253 .codec_dev
= &soc_codec_dev_wm8731
,
254 .codec_data
= &eti_b1_wm8731_setup
,
257 static struct platform_device
*eti_b1_snd_device
;
259 static int __init
eti_b1_init(void)
262 struct at91_ssc_periph
*ssc
= eti_b1_dai
.cpu_dai
->private_data
;
264 if (!request_mem_region(AT91RM9200_BASE_SSC1
, SZ_16K
, "soc-audio")) {
265 DBG("SSC1 memory region is busy\n");
269 ssc
->base
= ioremap(AT91RM9200_BASE_SSC1
, SZ_16K
);
271 DBG("SSC1 memory ioremap failed\n");
273 goto fail_release_mem
;
276 ssc
->pid
= AT91RM9200_ID_SSC1
;
278 eti_b1_snd_device
= platform_device_alloc("soc-audio", -1);
279 if (!eti_b1_snd_device
) {
280 DBG("platform device allocation failed\n");
285 platform_set_drvdata(eti_b1_snd_device
, &eti_b1_snd_devdata
);
286 eti_b1_snd_devdata
.dev
= &eti_b1_snd_device
->dev
;
288 ret
= platform_device_add(eti_b1_snd_device
);
290 DBG("platform device add failed\n");
291 platform_device_put(eti_b1_snd_device
);
295 at91_set_A_periph(AT91_PIN_PB6
, 0); /* TF1 */
296 at91_set_A_periph(AT91_PIN_PB7
, 0); /* TK1 */
297 at91_set_A_periph(AT91_PIN_PB8
, 0); /* TD1 */
298 at91_set_A_periph(AT91_PIN_PB9
, 0); /* RD1 */
299 /* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */
300 at91_set_A_periph(AT91_PIN_PB11
, 0); /* RF1 */
303 * Set PCK1 parent to PLLB and its rate to 12 Mhz.
305 pllb_clk
= clk_get(NULL
, "pllb");
306 pck1_clk
= clk_get(NULL
, "pck1");
308 clk_set_parent(pck1_clk
, pllb_clk
);
309 clk_set_rate(pck1_clk
, 12000000);
311 DBG("MCLK rate %luHz\n", clk_get_rate(pck1_clk
));
313 /* assign the GPIO pin to PCK1 */
314 at91_set_B_periph(AT91_PIN_PA24
, 0);
316 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
317 printk(KERN_INFO
"eti_b1_wm8731: Codec in Slave Mode\n");
319 printk(KERN_INFO
"eti_b1_wm8731: Codec in Master Mode\n");
326 release_mem_region(AT91RM9200_BASE_SSC1
, SZ_16K
);
330 static void __exit
eti_b1_exit(void)
332 struct at91_ssc_periph
*ssc
= eti_b1_dai
.cpu_dai
->private_data
;
337 platform_device_unregister(eti_b1_snd_device
);
340 release_mem_region(AT91RM9200_BASE_SSC1
, SZ_16K
);
343 module_init(eti_b1_init
);
344 module_exit(eti_b1_exit
);
346 /* Module information */
347 MODULE_AUTHOR("Frank Mandarino <fmandarino@endrelia.com>");
348 MODULE_DESCRIPTION("ALSA SoC ETI-B1-WM8731");
349 MODULE_LICENSE("GPL");