sound/soc/atmel/atmel_ssc_dai.c

   1 /*
   2  * atmel_ssc_dai.c  --  ALSA SoC ATMEL SSC Audio Layer Platform driver
   3  *
   4  * Copyright (C) 2005 SAN People
   5  * Copyright (C) 2008 Atmel
   6  *
   7  * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
   8  *         ATMEL CORP.
   9  *
  10  * Based on at91-ssc.c by
  11  * Frank Mandarino <fmandarino@endrelia.com>
  12  * Based on pxa2xx Platform drivers by
  13  * Liam Girdwood <lrg@slimlogic.co.uk>
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  28  */
  29
  30 #include <linux/init.h>
  31 #include <linux/module.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/device.h>
  34 #include <linux/delay.h>
  35 #include <linux/clk.h>
  36 #include <linux/atmel_pdc.h>
  37
  38 #include <linux/atmel-ssc.h>
  39 #include <sound/core.h>
  40 #include <sound/pcm.h>
  41 #include <sound/pcm_params.h>
  42 #include <sound/initval.h>
  43 #include <sound/soc.h>
  44
  45 #include "atmel-pcm.h"
  46 #include "atmel_ssc_dai.h"
  47
  48
  49 #define NUM_SSC_DEVICES         3
  50
  51 /*
  52  * SSC PDC registers required by the PCM DMA engine.
  53  */
  54 static struct atmel_pdc_regs pdc_tx_reg = {
  55         .xpr            = ATMEL_PDC_TPR,
  56         .xcr            = ATMEL_PDC_TCR,
  57         .xnpr           = ATMEL_PDC_TNPR,
  58         .xncr           = ATMEL_PDC_TNCR,
  59 };
  60
  61 static struct atmel_pdc_regs pdc_rx_reg = {
  62         .xpr            = ATMEL_PDC_RPR,
  63         .xcr            = ATMEL_PDC_RCR,
  64         .xnpr           = ATMEL_PDC_RNPR,
  65         .xncr           = ATMEL_PDC_RNCR,
  66 };
  67
  68 /*
  69  * SSC & PDC status bits for transmit and receive.
  70  */
  71 static struct atmel_ssc_mask ssc_tx_mask = {
  72         .ssc_enable     = SSC_BIT(CR_TXEN),
  73         .ssc_disable    = SSC_BIT(CR_TXDIS),
  74         .ssc_endx       = SSC_BIT(SR_ENDTX),
  75         .ssc_endbuf     = SSC_BIT(SR_TXBUFE),
  76         .ssc_error      = SSC_BIT(SR_OVRUN),
  77         .pdc_enable     = ATMEL_PDC_TXTEN,
  78         .pdc_disable    = ATMEL_PDC_TXTDIS,
  79 };
  80
  81 static struct atmel_ssc_mask ssc_rx_mask = {
  82         .ssc_enable     = SSC_BIT(CR_RXEN),
  83         .ssc_disable    = SSC_BIT(CR_RXDIS),
  84         .ssc_endx       = SSC_BIT(SR_ENDRX),
  85         .ssc_endbuf     = SSC_BIT(SR_RXBUFF),
  86         .ssc_error      = SSC_BIT(SR_OVRUN),
  87         .pdc_enable     = ATMEL_PDC_RXTEN,
  88         .pdc_disable    = ATMEL_PDC_RXTDIS,
  89 };
  90
  91
  92 /*
  93  * DMA parameters.
  94  */
  95 static struct atmel_pcm_dma_params ssc_dma_params[NUM_SSC_DEVICES][2] = {
  96         {{
  97         .name           = "SSC0 PCM out",
  98         .pdc            = &pdc_tx_reg,
  99         .mask           = &ssc_tx_mask,
 100         },
 101         {
 102         .name           = "SSC0 PCM in",
 103         .pdc            = &pdc_rx_reg,
 104         .mask           = &ssc_rx_mask,
 105         } },
 106         {{
 107         .name           = "SSC1 PCM out",
 108         .pdc            = &pdc_tx_reg,
 109         .mask           = &ssc_tx_mask,
 110         },
 111         {
 112         .name           = "SSC1 PCM in",
 113         .pdc            = &pdc_rx_reg,
 114         .mask           = &ssc_rx_mask,
 115         } },
 116         {{
 117         .name           = "SSC2 PCM out",
 118         .pdc            = &pdc_tx_reg,
 119         .mask           = &ssc_tx_mask,
 120         },
 121         {
 122         .name           = "SSC2 PCM in",
 123         .pdc            = &pdc_rx_reg,
 124         .mask           = &ssc_rx_mask,
 125         } },
 126 };
 127
 128
 129 static struct atmel_ssc_info ssc_info[NUM_SSC_DEVICES] = {
 130         {
 131         .name           = "ssc0",
 132         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[0].lock),
 133         .dir_mask       = SSC_DIR_MASK_UNUSED,
 134         .initialized    = 0,
 135         },
 136         {
 137         .name           = "ssc1",
 138         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[1].lock),
 139         .dir_mask       = SSC_DIR_MASK_UNUSED,
 140         .initialized    = 0,
 141         },
 142         {
 143         .name           = "ssc2",
 144         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[2].lock),
 145         .dir_mask       = SSC_DIR_MASK_UNUSED,
 146         .initialized    = 0,
 147         },
 148 };
 149
 150
 151 /*
 152  * SSC interrupt handler.  Passes PDC interrupts to the DMA
 153  * interrupt handler in the PCM driver.
 154  */
 155 static irqreturn_t atmel_ssc_interrupt(int irq, void *dev_id)
 156 {
 157         struct atmel_ssc_info *ssc_p = dev_id;
 158         struct atmel_pcm_dma_params *dma_params;
 159         u32 ssc_sr;
 160         u32 ssc_substream_mask;
 161         int i;
 162
 163         ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR)
 164                         & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR);
 165
 166         /*
 167          * Loop through the substreams attached to this SSC.  If
 168          * a DMA-related interrupt occurred on that substream, call
 169          * the DMA interrupt handler function, if one has been
 170          * registered in the dma_params structure by the PCM driver.
 171          */
 172         for (i = 0; i < ARRAY_SIZE(ssc_p->dma_params); i++) {
 173                 dma_params = ssc_p->dma_params[i];
 174
 175                 if ((dma_params != NULL) &&
 176                         (dma_params->dma_intr_handler != NULL)) {
 177                         ssc_substream_mask = (dma_params->mask->ssc_endx |
 178                                         dma_params->mask->ssc_endbuf);
 179                         if (ssc_sr & ssc_substream_mask) {
 180                                 dma_params->dma_intr_handler(ssc_sr,
 181                                                 dma_params->
 182                                                 substream);
 183                         }
 184                 }
 185         }
 186
 187         return IRQ_HANDLED;
 188 }
 189
 190
 191 /*-------------------------------------------------------------------------*\
 192  * DAI functions
 193 \*-------------------------------------------------------------------------*/
 194 /*
 195  * Startup.  Only that one substream allowed in each direction.
 196  */
 197 static int atmel_ssc_startup(struct snd_pcm_substream *substream,
 198                              struct snd_soc_dai *dai)
 199 {
 200         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
 201         struct atmel_pcm_dma_params *dma_params;
 202         int dir, dir_mask;
 203
 204         pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
 205                 ssc_readl(ssc_p->ssc->regs, SR));
 206
 207         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 208                 dir = 0;
 209                 dir_mask = SSC_DIR_MASK_PLAYBACK;
 210         } else {
 211                 dir = 1;
 212                 dir_mask = SSC_DIR_MASK_CAPTURE;
 213         }
 214
 215         dma_params = &ssc_dma_params[dai->id][dir];
 216         dma_params->ssc = ssc_p->ssc;
 217         dma_params->substream = substream;
 218
 219         ssc_p->dma_params[dir] = dma_params;
 220
 221         snd_soc_dai_set_dma_data(dai, substream, dma_params);
 222
 223         spin_lock_irq(&ssc_p->lock);
 224         if (ssc_p->dir_mask & dir_mask) {
 225                 spin_unlock_irq(&ssc_p->lock);
 226                 return -EBUSY;
 227         }
 228         ssc_p->dir_mask |= dir_mask;
 229         spin_unlock_irq(&ssc_p->lock);
 230
 231         return 0;
 232 }
 233
 234 /*
 235  * Shutdown.  Clear DMA parameters and shutdown the SSC if there
 236  * are no other substreams open.
 237  */
 238 static void atmel_ssc_shutdown(struct snd_pcm_substream *substream,
 239                                struct snd_soc_dai *dai)
 240 {
 241         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
 242         struct atmel_pcm_dma_params *dma_params;
 243         int dir, dir_mask;
 244
 245         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 246                 dir = 0;
 247         else
 248                 dir = 1;
 249
 250         dma_params = ssc_p->dma_params[dir];
 251
 252         if (dma_params != NULL) {
 253                 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
 254                 pr_debug("atmel_ssc_shutdown: %s disabled SSC_SR=0x%08x\n",
 255                         (dir ? "receive" : "transmit"),
 256                         ssc_readl(ssc_p->ssc->regs, SR));
 257
 258                 dma_params->ssc = NULL;
 259                 dma_params->substream = NULL;
 260                 ssc_p->dma_params[dir] = NULL;
 261         }
 262
 263         dir_mask = 1 << dir;
 264
 265         spin_lock_irq(&ssc_p->lock);
 266         ssc_p->dir_mask &= ~dir_mask;
 267         if (!ssc_p->dir_mask) {
 268                 if (ssc_p->initialized) {
 269                         /* Shutdown the SSC clock. */
 270                         pr_debug("atmel_ssc_dai: Stopping clock\n");
 271                         clk_disable(ssc_p->ssc->clk);
 272
 273                         free_irq(ssc_p->ssc->irq, ssc_p);
 274                         ssc_p->initialized = 0;
 275                 }
 276
 277                 /* Reset the SSC */
 278                 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
 279                 /* Clear the SSC dividers */
 280                 ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0;
 281         }
 282         spin_unlock_irq(&ssc_p->lock);
 283 }
 284
 285
 286 /*
 287  * Record the DAI format for use in hw_params().
 288  */
 289 static int atmel_ssc_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 290                 unsigned int fmt)
 291 {
 292         struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id];
 293
 294         ssc_p->daifmt = fmt;
 295         return 0;
 296 }
 297
 298 /*
 299  * Record SSC clock dividers for use in hw_params().
 300  */
 301 static int atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
 302         int div_id, int div)
 303 {
 304         struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id];
 305
 306         switch (div_id) {
 307         case ATMEL_SSC_CMR_DIV:
 308                 /*
 309                  * The same master clock divider is used for both
 310                  * transmit and receive, so if a value has already
 311                  * been set, it must match this value.
 312                  */
 313                 if (ssc_p->dir_mask !=
 314                         (SSC_DIR_MASK_PLAYBACK | SSC_DIR_MASK_CAPTURE))
 315                         ssc_p->cmr_div = div;
 316                 else if (ssc_p->cmr_div == 0)
 317                         ssc_p->cmr_div = div;
 318                 else
 319                         if (div != ssc_p->cmr_div)
 320                                 return -EBUSY;
 321                 break;
 322
 323         case ATMEL_SSC_TCMR_PERIOD:
 324                 ssc_p->tcmr_period = div;
 325                 break;
 326
 327         case ATMEL_SSC_RCMR_PERIOD:
 328                 ssc_p->rcmr_period = div;
 329                 break;
 330
 331         default:
 332                 return -EINVAL;
 333         }
 334
 335         return 0;
 336 }
 337
 338 /*
 339  * Configure the SSC.
 340  */
 341 static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
 342         struct snd_pcm_hw_params *params,
 343         struct snd_soc_dai *dai)
 344 {
 345         int id = dai->id;
 346         struct atmel_ssc_info *ssc_p = &ssc_info[id];
 347         struct ssc_device *ssc = ssc_p->ssc;
 348         struct atmel_pcm_dma_params *dma_params;
 349         int dir, channels, bits;
 350         u32 tfmr, rfmr, tcmr, rcmr;
 351         int start_event;
 352         int ret;
 353         int fslen, fslen_ext;
 354
 355         /*
 356          * Currently, there is only one set of dma params for
 357          * each direction.  If more are added, this code will
 358          * have to be changed to select the proper set.
 359          */
 360         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 361                 dir = 0;
 362         else
 363                 dir = 1;
 364
 365         dma_params = ssc_p->dma_params[dir];
 366
 367         channels = params_channels(params);
 368
 369         /*
 370          * Determine sample size in bits and the PDC increment.
 371          */
 372         switch (params_format(params)) {
 373         case SNDRV_PCM_FORMAT_S8:
 374                 bits = 8;
 375                 dma_params->pdc_xfer_size = 1;
 376                 break;
 377         case SNDRV_PCM_FORMAT_S16_LE:
 378                 bits = 16;
 379                 dma_params->pdc_xfer_size = 2;
 380                 break;
 381         case SNDRV_PCM_FORMAT_S24_LE:
 382                 bits = 24;
 383                 dma_params->pdc_xfer_size = 4;
 384                 break;
 385         case SNDRV_PCM_FORMAT_S32_LE:
 386                 bits = 32;
 387                 dma_params->pdc_xfer_size = 4;
 388                 break;
 389         default:
 390                 printk(KERN_WARNING "atmel_ssc_dai: unsupported PCM format");
 391                 return -EINVAL;
 392         }
 393
 394         /*
 395          * Compute SSC register settings.
 396          */
 397         switch (ssc_p->daifmt
 398                 & (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) {
 399
 400         case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
 401                 /*
 402                  * I2S format, SSC provides BCLK and LRC clocks.
 403                  *
 404                  * The SSC transmit and receive clocks are generated
 405                  * from the MCK divider, and the BCLK signal
 406                  * is output on the SSC TK line.
 407                  */
 408
 409                 if (bits > 16 && !ssc->pdata->has_fslen_ext) {
 410                         dev_err(dai->dev,
 411                                 "sample size %d is too large for SSC device\n",
 412                                 bits);
 413                         return -EINVAL;
 414                 }
 415
 416                 fslen_ext = (bits - 1) / 16;
 417                 fslen = (bits - 1) % 16;
 418
 419                 rcmr =    SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
 420                         | SSC_BF(RCMR_STTDLY, START_DELAY)
 421                         | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
 422                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
 423                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 424                         | SSC_BF(RCMR_CKS, SSC_CKS_DIV);
 425
 426                 rfmr =    SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
 427                         | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 428                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
 429                         | SSC_BF(RFMR_FSLEN, fslen)
 430                         | SSC_BF(RFMR_DATNB, (channels - 1))
 431                         | SSC_BIT(RFMR_MSBF)
 432                         | SSC_BF(RFMR_LOOP, 0)
 433                         | SSC_BF(RFMR_DATLEN, (bits - 1));
 434
 435                 tcmr =    SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
 436                         | SSC_BF(TCMR_STTDLY, START_DELAY)
 437                         | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
 438                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
 439                         | SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
 440                         | SSC_BF(TCMR_CKS, SSC_CKS_DIV);
 441
 442                 tfmr =    SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
 443                         | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 444                         | SSC_BF(TFMR_FSDEN, 0)
 445                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
 446                         | SSC_BF(TFMR_FSLEN, fslen)
 447                         | SSC_BF(TFMR_DATNB, (channels - 1))
 448                         | SSC_BIT(TFMR_MSBF)
 449                         | SSC_BF(TFMR_DATDEF, 0)
 450                         | SSC_BF(TFMR_DATLEN, (bits - 1));
 451                 break;
 452
 453         case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
 454                 /*
 455                  * I2S format, CODEC supplies BCLK and LRC clocks.
 456                  *
 457                  * The SSC transmit clock is obtained from the BCLK signal on
 458                  * on the TK line, and the SSC receive clock is
 459                  * generated from the transmit clock.
 460                  *
 461                  *  For single channel data, one sample is transferred
 462                  * on the falling edge of the LRC clock.
 463                  * For two channel data, one sample is
 464                  * transferred on both edges of the LRC clock.
 465                  */
 466                 start_event = ((channels == 1)
 467                                 ? SSC_START_FALLING_RF
 468                                 : SSC_START_EDGE_RF);
 469
 470                 rcmr =    SSC_BF(RCMR_PERIOD, 0)
 471                         | SSC_BF(RCMR_STTDLY, START_DELAY)
 472                         | SSC_BF(RCMR_START, start_event)
 473                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
 474                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 475                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
 476                                            SSC_CKS_PIN : SSC_CKS_CLOCK);
 477
 478                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 479                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
 480                         | SSC_BF(RFMR_FSLEN, 0)
 481                         | SSC_BF(RFMR_DATNB, 0)
 482                         | SSC_BIT(RFMR_MSBF)
 483                         | SSC_BF(RFMR_LOOP, 0)
 484                         | SSC_BF(RFMR_DATLEN, (bits - 1));
 485
 486                 tcmr =    SSC_BF(TCMR_PERIOD, 0)
 487                         | SSC_BF(TCMR_STTDLY, START_DELAY)
 488                         | SSC_BF(TCMR_START, start_event)
 489                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
 490                         | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
 491                         | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
 492                                            SSC_CKS_CLOCK : SSC_CKS_PIN);
 493
 494                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 495                         | SSC_BF(TFMR_FSDEN, 0)
 496                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
 497                         | SSC_BF(TFMR_FSLEN, 0)
 498                         | SSC_BF(TFMR_DATNB, 0)
 499                         | SSC_BIT(TFMR_MSBF)
 500                         | SSC_BF(TFMR_DATDEF, 0)
 501                         | SSC_BF(TFMR_DATLEN, (bits - 1));
 502                 break;
 503
 504         case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
 505                 /*
 506                  * DSP/PCM Mode A format, SSC provides BCLK and LRC clocks.
 507                  *
 508                  * The SSC transmit and receive clocks are generated from the
 509                  * MCK divider, and the BCLK signal is output
 510                  * on the SSC TK line.
 511                  */
 512                 rcmr =    SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
 513                         | SSC_BF(RCMR_STTDLY, 1)
 514                         | SSC_BF(RCMR_START, SSC_START_RISING_RF)
 515                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
 516                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 517                         | SSC_BF(RCMR_CKS, SSC_CKS_DIV);
 518
 519                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 520                         | SSC_BF(RFMR_FSOS, SSC_FSOS_POSITIVE)
 521                         | SSC_BF(RFMR_FSLEN, 0)
 522                         | SSC_BF(RFMR_DATNB, (channels - 1))
 523                         | SSC_BIT(RFMR_MSBF)
 524                         | SSC_BF(RFMR_LOOP, 0)
 525                         | SSC_BF(RFMR_DATLEN, (bits - 1));
 526
 527                 tcmr =    SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
 528                         | SSC_BF(TCMR_STTDLY, 1)
 529                         | SSC_BF(TCMR_START, SSC_START_RISING_RF)
 530                         | SSC_BF(TCMR_CKI, SSC_CKI_RISING)
 531                         | SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
 532                         | SSC_BF(TCMR_CKS, SSC_CKS_DIV);
 533
 534                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 535                         | SSC_BF(TFMR_FSDEN, 0)
 536                         | SSC_BF(TFMR_FSOS, SSC_FSOS_POSITIVE)
 537                         | SSC_BF(TFMR_FSLEN, 0)
 538                         | SSC_BF(TFMR_DATNB, (channels - 1))
 539                         | SSC_BIT(TFMR_MSBF)
 540                         | SSC_BF(TFMR_DATDEF, 0)
 541                         | SSC_BF(TFMR_DATLEN, (bits - 1));
 542                 break;
 543
 544         case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
 545                 /*
 546                  * DSP/PCM Mode A format, CODEC supplies BCLK and LRC clocks.
 547                  *
 548                  * The SSC transmit clock is obtained from the BCLK signal on
 549                  * on the TK line, and the SSC receive clock is
 550                  * generated from the transmit clock.
 551                  *
 552                  * Data is transferred on first BCLK after LRC pulse rising
 553                  * edge.If stereo, the right channel data is contiguous with
 554                  * the left channel data.
 555                  */
 556                 rcmr =    SSC_BF(RCMR_PERIOD, 0)
 557                         | SSC_BF(RCMR_STTDLY, START_DELAY)
 558                         | SSC_BF(RCMR_START, SSC_START_RISING_RF)
 559                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
 560                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
 561                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
 562                                            SSC_CKS_PIN : SSC_CKS_CLOCK);
 563
 564                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 565                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
 566                         | SSC_BF(RFMR_FSLEN, 0)
 567                         | SSC_BF(RFMR_DATNB, (channels - 1))
 568                         | SSC_BIT(RFMR_MSBF)
 569                         | SSC_BF(RFMR_LOOP, 0)
 570                         | SSC_BF(RFMR_DATLEN, (bits - 1));
 571
 572                 tcmr =    SSC_BF(TCMR_PERIOD, 0)
 573                         | SSC_BF(TCMR_STTDLY, START_DELAY)
 574                         | SSC_BF(TCMR_START, SSC_START_RISING_RF)
 575                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
 576                         | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
 577                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
 578                                            SSC_CKS_CLOCK : SSC_CKS_PIN);
 579
 580                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
 581                         | SSC_BF(TFMR_FSDEN, 0)
 582                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
 583                         | SSC_BF(TFMR_FSLEN, 0)
 584                         | SSC_BF(TFMR_DATNB, (channels - 1))
 585                         | SSC_BIT(TFMR_MSBF)
 586                         | SSC_BF(TFMR_DATDEF, 0)
 587                         | SSC_BF(TFMR_DATLEN, (bits - 1));
 588                 break;
 589
 590         default:
 591                 printk(KERN_WARNING "atmel_ssc_dai: unsupported DAI format 0x%x\n",
 592                         ssc_p->daifmt);
 593                 return -EINVAL;
 594         }
 595         pr_debug("atmel_ssc_hw_params: "
 596                         "RCMR=%08x RFMR=%08x TCMR=%08x TFMR=%08x\n",
 597                         rcmr, rfmr, tcmr, tfmr);
 598
 599         if (!ssc_p->initialized) {
 600
 601                 /* Enable PMC peripheral clock for this SSC */
 602                 pr_debug("atmel_ssc_dai: Starting clock\n");
 603                 clk_enable(ssc_p->ssc->clk);
 604
 605                 /* Reset the SSC and its PDC registers */
 606                 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
 607
 608                 ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
 609                 ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
 610                 ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
 611                 ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
 612
 613                 ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
 614                 ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
 615                 ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
 616                 ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
 617
 618                 ret = request_irq(ssc_p->ssc->irq, atmel_ssc_interrupt, 0,
 619                                 ssc_p->name, ssc_p);
 620                 if (ret < 0) {
 621                         printk(KERN_WARNING
 622                                         "atmel_ssc_dai: request_irq failure\n");
 623                         pr_debug("Atmel_ssc_dai: Stoping clock\n");
 624                         clk_disable(ssc_p->ssc->clk);
 625                         return ret;
 626                 }
 627
 628                 ssc_p->initialized = 1;
 629         }
 630
 631         /* set SSC clock mode register */
 632         ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->cmr_div);
 633
 634         /* set receive clock mode and format */
 635         ssc_writel(ssc_p->ssc->regs, RCMR, rcmr);
 636         ssc_writel(ssc_p->ssc->regs, RFMR, rfmr);
 637
 638         /* set transmit clock mode and format */
 639         ssc_writel(ssc_p->ssc->regs, TCMR, tcmr);
 640         ssc_writel(ssc_p->ssc->regs, TFMR, tfmr);
 641
 642         pr_debug("atmel_ssc_dai,hw_params: SSC initialized\n");
 643         return 0;
 644 }
 645
 646
 647 static int atmel_ssc_prepare(struct snd_pcm_substream *substream,
 648                              struct snd_soc_dai *dai)
 649 {
 650         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
 651         struct atmel_pcm_dma_params *dma_params;
 652         int dir;
 653
 654         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 655                 dir = 0;
 656         else
 657                 dir = 1;
 658
 659         dma_params = ssc_p->dma_params[dir];
 660
 661         ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
 662         ssc_writel(ssc_p->ssc->regs, IDR, dma_params->mask->ssc_error);
 663
 664         pr_debug("%s enabled SSC_SR=0x%08x\n",
 665                         dir ? "receive" : "transmit",
 666                         ssc_readl(ssc_p->ssc->regs, SR));
 667         return 0;
 668 }
 669
 670 static int atmel_ssc_trigger(struct snd_pcm_substream *substream,
 671                              int cmd, struct snd_soc_dai *dai)
 672 {
 673         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
 674         struct atmel_pcm_dma_params *dma_params;
 675         int dir;
 676
 677         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 678                 dir = 0;
 679         else
 680                 dir = 1;
 681
 682         dma_params = ssc_p->dma_params[dir];
 683
 684         switch (cmd) {
 685         case SNDRV_PCM_TRIGGER_START:
 686         case SNDRV_PCM_TRIGGER_RESUME:
 687         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 688                 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable);
 689                 break;
 690         default:
 691                 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
 692                 break;
 693         }
 694
 695         return 0;
 696 }
 697
 698 #ifdef CONFIG_PM
 699 static int atmel_ssc_suspend(struct snd_soc_dai *cpu_dai)
 700 {
 701         struct atmel_ssc_info *ssc_p;
 702
 703         if (!cpu_dai->active)
 704                 return 0;
 705
 706         ssc_p = &ssc_info[cpu_dai->id];
 707
 708         /* Save the status register before disabling transmit and receive */
 709         ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR);
 710         ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS));
 711
 712         /* Save the current interrupt mask, then disable unmasked interrupts */
 713         ssc_p->ssc_state.ssc_imr = ssc_readl(ssc_p->ssc->regs, IMR);
 714         ssc_writel(ssc_p->ssc->regs, IDR, ssc_p->ssc_state.ssc_imr);
 715
 716         ssc_p->ssc_state.ssc_cmr = ssc_readl(ssc_p->ssc->regs, CMR);
 717         ssc_p->ssc_state.ssc_rcmr = ssc_readl(ssc_p->ssc->regs, RCMR);
 718         ssc_p->ssc_state.ssc_rfmr = ssc_readl(ssc_p->ssc->regs, RFMR);
 719         ssc_p->ssc_state.ssc_tcmr = ssc_readl(ssc_p->ssc->regs, TCMR);
 720         ssc_p->ssc_state.ssc_tfmr = ssc_readl(ssc_p->ssc->regs, TFMR);
 721
 722         return 0;
 723 }
 724
 725
 726
 727 static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai)
 728 {
 729         struct atmel_ssc_info *ssc_p;
 730         u32 cr;
 731
 732         if (!cpu_dai->active)
 733                 return 0;
 734
 735         ssc_p = &ssc_info[cpu_dai->id];
 736
 737         /* restore SSC register settings */
 738         ssc_writel(ssc_p->ssc->regs, TFMR, ssc_p->ssc_state.ssc_tfmr);
 739         ssc_writel(ssc_p->ssc->regs, TCMR, ssc_p->ssc_state.ssc_tcmr);
 740         ssc_writel(ssc_p->ssc->regs, RFMR, ssc_p->ssc_state.ssc_rfmr);
 741         ssc_writel(ssc_p->ssc->regs, RCMR, ssc_p->ssc_state.ssc_rcmr);
 742         ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->ssc_state.ssc_cmr);
 743
 744         /* re-enable interrupts */
 745         ssc_writel(ssc_p->ssc->regs, IER, ssc_p->ssc_state.ssc_imr);
 746
 747         /* Re-enable receive and transmit as appropriate */
 748         cr = 0;
 749         cr |=
 750             (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_RXEN)) ? SSC_BIT(CR_RXEN) : 0;
 751         cr |=
 752             (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_TXEN)) ? SSC_BIT(CR_TXEN) : 0;
 753         ssc_writel(ssc_p->ssc->regs, CR, cr);
 754
 755         return 0;
 756 }
 757 #else /* CONFIG_PM */
 758 #  define atmel_ssc_suspend     NULL
 759 #  define atmel_ssc_resume      NULL
 760 #endif /* CONFIG_PM */
 761
 762 #define ATMEL_SSC_RATES (SNDRV_PCM_RATE_8000_96000)
 763
 764 #define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_LE |\
 765                           SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
 766
 767 static const struct snd_soc_dai_ops atmel_ssc_dai_ops = {
 768         .startup        = atmel_ssc_startup,
 769         .shutdown       = atmel_ssc_shutdown,
 770         .prepare        = atmel_ssc_prepare,
 771         .trigger        = atmel_ssc_trigger,
 772         .hw_params      = atmel_ssc_hw_params,
 773         .set_fmt        = atmel_ssc_set_dai_fmt,
 774         .set_clkdiv     = atmel_ssc_set_dai_clkdiv,
 775 };
 776
 777 static struct snd_soc_dai_driver atmel_ssc_dai = {
 778                 .suspend = atmel_ssc_suspend,
 779                 .resume = atmel_ssc_resume,
 780                 .playback = {
 781                         .channels_min = 1,
 782                         .channels_max = 2,
 783                         .rates = ATMEL_SSC_RATES,
 784                         .formats = ATMEL_SSC_FORMATS,},
 785                 .capture = {
 786                         .channels_min = 1,
 787                         .channels_max = 2,
 788                         .rates = ATMEL_SSC_RATES,
 789                         .formats = ATMEL_SSC_FORMATS,},
 790                 .ops = &atmel_ssc_dai_ops,
 791 };
 792
 793 static const struct snd_soc_component_driver atmel_ssc_component = {
 794         .name           = "atmel-ssc",
 795 };
 796
 797 static int asoc_ssc_init(struct device *dev)
 798 {
 799         struct platform_device *pdev = to_platform_device(dev);
 800         struct ssc_device *ssc = platform_get_drvdata(pdev);
 801         int ret;
 802
 803         ret = snd_soc_register_component(dev, &atmel_ssc_component,
 804                                          &atmel_ssc_dai, 1);
 805         if (ret) {
 806                 dev_err(dev, "Could not register DAI: %d\n", ret);
 807                 goto err;
 808         }
 809
 810         if (ssc->pdata->use_dma)
 811                 ret = atmel_pcm_dma_platform_register(dev);
 812         else
 813                 ret = atmel_pcm_pdc_platform_register(dev);
 814
 815         if (ret) {
 816                 dev_err(dev, "Could not register PCM: %d\n", ret);
 817                 goto err_unregister_dai;
 818         }
 819
 820         return 0;
 821
 822 err_unregister_dai:
 823         snd_soc_unregister_component(dev);
 824 err:
 825         return ret;
 826 }
 827
 828 static void asoc_ssc_exit(struct device *dev)
 829 {
 830         struct platform_device *pdev = to_platform_device(dev);
 831         struct ssc_device *ssc = platform_get_drvdata(pdev);
 832
 833         if (ssc->pdata->use_dma)
 834                 atmel_pcm_dma_platform_unregister(dev);
 835         else
 836                 atmel_pcm_pdc_platform_unregister(dev);
 837
 838         snd_soc_unregister_component(dev);
 839 }
 840
 841 /**
 842  * atmel_ssc_set_audio - Allocate the specified SSC for audio use.
 843  */
 844 int atmel_ssc_set_audio(int ssc_id)
 845 {
 846         struct ssc_device *ssc;
 847         int ret;
 848
 849         /* If we can grab the SSC briefly to parent the DAI device off it */
 850         ssc = ssc_request(ssc_id);
 851         if (IS_ERR(ssc)) {
 852                 pr_err("Unable to parent ASoC SSC DAI on SSC: %ld\n",
 853                         PTR_ERR(ssc));
 854                 return PTR_ERR(ssc);
 855         } else {
 856                 ssc_info[ssc_id].ssc = ssc;
 857         }
 858
 859         ret = asoc_ssc_init(&ssc->pdev->dev);
 860
 861         return ret;
 862 }
 863 EXPORT_SYMBOL_GPL(atmel_ssc_set_audio);
 864
 865 void atmel_ssc_put_audio(int ssc_id)
 866 {
 867         struct ssc_device *ssc = ssc_info[ssc_id].ssc;
 868
 869         asoc_ssc_exit(&ssc->pdev->dev);
 870         ssc_free(ssc);
 871 }
 872 EXPORT_SYMBOL_GPL(atmel_ssc_put_audio);
 873
 874 /* Module information */
 875 MODULE_AUTHOR("Sedji Gaouaou, sedji.gaouaou@atmel.com, www.atmel.com");
 876 MODULE_DESCRIPTION("ATMEL SSC ASoC Interface");
 877 MODULE_LICENSE("GPL");