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1 /*
2 * File: sound/soc/blackfin/bf5xx-ad73311.c
3 * Author: Cliff Cai <Cliff.Cai@analog.com>
4 *
5 * Created: Thur Sep 25 2008
6 * Description: Board driver for ad73311 sound chip
7 *
8 * Modified:
9 * Copyright 2008 Analog Devices Inc.
10 *
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, see the file COPYING, or write
25 * to the Free Software Foundation, Inc.,
26 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
27 */
28
29 #include <linux/module.h>
30 #include <linux/moduleparam.h>
31 #include <linux/device.h>
32 #include <linux/delay.h>
33 #include <linux/gpio.h>
34
35 #include <sound/core.h>
36 #include <sound/pcm.h>
37 #include <sound/soc.h>
38 #include <sound/soc-dapm.h>
39 #include <sound/pcm_params.h>
40
41 #include <asm/blackfin.h>
42 #include <asm/cacheflush.h>
43 #include <asm/irq.h>
44 #include <asm/dma.h>
45 #include <asm/portmux.h>
46
47 #include "../codecs/ad73311.h"
48 #include "bf5xx-sport.h"
49 #include "bf5xx-i2s-pcm.h"
50
51 #if CONFIG_SND_BF5XX_SPORT_NUM == 0
52 #define bfin_write_SPORT_TCR1 bfin_write_SPORT0_TCR1
53 #define bfin_read_SPORT_TCR1 bfin_read_SPORT0_TCR1
54 #define bfin_write_SPORT_TCR2 bfin_write_SPORT0_TCR2
55 #define bfin_write_SPORT_TX16 bfin_write_SPORT0_TX16
56 #define bfin_read_SPORT_STAT bfin_read_SPORT0_STAT
57 #else
58 #define bfin_write_SPORT_TCR1 bfin_write_SPORT1_TCR1
59 #define bfin_read_SPORT_TCR1 bfin_read_SPORT1_TCR1
60 #define bfin_write_SPORT_TCR2 bfin_write_SPORT1_TCR2
61 #define bfin_write_SPORT_TX16 bfin_write_SPORT1_TX16
62 #define bfin_read_SPORT_STAT bfin_read_SPORT1_STAT
63 #endif
64
65 #define GPIO_SE CONFIG_SND_BFIN_AD73311_SE
66
67 static struct snd_soc_card bf5xx_ad73311;
68
69 static int snd_ad73311_startup(void)
70 {
71 pr_debug("%s enter\n", __func__);
72
73 /* Pull up SE pin on AD73311L */
74 gpio_set_value(GPIO_SE, 1);
75 return 0;
76 }
77
78 static int snd_ad73311_configure(void)
79 {
80 unsigned short ctrl_regs[6];
81 unsigned short status = 0;
82 int count = 0;
83
84 /* DMCLK = MCLK = 16.384 MHz
85 * SCLK = DMCLK/8 = 2.048 MHz
86 * Sample Rate = DMCLK/2048 = 8 KHz
87 */
88 ctrl_regs[0] = AD_CONTROL | AD_WRITE | CTRL_REG_B | REGB_MCDIV(0) | \
89 REGB_SCDIV(0) | REGB_DIRATE(0);
90 ctrl_regs[1] = AD_CONTROL | AD_WRITE | CTRL_REG_C | REGC_PUDEV | \
91 REGC_PUADC | REGC_PUDAC | REGC_PUREF | REGC_REFUSE ;
92 ctrl_regs[2] = AD_CONTROL | AD_WRITE | CTRL_REG_D | REGD_OGS(2) | \
93 REGD_IGS(2);
94 ctrl_regs[3] = AD_CONTROL | AD_WRITE | CTRL_REG_E | REGE_DA(0x1f);
95 ctrl_regs[4] = AD_CONTROL | AD_WRITE | CTRL_REG_F | REGF_SEEN ;
96 ctrl_regs[5] = AD_CONTROL | AD_WRITE | CTRL_REG_A | REGA_MODE_DATA;
97
98 local_irq_disable();
99 snd_ad73311_startup();
100 udelay(1);
101
102 bfin_write_SPORT_TCR1(TFSR);
103 bfin_write_SPORT_TCR2(0xF);
104 SSYNC();
105
106 /* SPORT Tx Register is a 8 x 16 FIFO, all the data can be put to
107 * FIFO before enable SPORT to transfer the data
108 */
109 for (count = 0; count < 6; count++)
110 bfin_write_SPORT_TX16(ctrl_regs[count]);
111 SSYNC();
112 bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() | TSPEN);
113 SSYNC();
114
115 /* When TUVF is set, the data is already send out */
116 while (!(status & TUVF) && ++count < 10000) {
117 udelay(1);
118 status = bfin_read_SPORT_STAT();
119 SSYNC();
120 }
121 bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() & ~TSPEN);
122 SSYNC();
123 local_irq_enable();
124
125 if (count >= 10000) {
126 printk(KERN_ERR "ad73311: failed to configure codec\n");
127 return -1;
128 }
129 return 0;
130 }
131
132 static int bf5xx_probe(struct platform_device *pdev)
133 {
134 int err;
135 if (gpio_request(GPIO_SE, "AD73311_SE")) {
136 printk(KERN_ERR "%s: Failed ro request GPIO_%d\n", __func__, GPIO_SE);
137 return -EBUSY;
138 }
139
140 gpio_direction_output(GPIO_SE, 0);
141
142 err = snd_ad73311_configure();
143 if (err < 0)
144 return -EFAULT;
145
146 return 0;
147 }
148
149 static int bf5xx_ad73311_startup(struct snd_pcm_substream *substream)
150 {
151 struct snd_soc_pcm_runtime *rtd = substream->private_data;
152 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
153
154 pr_debug("%s enter\n", __func__);
155 snd_soc_dai_set_drvdata(cpu_dai, sport_handle);
156 return 0;
157 }
158
159 static int bf5xx_ad73311_hw_params(struct snd_pcm_substream *substream,
160 struct snd_pcm_hw_params *params)
161 {
162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
163 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
164 int ret = 0;
165
166 pr_debug("%s rate %d format %x\n", __func__, params_rate(params),
167 params_format(params));
168
169 /* set cpu DAI configuration */
170 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
171 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
172 if (ret < 0)
173 return ret;
174
175 return 0;
176 }
177
178
179 static struct snd_soc_ops bf5xx_ad73311_ops = {
180 .startup = bf5xx_ad73311_startup,
181 .hw_params = bf5xx_ad73311_hw_params,
182 };
183
184 static struct snd_soc_dai_link bf5xx_ad73311_dai = {
185 .name = "ad73311",
186 .stream_name = "AD73311",
187 .cpu_dai_name = "bf5xx-i2s",
188 .codec_dai_name = "ad73311-hifi",
189 .platform_name = "bfin-pcm-audio",
190 .codec_name = "ad73311-codec",
191 .ops = &bf5xx_ad73311_ops,
192 };
193
194 static struct snd_soc_card bf5xx_ad73311 = {
195 .name = "bf5xx_ad73311",
196 .probe = bf5xx_probe,
197 .dai_link = &bf5xx_ad73311_dai,
198 .num_links = 1,
199 };
200
201 static struct platform_device *bf5xx_ad73311_snd_device;
202
203 static int __init bf5xx_ad73311_init(void)
204 {
205 int ret;
206
207 pr_debug("%s enter\n", __func__);
208 bf5xx_ad73311_snd_device = platform_device_alloc("soc-audio", -1);
209 if (!bf5xx_ad73311_snd_device)
210 return -ENOMEM;
211
212 platform_set_drvdata(bf5xx_ad73311_snd_device, &bf5xx_ad73311);
213 ret = platform_device_add(bf5xx_ad73311_snd_device);
214
215 if (ret)
216 platform_device_put(bf5xx_ad73311_snd_device);
217
218 return ret;
219 }
220
221 static void __exit bf5xx_ad73311_exit(void)
222 {
223 pr_debug("%s enter\n", __func__);
224 platform_device_unregister(bf5xx_ad73311_snd_device);
225 }
226
227 module_init(bf5xx_ad73311_init);
228 module_exit(bf5xx_ad73311_exit);
229
230 /* Module information */
231 MODULE_AUTHOR("Cliff Cai");
232 MODULE_DESCRIPTION("ALSA SoC AD73311 Blackfin");
233 MODULE_LICENSE("GPL");
234