sound/soc/codecs/hdmi-codec.c

   1 /*
   2  * ALSA SoC codec for HDMI encoder drivers
   3  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
   4  * Author: Jyri Sarha <jsarha@ti.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  */
  15 #include <linux/module.h>
  16 #include <linux/string.h>
  17 #include <sound/core.h>
  18 #include <sound/pcm.h>
  19 #include <sound/pcm_params.h>
  20 #include <sound/soc.h>
  21 #include <sound/tlv.h>
  22 #include <sound/pcm_drm_eld.h>
  23 #include <sound/hdmi-codec.h>
  24 #include <sound/pcm_iec958.h>
  25
  26 #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
  27
  28 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN  -1
  29
  30 struct hdmi_codec_channel_map_table {
  31         unsigned char map;      /* ALSA API channel map position */
  32         unsigned long spk_mask;         /* speaker position bit mask */
  33 };
  34
  35 /*
  36  * CEA speaker placement for HDMI 1.4:
  37  *
  38  *  FL  FLC   FC   FRC   FR   FRW
  39  *
  40  *                                  LFE
  41  *
  42  *  RL  RLC   RC   RRC   RR
  43  *
  44  *  Speaker placement has to be extended to support HDMI 2.0
  45  */
  46 enum hdmi_codec_cea_spk_placement {
  47         FL  = BIT(0),   /* Front Left           */
  48         FC  = BIT(1),   /* Front Center         */
  49         FR  = BIT(2),   /* Front Right          */
  50         FLC = BIT(3),   /* Front Left Center    */
  51         FRC = BIT(4),   /* Front Right Center   */
  52         RL  = BIT(5),   /* Rear Left            */
  53         RC  = BIT(6),   /* Rear Center          */
  54         RR  = BIT(7),   /* Rear Right           */
  55         RLC = BIT(8),   /* Rear Left Center     */
  56         RRC = BIT(9),   /* Rear Right Center    */
  57         LFE = BIT(10),  /* Low Frequency Effect */
  58 };
  59
  60 /*
  61  * cea Speaker allocation structure
  62  */
  63 struct hdmi_codec_cea_spk_alloc {
  64         const int ca_id;
  65         unsigned int n_ch;
  66         unsigned long mask;
  67 };
  68
  69 /* Channel maps  stereo HDMI */
  70 const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = {
  71         { .channels = 2,
  72           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
  73         { }
  74 };
  75
  76 /* Channel maps for multi-channel playbacks, up to 8 n_ch */
  77 const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
  78         { .channels = 2, /* CA_ID 0x00 */
  79           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
  80         { .channels = 4, /* CA_ID 0x01 */
  81           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
  82                    SNDRV_CHMAP_NA } },
  83         { .channels = 4, /* CA_ID 0x02 */
  84           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
  85                    SNDRV_CHMAP_FC } },
  86         { .channels = 4, /* CA_ID 0x03 */
  87           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
  88                    SNDRV_CHMAP_FC } },
  89         { .channels = 6, /* CA_ID 0x04 */
  90           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
  91                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
  92         { .channels = 6, /* CA_ID 0x05 */
  93           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
  94                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
  95         { .channels = 6, /* CA_ID 0x06 */
  96           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
  97                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
  98         { .channels = 6, /* CA_ID 0x07 */
  99           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 100                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
 101         { .channels = 6, /* CA_ID 0x08 */
 102           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 103                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
 104         { .channels = 6, /* CA_ID 0x09 */
 105           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 106                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
 107         { .channels = 6, /* CA_ID 0x0A */
 108           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 109                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
 110         { .channels = 6, /* CA_ID 0x0B */
 111           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 112                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
 113         { .channels = 8, /* CA_ID 0x0C */
 114           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 115                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 116                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
 117         { .channels = 8, /* CA_ID 0x0D */
 118           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 119                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 120                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
 121         { .channels = 8, /* CA_ID 0x0E */
 122           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 123                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 124                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
 125         { .channels = 8, /* CA_ID 0x0F */
 126           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 127                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 128                    SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
 129         { .channels = 8, /* CA_ID 0x10 */
 130           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 131                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 132                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
 133         { .channels = 8, /* CA_ID 0x11 */
 134           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 135                    SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 136                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
 137         { .channels = 8, /* CA_ID 0x12 */
 138           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 139                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 140                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
 141         { .channels = 8, /* CA_ID 0x13 */
 142           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 143                    SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
 144                    SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
 145         { .channels = 8, /* CA_ID 0x14 */
 146           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 147                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 148                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 149         { .channels = 8, /* CA_ID 0x15 */
 150           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 151                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 152                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 153         { .channels = 8, /* CA_ID 0x16 */
 154           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 155                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 156                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 157         { .channels = 8, /* CA_ID 0x17 */
 158           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 159                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 160                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 161         { .channels = 8, /* CA_ID 0x18 */
 162           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 163                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 164                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 165         { .channels = 8, /* CA_ID 0x19 */
 166           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 167                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 168                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 169         { .channels = 8, /* CA_ID 0x1A */
 170           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 171                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 172                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 173         { .channels = 8, /* CA_ID 0x1B */
 174           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 175                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 176                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 177         { .channels = 8, /* CA_ID 0x1C */
 178           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 179                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 180                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 181         { .channels = 8, /* CA_ID 0x1D */
 182           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 183                    SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 184                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 185         { .channels = 8, /* CA_ID 0x1E */
 186           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
 187                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 188                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 189         { .channels = 8, /* CA_ID 0x1F */
 190           .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
 191                    SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
 192                    SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
 193         { }
 194 };
 195
 196 /*
 197  * hdmi_codec_channel_alloc: speaker configuration available for CEA
 198  *
 199  * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct
 200  * The preceding ones have better chances to be selected by
 201  * hdmi_codec_get_ch_alloc_table_idx().
 202  */
 203 static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
 204         { .ca_id = 0x00, .n_ch = 2,
 205           .mask = FL | FR},
 206         /* 2.1 */
 207         { .ca_id = 0x01, .n_ch = 4,
 208           .mask = FL | FR | LFE},
 209         /* Dolby Surround */
 210         { .ca_id = 0x02, .n_ch = 4,
 211           .mask = FL | FR | FC },
 212         /* surround51 */
 213         { .ca_id = 0x0b, .n_ch = 6,
 214           .mask = FL | FR | LFE | FC | RL | RR},
 215         /* surround40 */
 216         { .ca_id = 0x08, .n_ch = 6,
 217           .mask = FL | FR | RL | RR },
 218         /* surround41 */
 219         { .ca_id = 0x09, .n_ch = 6,
 220           .mask = FL | FR | LFE | RL | RR },
 221         /* surround50 */
 222         { .ca_id = 0x0a, .n_ch = 6,
 223           .mask = FL | FR | FC | RL | RR },
 224         /* 6.1 */
 225         { .ca_id = 0x0f, .n_ch = 8,
 226           .mask = FL | FR | LFE | FC | RL | RR | RC },
 227         /* surround71 */
 228         { .ca_id = 0x13, .n_ch = 8,
 229           .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
 230         /* others */
 231         { .ca_id = 0x03, .n_ch = 8,
 232           .mask = FL | FR | LFE | FC },
 233         { .ca_id = 0x04, .n_ch = 8,
 234           .mask = FL | FR | RC},
 235         { .ca_id = 0x05, .n_ch = 8,
 236           .mask = FL | FR | LFE | RC },
 237         { .ca_id = 0x06, .n_ch = 8,
 238           .mask = FL | FR | FC | RC },
 239         { .ca_id = 0x07, .n_ch = 8,
 240           .mask = FL | FR | LFE | FC | RC },
 241         { .ca_id = 0x0c, .n_ch = 8,
 242           .mask = FL | FR | RC | RL | RR },
 243         { .ca_id = 0x0d, .n_ch = 8,
 244           .mask = FL | FR | LFE | RL | RR | RC },
 245         { .ca_id = 0x0e, .n_ch = 8,
 246           .mask = FL | FR | FC | RL | RR | RC },
 247         { .ca_id = 0x10, .n_ch = 8,
 248           .mask = FL | FR | RL | RR | RLC | RRC },
 249         { .ca_id = 0x11, .n_ch = 8,
 250           .mask = FL | FR | LFE | RL | RR | RLC | RRC },
 251         { .ca_id = 0x12, .n_ch = 8,
 252           .mask = FL | FR | FC | RL | RR | RLC | RRC },
 253         { .ca_id = 0x14, .n_ch = 8,
 254           .mask = FL | FR | FLC | FRC },
 255         { .ca_id = 0x15, .n_ch = 8,
 256           .mask = FL | FR | LFE | FLC | FRC },
 257         { .ca_id = 0x16, .n_ch = 8,
 258           .mask = FL | FR | FC | FLC | FRC },
 259         { .ca_id = 0x17, .n_ch = 8,
 260           .mask = FL | FR | LFE | FC | FLC | FRC },
 261         { .ca_id = 0x18, .n_ch = 8,
 262           .mask = FL | FR | RC | FLC | FRC },
 263         { .ca_id = 0x19, .n_ch = 8,
 264           .mask = FL | FR | LFE | RC | FLC | FRC },
 265         { .ca_id = 0x1a, .n_ch = 8,
 266           .mask = FL | FR | RC | FC | FLC | FRC },
 267         { .ca_id = 0x1b, .n_ch = 8,
 268           .mask = FL | FR | LFE | RC | FC | FLC | FRC },
 269         { .ca_id = 0x1c, .n_ch = 8,
 270           .mask = FL | FR | RL | RR | FLC | FRC },
 271         { .ca_id = 0x1d, .n_ch = 8,
 272           .mask = FL | FR | LFE | RL | RR | FLC | FRC },
 273         { .ca_id = 0x1e, .n_ch = 8,
 274           .mask = FL | FR | FC | RL | RR | FLC | FRC },
 275         { .ca_id = 0x1f, .n_ch = 8,
 276           .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
 277 };
 278
 279 struct hdmi_codec_priv {
 280         struct hdmi_codec_pdata hcd;
 281         struct snd_soc_dai_driver *daidrv;
 282         struct hdmi_codec_daifmt daifmt[2];
 283         struct mutex current_stream_lock;
 284         struct snd_pcm_substream *current_stream;
 285         uint8_t eld[MAX_ELD_BYTES];
 286         struct snd_pcm_chmap *chmap_info;
 287         unsigned int chmap_idx;
 288 };
 289
 290 static const struct snd_soc_dapm_widget hdmi_widgets[] = {
 291         SND_SOC_DAPM_OUTPUT("TX"),
 292 };
 293
 294 static const struct snd_soc_dapm_route hdmi_routes[] = {
 295         { "TX", NULL, "Playback" },
 296 };
 297
 298 enum {
 299         DAI_ID_I2S = 0,
 300         DAI_ID_SPDIF,
 301 };
 302
 303 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 304                              struct snd_ctl_elem_info *uinfo)
 305 {
 306         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 307         struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
 308
 309         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 310         uinfo->count = sizeof(hcp->eld);
 311
 312         return 0;
 313 }
 314
 315 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 316                             struct snd_ctl_elem_value *ucontrol)
 317 {
 318         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 319         struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
 320
 321         memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
 322
 323         return 0;
 324 }
 325
 326 static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc)
 327 {
 328         int i;
 329         const unsigned long hdmi_codec_eld_spk_alloc_bits[] = {
 330                 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR,
 331                 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
 332         };
 333         unsigned long spk_mask = 0;
 334
 335         for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) {
 336                 if (spk_alloc & (1 << i))
 337                         spk_mask |= hdmi_codec_eld_spk_alloc_bits[i];
 338         }
 339
 340         return spk_mask;
 341 }
 342
 343 void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp)
 344 {
 345         u8 spk_alloc;
 346         unsigned long spk_mask;
 347
 348         spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
 349         spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
 350
 351         /* Detect if only stereo supported, else return 8 channels mappings */
 352         if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2)
 353                 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps;
 354         else
 355                 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
 356 }
 357
 358 static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp,
 359                                              unsigned char channels)
 360 {
 361         int i;
 362         u8 spk_alloc;
 363         unsigned long spk_mask;
 364         const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc;
 365
 366         spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
 367         spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
 368
 369         for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) {
 370                 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/
 371                 if (!spk_alloc && cap->ca_id == 0)
 372                         return i;
 373                 if (cap->n_ch != channels)
 374                         continue;
 375                 if (!(cap->mask == (spk_mask & cap->mask)))
 376                         continue;
 377                 return i;
 378         }
 379
 380         return -EINVAL;
 381 }
 382 static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
 383                               struct snd_ctl_elem_value *ucontrol)
 384 {
 385         unsigned const char *map;
 386         unsigned int i;
 387         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
 388         struct hdmi_codec_priv *hcp = info->private_data;
 389
 390         map = info->chmap[hcp->chmap_idx].map;
 391
 392         for (i = 0; i < info->max_channels; i++) {
 393                 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
 394                         ucontrol->value.integer.value[i] = 0;
 395                 else
 396                         ucontrol->value.integer.value[i] = map[i];
 397         }
 398
 399         return 0;
 400 }
 401
 402
 403 static const struct snd_kcontrol_new hdmi_controls[] = {
 404         {
 405                 .access = SNDRV_CTL_ELEM_ACCESS_READ |
 406                           SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 407                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 408                 .name = "ELD",
 409                 .info = hdmi_eld_ctl_info,
 410                 .get = hdmi_eld_ctl_get,
 411         },
 412 };
 413
 414 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
 415                                  struct snd_soc_dai *dai)
 416 {
 417         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 418         int ret = 0;
 419
 420         mutex_lock(&hcp->current_stream_lock);
 421         if (!hcp->current_stream) {
 422                 hcp->current_stream = substream;
 423         } else if (hcp->current_stream != substream) {
 424                 dev_err(dai->dev, "Only one simultaneous stream supported!\n");
 425                 ret = -EINVAL;
 426         }
 427         mutex_unlock(&hcp->current_stream_lock);
 428
 429         return ret;
 430 }
 431
 432 static int hdmi_codec_startup(struct snd_pcm_substream *substream,
 433                               struct snd_soc_dai *dai)
 434 {
 435         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 436         int ret = 0;
 437
 438         dev_dbg(dai->dev, "%s()\n", __func__);
 439
 440         ret = hdmi_codec_new_stream(substream, dai);
 441         if (ret)
 442                 return ret;
 443
 444         if (hcp->hcd.ops->audio_startup) {
 445                 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data);
 446                 if (ret) {
 447                         mutex_lock(&hcp->current_stream_lock);
 448                         hcp->current_stream = NULL;
 449                         mutex_unlock(&hcp->current_stream_lock);
 450                         return ret;
 451                 }
 452         }
 453
 454         if (hcp->hcd.ops->get_eld) {
 455                 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data,
 456                                             hcp->eld, sizeof(hcp->eld));
 457
 458                 if (!ret) {
 459                         ret = snd_pcm_hw_constraint_eld(substream->runtime,
 460                                                         hcp->eld);
 461                         if (ret)
 462                                 return ret;
 463                 }
 464                 /* Select chmap supported */
 465                 hdmi_codec_eld_chmap(hcp);
 466         }
 467         return 0;
 468 }
 469
 470 static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
 471                                 struct snd_soc_dai *dai)
 472 {
 473         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 474
 475         dev_dbg(dai->dev, "%s()\n", __func__);
 476
 477         WARN_ON(hcp->current_stream != substream);
 478
 479         hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
 480         hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data);
 481
 482         mutex_lock(&hcp->current_stream_lock);
 483         hcp->current_stream = NULL;
 484         mutex_unlock(&hcp->current_stream_lock);
 485 }
 486
 487 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
 488                                 struct snd_pcm_hw_params *params,
 489                                 struct snd_soc_dai *dai)
 490 {
 491         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 492         struct hdmi_codec_params hp = {
 493                 .iec = {
 494                         .status = { 0 },
 495                         .subcode = { 0 },
 496                         .pad = 0,
 497                         .dig_subframe = { 0 },
 498                 }
 499         };
 500         int ret, idx;
 501
 502         dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
 503                 params_width(params), params_rate(params),
 504                 params_channels(params));
 505
 506         if (params_width(params) > 24)
 507                 params->msbits = 24;
 508
 509         ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status,
 510                                                        sizeof(hp.iec.status));
 511         if (ret < 0) {
 512                 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
 513                         ret);
 514                 return ret;
 515         }
 516
 517         ret = hdmi_codec_new_stream(substream, dai);
 518         if (ret)
 519                 return ret;
 520
 521         hdmi_audio_infoframe_init(&hp.cea);
 522         hp.cea.channels = params_channels(params);
 523         hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
 524         hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
 525         hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
 526
 527         /* Select a channel allocation that matches with ELD and pcm channels */
 528         idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels);
 529         if (idx < 0) {
 530                 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n",
 531                         idx);
 532                 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
 533                 return idx;
 534         }
 535         hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id;
 536         hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id;
 537
 538         hp.sample_width = params_width(params);
 539         hp.sample_rate = params_rate(params);
 540         hp.channels = params_channels(params);
 541
 542         return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data,
 543                                        &hcp->daifmt[dai->id], &hp);
 544 }
 545
 546 static int hdmi_codec_set_fmt(struct snd_soc_dai *dai,
 547                               unsigned int fmt)
 548 {
 549         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 550         struct hdmi_codec_daifmt cf = { 0 };
 551         int ret = 0;
 552
 553         dev_dbg(dai->dev, "%s()\n", __func__);
 554
 555         if (dai->id == DAI_ID_SPDIF) {
 556                 cf.fmt = HDMI_SPDIF;
 557         } else {
 558                 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 559                 case SND_SOC_DAIFMT_CBM_CFM:
 560                         cf.bit_clk_master = 1;
 561                         cf.frame_clk_master = 1;
 562                         break;
 563                 case SND_SOC_DAIFMT_CBS_CFM:
 564                         cf.frame_clk_master = 1;
 565                         break;
 566                 case SND_SOC_DAIFMT_CBM_CFS:
 567                         cf.bit_clk_master = 1;
 568                         break;
 569                 case SND_SOC_DAIFMT_CBS_CFS:
 570                         break;
 571                 default:
 572                         return -EINVAL;
 573                 }
 574
 575                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 576                 case SND_SOC_DAIFMT_NB_NF:
 577                         break;
 578                 case SND_SOC_DAIFMT_NB_IF:
 579                         cf.frame_clk_inv = 1;
 580                         break;
 581                 case SND_SOC_DAIFMT_IB_NF:
 582                         cf.bit_clk_inv = 1;
 583                         break;
 584                 case SND_SOC_DAIFMT_IB_IF:
 585                         cf.frame_clk_inv = 1;
 586                         cf.bit_clk_inv = 1;
 587                         break;
 588                 }
 589
 590                 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 591                 case SND_SOC_DAIFMT_I2S:
 592                         cf.fmt = HDMI_I2S;
 593                         break;
 594                 case SND_SOC_DAIFMT_DSP_A:
 595                         cf.fmt = HDMI_DSP_A;
 596                         break;
 597                 case SND_SOC_DAIFMT_DSP_B:
 598                         cf.fmt = HDMI_DSP_B;
 599                         break;
 600                 case SND_SOC_DAIFMT_RIGHT_J:
 601                         cf.fmt = HDMI_RIGHT_J;
 602                         break;
 603                 case SND_SOC_DAIFMT_LEFT_J:
 604                         cf.fmt = HDMI_LEFT_J;
 605                         break;
 606                 case SND_SOC_DAIFMT_AC97:
 607                         cf.fmt = HDMI_AC97;
 608                         break;
 609                 default:
 610                         dev_err(dai->dev, "Invalid DAI interface format\n");
 611                         return -EINVAL;
 612                 }
 613         }
 614
 615         hcp->daifmt[dai->id] = cf;
 616
 617         return ret;
 618 }
 619
 620 static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute)
 621 {
 622         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 623
 624         dev_dbg(dai->dev, "%s()\n", __func__);
 625
 626         if (hcp->hcd.ops->digital_mute)
 627                 return hcp->hcd.ops->digital_mute(dai->dev->parent,
 628                                                   hcp->hcd.data, mute);
 629
 630         return 0;
 631 }
 632
 633 static const struct snd_soc_dai_ops hdmi_dai_ops = {
 634         .startup        = hdmi_codec_startup,
 635         .shutdown       = hdmi_codec_shutdown,
 636         .hw_params      = hdmi_codec_hw_params,
 637         .set_fmt        = hdmi_codec_set_fmt,
 638         .digital_mute   = hdmi_codec_digital_mute,
 639 };
 640
 641
 642 #define HDMI_RATES      (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
 643                          SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
 644                          SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
 645                          SNDRV_PCM_RATE_192000)
 646
 647 #define SPDIF_FORMATS   (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
 648                          SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
 649                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
 650                          SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
 651
 652 /*
 653  * This list is only for formats allowed on the I2S bus. So there is
 654  * some formats listed that are not supported by HDMI interface. For
 655  * instance allowing the 32-bit formats enables 24-precision with CPU
 656  * DAIs that do not support 24-bit formats. If the extra formats cause
 657  * problems, we should add the video side driver an option to disable
 658  * them.
 659  */
 660 #define I2S_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
 661                          SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
 662                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
 663                          SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\
 664                          SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
 665
 666 static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
 667                               struct snd_soc_dai *dai)
 668 {
 669         struct snd_soc_dai_driver *drv = dai->driver;
 670         struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
 671         int ret;
 672
 673         dev_dbg(dai->dev, "%s()\n", __func__);
 674
 675         ret =  snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
 676                                       NULL, drv->playback.channels_max, 0,
 677                                       &hcp->chmap_info);
 678         if (ret < 0)
 679                 return ret;
 680
 681         /* override handlers */
 682         hcp->chmap_info->private_data = hcp;
 683         hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get;
 684
 685         /* default chmap supported is stereo */
 686         hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
 687         hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
 688
 689         return 0;
 690 }
 691
 692 static struct snd_soc_dai_driver hdmi_i2s_dai = {
 693         .name = "i2s-hifi",
 694         .id = DAI_ID_I2S,
 695         .playback = {
 696                 .stream_name = "Playback",
 697                 .channels_min = 2,
 698                 .channels_max = 8,
 699                 .rates = HDMI_RATES,
 700                 .formats = I2S_FORMATS,
 701                 .sig_bits = 24,
 702         },
 703         .ops = &hdmi_dai_ops,
 704         .pcm_new = hdmi_codec_pcm_new,
 705 };
 706
 707 static const struct snd_soc_dai_driver hdmi_spdif_dai = {
 708         .name = "spdif-hifi",
 709         .id = DAI_ID_SPDIF,
 710         .playback = {
 711                 .stream_name = "Playback",
 712                 .channels_min = 2,
 713                 .channels_max = 2,
 714                 .rates = HDMI_RATES,
 715                 .formats = SPDIF_FORMATS,
 716         },
 717         .ops = &hdmi_dai_ops,
 718         .pcm_new = hdmi_codec_pcm_new,
 719 };
 720
 721 static int hdmi_of_xlate_dai_id(struct snd_soc_component *component,
 722                                  struct device_node *endpoint)
 723 {
 724         struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
 725         int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */
 726
 727         if (hcp->hcd.ops->get_dai_id)
 728                 ret = hcp->hcd.ops->get_dai_id(component, endpoint);
 729
 730         return ret;
 731 }
 732
 733 static struct snd_soc_codec_driver hdmi_codec = {
 734         .component_driver = {
 735                 .controls               = hdmi_controls,
 736                 .num_controls           = ARRAY_SIZE(hdmi_controls),
 737                 .dapm_widgets           = hdmi_widgets,
 738                 .num_dapm_widgets       = ARRAY_SIZE(hdmi_widgets),
 739                 .dapm_routes            = hdmi_routes,
 740                 .num_dapm_routes        = ARRAY_SIZE(hdmi_routes),
 741                 .of_xlate_dai_id        = hdmi_of_xlate_dai_id,
 742         },
 743 };
 744
 745 static int hdmi_codec_probe(struct platform_device *pdev)
 746 {
 747         struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
 748         struct device *dev = &pdev->dev;
 749         struct hdmi_codec_priv *hcp;
 750         int dai_count, i = 0;
 751         int ret;
 752
 753         dev_dbg(dev, "%s()\n", __func__);
 754
 755         if (!hcd) {
 756                 dev_err(dev, "%s: No plalform data\n", __func__);
 757                 return -EINVAL;
 758         }
 759
 760         dai_count = hcd->i2s + hcd->spdif;
 761         if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params ||
 762             !hcd->ops->audio_shutdown) {
 763                 dev_err(dev, "%s: Invalid parameters\n", __func__);
 764                 return -EINVAL;
 765         }
 766
 767         hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
 768         if (!hcp)
 769                 return -ENOMEM;
 770
 771         hcp->hcd = *hcd;
 772         mutex_init(&hcp->current_stream_lock);
 773
 774         hcp->daidrv = devm_kzalloc(dev, dai_count * sizeof(*hcp->daidrv),
 775                                    GFP_KERNEL);
 776         if (!hcp->daidrv)
 777                 return -ENOMEM;
 778
 779         if (hcd->i2s) {
 780                 hcp->daidrv[i] = hdmi_i2s_dai;
 781                 hcp->daidrv[i].playback.channels_max =
 782                         hcd->max_i2s_channels;
 783                 i++;
 784         }
 785
 786         if (hcd->spdif)
 787                 hcp->daidrv[i] = hdmi_spdif_dai;
 788
 789         ret = snd_soc_register_codec(dev, &hdmi_codec, hcp->daidrv,
 790                                      dai_count);
 791         if (ret) {
 792                 dev_err(dev, "%s: snd_soc_register_codec() failed (%d)\n",
 793                         __func__, ret);
 794                 return ret;
 795         }
 796
 797         dev_set_drvdata(dev, hcp);
 798         return 0;
 799 }
 800
 801 static int hdmi_codec_remove(struct platform_device *pdev)
 802 {
 803         struct device *dev = &pdev->dev;
 804         struct hdmi_codec_priv *hcp;
 805
 806         hcp = dev_get_drvdata(dev);
 807         kfree(hcp->chmap_info);
 808         snd_soc_unregister_codec(dev);
 809
 810         return 0;
 811 }
 812
 813 static struct platform_driver hdmi_codec_driver = {
 814         .driver = {
 815                 .name = HDMI_CODEC_DRV_NAME,
 816         },
 817         .probe = hdmi_codec_probe,
 818         .remove = hdmi_codec_remove,
 819 };
 820
 821 module_platform_driver(hdmi_codec_driver);
 822
 823 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
 824 MODULE_DESCRIPTION("HDMI Audio Codec Driver");
 825 MODULE_LICENSE("GPL");
 826 MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);