2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * You should have received a copy of the GNU General Public License along
9 * with this program; if not, write to the Free Software Foundation, Inc.,
10 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
19 #include <linux/delay.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/initval.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/soc.h>
28 #define JZ4740_REG_CODEC_1 0x0
29 #define JZ4740_REG_CODEC_2 0x1
31 #define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
32 #define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
33 #define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
34 #define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
35 #define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
36 #define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
37 #define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
38 #define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
39 #define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
40 #define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
41 #define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
42 #define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
43 #define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
44 #define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
45 #define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
46 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
47 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
48 #define JZ4740_CODEC_1_SUSPEND BIT(1)
49 #define JZ4740_CODEC_1_RESET BIT(0)
51 #define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
52 #define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
53 #define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
54 #define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
55 #define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
56 #define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
57 #define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
58 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
60 #define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000
61 #define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00
62 #define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030
63 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003
65 #define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16
66 #define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8
67 #define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
68 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
70 static const uint32_t jz4740_codec_regs
[] = {
71 0x021b2302, 0x00170803,
79 static unsigned int jz4740_codec_read(struct snd_soc_codec
*codec
,
82 struct jz4740_codec
*jz4740_codec
= snd_soc_codec_get_drvdata(codec
);
83 return readl(jz4740_codec
->base
+ (reg
<< 2));
86 static int jz4740_codec_write(struct snd_soc_codec
*codec
, unsigned int reg
,
89 struct jz4740_codec
*jz4740_codec
= snd_soc_codec_get_drvdata(codec
);
90 u32
*cache
= codec
->reg_cache
;
93 writel(val
, jz4740_codec
->base
+ (reg
<< 2));
98 static const struct snd_kcontrol_new jz4740_codec_controls
[] = {
99 SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2
,
100 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET
, 3, 0),
101 SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2
,
102 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET
, 31, 0),
103 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1
,
104 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET
, 1, 1),
105 SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2
,
106 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET
, 3, 0),
109 static const struct snd_kcontrol_new jz4740_codec_output_controls
[] = {
110 SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1
,
111 JZ4740_CODEC_1_SW1_ENABLE_OFFSET
, 1, 0),
112 SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1
,
113 JZ4740_CODEC_1_SW2_ENABLE_OFFSET
, 1, 0),
116 static const struct snd_kcontrol_new jz4740_codec_input_controls
[] = {
117 SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1
,
118 JZ4740_CODEC_1_LINE_ENABLE_OFFSET
, 1, 0),
119 SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1
,
120 JZ4740_CODEC_1_MIC_ENABLE_OFFSET
, 1, 0),
123 static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets
[] = {
124 SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1
,
125 JZ4740_CODEC_1_ADC_ENABLE_OFFSET
, 0),
126 SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1
,
127 JZ4740_CODEC_1_DAC_ENABLE_OFFSET
, 0),
129 SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1
,
130 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET
, 1,
131 jz4740_codec_output_controls
,
132 ARRAY_SIZE(jz4740_codec_output_controls
)),
134 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM
, 0, 0,
135 jz4740_codec_input_controls
,
136 ARRAY_SIZE(jz4740_codec_input_controls
)),
137 SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM
, 0, 0, NULL
, 0),
139 SND_SOC_DAPM_OUTPUT("LOUT"),
140 SND_SOC_DAPM_OUTPUT("ROUT"),
142 SND_SOC_DAPM_INPUT("MIC"),
143 SND_SOC_DAPM_INPUT("LIN"),
144 SND_SOC_DAPM_INPUT("RIN"),
147 static const struct snd_soc_dapm_route jz4740_codec_dapm_routes
[] = {
148 {"Line Input", NULL
, "LIN"},
149 {"Line Input", NULL
, "RIN"},
151 {"Input Mixer", "Line Capture Switch", "Line Input"},
152 {"Input Mixer", "Mic Capture Switch", "MIC"},
154 {"ADC", NULL
, "Input Mixer"},
156 {"Output Mixer", "Bypass Switch", "Input Mixer"},
157 {"Output Mixer", "DAC Switch", "DAC"},
159 {"LOUT", NULL
, "Output Mixer"},
160 {"ROUT", NULL
, "Output Mixer"},
163 static int jz4740_codec_hw_params(struct snd_pcm_substream
*substream
,
164 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
167 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
168 struct snd_soc_codec
*codec
=rtd
->codec
;
170 switch (params_rate(params
)) {
202 val
<<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET
;
204 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_2
,
205 JZ4740_CODEC_2_SAMPLE_RATE_MASK
, val
);
210 static struct snd_soc_dai_ops jz4740_codec_dai_ops
= {
211 .hw_params
= jz4740_codec_hw_params
,
214 static struct snd_soc_dai_driver jz4740_codec_dai
= {
215 .name
= "jz4740-hifi",
217 .stream_name
= "Playback",
220 .rates
= SNDRV_PCM_RATE_8000_48000
,
221 .formats
= SNDRV_PCM_FMTBIT_S16_LE
| SNDRV_PCM_FMTBIT_S8
,
224 .stream_name
= "Capture",
227 .rates
= SNDRV_PCM_RATE_8000_48000
,
228 .formats
= SNDRV_PCM_FMTBIT_S16_LE
| SNDRV_PCM_FMTBIT_S8
,
230 .ops
= &jz4740_codec_dai_ops
,
231 .symmetric_rates
= 1,
234 static void jz4740_codec_wakeup(struct snd_soc_codec
*codec
)
237 uint32_t *cache
= codec
->reg_cache
;
239 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
,
240 JZ4740_CODEC_1_RESET
, JZ4740_CODEC_1_RESET
);
243 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
,
244 JZ4740_CODEC_1_SUSPEND
| JZ4740_CODEC_1_RESET
, 0);
246 for (i
= 0; i
< ARRAY_SIZE(jz4740_codec_regs
); ++i
)
247 jz4740_codec_write(codec
, i
, cache
[i
]);
250 static int jz4740_codec_set_bias_level(struct snd_soc_codec
*codec
,
251 enum snd_soc_bias_level level
)
257 case SND_SOC_BIAS_ON
:
259 case SND_SOC_BIAS_PREPARE
:
260 mask
= JZ4740_CODEC_1_VREF_DISABLE
|
261 JZ4740_CODEC_1_VREF_AMP_DISABLE
|
262 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M
;
265 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
, mask
, value
);
267 case SND_SOC_BIAS_STANDBY
:
268 /* The only way to clear the suspend flag is to reset the codec */
269 if (codec
->bias_level
== SND_SOC_BIAS_OFF
)
270 jz4740_codec_wakeup(codec
);
272 mask
= JZ4740_CODEC_1_VREF_DISABLE
|
273 JZ4740_CODEC_1_VREF_AMP_DISABLE
|
274 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M
;
275 value
= JZ4740_CODEC_1_VREF_DISABLE
|
276 JZ4740_CODEC_1_VREF_AMP_DISABLE
|
277 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M
;
279 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
, mask
, value
);
281 case SND_SOC_BIAS_OFF
:
282 mask
= JZ4740_CODEC_1_SUSPEND
;
283 value
= JZ4740_CODEC_1_SUSPEND
;
285 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
, mask
, value
);
291 codec
->bias_level
= level
;
296 static int jz4740_codec_dev_probe(struct snd_soc_codec
*codec
)
298 snd_soc_update_bits(codec
, JZ4740_REG_CODEC_1
,
299 JZ4740_CODEC_1_SW2_ENABLE
, JZ4740_CODEC_1_SW2_ENABLE
);
301 snd_soc_add_controls(codec
, jz4740_codec_controls
,
302 ARRAY_SIZE(jz4740_codec_controls
));
304 snd_soc_dapm_new_controls(codec
, jz4740_codec_dapm_widgets
,
305 ARRAY_SIZE(jz4740_codec_dapm_widgets
));
307 snd_soc_dapm_add_routes(codec
, jz4740_codec_dapm_routes
,
308 ARRAY_SIZE(jz4740_codec_dapm_routes
));
310 snd_soc_dapm_new_widgets(codec
);
312 jz4740_codec_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
317 static int jz4740_codec_dev_remove(struct snd_soc_codec
*codec
)
319 jz4740_codec_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
324 #ifdef CONFIG_PM_SLEEP
326 static int jz4740_codec_suspend(struct snd_soc_codec
*codec
, pm_message_t state
)
328 return jz4740_codec_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
331 static int jz4740_codec_resume(struct snd_soc_codec
*codec
)
333 return jz4740_codec_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
337 #define jz4740_codec_suspend NULL
338 #define jz4740_codec_resume NULL
341 static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec
= {
342 .probe
= jz4740_codec_dev_probe
,
343 .remove
= jz4740_codec_dev_remove
,
344 .suspend
= jz4740_codec_suspend
,
345 .resume
= jz4740_codec_resume
,
346 .read
= jz4740_codec_read
,
347 .write
= jz4740_codec_write
,
348 .set_bias_level
= jz4740_codec_set_bias_level
,
349 .reg_cache_default
= jz4740_codec_regs
,
350 .reg_word_size
= sizeof(u32
),
354 static int __devinit
jz4740_codec_probe(struct platform_device
*pdev
)
357 struct jz4740_codec
*jz4740_codec
;
358 struct resource
*mem
;
360 jz4740_codec
= kzalloc(sizeof(*jz4740_codec
), GFP_KERNEL
);
364 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
366 dev_err(&pdev
->dev
, "Failed to get mmio memory resource\n");
371 mem
= request_mem_region(mem
->start
, resource_size(mem
), pdev
->name
);
373 dev_err(&pdev
->dev
, "Failed to request mmio memory region\n");
378 jz4740_codec
->base
= ioremap(mem
->start
, resource_size(mem
));
379 if (!jz4740_codec
->base
) {
380 dev_err(&pdev
->dev
, "Failed to ioremap mmio memory\n");
382 goto err_release_mem_region
;
384 jz4740_codec
->mem
= mem
;
386 platform_set_drvdata(pdev
, jz4740_codec
);
388 ret
= snd_soc_register_codec(&pdev
->dev
,
389 &soc_codec_dev_jz4740_codec
, &jz4740_codec_dai
, 1);
391 dev_err(&pdev
->dev
, "Failed to register codec\n");
398 iounmap(jz4740_codec
->base
);
399 err_release_mem_region
:
400 release_mem_region(mem
->start
, resource_size(mem
));
407 static int __devexit
jz4740_codec_remove(struct platform_device
*pdev
)
409 struct jz4740_codec
*jz4740_codec
= platform_get_drvdata(pdev
);
410 struct resource
*mem
= jz4740_codec
->mem
;
412 snd_soc_unregister_codec(&pdev
->dev
);
414 iounmap(jz4740_codec
->base
);
415 release_mem_region(mem
->start
, resource_size(mem
));
417 platform_set_drvdata(pdev
, NULL
);
423 static struct platform_driver jz4740_codec_driver
= {
424 .probe
= jz4740_codec_probe
,
425 .remove
= __devexit_p(jz4740_codec_remove
),
427 .name
= "jz4740-codec",
428 .owner
= THIS_MODULE
,
432 static int __init
jz4740_codec_init(void)
434 return platform_driver_register(&jz4740_codec_driver
);
436 module_init(jz4740_codec_init
);
438 static void __exit
jz4740_codec_exit(void)
440 platform_driver_unregister(&jz4740_codec_driver
);
442 module_exit(jz4740_codec_exit
);
444 MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
445 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
446 MODULE_LICENSE("GPL v2");
447 MODULE_ALIAS("platform:jz4740-codec");