sound/soc/codecs/rt5645.c

   1 /*
   2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/gpio.h>
  21 #include <linux/gpio/consumer.h>
  22 #include <linux/acpi.h>
  23 #include <linux/dmi.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/pcm_params.h>
  28 #include <sound/jack.h>
  29 #include <sound/soc.h>
  30 #include <sound/soc-dapm.h>
  31 #include <sound/initval.h>
  32 #include <sound/tlv.h>
  33
  34 #include "rl6231.h"
  35 #include "rt5645.h"
  36
  37 #define QUIRK_INV_JD1_1(q)      ((q) & 1)
  38 #define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  39 #define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  40 #define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  41 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  42 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  43
  44 static unsigned int quirk = -1;
  45 module_param(quirk, uint, 0444);
  46 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  47
  48 #define RT5645_DEVICE_ID 0x6308
  49 #define RT5650_DEVICE_ID 0x6419
  50
  51 #define RT5645_PR_RANGE_BASE (0xff + 1)
  52 #define RT5645_PR_SPACING 0x100
  53
  54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  55
  56 #define RT5645_HWEQ_NUM 57
  57
  58 static const struct regmap_range_cfg rt5645_ranges[] = {
  59         {
  60                 .name = "PR",
  61                 .range_min = RT5645_PR_BASE,
  62                 .range_max = RT5645_PR_BASE + 0xf8,
  63                 .selector_reg = RT5645_PRIV_INDEX,
  64                 .selector_mask = 0xff,
  65                 .selector_shift = 0x0,
  66                 .window_start = RT5645_PRIV_DATA,
  67                 .window_len = 0x1,
  68         },
  69 };
  70
  71 static const struct reg_sequence init_list[] = {
  72         {RT5645_PR_BASE + 0x3d, 0x3600},
  73         {RT5645_PR_BASE + 0x1c, 0xfd70},
  74         {RT5645_PR_BASE + 0x20, 0x611f},
  75         {RT5645_PR_BASE + 0x21, 0x4040},
  76         {RT5645_PR_BASE + 0x23, 0x0004},
  77         {RT5645_ASRC_4, 0x0120},
  78 };
  79
  80 static const struct reg_sequence rt5650_init_list[] = {
  81         {0xf6,  0x0100},
  82 };
  83
  84 static const struct reg_default rt5645_reg[] = {
  85         { 0x00, 0x0000 },
  86         { 0x01, 0xc8c8 },
  87         { 0x02, 0xc8c8 },
  88         { 0x03, 0xc8c8 },
  89         { 0x0a, 0x0002 },
  90         { 0x0b, 0x2827 },
  91         { 0x0c, 0xe000 },
  92         { 0x0d, 0x0000 },
  93         { 0x0e, 0x0000 },
  94         { 0x0f, 0x0808 },
  95         { 0x14, 0x3333 },
  96         { 0x16, 0x4b00 },
  97         { 0x18, 0x018b },
  98         { 0x19, 0xafaf },
  99         { 0x1a, 0xafaf },
 100         { 0x1b, 0x0001 },
 101         { 0x1c, 0x2f2f },
 102         { 0x1d, 0x2f2f },
 103         { 0x1e, 0x0000 },
 104         { 0x20, 0x0000 },
 105         { 0x27, 0x7060 },
 106         { 0x28, 0x7070 },
 107         { 0x29, 0x8080 },
 108         { 0x2a, 0x5656 },
 109         { 0x2b, 0x5454 },
 110         { 0x2c, 0xaaa0 },
 111         { 0x2d, 0x0000 },
 112         { 0x2f, 0x1002 },
 113         { 0x31, 0x5000 },
 114         { 0x32, 0x0000 },
 115         { 0x33, 0x0000 },
 116         { 0x34, 0x0000 },
 117         { 0x35, 0x0000 },
 118         { 0x3b, 0x0000 },
 119         { 0x3c, 0x007f },
 120         { 0x3d, 0x0000 },
 121         { 0x3e, 0x007f },
 122         { 0x3f, 0x0000 },
 123         { 0x40, 0x001f },
 124         { 0x41, 0x0000 },
 125         { 0x42, 0x001f },
 126         { 0x45, 0x6000 },
 127         { 0x46, 0x003e },
 128         { 0x47, 0x003e },
 129         { 0x48, 0xf807 },
 130         { 0x4a, 0x0004 },
 131         { 0x4d, 0x0000 },
 132         { 0x4e, 0x0000 },
 133         { 0x4f, 0x01ff },
 134         { 0x50, 0x0000 },
 135         { 0x51, 0x0000 },
 136         { 0x52, 0x01ff },
 137         { 0x53, 0xf000 },
 138         { 0x56, 0x0111 },
 139         { 0x57, 0x0064 },
 140         { 0x58, 0xef0e },
 141         { 0x59, 0xf0f0 },
 142         { 0x5a, 0xef0e },
 143         { 0x5b, 0xf0f0 },
 144         { 0x5c, 0xef0e },
 145         { 0x5d, 0xf0f0 },
 146         { 0x5e, 0xf000 },
 147         { 0x5f, 0x0000 },
 148         { 0x61, 0x0300 },
 149         { 0x62, 0x0000 },
 150         { 0x63, 0x00c2 },
 151         { 0x64, 0x0000 },
 152         { 0x65, 0x0000 },
 153         { 0x66, 0x0000 },
 154         { 0x6a, 0x0000 },
 155         { 0x6c, 0x0aaa },
 156         { 0x70, 0x8000 },
 157         { 0x71, 0x8000 },
 158         { 0x72, 0x8000 },
 159         { 0x73, 0x7770 },
 160         { 0x74, 0x3e00 },
 161         { 0x75, 0x2409 },
 162         { 0x76, 0x000a },
 163         { 0x77, 0x0c00 },
 164         { 0x78, 0x0000 },
 165         { 0x79, 0x0123 },
 166         { 0x80, 0x0000 },
 167         { 0x81, 0x0000 },
 168         { 0x82, 0x0000 },
 169         { 0x83, 0x0000 },
 170         { 0x84, 0x0000 },
 171         { 0x85, 0x0000 },
 172         { 0x8a, 0x0120 },
 173         { 0x8e, 0x0004 },
 174         { 0x8f, 0x1100 },
 175         { 0x90, 0x0646 },
 176         { 0x91, 0x0c06 },
 177         { 0x93, 0x0000 },
 178         { 0x94, 0x0200 },
 179         { 0x95, 0x0000 },
 180         { 0x9a, 0x2184 },
 181         { 0x9b, 0x010a },
 182         { 0x9c, 0x0aea },
 183         { 0x9d, 0x000c },
 184         { 0x9e, 0x0400 },
 185         { 0xa0, 0xa0a8 },
 186         { 0xa1, 0x0059 },
 187         { 0xa2, 0x0001 },
 188         { 0xae, 0x6000 },
 189         { 0xaf, 0x0000 },
 190         { 0xb0, 0x6000 },
 191         { 0xb1, 0x0000 },
 192         { 0xb2, 0x0000 },
 193         { 0xb3, 0x001f },
 194         { 0xb4, 0x020c },
 195         { 0xb5, 0x1f00 },
 196         { 0xb6, 0x0000 },
 197         { 0xbb, 0x0000 },
 198         { 0xbc, 0x0000 },
 199         { 0xbd, 0x0000 },
 200         { 0xbe, 0x0000 },
 201         { 0xbf, 0x3100 },
 202         { 0xc0, 0x0000 },
 203         { 0xc1, 0x0000 },
 204         { 0xc2, 0x0000 },
 205         { 0xc3, 0x2000 },
 206         { 0xcd, 0x0000 },
 207         { 0xce, 0x0000 },
 208         { 0xcf, 0x1813 },
 209         { 0xd0, 0x0690 },
 210         { 0xd1, 0x1c17 },
 211         { 0xd3, 0xb320 },
 212         { 0xd4, 0x0000 },
 213         { 0xd6, 0x0400 },
 214         { 0xd9, 0x0809 },
 215         { 0xda, 0x0000 },
 216         { 0xdb, 0x0003 },
 217         { 0xdc, 0x0049 },
 218         { 0xdd, 0x001b },
 219         { 0xdf, 0x0008 },
 220         { 0xe0, 0x4000 },
 221         { 0xe6, 0x8000 },
 222         { 0xe7, 0x0200 },
 223         { 0xec, 0xb300 },
 224         { 0xed, 0x0000 },
 225         { 0xf0, 0x001f },
 226         { 0xf1, 0x020c },
 227         { 0xf2, 0x1f00 },
 228         { 0xf3, 0x0000 },
 229         { 0xf4, 0x4000 },
 230         { 0xf8, 0x0000 },
 231         { 0xf9, 0x0000 },
 232         { 0xfa, 0x2060 },
 233         { 0xfb, 0x4040 },
 234         { 0xfc, 0x0000 },
 235         { 0xfd, 0x0002 },
 236         { 0xfe, 0x10ec },
 237         { 0xff, 0x6308 },
 238 };
 239
 240 static const struct reg_default rt5650_reg[] = {
 241         { 0x00, 0x0000 },
 242         { 0x01, 0xc8c8 },
 243         { 0x02, 0xc8c8 },
 244         { 0x03, 0xc8c8 },
 245         { 0x0a, 0x0002 },
 246         { 0x0b, 0x2827 },
 247         { 0x0c, 0xe000 },
 248         { 0x0d, 0x0000 },
 249         { 0x0e, 0x0000 },
 250         { 0x0f, 0x0808 },
 251         { 0x14, 0x3333 },
 252         { 0x16, 0x4b00 },
 253         { 0x18, 0x018b },
 254         { 0x19, 0xafaf },
 255         { 0x1a, 0xafaf },
 256         { 0x1b, 0x0001 },
 257         { 0x1c, 0x2f2f },
 258         { 0x1d, 0x2f2f },
 259         { 0x1e, 0x0000 },
 260         { 0x20, 0x0000 },
 261         { 0x27, 0x7060 },
 262         { 0x28, 0x7070 },
 263         { 0x29, 0x8080 },
 264         { 0x2a, 0x5656 },
 265         { 0x2b, 0x5454 },
 266         { 0x2c, 0xaaa0 },
 267         { 0x2d, 0x0000 },
 268         { 0x2f, 0x5002 },
 269         { 0x31, 0x5000 },
 270         { 0x32, 0x0000 },
 271         { 0x33, 0x0000 },
 272         { 0x34, 0x0000 },
 273         { 0x35, 0x0000 },
 274         { 0x3b, 0x0000 },
 275         { 0x3c, 0x007f },
 276         { 0x3d, 0x0000 },
 277         { 0x3e, 0x007f },
 278         { 0x3f, 0x0000 },
 279         { 0x40, 0x001f },
 280         { 0x41, 0x0000 },
 281         { 0x42, 0x001f },
 282         { 0x45, 0x6000 },
 283         { 0x46, 0x003e },
 284         { 0x47, 0x003e },
 285         { 0x48, 0xf807 },
 286         { 0x4a, 0x0004 },
 287         { 0x4d, 0x0000 },
 288         { 0x4e, 0x0000 },
 289         { 0x4f, 0x01ff },
 290         { 0x50, 0x0000 },
 291         { 0x51, 0x0000 },
 292         { 0x52, 0x01ff },
 293         { 0x53, 0xf000 },
 294         { 0x56, 0x0111 },
 295         { 0x57, 0x0064 },
 296         { 0x58, 0xef0e },
 297         { 0x59, 0xf0f0 },
 298         { 0x5a, 0xef0e },
 299         { 0x5b, 0xf0f0 },
 300         { 0x5c, 0xef0e },
 301         { 0x5d, 0xf0f0 },
 302         { 0x5e, 0xf000 },
 303         { 0x5f, 0x0000 },
 304         { 0x61, 0x0300 },
 305         { 0x62, 0x0000 },
 306         { 0x63, 0x00c2 },
 307         { 0x64, 0x0000 },
 308         { 0x65, 0x0000 },
 309         { 0x66, 0x0000 },
 310         { 0x6a, 0x0000 },
 311         { 0x6c, 0x0aaa },
 312         { 0x70, 0x8000 },
 313         { 0x71, 0x8000 },
 314         { 0x72, 0x8000 },
 315         { 0x73, 0x7770 },
 316         { 0x74, 0x3e00 },
 317         { 0x75, 0x2409 },
 318         { 0x76, 0x000a },
 319         { 0x77, 0x0c00 },
 320         { 0x78, 0x0000 },
 321         { 0x79, 0x0123 },
 322         { 0x7a, 0x0123 },
 323         { 0x80, 0x0000 },
 324         { 0x81, 0x0000 },
 325         { 0x82, 0x0000 },
 326         { 0x83, 0x0000 },
 327         { 0x84, 0x0000 },
 328         { 0x85, 0x0000 },
 329         { 0x8a, 0x0120 },
 330         { 0x8e, 0x0004 },
 331         { 0x8f, 0x1100 },
 332         { 0x90, 0x0646 },
 333         { 0x91, 0x0c06 },
 334         { 0x93, 0x0000 },
 335         { 0x94, 0x0200 },
 336         { 0x95, 0x0000 },
 337         { 0x9a, 0x2184 },
 338         { 0x9b, 0x010a },
 339         { 0x9c, 0x0aea },
 340         { 0x9d, 0x000c },
 341         { 0x9e, 0x0400 },
 342         { 0xa0, 0xa0a8 },
 343         { 0xa1, 0x0059 },
 344         { 0xa2, 0x0001 },
 345         { 0xae, 0x6000 },
 346         { 0xaf, 0x0000 },
 347         { 0xb0, 0x6000 },
 348         { 0xb1, 0x0000 },
 349         { 0xb2, 0x0000 },
 350         { 0xb3, 0x001f },
 351         { 0xb4, 0x020c },
 352         { 0xb5, 0x1f00 },
 353         { 0xb6, 0x0000 },
 354         { 0xbb, 0x0000 },
 355         { 0xbc, 0x0000 },
 356         { 0xbd, 0x0000 },
 357         { 0xbe, 0x0000 },
 358         { 0xbf, 0x3100 },
 359         { 0xc0, 0x0000 },
 360         { 0xc1, 0x0000 },
 361         { 0xc2, 0x0000 },
 362         { 0xc3, 0x2000 },
 363         { 0xcd, 0x0000 },
 364         { 0xce, 0x0000 },
 365         { 0xcf, 0x1813 },
 366         { 0xd0, 0x0690 },
 367         { 0xd1, 0x1c17 },
 368         { 0xd3, 0xb320 },
 369         { 0xd4, 0x0000 },
 370         { 0xd6, 0x0400 },
 371         { 0xd9, 0x0809 },
 372         { 0xda, 0x0000 },
 373         { 0xdb, 0x0003 },
 374         { 0xdc, 0x0049 },
 375         { 0xdd, 0x001b },
 376         { 0xdf, 0x0008 },
 377         { 0xe0, 0x4000 },
 378         { 0xe6, 0x8000 },
 379         { 0xe7, 0x0200 },
 380         { 0xec, 0xb300 },
 381         { 0xed, 0x0000 },
 382         { 0xf0, 0x001f },
 383         { 0xf1, 0x020c },
 384         { 0xf2, 0x1f00 },
 385         { 0xf3, 0x0000 },
 386         { 0xf4, 0x4000 },
 387         { 0xf8, 0x0000 },
 388         { 0xf9, 0x0000 },
 389         { 0xfa, 0x2060 },
 390         { 0xfb, 0x4040 },
 391         { 0xfc, 0x0000 },
 392         { 0xfd, 0x0002 },
 393         { 0xfe, 0x10ec },
 394         { 0xff, 0x6308 },
 395 };
 396
 397 struct rt5645_eq_param_s {
 398         unsigned short reg;
 399         unsigned short val;
 400 };
 401
 402 static const char *const rt5645_supply_names[] = {
 403         "avdd",
 404         "cpvdd",
 405 };
 406
 407 struct rt5645_priv {
 408         struct snd_soc_codec *codec;
 409         struct rt5645_platform_data pdata;
 410         struct regmap *regmap;
 411         struct i2c_client *i2c;
 412         struct gpio_desc *gpiod_hp_det;
 413         struct snd_soc_jack *hp_jack;
 414         struct snd_soc_jack *mic_jack;
 415         struct snd_soc_jack *btn_jack;
 416         struct delayed_work jack_detect_work, rcclock_work;
 417         struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 418         struct rt5645_eq_param_s *eq_param;
 419         struct timer_list btn_check_timer;
 420
 421         int codec_type;
 422         int sysclk;
 423         int sysclk_src;
 424         int lrck[RT5645_AIFS];
 425         int bclk[RT5645_AIFS];
 426         int master[RT5645_AIFS];
 427
 428         int pll_src;
 429         int pll_in;
 430         int pll_out;
 431
 432         int jack_type;
 433         bool en_button_func;
 434         bool hp_on;
 435 };
 436
 437 static int rt5645_reset(struct snd_soc_codec *codec)
 438 {
 439         return snd_soc_write(codec, RT5645_RESET, 0);
 440 }
 441
 442 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 443 {
 444         int i;
 445
 446         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 447                 if (reg >= rt5645_ranges[i].range_min &&
 448                         reg <= rt5645_ranges[i].range_max) {
 449                         return true;
 450                 }
 451         }
 452
 453         switch (reg) {
 454         case RT5645_RESET:
 455         case RT5645_PRIV_INDEX:
 456         case RT5645_PRIV_DATA:
 457         case RT5645_IN1_CTRL1:
 458         case RT5645_IN1_CTRL2:
 459         case RT5645_IN1_CTRL3:
 460         case RT5645_A_JD_CTRL1:
 461         case RT5645_ADC_EQ_CTRL1:
 462         case RT5645_EQ_CTRL1:
 463         case RT5645_ALC_CTRL_1:
 464         case RT5645_IRQ_CTRL2:
 465         case RT5645_IRQ_CTRL3:
 466         case RT5645_INT_IRQ_ST:
 467         case RT5645_IL_CMD:
 468         case RT5650_4BTN_IL_CMD1:
 469         case RT5645_VENDOR_ID:
 470         case RT5645_VENDOR_ID1:
 471         case RT5645_VENDOR_ID2:
 472                 return true;
 473         default:
 474                 return false;
 475         }
 476 }
 477
 478 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 479 {
 480         int i;
 481
 482         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 483                 if (reg >= rt5645_ranges[i].range_min &&
 484                         reg <= rt5645_ranges[i].range_max) {
 485                         return true;
 486                 }
 487         }
 488
 489         switch (reg) {
 490         case RT5645_RESET:
 491         case RT5645_SPK_VOL:
 492         case RT5645_HP_VOL:
 493         case RT5645_LOUT1:
 494         case RT5645_IN1_CTRL1:
 495         case RT5645_IN1_CTRL2:
 496         case RT5645_IN1_CTRL3:
 497         case RT5645_IN2_CTRL:
 498         case RT5645_INL1_INR1_VOL:
 499         case RT5645_SPK_FUNC_LIM:
 500         case RT5645_ADJ_HPF_CTRL:
 501         case RT5645_DAC1_DIG_VOL:
 502         case RT5645_DAC2_DIG_VOL:
 503         case RT5645_DAC_CTRL:
 504         case RT5645_STO1_ADC_DIG_VOL:
 505         case RT5645_MONO_ADC_DIG_VOL:
 506         case RT5645_ADC_BST_VOL1:
 507         case RT5645_ADC_BST_VOL2:
 508         case RT5645_STO1_ADC_MIXER:
 509         case RT5645_MONO_ADC_MIXER:
 510         case RT5645_AD_DA_MIXER:
 511         case RT5645_STO_DAC_MIXER:
 512         case RT5645_MONO_DAC_MIXER:
 513         case RT5645_DIG_MIXER:
 514         case RT5650_A_DAC_SOUR:
 515         case RT5645_DIG_INF1_DATA:
 516         case RT5645_PDM_OUT_CTRL:
 517         case RT5645_REC_L1_MIXER:
 518         case RT5645_REC_L2_MIXER:
 519         case RT5645_REC_R1_MIXER:
 520         case RT5645_REC_R2_MIXER:
 521         case RT5645_HPMIXL_CTRL:
 522         case RT5645_HPOMIXL_CTRL:
 523         case RT5645_HPMIXR_CTRL:
 524         case RT5645_HPOMIXR_CTRL:
 525         case RT5645_HPO_MIXER:
 526         case RT5645_SPK_L_MIXER:
 527         case RT5645_SPK_R_MIXER:
 528         case RT5645_SPO_MIXER:
 529         case RT5645_SPO_CLSD_RATIO:
 530         case RT5645_OUT_L1_MIXER:
 531         case RT5645_OUT_R1_MIXER:
 532         case RT5645_OUT_L_GAIN1:
 533         case RT5645_OUT_L_GAIN2:
 534         case RT5645_OUT_R_GAIN1:
 535         case RT5645_OUT_R_GAIN2:
 536         case RT5645_LOUT_MIXER:
 537         case RT5645_HAPTIC_CTRL1:
 538         case RT5645_HAPTIC_CTRL2:
 539         case RT5645_HAPTIC_CTRL3:
 540         case RT5645_HAPTIC_CTRL4:
 541         case RT5645_HAPTIC_CTRL5:
 542         case RT5645_HAPTIC_CTRL6:
 543         case RT5645_HAPTIC_CTRL7:
 544         case RT5645_HAPTIC_CTRL8:
 545         case RT5645_HAPTIC_CTRL9:
 546         case RT5645_HAPTIC_CTRL10:
 547         case RT5645_PWR_DIG1:
 548         case RT5645_PWR_DIG2:
 549         case RT5645_PWR_ANLG1:
 550         case RT5645_PWR_ANLG2:
 551         case RT5645_PWR_MIXER:
 552         case RT5645_PWR_VOL:
 553         case RT5645_PRIV_INDEX:
 554         case RT5645_PRIV_DATA:
 555         case RT5645_I2S1_SDP:
 556         case RT5645_I2S2_SDP:
 557         case RT5645_ADDA_CLK1:
 558         case RT5645_ADDA_CLK2:
 559         case RT5645_DMIC_CTRL1:
 560         case RT5645_DMIC_CTRL2:
 561         case RT5645_TDM_CTRL_1:
 562         case RT5645_TDM_CTRL_2:
 563         case RT5645_TDM_CTRL_3:
 564         case RT5650_TDM_CTRL_4:
 565         case RT5645_GLB_CLK:
 566         case RT5645_PLL_CTRL1:
 567         case RT5645_PLL_CTRL2:
 568         case RT5645_ASRC_1:
 569         case RT5645_ASRC_2:
 570         case RT5645_ASRC_3:
 571         case RT5645_ASRC_4:
 572         case RT5645_DEPOP_M1:
 573         case RT5645_DEPOP_M2:
 574         case RT5645_DEPOP_M3:
 575         case RT5645_CHARGE_PUMP:
 576         case RT5645_MICBIAS:
 577         case RT5645_A_JD_CTRL1:
 578         case RT5645_VAD_CTRL4:
 579         case RT5645_CLSD_OUT_CTRL:
 580         case RT5645_ADC_EQ_CTRL1:
 581         case RT5645_ADC_EQ_CTRL2:
 582         case RT5645_EQ_CTRL1:
 583         case RT5645_EQ_CTRL2:
 584         case RT5645_ALC_CTRL_1:
 585         case RT5645_ALC_CTRL_2:
 586         case RT5645_ALC_CTRL_3:
 587         case RT5645_ALC_CTRL_4:
 588         case RT5645_ALC_CTRL_5:
 589         case RT5645_JD_CTRL:
 590         case RT5645_IRQ_CTRL1:
 591         case RT5645_IRQ_CTRL2:
 592         case RT5645_IRQ_CTRL3:
 593         case RT5645_INT_IRQ_ST:
 594         case RT5645_GPIO_CTRL1:
 595         case RT5645_GPIO_CTRL2:
 596         case RT5645_GPIO_CTRL3:
 597         case RT5645_BASS_BACK:
 598         case RT5645_MP3_PLUS1:
 599         case RT5645_MP3_PLUS2:
 600         case RT5645_ADJ_HPF1:
 601         case RT5645_ADJ_HPF2:
 602         case RT5645_HP_CALIB_AMP_DET:
 603         case RT5645_SV_ZCD1:
 604         case RT5645_SV_ZCD2:
 605         case RT5645_IL_CMD:
 606         case RT5645_IL_CMD2:
 607         case RT5645_IL_CMD3:
 608         case RT5650_4BTN_IL_CMD1:
 609         case RT5650_4BTN_IL_CMD2:
 610         case RT5645_DRC1_HL_CTRL1:
 611         case RT5645_DRC2_HL_CTRL1:
 612         case RT5645_ADC_MONO_HP_CTRL1:
 613         case RT5645_ADC_MONO_HP_CTRL2:
 614         case RT5645_DRC2_CTRL1:
 615         case RT5645_DRC2_CTRL2:
 616         case RT5645_DRC2_CTRL3:
 617         case RT5645_DRC2_CTRL4:
 618         case RT5645_DRC2_CTRL5:
 619         case RT5645_JD_CTRL3:
 620         case RT5645_JD_CTRL4:
 621         case RT5645_GEN_CTRL1:
 622         case RT5645_GEN_CTRL2:
 623         case RT5645_GEN_CTRL3:
 624         case RT5645_VENDOR_ID:
 625         case RT5645_VENDOR_ID1:
 626         case RT5645_VENDOR_ID2:
 627                 return true;
 628         default:
 629                 return false;
 630         }
 631 }
 632
 633 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 634 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 635 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 636 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 637 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 638
 639 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 640 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 641         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 642         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 643         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 644         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 645         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 646         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 647         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 648 );
 649
 650 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 651 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 652         0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 653         5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 654         6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 655         7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 656 );
 657
 658 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 659                          struct snd_ctl_elem_info *uinfo)
 660 {
 661         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 662         uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 663
 664         return 0;
 665 }
 666
 667 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 668                         struct snd_ctl_elem_value *ucontrol)
 669 {
 670         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 671         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 672         struct rt5645_eq_param_s *eq_param =
 673                 (struct rt5645_eq_param_s *)ucontrol->value.bytes.data;
 674         int i;
 675
 676         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 677                 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 678                 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 679         }
 680
 681         return 0;
 682 }
 683
 684 static bool rt5645_validate_hweq(unsigned short reg)
 685 {
 686         if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
 687                 (reg == RT5645_EQ_CTRL2))
 688                 return true;
 689
 690         return false;
 691 }
 692
 693 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 694                         struct snd_ctl_elem_value *ucontrol)
 695 {
 696         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 697         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 698         struct rt5645_eq_param_s *eq_param =
 699                 (struct rt5645_eq_param_s *)ucontrol->value.bytes.data;
 700         int i;
 701
 702         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 703                 eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 704                 eq_param[i].val = be16_to_cpu(eq_param[i].val);
 705         }
 706
 707         /* The final setting of the table should be RT5645_EQ_CTRL2 */
 708         for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 709                 if (eq_param[i].reg == 0)
 710                         continue;
 711                 else if (eq_param[i].reg != RT5645_EQ_CTRL2)
 712                         return 0;
 713                 else
 714                         break;
 715         }
 716
 717         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 718                 if (!rt5645_validate_hweq(eq_param[i].reg) &&
 719                         eq_param[i].reg != 0)
 720                         return 0;
 721                 else if (eq_param[i].reg == 0)
 722                         break;
 723         }
 724
 725         memcpy(rt5645->eq_param, eq_param,
 726                 RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s));
 727
 728         return 0;
 729 }
 730
 731 #define RT5645_HWEQ(xname) \
 732 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 733         .info = rt5645_hweq_info, \
 734         .get = rt5645_hweq_get, \
 735         .put = rt5645_hweq_put \
 736 }
 737
 738 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 739                 struct snd_ctl_elem_value *ucontrol)
 740 {
 741         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 742         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 743         int ret;
 744
 745         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 746                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 747
 748         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 749
 750         mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 751                 msecs_to_jiffies(200));
 752
 753         return ret;
 754 }
 755
 756 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 757         "immediately", "zero crossing", "soft ramp"
 758 };
 759
 760 static SOC_ENUM_SINGLE_DECL(
 761         rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 762         RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 763
 764 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 765         /* Speaker Output Volume */
 766         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 767                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 768         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 769                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 770                 rt5645_spk_put_volsw, out_vol_tlv),
 771
 772         /* ClassD modulator Speaker Gain Ratio */
 773         SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 774                 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 775
 776         /* Headphone Output Volume */
 777         SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 778                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 779         SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 780                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 781
 782         /* OUTPUT Control */
 783         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 784                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 785         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 786                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 787         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 788                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 789
 790         /* DAC Digital Volume */
 791         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 792                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 793         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 794                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 795         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 796                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 797
 798         /* IN1/IN2 Control */
 799         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 800                 RT5645_BST_SFT1, 12, 0, bst_tlv),
 801         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 802                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 803
 804         /* INL/INR Volume Control */
 805         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 806                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 807
 808         /* ADC Digital Volume Control */
 809         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 810                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 811         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 812                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 813         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 814                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 815         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 816                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 817
 818         /* ADC Boost Volume Control */
 819         SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 820                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 821                 adc_bst_tlv),
 822         SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 823                 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 824                 adc_bst_tlv),
 825
 826         /* I2S2 function select */
 827         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 828                 1, 1),
 829         RT5645_HWEQ("Speaker HWEQ"),
 830
 831         /* Digital Soft Volume Control */
 832         SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 833 };
 834
 835 /**
 836  * set_dmic_clk - Set parameter of dmic.
 837  *
 838  * @w: DAPM widget.
 839  * @kcontrol: The kcontrol of this widget.
 840  * @event: Event id.
 841  *
 842  */
 843 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 844         struct snd_kcontrol *kcontrol, int event)
 845 {
 846         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 847         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 848         int idx, rate;
 849
 850         rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 851                 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 852         idx = rl6231_calc_dmic_clk(rate);
 853         if (idx < 0)
 854                 dev_err(codec->dev, "Failed to set DMIC clock\n");
 855         else
 856                 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
 857                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 858         return idx;
 859 }
 860
 861 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 862                          struct snd_soc_dapm_widget *sink)
 863 {
 864         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 865         unsigned int val;
 866
 867         val = snd_soc_read(codec, RT5645_GLB_CLK);
 868         val &= RT5645_SCLK_SRC_MASK;
 869         if (val == RT5645_SCLK_SRC_PLL1)
 870                 return 1;
 871         else
 872                 return 0;
 873 }
 874
 875 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 876                          struct snd_soc_dapm_widget *sink)
 877 {
 878         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 879         unsigned int reg, shift, val;
 880
 881         switch (source->shift) {
 882         case 0:
 883                 reg = RT5645_ASRC_3;
 884                 shift = 0;
 885                 break;
 886         case 1:
 887                 reg = RT5645_ASRC_3;
 888                 shift = 4;
 889                 break;
 890         case 3:
 891                 reg = RT5645_ASRC_2;
 892                 shift = 0;
 893                 break;
 894         case 8:
 895                 reg = RT5645_ASRC_2;
 896                 shift = 4;
 897                 break;
 898         case 9:
 899                 reg = RT5645_ASRC_2;
 900                 shift = 8;
 901                 break;
 902         case 10:
 903                 reg = RT5645_ASRC_2;
 904                 shift = 12;
 905                 break;
 906         default:
 907                 return 0;
 908         }
 909
 910         val = (snd_soc_read(codec, reg) >> shift) & 0xf;
 911         switch (val) {
 912         case 1:
 913         case 2:
 914         case 3:
 915         case 4:
 916                 return 1;
 917         default:
 918                 return 0;
 919         }
 920
 921 }
 922
 923 static int rt5645_enable_hweq(struct snd_soc_codec *codec)
 924 {
 925         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
 926         int i;
 927
 928         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 929                 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 930                         regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 931                                         rt5645->eq_param[i].val);
 932                 else
 933                         break;
 934         }
 935
 936         return 0;
 937 }
 938
 939 /**
 940  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 941  * @codec: SoC audio codec device.
 942  * @filter_mask: mask of filters.
 943  * @clk_src: clock source
 944  *
 945  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 946  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 947  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 948  * ASRC function will track i2s clock and generate a corresponding system clock
 949  * for codec. This function provides an API to select the clock source for a
 950  * set of filters specified by the mask. And the codec driver will turn on ASRC
 951  * for these filters if ASRC is selected as their clock source.
 952  */
 953 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
 954                 unsigned int filter_mask, unsigned int clk_src)
 955 {
 956         unsigned int asrc2_mask = 0;
 957         unsigned int asrc2_value = 0;
 958         unsigned int asrc3_mask = 0;
 959         unsigned int asrc3_value = 0;
 960
 961         switch (clk_src) {
 962         case RT5645_CLK_SEL_SYS:
 963         case RT5645_CLK_SEL_I2S1_ASRC:
 964         case RT5645_CLK_SEL_I2S2_ASRC:
 965         case RT5645_CLK_SEL_SYS2:
 966                 break;
 967
 968         default:
 969                 return -EINVAL;
 970         }
 971
 972         if (filter_mask & RT5645_DA_STEREO_FILTER) {
 973                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 974                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 975                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 976         }
 977
 978         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 979                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 980                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 981                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 982         }
 983
 984         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 985                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 986                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 987                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 988         }
 989
 990         if (filter_mask & RT5645_AD_STEREO_FILTER) {
 991                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 992                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 993                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 994         }
 995
 996         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
 997                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
 998                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
 999                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1000         }
1001
1002         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1003                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1004                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1005                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1006         }
1007
1008         if (asrc2_mask)
1009                 snd_soc_update_bits(codec, RT5645_ASRC_2,
1010                         asrc2_mask, asrc2_value);
1011
1012         if (asrc3_mask)
1013                 snd_soc_update_bits(codec, RT5645_ASRC_3,
1014                         asrc3_mask, asrc3_value);
1015
1016         return 0;
1017 }
1018 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1019
1020 /* Digital Mixer */
1021 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1022         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1023                         RT5645_M_ADC_L1_SFT, 1, 1),
1024         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1025                         RT5645_M_ADC_L2_SFT, 1, 1),
1026 };
1027
1028 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1029         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1030                         RT5645_M_ADC_R1_SFT, 1, 1),
1031         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1032                         RT5645_M_ADC_R2_SFT, 1, 1),
1033 };
1034
1035 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1036         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1037                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1038         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1039                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1040 };
1041
1042 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1043         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1044                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1045         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1046                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1047 };
1048
1049 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1050         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1051                         RT5645_M_ADCMIX_L_SFT, 1, 1),
1052         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1053                         RT5645_M_DAC1_L_SFT, 1, 1),
1054 };
1055
1056 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1057         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1058                         RT5645_M_ADCMIX_R_SFT, 1, 1),
1059         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1060                         RT5645_M_DAC1_R_SFT, 1, 1),
1061 };
1062
1063 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1064         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1065                         RT5645_M_DAC_L1_SFT, 1, 1),
1066         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1067                         RT5645_M_DAC_L2_SFT, 1, 1),
1068         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1069                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1070 };
1071
1072 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1073         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1074                         RT5645_M_DAC_R1_SFT, 1, 1),
1075         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1076                         RT5645_M_DAC_R2_SFT, 1, 1),
1077         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1078                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1079 };
1080
1081 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1082         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1083                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1084         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1085                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1086         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1087                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1088 };
1089
1090 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1091         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1092                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1093         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1094                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1095         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1096                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1097 };
1098
1099 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1100         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1101                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1102         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1103                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1104         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1105                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1106 };
1107
1108 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1109         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1110                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1111         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1112                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1113         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1114                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1115 };
1116
1117 /* Analog Input Mixer */
1118 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1119         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1120                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
1121         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1122                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
1123         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1124                         RT5645_M_BST2_RM_L_SFT, 1, 1),
1125         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1126                         RT5645_M_BST1_RM_L_SFT, 1, 1),
1127         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1128                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
1129 };
1130
1131 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1132         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1133                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
1134         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1135                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
1136         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1137                         RT5645_M_BST2_RM_R_SFT, 1, 1),
1138         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1139                         RT5645_M_BST1_RM_R_SFT, 1, 1),
1140         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1141                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
1142 };
1143
1144 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1145         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1146                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1147         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1148                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1149         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1150                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
1151         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1152                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1153 };
1154
1155 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1156         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1157                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1158         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1159                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1160         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1161                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
1162         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1163                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1164 };
1165
1166 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1167         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1168                         RT5645_M_BST1_OM_L_SFT, 1, 1),
1169         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1170                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
1171         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1172                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1173         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1174                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1175 };
1176
1177 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1178         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1179                         RT5645_M_BST2_OM_R_SFT, 1, 1),
1180         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1181                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
1182         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1183                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1184         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1185                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1186 };
1187
1188 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1189         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1190                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1191         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1192                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1193         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1194                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1195         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1196                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1197 };
1198
1199 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1200         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1201                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1202         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1203                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1204 };
1205
1206 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1207         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1208                         RT5645_M_DAC1_HM_SFT, 1, 1),
1209         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1210                         RT5645_M_HPVOL_HM_SFT, 1, 1),
1211 };
1212
1213 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1214         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1215                         RT5645_M_DAC1_HV_SFT, 1, 1),
1216         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1217                         RT5645_M_DAC2_HV_SFT, 1, 1),
1218         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1219                         RT5645_M_IN_HV_SFT, 1, 1),
1220         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1221                         RT5645_M_BST1_HV_SFT, 1, 1),
1222 };
1223
1224 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1225         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1226                         RT5645_M_DAC1_HV_SFT, 1, 1),
1227         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1228                         RT5645_M_DAC2_HV_SFT, 1, 1),
1229         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1230                         RT5645_M_IN_HV_SFT, 1, 1),
1231         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1232                         RT5645_M_BST2_HV_SFT, 1, 1),
1233 };
1234
1235 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1236         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1237                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
1238         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1239                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
1240         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1241                         RT5645_M_OV_L_LM_SFT, 1, 1),
1242         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1243                         RT5645_M_OV_R_LM_SFT, 1, 1),
1244 };
1245
1246 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1247 static const char * const rt5645_dac1_src[] = {
1248         "IF1 DAC", "IF2 DAC", "IF3 DAC"
1249 };
1250
1251 static SOC_ENUM_SINGLE_DECL(
1252         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1253         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1254
1255 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1256         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1257
1258 static SOC_ENUM_SINGLE_DECL(
1259         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1260         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1261
1262 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1263         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1264
1265 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1266 static const char * const rt5645_dac12_src[] = {
1267         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1268 };
1269
1270 static SOC_ENUM_SINGLE_DECL(
1271         rt5645_dac2l_enum, RT5645_DAC_CTRL,
1272         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1273
1274 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1275         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1276
1277 static const char * const rt5645_dacr2_src[] = {
1278         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1279 };
1280
1281 static SOC_ENUM_SINGLE_DECL(
1282         rt5645_dac2r_enum, RT5645_DAC_CTRL,
1283         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1284
1285 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1286         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1287
1288
1289 /* INL/R source */
1290 static const char * const rt5645_inl_src[] = {
1291         "IN2P", "MonoP"
1292 };
1293
1294 static SOC_ENUM_SINGLE_DECL(
1295         rt5645_inl_enum, RT5645_INL1_INR1_VOL,
1296         RT5645_INL_SEL_SFT, rt5645_inl_src);
1297
1298 static const struct snd_kcontrol_new rt5645_inl_mux =
1299         SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
1300
1301 static const char * const rt5645_inr_src[] = {
1302         "IN2N", "MonoN"
1303 };
1304
1305 static SOC_ENUM_SINGLE_DECL(
1306         rt5645_inr_enum, RT5645_INL1_INR1_VOL,
1307         RT5645_INR_SEL_SFT, rt5645_inr_src);
1308
1309 static const struct snd_kcontrol_new rt5645_inr_mux =
1310         SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
1311
1312 /* Stereo1 ADC source */
1313 /* MX-27 [12] */
1314 static const char * const rt5645_stereo_adc1_src[] = {
1315         "DAC MIX", "ADC"
1316 };
1317
1318 static SOC_ENUM_SINGLE_DECL(
1319         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1320         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1321
1322 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1323         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1324
1325 /* MX-27 [11] */
1326 static const char * const rt5645_stereo_adc2_src[] = {
1327         "DAC MIX", "DMIC"
1328 };
1329
1330 static SOC_ENUM_SINGLE_DECL(
1331         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1332         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1333
1334 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1335         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1336
1337 /* MX-27 [8] */
1338 static const char * const rt5645_stereo_dmic_src[] = {
1339         "DMIC1", "DMIC2"
1340 };
1341
1342 static SOC_ENUM_SINGLE_DECL(
1343         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1344         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1345
1346 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1347         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1348
1349 /* Mono ADC source */
1350 /* MX-28 [12] */
1351 static const char * const rt5645_mono_adc_l1_src[] = {
1352         "Mono DAC MIXL", "ADC"
1353 };
1354
1355 static SOC_ENUM_SINGLE_DECL(
1356         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1357         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1358
1359 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1360         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1361 /* MX-28 [11] */
1362 static const char * const rt5645_mono_adc_l2_src[] = {
1363         "Mono DAC MIXL", "DMIC"
1364 };
1365
1366 static SOC_ENUM_SINGLE_DECL(
1367         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1368         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1369
1370 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1371         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1372
1373 /* MX-28 [8] */
1374 static const char * const rt5645_mono_dmic_src[] = {
1375         "DMIC1", "DMIC2"
1376 };
1377
1378 static SOC_ENUM_SINGLE_DECL(
1379         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1380         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1381
1382 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1383         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1384 /* MX-28 [1:0] */
1385 static SOC_ENUM_SINGLE_DECL(
1386         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1387         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1388
1389 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1390         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1391 /* MX-28 [4] */
1392 static const char * const rt5645_mono_adc_r1_src[] = {
1393         "Mono DAC MIXR", "ADC"
1394 };
1395
1396 static SOC_ENUM_SINGLE_DECL(
1397         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1398         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1399
1400 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1401         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1402 /* MX-28 [3] */
1403 static const char * const rt5645_mono_adc_r2_src[] = {
1404         "Mono DAC MIXR", "DMIC"
1405 };
1406
1407 static SOC_ENUM_SINGLE_DECL(
1408         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1409         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1410
1411 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1412         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1413
1414 /* MX-77 [9:8] */
1415 static const char * const rt5645_if1_adc_in_src[] = {
1416         "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1417         "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1418 };
1419
1420 static SOC_ENUM_SINGLE_DECL(
1421         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1422         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1423
1424 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1425         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1426
1427 /* MX-78 [4:0] */
1428 static const char * const rt5650_if1_adc_in_src[] = {
1429         "IF_ADC1/IF_ADC2/DAC_REF/Null",
1430         "IF_ADC1/IF_ADC2/Null/DAC_REF",
1431         "IF_ADC1/DAC_REF/IF_ADC2/Null",
1432         "IF_ADC1/DAC_REF/Null/IF_ADC2",
1433         "IF_ADC1/Null/DAC_REF/IF_ADC2",
1434         "IF_ADC1/Null/IF_ADC2/DAC_REF",
1435
1436         "IF_ADC2/IF_ADC1/DAC_REF/Null",
1437         "IF_ADC2/IF_ADC1/Null/DAC_REF",
1438         "IF_ADC2/DAC_REF/IF_ADC1/Null",
1439         "IF_ADC2/DAC_REF/Null/IF_ADC1",
1440         "IF_ADC2/Null/DAC_REF/IF_ADC1",
1441         "IF_ADC2/Null/IF_ADC1/DAC_REF",
1442
1443         "DAC_REF/IF_ADC1/IF_ADC2/Null",
1444         "DAC_REF/IF_ADC1/Null/IF_ADC2",
1445         "DAC_REF/IF_ADC2/IF_ADC1/Null",
1446         "DAC_REF/IF_ADC2/Null/IF_ADC1",
1447         "DAC_REF/Null/IF_ADC1/IF_ADC2",
1448         "DAC_REF/Null/IF_ADC2/IF_ADC1",
1449
1450         "Null/IF_ADC1/IF_ADC2/DAC_REF",
1451         "Null/IF_ADC1/DAC_REF/IF_ADC2",
1452         "Null/IF_ADC2/IF_ADC1/DAC_REF",
1453         "Null/IF_ADC2/DAC_REF/IF_ADC1",
1454         "Null/DAC_REF/IF_ADC1/IF_ADC2",
1455         "Null/DAC_REF/IF_ADC2/IF_ADC1",
1456 };
1457
1458 static SOC_ENUM_SINGLE_DECL(
1459         rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1460         0, rt5650_if1_adc_in_src);
1461
1462 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1463         SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1464
1465 /* MX-78 [15:14][13:12][11:10] */
1466 static const char * const rt5645_tdm_adc_swap_select[] = {
1467         "L/R", "R/L", "L/L", "R/R"
1468 };
1469
1470 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1471         RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1472
1473 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1474         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1475
1476 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1477         RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1478
1479 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1480         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1481
1482 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1483         RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1484
1485 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1486         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1487
1488 /* MX-77 [7:6][5:4][3:2] */
1489 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1490         RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1491
1492 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1493         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1494
1495 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1496         RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1497
1498 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1499         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1500
1501 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1502         RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1503
1504 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1505         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1506
1507 /* MX-79 [14:12][10:8][6:4][2:0] */
1508 static const char * const rt5645_tdm_dac_swap_select[] = {
1509         "Slot0", "Slot1", "Slot2", "Slot3"
1510 };
1511
1512 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1513         RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1514
1515 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1516         SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1517
1518 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1519         RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1520
1521 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1522         SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1523
1524 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1525         RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1526
1527 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1528         SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1529
1530 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1531         RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1532
1533 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1534         SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1535
1536 /* MX-7a [14:12][10:8][6:4][2:0] */
1537 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1538         RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1539
1540 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1541         SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1542
1543 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1544         RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1545
1546 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1547         SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1548
1549 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1550         RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1551
1552 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1553         SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1554
1555 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1556         RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1557
1558 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1559         SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1560
1561 /* MX-2d [3] [2] */
1562 static const char * const rt5650_a_dac1_src[] = {
1563         "DAC1", "Stereo DAC Mixer"
1564 };
1565
1566 static SOC_ENUM_SINGLE_DECL(
1567         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1568         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1569
1570 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1571         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1572
1573 static SOC_ENUM_SINGLE_DECL(
1574         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1575         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1576
1577 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1578         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1579
1580 /* MX-2d [1] [0] */
1581 static const char * const rt5650_a_dac2_src[] = {
1582         "Stereo DAC Mixer", "Mono DAC Mixer"
1583 };
1584
1585 static SOC_ENUM_SINGLE_DECL(
1586         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1587         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1588
1589 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1590         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1591
1592 static SOC_ENUM_SINGLE_DECL(
1593         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1594         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1595
1596 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1597         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1598
1599 /* MX-2F [13:12] */
1600 static const char * const rt5645_if2_adc_in_src[] = {
1601         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1602 };
1603
1604 static SOC_ENUM_SINGLE_DECL(
1605         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1606         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1607
1608 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1609         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1610
1611 /* MX-2F [1:0] */
1612 static const char * const rt5645_if3_adc_in_src[] = {
1613         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1614 };
1615
1616 static SOC_ENUM_SINGLE_DECL(
1617         rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1618         RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1619
1620 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1621         SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1622
1623 /* MX-31 [15] [13] [11] [9] */
1624 static const char * const rt5645_pdm_src[] = {
1625         "Mono DAC", "Stereo DAC"
1626 };
1627
1628 static SOC_ENUM_SINGLE_DECL(
1629         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1630         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1631
1632 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1633         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1634
1635 static SOC_ENUM_SINGLE_DECL(
1636         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1637         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1638
1639 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1640         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1641
1642 /* MX-9D [9:8] */
1643 static const char * const rt5645_vad_adc_src[] = {
1644         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1645 };
1646
1647 static SOC_ENUM_SINGLE_DECL(
1648         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1649         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1650
1651 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1652         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1653
1654 static const struct snd_kcontrol_new spk_l_vol_control =
1655         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1656                 RT5645_L_MUTE_SFT, 1, 1);
1657
1658 static const struct snd_kcontrol_new spk_r_vol_control =
1659         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1660                 RT5645_R_MUTE_SFT, 1, 1);
1661
1662 static const struct snd_kcontrol_new hp_l_vol_control =
1663         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1664                 RT5645_L_MUTE_SFT, 1, 1);
1665
1666 static const struct snd_kcontrol_new hp_r_vol_control =
1667         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1668                 RT5645_R_MUTE_SFT, 1, 1);
1669
1670 static const struct snd_kcontrol_new pdm1_l_vol_control =
1671         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1672                 RT5645_M_PDM1_L, 1, 1);
1673
1674 static const struct snd_kcontrol_new pdm1_r_vol_control =
1675         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1676                 RT5645_M_PDM1_R, 1, 1);
1677
1678 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1679 {
1680         static int hp_amp_power_count;
1681         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1682
1683         if (on) {
1684                 if (hp_amp_power_count <= 0) {
1685                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1686                                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x3100);
1687                                 snd_soc_write(codec, RT5645_CHARGE_PUMP,
1688                                         0x0e06);
1689                                 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1690                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1691                                         RT5645_HP_DCC_INT1, 0x9f01);
1692                                 msleep(20);
1693                                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1694                                         RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1695                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1696                                         0x3e, 0x7400);
1697                                 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1698                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1699                                         RT5645_MAMP_INT_REG2, 0xfc00);
1700                                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1701                                 msleep(90);
1702                                 rt5645->hp_on = true;
1703                         } else {
1704                                 /* depop parameters */
1705                                 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1706                                         RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1707                                 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1708                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1709                                         RT5645_HP_DCC_INT1, 0x9f01);
1710                                 mdelay(150);
1711                                 /* headphone amp power on */
1712                                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1713                                         RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1714                                 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1715                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1716                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1717                                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1718                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1719                                         RT5645_PWR_HA,
1720                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1721                                         RT5645_PWR_HA);
1722                                 mdelay(5);
1723                                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1724                                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
1725                                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
1726
1727                                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1728                                         RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1729                                         RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1730                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1731                                         0x14, 0x1aaa);
1732                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1733                                         0x24, 0x0430);
1734                         }
1735                 }
1736                 hp_amp_power_count++;
1737         } else {
1738                 hp_amp_power_count--;
1739                 if (hp_amp_power_count <= 0) {
1740                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1741                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1742                                         0x3e, 0x7400);
1743                                 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1744                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1745                                         RT5645_MAMP_INT_REG2, 0xfc00);
1746                                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1747                                 msleep(100);
1748                                 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001);
1749
1750                         } else {
1751                                 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1752                                         RT5645_HP_SG_MASK |
1753                                         RT5645_HP_L_SMT_MASK |
1754                                         RT5645_HP_R_SMT_MASK,
1755                                         RT5645_HP_SG_DIS |
1756                                         RT5645_HP_L_SMT_DIS |
1757                                         RT5645_HP_R_SMT_DIS);
1758                                 /* headphone amp power down */
1759                                 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1760                                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1761                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1762                                         RT5645_PWR_HA, 0);
1763                                 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1764                                         RT5645_DEPOP_MASK, 0);
1765                         }
1766                 }
1767         }
1768 }
1769
1770 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1771         struct snd_kcontrol *kcontrol, int event)
1772 {
1773         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1774         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1775
1776         switch (event) {
1777         case SND_SOC_DAPM_POST_PMU:
1778                 hp_amp_power(codec, 1);
1779                 /* headphone unmute sequence */
1780                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1781                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1782                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1783                                 RT5645_CP_FQ3_MASK,
1784                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1785                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1786                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1787                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1788                                 RT5645_MAMP_INT_REG2, 0xfc00);
1789                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1790                                 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1791                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1792                                 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1793                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1794                                 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1795                                 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1796                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1797                         msleep(40);
1798                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1799                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1800                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1801                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1802                 }
1803                 break;
1804
1805         case SND_SOC_DAPM_PRE_PMD:
1806                 /* headphone mute sequence */
1807                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1808                         snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1809                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1810                                 RT5645_CP_FQ3_MASK,
1811                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1812                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1813                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1814                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1815                                 RT5645_MAMP_INT_REG2, 0xfc00);
1816                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1817                                 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1818                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1819                                 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1820                         snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1821                                 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1822                                 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1823                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1824                         msleep(30);
1825                 }
1826                 hp_amp_power(codec, 0);
1827                 break;
1828
1829         default:
1830                 return 0;
1831         }
1832
1833         return 0;
1834 }
1835
1836 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1837         struct snd_kcontrol *kcontrol, int event)
1838 {
1839         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1840
1841         switch (event) {
1842         case SND_SOC_DAPM_POST_PMU:
1843                 rt5645_enable_hweq(codec);
1844                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1845                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1846                         RT5645_PWR_CLS_D_L,
1847                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1848                         RT5645_PWR_CLS_D_L);
1849                 snd_soc_update_bits(codec, RT5645_GEN_CTRL3,
1850                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1851                 break;
1852
1853         case SND_SOC_DAPM_PRE_PMD:
1854                 snd_soc_update_bits(codec, RT5645_GEN_CTRL3,
1855                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1856                 snd_soc_write(codec, RT5645_EQ_CTRL2, 0);
1857                 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1858                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1859                         RT5645_PWR_CLS_D_L, 0);
1860                 break;
1861
1862         default:
1863                 return 0;
1864         }
1865
1866         return 0;
1867 }
1868
1869 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1870         struct snd_kcontrol *kcontrol, int event)
1871 {
1872         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1873
1874         switch (event) {
1875         case SND_SOC_DAPM_POST_PMU:
1876                 hp_amp_power(codec, 1);
1877                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1878                         RT5645_PWR_LM, RT5645_PWR_LM);
1879                 snd_soc_update_bits(codec, RT5645_LOUT1,
1880                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1881                 break;
1882
1883         case SND_SOC_DAPM_PRE_PMD:
1884                 snd_soc_update_bits(codec, RT5645_LOUT1,
1885                         RT5645_L_MUTE | RT5645_R_MUTE,
1886                         RT5645_L_MUTE | RT5645_R_MUTE);
1887                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1888                         RT5645_PWR_LM, 0);
1889                 hp_amp_power(codec, 0);
1890                 break;
1891
1892         default:
1893                 return 0;
1894         }
1895
1896         return 0;
1897 }
1898
1899 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1900         struct snd_kcontrol *kcontrol, int event)
1901 {
1902         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1903
1904         switch (event) {
1905         case SND_SOC_DAPM_POST_PMU:
1906                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1907                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1908                 break;
1909
1910         case SND_SOC_DAPM_PRE_PMD:
1911                 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1912                         RT5645_PWR_BST2_P, 0);
1913                 break;
1914
1915         default:
1916                 return 0;
1917         }
1918
1919         return 0;
1920 }
1921
1922 static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1923                 struct snd_kcontrol *k, int  event)
1924 {
1925         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1926         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1927
1928         switch (event) {
1929         case SND_SOC_DAPM_POST_PMU:
1930                 if (rt5645->hp_on) {
1931                         msleep(100);
1932                         rt5645->hp_on = false;
1933                 }
1934                 break;
1935
1936         default:
1937                 return 0;
1938         }
1939
1940         return 0;
1941 }
1942
1943 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1944         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1945                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1946         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1947                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1948
1949         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1950                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1951         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1952                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1953
1954         /* ASRC */
1955         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1956                               11, 0, NULL, 0),
1957         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1958                               12, 0, NULL, 0),
1959         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1960                               10, 0, NULL, 0),
1961         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1962                               9, 0, NULL, 0),
1963         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1964                               8, 0, NULL, 0),
1965         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1966                               7, 0, NULL, 0),
1967         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1968                               5, 0, NULL, 0),
1969         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1970                               4, 0, NULL, 0),
1971         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1972                               3, 0, NULL, 0),
1973         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1974                               1, 0, NULL, 0),
1975         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1976                               0, 0, NULL, 0),
1977
1978         /* Input Side */
1979         /* micbias */
1980         SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1981                         RT5645_PWR_MB1_BIT, 0),
1982         SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1983                         RT5645_PWR_MB2_BIT, 0),
1984         /* Input Lines */
1985         SND_SOC_DAPM_INPUT("DMIC L1"),
1986         SND_SOC_DAPM_INPUT("DMIC R1"),
1987         SND_SOC_DAPM_INPUT("DMIC L2"),
1988         SND_SOC_DAPM_INPUT("DMIC R2"),
1989
1990         SND_SOC_DAPM_INPUT("IN1P"),
1991         SND_SOC_DAPM_INPUT("IN1N"),
1992         SND_SOC_DAPM_INPUT("IN2P"),
1993         SND_SOC_DAPM_INPUT("IN2N"),
1994
1995         SND_SOC_DAPM_INPUT("Haptic Generator"),
1996
1997         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1998         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1999         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2000                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2001         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2002                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2003         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2004                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2005         /* Boost */
2006         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2007                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2008         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2009                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2010                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2011         /* Input Volume */
2012         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2013                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2014         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2015                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2016         /* REC Mixer */
2017         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2018                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2019         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2020                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2021         /* ADCs */
2022         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2023         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2024
2025         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2026                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2027         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2028                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2029
2030         /* ADC Mux */
2031         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2032                 &rt5645_sto1_dmic_mux),
2033         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2034                 &rt5645_sto_adc2_mux),
2035         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2036                 &rt5645_sto_adc2_mux),
2037         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2038                 &rt5645_sto_adc1_mux),
2039         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2040                 &rt5645_sto_adc1_mux),
2041         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2042                 &rt5645_mono_dmic_l_mux),
2043         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2044                 &rt5645_mono_dmic_r_mux),
2045         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2046                 &rt5645_mono_adc_l2_mux),
2047         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2048                 &rt5645_mono_adc_l1_mux),
2049         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2050                 &rt5645_mono_adc_r1_mux),
2051         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2052                 &rt5645_mono_adc_r2_mux),
2053         /* ADC Mixer */
2054
2055         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2056                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2057         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2058                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2059                 NULL, 0),
2060         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2061                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2062                 NULL, 0),
2063         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2064                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2065         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2066                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2067                 NULL, 0),
2068         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2069                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2070         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2071                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2072                 NULL, 0),
2073
2074         /* ADC PGA */
2075         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2076         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2077         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2078         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2079         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2080         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2081         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2082         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2083         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2084         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2085
2086         /* IF1 2 Mux */
2087         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2088                 0, 0, &rt5645_if2_adc_in_mux),
2089
2090         /* Digital Interface */
2091         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2092                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2093         SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2094         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2095         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2096         SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2097         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2098         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2099         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2100         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2101                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2102         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2103         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2104         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2105         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2106
2107         /* Digital Interface Select */
2108         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2109                 0, 0, &rt5645_vad_adc_mux),
2110
2111         /* Audio Interface */
2112         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2113         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2114         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2115         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2116
2117         /* Output Side */
2118         /* DAC mixer before sound effect  */
2119         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2120                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2121         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2122                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2123
2124         /* DAC2 channel Mux */
2125         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2126         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2127         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2128                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2129         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2130                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2131
2132         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2133         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2134
2135         /* DAC Mixer */
2136         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2137                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2138         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2139                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2140         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2141                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2142         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2143                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2144         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2145                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2146         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2147                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2148         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2149                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2150         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2151                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2152         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2153                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2154
2155         /* DACs */
2156         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2157                 0),
2158         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2159                 0),
2160         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2161                 0),
2162         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2163                 0),
2164         /* OUT Mixer */
2165         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2166                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2167         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2168                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2169         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2170                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2171         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2172                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2173         /* Ouput Volume */
2174         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2175                 &spk_l_vol_control),
2176         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2177                 &spk_r_vol_control),
2178         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2179                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2180         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2181                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2182         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2183                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2184         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2185                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2186         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2187         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2188         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2189         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2190         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2191
2192         /* HPO/LOUT/Mono Mixer */
2193         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2194                 ARRAY_SIZE(rt5645_spo_l_mix)),
2195         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2196                 ARRAY_SIZE(rt5645_spo_r_mix)),
2197         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2198                 ARRAY_SIZE(rt5645_hpo_mix)),
2199         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2200                 ARRAY_SIZE(rt5645_lout_mix)),
2201
2202         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2203                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2204         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2205                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2206         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2207                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2208
2209         /* PDM */
2210         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2211                 0, NULL, 0),
2212         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2213         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2214
2215         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2216         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2217
2218         /* Output Lines */
2219         SND_SOC_DAPM_OUTPUT("HPOL"),
2220         SND_SOC_DAPM_OUTPUT("HPOR"),
2221         SND_SOC_DAPM_OUTPUT("LOUTL"),
2222         SND_SOC_DAPM_OUTPUT("LOUTR"),
2223         SND_SOC_DAPM_OUTPUT("PDM1L"),
2224         SND_SOC_DAPM_OUTPUT("PDM1R"),
2225         SND_SOC_DAPM_OUTPUT("SPOL"),
2226         SND_SOC_DAPM_OUTPUT("SPOR"),
2227         SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
2228 };
2229
2230 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2231         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2232                 &rt5645_if1_dac0_tdm_sel_mux),
2233         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2234                 &rt5645_if1_dac1_tdm_sel_mux),
2235         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2236                 &rt5645_if1_dac2_tdm_sel_mux),
2237         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2238                 &rt5645_if1_dac3_tdm_sel_mux),
2239         SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2240                 0, 0, &rt5645_if1_adc_in_mux),
2241         SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2242                 0, 0, &rt5645_if1_adc1_in_mux),
2243         SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2244                 0, 0, &rt5645_if1_adc2_in_mux),
2245         SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2246                 0, 0, &rt5645_if1_adc3_in_mux),
2247 };
2248
2249 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2250         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2251                 0, 0, &rt5650_a_dac1_l_mux),
2252         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2253                 0, 0, &rt5650_a_dac1_r_mux),
2254         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2255                 0, 0, &rt5650_a_dac2_l_mux),
2256         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2257                 0, 0, &rt5650_a_dac2_r_mux),
2258
2259         SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2260                 0, 0, &rt5650_if1_adc1_in_mux),
2261         SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2262                 0, 0, &rt5650_if1_adc2_in_mux),
2263         SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2264                 0, 0, &rt5650_if1_adc3_in_mux),
2265         SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2266                 0, 0, &rt5650_if1_adc_in_mux),
2267
2268         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2269                 &rt5650_if1_dac0_tdm_sel_mux),
2270         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2271                 &rt5650_if1_dac1_tdm_sel_mux),
2272         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2273                 &rt5650_if1_dac2_tdm_sel_mux),
2274         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2275                 &rt5650_if1_dac3_tdm_sel_mux),
2276 };
2277
2278 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2279         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2280         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2281         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2282         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2283         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2284         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2285
2286         { "I2S1", NULL, "I2S1 ASRC" },
2287         { "I2S2", NULL, "I2S2 ASRC" },
2288
2289         { "IN1P", NULL, "LDO2" },
2290         { "IN2P", NULL, "LDO2" },
2291
2292         { "DMIC1", NULL, "DMIC L1" },
2293         { "DMIC1", NULL, "DMIC R1" },
2294         { "DMIC2", NULL, "DMIC L2" },
2295         { "DMIC2", NULL, "DMIC R2" },
2296
2297         { "BST1", NULL, "IN1P" },
2298         { "BST1", NULL, "IN1N" },
2299         { "BST1", NULL, "JD Power" },
2300         { "BST1", NULL, "Mic Det Power" },
2301         { "BST2", NULL, "IN2P" },
2302         { "BST2", NULL, "IN2N" },
2303
2304         { "INL VOL", NULL, "IN2P" },
2305         { "INR VOL", NULL, "IN2N" },
2306
2307         { "RECMIXL", "HPOL Switch", "HPOL" },
2308         { "RECMIXL", "INL Switch", "INL VOL" },
2309         { "RECMIXL", "BST2 Switch", "BST2" },
2310         { "RECMIXL", "BST1 Switch", "BST1" },
2311         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2312
2313         { "RECMIXR", "HPOR Switch", "HPOR" },
2314         { "RECMIXR", "INR Switch", "INR VOL" },
2315         { "RECMIXR", "BST2 Switch", "BST2" },
2316         { "RECMIXR", "BST1 Switch", "BST1" },
2317         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2318
2319         { "ADC L", NULL, "RECMIXL" },
2320         { "ADC L", NULL, "ADC L power" },
2321         { "ADC R", NULL, "RECMIXR" },
2322         { "ADC R", NULL, "ADC R power" },
2323
2324         {"DMIC L1", NULL, "DMIC CLK"},
2325         {"DMIC L1", NULL, "DMIC1 Power"},
2326         {"DMIC R1", NULL, "DMIC CLK"},
2327         {"DMIC R1", NULL, "DMIC1 Power"},
2328         {"DMIC L2", NULL, "DMIC CLK"},
2329         {"DMIC L2", NULL, "DMIC2 Power"},
2330         {"DMIC R2", NULL, "DMIC CLK"},
2331         {"DMIC R2", NULL, "DMIC2 Power"},
2332
2333         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2334         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2335         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2336
2337         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2338         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2339         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2340
2341         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2342         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2343         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2344
2345         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2346         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2347         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2348         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2349
2350         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2351         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2352         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2353         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2354
2355         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2356         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2357         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2358         { "Mono ADC L1 Mux", "ADC", "ADC L" },
2359
2360         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2361         { "Mono ADC R1 Mux", "ADC", "ADC R" },
2362         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2363         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2364
2365         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2366         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2367         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2368         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2369
2370         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2371         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2372         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2373
2374         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2375         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2376         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2377
2378         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2379         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2380         { "Mono ADC MIXL", NULL, "adc mono left filter" },
2381         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2382
2383         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2384         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2385         { "Mono ADC MIXR", NULL, "adc mono right filter" },
2386         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2387
2388         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2389         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2390         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2391
2392         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2393         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2394         { "IF_ADC2", NULL, "Mono ADC MIXL" },
2395         { "IF_ADC2", NULL, "Mono ADC MIXR" },
2396         { "VAD_ADC", NULL, "VAD ADC Mux" },
2397
2398         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2399         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2400         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2401
2402         { "IF1 ADC", NULL, "I2S1" },
2403         { "IF2 ADC", NULL, "I2S2" },
2404         { "IF2 ADC", NULL, "IF2 ADC Mux" },
2405
2406         { "AIF2TX", NULL, "IF2 ADC" },
2407
2408         { "IF1 DAC0", NULL, "AIF1RX" },
2409         { "IF1 DAC1", NULL, "AIF1RX" },
2410         { "IF1 DAC2", NULL, "AIF1RX" },
2411         { "IF1 DAC3", NULL, "AIF1RX" },
2412         { "IF2 DAC", NULL, "AIF2RX" },
2413
2414         { "IF1 DAC0", NULL, "I2S1" },
2415         { "IF1 DAC1", NULL, "I2S1" },
2416         { "IF1 DAC2", NULL, "I2S1" },
2417         { "IF1 DAC3", NULL, "I2S1" },
2418         { "IF2 DAC", NULL, "I2S2" },
2419
2420         { "IF2 DAC L", NULL, "IF2 DAC" },
2421         { "IF2 DAC R", NULL, "IF2 DAC" },
2422
2423         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2424         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2425
2426         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2427         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2428         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2429         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2430         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2431         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2432
2433         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2434         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2435         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2436         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2437         { "DAC L2 Volume", NULL, "dac mono left filter" },
2438
2439         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2440         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2441         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2442         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2443         { "DAC R2 Volume", NULL, "dac mono right filter" },
2444
2445         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2446         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2447         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2448         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2449         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2450         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2451         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2452         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2453
2454         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2455         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2456         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2457         { "Mono DAC MIXL", NULL, "dac mono left filter" },
2458         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2459         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2460         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2461         { "Mono DAC MIXR", NULL, "dac mono right filter" },
2462
2463         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2464         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2465         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2466         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2467         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2468         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2469
2470         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2471         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2472         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2473         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2474
2475         { "SPK MIXL", "BST1 Switch", "BST1" },
2476         { "SPK MIXL", "INL Switch", "INL VOL" },
2477         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2478         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2479         { "SPK MIXR", "BST2 Switch", "BST2" },
2480         { "SPK MIXR", "INR Switch", "INR VOL" },
2481         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2482         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2483
2484         { "OUT MIXL", "BST1 Switch", "BST1" },
2485         { "OUT MIXL", "INL Switch", "INL VOL" },
2486         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2487         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2488
2489         { "OUT MIXR", "BST2 Switch", "BST2" },
2490         { "OUT MIXR", "INR Switch", "INR VOL" },
2491         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2492         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2493
2494         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2495         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2496         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2497         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2498         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2499         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2500         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2501         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2502         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2503         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2504
2505         { "DAC 2", NULL, "DAC L2" },
2506         { "DAC 2", NULL, "DAC R2" },
2507         { "DAC 1", NULL, "DAC L1" },
2508         { "DAC 1", NULL, "DAC R1" },
2509         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2510         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2511         { "HPOVOL", NULL, "HPOVOL L" },
2512         { "HPOVOL", NULL, "HPOVOL R" },
2513         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2514         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2515
2516         { "SPKVOL L", "Switch", "SPK MIXL" },
2517         { "SPKVOL R", "Switch", "SPK MIXR" },
2518
2519         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2520         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2521         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2522         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2523         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2524         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2525
2526         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2527         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2528         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2529         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2530
2531         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2532         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2533         { "PDM1 L Mux", NULL, "PDM1 Power" },
2534         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2535         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2536         { "PDM1 R Mux", NULL, "PDM1 Power" },
2537
2538         { "HP amp", NULL, "HPO MIX" },
2539         { "HP amp", NULL, "JD Power" },
2540         { "HP amp", NULL, "Mic Det Power" },
2541         { "HP amp", NULL, "LDO2" },
2542         { "HPOL", NULL, "HP amp" },
2543         { "HPOR", NULL, "HP amp" },
2544
2545         { "LOUT amp", NULL, "LOUT MIX" },
2546         { "LOUTL", NULL, "LOUT amp" },
2547         { "LOUTR", NULL, "LOUT amp" },
2548
2549         { "PDM1 L", "Switch", "PDM1 L Mux" },
2550         { "PDM1 R", "Switch", "PDM1 R Mux" },
2551
2552         { "PDM1L", NULL, "PDM1 L" },
2553         { "PDM1R", NULL, "PDM1 R" },
2554
2555         { "SPK amp", NULL, "SPOL MIX" },
2556         { "SPK amp", NULL, "SPOR MIX" },
2557         { "SPOL", NULL, "SPK amp" },
2558         { "SPOR", NULL, "SPK amp" },
2559 };
2560
2561 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2562         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2563         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2564         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2565         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2566
2567         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2568         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2569         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2570         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2571
2572         { "DAC L1", NULL, "A DAC1 L Mux" },
2573         { "DAC R1", NULL, "A DAC1 R Mux" },
2574         { "DAC L2", NULL, "A DAC2 L Mux" },
2575         { "DAC R2", NULL, "A DAC2 R Mux" },
2576
2577         { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2578         { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2579         { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2580         { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2581
2582         { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2583         { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2584         { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2585         { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2586
2587         { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2588         { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2589         { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2590         { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2591
2592         { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2593         { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2594         { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2595
2596         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2597         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2598         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2599         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2600         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2601         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2602
2603         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2604         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2605         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2606         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2607         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2608         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2609
2610         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2611         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2612         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2613         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2614         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2615         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2616
2617         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2618         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2619         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2620         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2621         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2622         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2623         { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2624
2625         { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2626         { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2627         { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2628         { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2629
2630         { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2631         { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2632         { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2633         { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2634
2635         { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2636         { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2637         { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2638         { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2639
2640         { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2641         { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2642         { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2643         { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2644
2645         { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2646         { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2647
2648         { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2649         { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2650 };
2651
2652 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2653         { "DAC L1", NULL, "Stereo DAC MIXL" },
2654         { "DAC R1", NULL, "Stereo DAC MIXR" },
2655         { "DAC L2", NULL, "Mono DAC MIXL" },
2656         { "DAC R2", NULL, "Mono DAC MIXR" },
2657
2658         { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2659         { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2660         { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2661         { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2662
2663         { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2664         { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2665         { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2666         { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2667
2668         { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2669         { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2670         { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2671         { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2672
2673         { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2674         { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2675         { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2676
2677         { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2678         { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2679         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2680         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2681         { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2682
2683         { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2684         { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2685         { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2686         { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2687
2688         { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2689         { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2690         { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2691         { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2692
2693         { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2694         { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2695         { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2696         { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2697
2698         { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2699         { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2700         { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2701         { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2702
2703         { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2704         { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2705
2706         { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2707         { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2708 };
2709
2710 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2711         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2712 {
2713         struct snd_soc_codec *codec = dai->codec;
2714         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2715         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2716         int pre_div, bclk_ms, frame_size;
2717
2718         rt5645->lrck[dai->id] = params_rate(params);
2719         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2720         if (pre_div < 0) {
2721                 dev_err(codec->dev, "Unsupported clock setting\n");
2722                 return -EINVAL;
2723         }
2724         frame_size = snd_soc_params_to_frame_size(params);
2725         if (frame_size < 0) {
2726                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2727                 return -EINVAL;
2728         }
2729
2730         switch (rt5645->codec_type) {
2731         case CODEC_TYPE_RT5650:
2732                 dl_sft = 4;
2733                 break;
2734         default:
2735                 dl_sft = 2;
2736                 break;
2737         }
2738
2739         bclk_ms = frame_size > 32;
2740         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2741
2742         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2743                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2744         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2745                                 bclk_ms, pre_div, dai->id);
2746
2747         switch (params_width(params)) {
2748         case 16:
2749                 break;
2750         case 20:
2751                 val_len = 0x1;
2752                 break;
2753         case 24:
2754                 val_len = 0x2;
2755                 break;
2756         case 8:
2757                 val_len = 0x3;
2758                 break;
2759         default:
2760                 return -EINVAL;
2761         }
2762
2763         switch (dai->id) {
2764         case RT5645_AIF1:
2765                 mask_clk = RT5645_I2S_PD1_MASK;
2766                 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2767                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2768                         (0x3 << dl_sft), (val_len << dl_sft));
2769                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2770                 break;
2771         case  RT5645_AIF2:
2772                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2773                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2774                         pre_div << RT5645_I2S_PD2_SFT;
2775                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2776                         (0x3 << dl_sft), (val_len << dl_sft));
2777                 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2778                 break;
2779         default:
2780                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2781                 return -EINVAL;
2782         }
2783
2784         return 0;
2785 }
2786
2787 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2788 {
2789         struct snd_soc_codec *codec = dai->codec;
2790         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2791         unsigned int reg_val = 0, pol_sft;
2792
2793         switch (rt5645->codec_type) {
2794         case CODEC_TYPE_RT5650:
2795                 pol_sft = 8;
2796                 break;
2797         default:
2798                 pol_sft = 7;
2799                 break;
2800         }
2801
2802         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2803         case SND_SOC_DAIFMT_CBM_CFM:
2804                 rt5645->master[dai->id] = 1;
2805                 break;
2806         case SND_SOC_DAIFMT_CBS_CFS:
2807                 reg_val |= RT5645_I2S_MS_S;
2808                 rt5645->master[dai->id] = 0;
2809                 break;
2810         default:
2811                 return -EINVAL;
2812         }
2813
2814         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2815         case SND_SOC_DAIFMT_NB_NF:
2816                 break;
2817         case SND_SOC_DAIFMT_IB_NF:
2818                 reg_val |= (1 << pol_sft);
2819                 break;
2820         default:
2821                 return -EINVAL;
2822         }
2823
2824         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2825         case SND_SOC_DAIFMT_I2S:
2826                 break;
2827         case SND_SOC_DAIFMT_LEFT_J:
2828                 reg_val |= RT5645_I2S_DF_LEFT;
2829                 break;
2830         case SND_SOC_DAIFMT_DSP_A:
2831                 reg_val |= RT5645_I2S_DF_PCM_A;
2832                 break;
2833         case SND_SOC_DAIFMT_DSP_B:
2834                 reg_val |= RT5645_I2S_DF_PCM_B;
2835                 break;
2836         default:
2837                 return -EINVAL;
2838         }
2839         switch (dai->id) {
2840         case RT5645_AIF1:
2841                 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2842                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2843                         RT5645_I2S_DF_MASK, reg_val);
2844                 break;
2845         case RT5645_AIF2:
2846                 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2847                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2848                         RT5645_I2S_DF_MASK, reg_val);
2849                 break;
2850         default:
2851                 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2852                 return -EINVAL;
2853         }
2854         return 0;
2855 }
2856
2857 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2858                 int clk_id, unsigned int freq, int dir)
2859 {
2860         struct snd_soc_codec *codec = dai->codec;
2861         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2862         unsigned int reg_val = 0;
2863
2864         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2865                 return 0;
2866
2867         switch (clk_id) {
2868         case RT5645_SCLK_S_MCLK:
2869                 reg_val |= RT5645_SCLK_SRC_MCLK;
2870                 break;
2871         case RT5645_SCLK_S_PLL1:
2872                 reg_val |= RT5645_SCLK_SRC_PLL1;
2873                 break;
2874         case RT5645_SCLK_S_RCCLK:
2875                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2876                 break;
2877         default:
2878                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2879                 return -EINVAL;
2880         }
2881         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2882                 RT5645_SCLK_SRC_MASK, reg_val);
2883         rt5645->sysclk = freq;
2884         rt5645->sysclk_src = clk_id;
2885
2886         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2887
2888         return 0;
2889 }
2890
2891 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2892                         unsigned int freq_in, unsigned int freq_out)
2893 {
2894         struct snd_soc_codec *codec = dai->codec;
2895         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2896         struct rl6231_pll_code pll_code;
2897         int ret;
2898
2899         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2900             freq_out == rt5645->pll_out)
2901                 return 0;
2902
2903         if (!freq_in || !freq_out) {
2904                 dev_dbg(codec->dev, "PLL disabled\n");
2905
2906                 rt5645->pll_in = 0;
2907                 rt5645->pll_out = 0;
2908                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2909                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2910                 return 0;
2911         }
2912
2913         switch (source) {
2914         case RT5645_PLL1_S_MCLK:
2915                 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2916                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2917                 break;
2918         case RT5645_PLL1_S_BCLK1:
2919         case RT5645_PLL1_S_BCLK2:
2920                 switch (dai->id) {
2921                 case RT5645_AIF1:
2922                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2923                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2924                         break;
2925                 case  RT5645_AIF2:
2926                         snd_soc_update_bits(codec, RT5645_GLB_CLK,
2927                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2928                         break;
2929                 default:
2930                         dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2931                         return -EINVAL;
2932                 }
2933                 break;
2934         default:
2935                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2936                 return -EINVAL;
2937         }
2938
2939         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2940         if (ret < 0) {
2941                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2942                 return ret;
2943         }
2944
2945         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2946                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2947                 pll_code.n_code, pll_code.k_code);
2948
2949         snd_soc_write(codec, RT5645_PLL_CTRL1,
2950                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2951         snd_soc_write(codec, RT5645_PLL_CTRL2,
2952                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2953                 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2954
2955         rt5645->pll_in = freq_in;
2956         rt5645->pll_out = freq_out;
2957         rt5645->pll_src = source;
2958
2959         return 0;
2960 }
2961
2962 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2963                         unsigned int rx_mask, int slots, int slot_width)
2964 {
2965         struct snd_soc_codec *codec = dai->codec;
2966         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2967         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2968         unsigned int mask, val = 0;
2969
2970         switch (rt5645->codec_type) {
2971         case CODEC_TYPE_RT5650:
2972                 en_sft = 15;
2973                 i_slot_sft = 10;
2974                 o_slot_sft = 8;
2975                 i_width_sht = 6;
2976                 o_width_sht = 4;
2977                 mask = 0x8ff0;
2978                 break;
2979         default:
2980                 en_sft = 14;
2981                 i_slot_sft = o_slot_sft = 12;
2982                 i_width_sht = o_width_sht = 10;
2983                 mask = 0x7c00;
2984                 break;
2985         }
2986         if (rx_mask || tx_mask) {
2987                 val |= (1 << en_sft);
2988                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2989                         snd_soc_update_bits(codec, RT5645_BASS_BACK,
2990                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2991         }
2992
2993         switch (slots) {
2994         case 4:
2995                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2996                 break;
2997         case 6:
2998                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2999                 break;
3000         case 8:
3001                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3002                 break;
3003         case 2:
3004         default:
3005                 break;
3006         }
3007
3008         switch (slot_width) {
3009         case 20:
3010                 val |= (1 << i_width_sht) | (1 << o_width_sht);
3011                 break;
3012         case 24:
3013                 val |= (2 << i_width_sht) | (2 << o_width_sht);
3014                 break;
3015         case 32:
3016                 val |= (3 << i_width_sht) | (3 << o_width_sht);
3017                 break;
3018         case 16:
3019         default:
3020                 break;
3021         }
3022
3023         snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
3024
3025         return 0;
3026 }
3027
3028 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
3029                         enum snd_soc_bias_level level)
3030 {
3031         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3032
3033         switch (level) {
3034         case SND_SOC_BIAS_PREPARE:
3035                 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
3036                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
3037                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3038                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
3039                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3040                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
3041                         mdelay(10);
3042                         snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
3043                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3044                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3045                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
3046                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3047                 }
3048                 break;
3049
3050         case SND_SOC_BIAS_STANDBY:
3051                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
3052                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3053                         RT5645_PWR_BG | RT5645_PWR_VREF2,
3054                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3055                         RT5645_PWR_BG | RT5645_PWR_VREF2);
3056                 mdelay(10);
3057                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
3058                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
3059                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
3060                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
3061                         snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
3062                         msleep(40);
3063                         if (rt5645->en_button_func)
3064                                 queue_delayed_work(system_power_efficient_wq,
3065                                         &rt5645->jack_detect_work,
3066                                         msecs_to_jiffies(0));
3067                 }
3068                 break;
3069
3070         case SND_SOC_BIAS_OFF:
3071                 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
3072                 if (!rt5645->en_button_func)
3073                         snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
3074                                         RT5645_DIG_GATE_CTRL, 0);
3075                 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
3076                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3077                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3078                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3079                 break;
3080
3081         default:
3082                 break;
3083         }
3084
3085         return 0;
3086 }
3087
3088 static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec,
3089         bool enable)
3090 {
3091         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3092
3093         if (enable) {
3094                 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3095                 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3096                 snd_soc_dapm_sync(dapm);
3097
3098                 snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3099                 snd_soc_update_bits(codec,
3100                                         RT5645_INT_IRQ_ST, 0x8, 0x8);
3101                 snd_soc_update_bits(codec,
3102                                         RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3103                 snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
3104                 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3105                         snd_soc_read(codec, RT5650_4BTN_IL_CMD1));
3106         } else {
3107                 snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3108                 snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0);
3109
3110                 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3111                 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3112                 snd_soc_dapm_sync(dapm);
3113         }
3114 }
3115
3116 static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
3117 {
3118         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3119         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3120         unsigned int val;
3121
3122         if (jack_insert) {
3123                 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3124
3125                 /* for jack type detect */
3126                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3127                 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3128                 snd_soc_dapm_sync(dapm);
3129                 if (!dapm->card->instantiated) {
3130                         /* Power up necessary bits for JD if dapm is
3131                            not ready yet */
3132                         regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3133                                 RT5645_PWR_MB | RT5645_PWR_VREF2,
3134                                 RT5645_PWR_MB | RT5645_PWR_VREF2);
3135                         regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3136                                 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3137                         regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3138                                 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3139                 }
3140
3141                 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3142                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3143                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3144                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3145                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3146                 msleep(100);
3147                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3148                         RT5645_CBJ_MN_JD, 0);
3149
3150                 msleep(600);
3151                 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3152                 val &= 0x7;
3153                 dev_dbg(codec->dev, "val = %d\n", val);
3154
3155                 if (val == 1 || val == 2) {
3156                         rt5645->jack_type = SND_JACK_HEADSET;
3157                         if (rt5645->en_button_func) {
3158                                 rt5645_enable_push_button_irq(codec, true);
3159                         }
3160                 } else {
3161                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3162                         snd_soc_dapm_sync(dapm);
3163                         rt5645->jack_type = SND_JACK_HEADPHONE;
3164                 }
3165                 if (rt5645->pdata.level_trigger_irq)
3166                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3167                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3168         } else { /* jack out */
3169                 rt5645->jack_type = 0;
3170
3171                 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3172                         RT5645_L_MUTE | RT5645_R_MUTE,
3173                         RT5645_L_MUTE | RT5645_R_MUTE);
3174                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3175                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3176                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3177                         RT5645_CBJ_BST1_EN, 0);
3178
3179                 if (rt5645->en_button_func)
3180                         rt5645_enable_push_button_irq(codec, false);
3181
3182                 if (rt5645->pdata.jd_mode == 0)
3183                         snd_soc_dapm_disable_pin(dapm, "LDO2");
3184                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3185                 snd_soc_dapm_sync(dapm);
3186                 if (rt5645->pdata.level_trigger_irq)
3187                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3188                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3189         }
3190
3191         return rt5645->jack_type;
3192 }
3193
3194 static int rt5645_button_detect(struct snd_soc_codec *codec)
3195 {
3196         int btn_type, val;
3197
3198         val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
3199         pr_debug("val=0x%x\n", val);
3200         btn_type = val & 0xfff0;
3201         snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val);
3202
3203         return btn_type;
3204 }
3205
3206 static irqreturn_t rt5645_irq(int irq, void *data);
3207
3208 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
3209         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3210         struct snd_soc_jack *btn_jack)
3211 {
3212         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3213
3214         rt5645->hp_jack = hp_jack;
3215         rt5645->mic_jack = mic_jack;
3216         rt5645->btn_jack = btn_jack;
3217         if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3218                 rt5645->en_button_func = true;
3219                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3220                                 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3221                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3222                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3223         }
3224         rt5645_irq(0, rt5645);
3225
3226         return 0;
3227 }
3228 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3229
3230 static void rt5645_jack_detect_work(struct work_struct *work)
3231 {
3232         struct rt5645_priv *rt5645 =
3233                 container_of(work, struct rt5645_priv, jack_detect_work.work);
3234         int val, btn_type, gpio_state = 0, report = 0;
3235
3236         if (!rt5645->codec)
3237                 return;
3238
3239         switch (rt5645->pdata.jd_mode) {
3240         case 0: /* Not using rt5645 JD */
3241                 if (rt5645->gpiod_hp_det) {
3242                         gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3243                         dev_dbg(rt5645->codec->dev, "gpio_state = %d\n",
3244                                 gpio_state);
3245                         report = rt5645_jack_detect(rt5645->codec, gpio_state);
3246                 }
3247                 snd_soc_jack_report(rt5645->hp_jack,
3248                                     report, SND_JACK_HEADPHONE);
3249                 snd_soc_jack_report(rt5645->mic_jack,
3250                                     report, SND_JACK_MICROPHONE);
3251                 return;
3252         default: /* read rt5645 jd1_1 status */
3253                 val = snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x1000;
3254                 break;
3255
3256         }
3257
3258         if (!val && (rt5645->jack_type == 0)) { /* jack in */
3259                 report = rt5645_jack_detect(rt5645->codec, 1);
3260         } else if (!val && rt5645->jack_type != 0) {
3261                 /* for push button and jack out */
3262                 btn_type = 0;
3263                 if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) {
3264                         /* button pressed */
3265                         report = SND_JACK_HEADSET;
3266                         btn_type = rt5645_button_detect(rt5645->codec);
3267                         /* rt5650 can report three kinds of button behavior,
3268                            one click, double click and hold. However,
3269                            currently we will report button pressed/released
3270                            event. So all the three button behaviors are
3271                            treated as button pressed. */
3272                         switch (btn_type) {
3273                         case 0x8000:
3274                         case 0x4000:
3275                         case 0x2000:
3276                                 report |= SND_JACK_BTN_0;
3277                                 break;
3278                         case 0x1000:
3279                         case 0x0800:
3280                         case 0x0400:
3281                                 report |= SND_JACK_BTN_1;
3282                                 break;
3283                         case 0x0200:
3284                         case 0x0100:
3285                         case 0x0080:
3286                                 report |= SND_JACK_BTN_2;
3287                                 break;
3288                         case 0x0040:
3289                         case 0x0020:
3290                         case 0x0010:
3291                                 report |= SND_JACK_BTN_3;
3292                                 break;
3293                         case 0x0000: /* unpressed */
3294                                 break;
3295                         default:
3296                                 dev_err(rt5645->codec->dev,
3297                                         "Unexpected button code 0x%04x\n",
3298                                         btn_type);
3299                                 break;
3300                         }
3301                 }
3302                 if (btn_type == 0)/* button release */
3303                         report =  rt5645->jack_type;
3304                 else {
3305                         mod_timer(&rt5645->btn_check_timer,
3306                                 msecs_to_jiffies(100));
3307                 }
3308         } else {
3309                 /* jack out */
3310                 report = 0;
3311                 snd_soc_update_bits(rt5645->codec,
3312                                     RT5645_INT_IRQ_ST, 0x1, 0x0);
3313                 rt5645_jack_detect(rt5645->codec, 0);
3314         }
3315
3316         snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3317         snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3318         if (rt5645->en_button_func)
3319                 snd_soc_jack_report(rt5645->btn_jack,
3320                         report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3321                                 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3322 }
3323
3324 static void rt5645_rcclock_work(struct work_struct *work)
3325 {
3326         struct rt5645_priv *rt5645 =
3327                 container_of(work, struct rt5645_priv, rcclock_work.work);
3328
3329         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3330                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3331 }
3332
3333 static irqreturn_t rt5645_irq(int irq, void *data)
3334 {
3335         struct rt5645_priv *rt5645 = data;
3336
3337         queue_delayed_work(system_power_efficient_wq,
3338                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
3339
3340         return IRQ_HANDLED;
3341 }
3342
3343 static void rt5645_btn_check_callback(unsigned long data)
3344 {
3345         struct rt5645_priv *rt5645 = (struct rt5645_priv *)data;
3346
3347         queue_delayed_work(system_power_efficient_wq,
3348                    &rt5645->jack_detect_work, msecs_to_jiffies(5));
3349 }
3350
3351 static int rt5645_probe(struct snd_soc_codec *codec)
3352 {
3353         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3354         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3355
3356         rt5645->codec = codec;
3357
3358         switch (rt5645->codec_type) {
3359         case CODEC_TYPE_RT5645:
3360                 snd_soc_dapm_new_controls(dapm,
3361                         rt5645_specific_dapm_widgets,
3362                         ARRAY_SIZE(rt5645_specific_dapm_widgets));
3363                 snd_soc_dapm_add_routes(dapm,
3364                         rt5645_specific_dapm_routes,
3365                         ARRAY_SIZE(rt5645_specific_dapm_routes));
3366                 break;
3367         case CODEC_TYPE_RT5650:
3368                 snd_soc_dapm_new_controls(dapm,
3369                         rt5650_specific_dapm_widgets,
3370                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
3371                 snd_soc_dapm_add_routes(dapm,
3372                         rt5650_specific_dapm_routes,
3373                         ARRAY_SIZE(rt5650_specific_dapm_routes));
3374                 break;
3375         }
3376
3377         snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
3378
3379         /* for JD function */
3380         if (rt5645->pdata.jd_mode) {
3381                 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3382                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3383                 snd_soc_dapm_sync(dapm);
3384         }
3385
3386         rt5645->eq_param = devm_kzalloc(codec->dev,
3387                 RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s), GFP_KERNEL);
3388
3389         return 0;
3390 }
3391
3392 static int rt5645_remove(struct snd_soc_codec *codec)
3393 {
3394         rt5645_reset(codec);
3395         return 0;
3396 }
3397
3398 #ifdef CONFIG_PM
3399 static int rt5645_suspend(struct snd_soc_codec *codec)
3400 {
3401         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3402
3403         regcache_cache_only(rt5645->regmap, true);
3404         regcache_mark_dirty(rt5645->regmap);
3405
3406         return 0;
3407 }
3408
3409 static int rt5645_resume(struct snd_soc_codec *codec)
3410 {
3411         struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3412
3413         regcache_cache_only(rt5645->regmap, false);
3414         regcache_sync(rt5645->regmap);
3415
3416         return 0;
3417 }
3418 #else
3419 #define rt5645_suspend NULL
3420 #define rt5645_resume NULL
3421 #endif
3422
3423 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3424 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3425                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3426
3427 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3428         .hw_params = rt5645_hw_params,
3429         .set_fmt = rt5645_set_dai_fmt,
3430         .set_sysclk = rt5645_set_dai_sysclk,
3431         .set_tdm_slot = rt5645_set_tdm_slot,
3432         .set_pll = rt5645_set_dai_pll,
3433 };
3434
3435 static struct snd_soc_dai_driver rt5645_dai[] = {
3436         {
3437                 .name = "rt5645-aif1",
3438                 .id = RT5645_AIF1,
3439                 .playback = {
3440                         .stream_name = "AIF1 Playback",
3441                         .channels_min = 1,
3442                         .channels_max = 2,
3443                         .rates = RT5645_STEREO_RATES,
3444                         .formats = RT5645_FORMATS,
3445                 },
3446                 .capture = {
3447                         .stream_name = "AIF1 Capture",
3448                         .channels_min = 1,
3449                         .channels_max = 4,
3450                         .rates = RT5645_STEREO_RATES,
3451                         .formats = RT5645_FORMATS,
3452                 },
3453                 .ops = &rt5645_aif_dai_ops,
3454         },
3455         {
3456                 .name = "rt5645-aif2",
3457                 .id = RT5645_AIF2,
3458                 .playback = {
3459                         .stream_name = "AIF2 Playback",
3460                         .channels_min = 1,
3461                         .channels_max = 2,
3462                         .rates = RT5645_STEREO_RATES,
3463                         .formats = RT5645_FORMATS,
3464                 },
3465                 .capture = {
3466                         .stream_name = "AIF2 Capture",
3467                         .channels_min = 1,
3468                         .channels_max = 2,
3469                         .rates = RT5645_STEREO_RATES,
3470                         .formats = RT5645_FORMATS,
3471                 },
3472                 .ops = &rt5645_aif_dai_ops,
3473         },
3474 };
3475
3476 static const struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
3477         .probe = rt5645_probe,
3478         .remove = rt5645_remove,
3479         .suspend = rt5645_suspend,
3480         .resume = rt5645_resume,
3481         .set_bias_level = rt5645_set_bias_level,
3482         .idle_bias_off = true,
3483         .component_driver = {
3484                 .controls               = rt5645_snd_controls,
3485                 .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3486                 .dapm_widgets           = rt5645_dapm_widgets,
3487                 .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3488                 .dapm_routes            = rt5645_dapm_routes,
3489                 .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3490         },
3491 };
3492
3493 static const struct regmap_config rt5645_regmap = {
3494         .reg_bits = 8,
3495         .val_bits = 16,
3496         .use_single_rw = true,
3497         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3498                                                RT5645_PR_SPACING),
3499         .volatile_reg = rt5645_volatile_register,
3500         .readable_reg = rt5645_readable_register,
3501
3502         .cache_type = REGCACHE_RBTREE,
3503         .reg_defaults = rt5645_reg,
3504         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3505         .ranges = rt5645_ranges,
3506         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3507 };
3508
3509 static const struct regmap_config rt5650_regmap = {
3510         .reg_bits = 8,
3511         .val_bits = 16,
3512         .use_single_rw = true,
3513         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3514                                                RT5645_PR_SPACING),
3515         .volatile_reg = rt5645_volatile_register,
3516         .readable_reg = rt5645_readable_register,
3517
3518         .cache_type = REGCACHE_RBTREE,
3519         .reg_defaults = rt5650_reg,
3520         .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3521         .ranges = rt5645_ranges,
3522         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3523 };
3524
3525 static const struct regmap_config temp_regmap = {
3526         .name="nocache",
3527         .reg_bits = 8,
3528         .val_bits = 16,
3529         .use_single_rw = true,
3530         .max_register = RT5645_VENDOR_ID2 + 1,
3531         .cache_type = REGCACHE_NONE,
3532 };
3533
3534 static const struct i2c_device_id rt5645_i2c_id[] = {
3535         { "rt5645", 0 },
3536         { "rt5650", 0 },
3537         { }
3538 };
3539 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3540
3541 #ifdef CONFIG_OF
3542 static const struct of_device_id rt5645_of_match[] = {
3543         { .compatible = "realtek,rt5645", },
3544         { .compatible = "realtek,rt5650", },
3545         { }
3546 };
3547 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3548 #endif
3549
3550 #ifdef CONFIG_ACPI
3551 static const struct acpi_device_id rt5645_acpi_match[] = {
3552         { "10EC5645", 0 },
3553         { "10EC5648", 0 },
3554         { "10EC5650", 0 },
3555         { "10EC5640", 0 },
3556         { "10EC3270", 0 },
3557         {},
3558 };
3559 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3560 #endif
3561
3562 static const struct rt5645_platform_data general_platform_data = {
3563         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3564         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3565         .jd_mode = 3,
3566 };
3567
3568 static const struct dmi_system_id dmi_platform_intel_braswell[] = {
3569         {
3570                 .ident = "Intel Strago",
3571                 .matches = {
3572                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3573                 },
3574         },
3575         {
3576                 .ident = "Google Chrome",
3577                 .matches = {
3578                         DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3579                 },
3580         },
3581         {
3582                 .ident = "Google Setzer",
3583                 .matches = {
3584                         DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3585                 },
3586         },
3587         {
3588                 .ident = "Microsoft Surface 3",
3589                 .matches = {
3590                         DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3591                 },
3592         },
3593         { }
3594 };
3595
3596 static const struct rt5645_platform_data buddy_platform_data = {
3597         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3598         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3599         .jd_mode = 3,
3600         .level_trigger_irq = true,
3601 };
3602
3603 static const struct dmi_system_id dmi_platform_intel_broadwell[] = {
3604         {
3605                 .ident = "Chrome Buddy",
3606                 .matches = {
3607                         DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3608                 },
3609         },
3610         { }
3611 };
3612
3613 static const struct rt5645_platform_data gpd_win_platform_data = {
3614         .jd_mode = 3,
3615         .inv_jd1_1 = true,
3616 };
3617
3618 static const struct dmi_system_id dmi_platform_gpd_win[] = {
3619         {
3620                 /*
3621                  * Match for the GPDwin which unfortunately uses somewhat
3622                  * generic dmi strings, which is why we test for 4 strings.
3623                  * Comparing against 23 other byt/cht boards, board_vendor
3624                  * and board_name are unique to the GPDwin, where as only one
3625                  * other board has the same board_serial and 3 others have
3626                  * the same default product_name. Also the GPDwin is the
3627                  * only device to have both board_ and product_name not set.
3628                  */
3629                 .ident = "GPD Win",
3630                 .matches = {
3631                         DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3632                         DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3633                         DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3634                         DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3635                 },
3636         },
3637         {}
3638 };
3639
3640 static struct rt5645_platform_data general_platform_data2 = {
3641         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3642         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3643         .jd_mode = 3,
3644         .inv_jd1_1 = true,
3645 };
3646
3647 static struct dmi_system_id dmi_platform_asus_t100ha[] = {
3648         {
3649                 .ident = "ASUS T100HAN",
3650                 .matches = {
3651                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3652                         DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3653                 },
3654         },
3655         { }
3656 };
3657
3658 static struct rt5645_platform_data minix_z83_4_platform_data = {
3659         .jd_mode = 3,
3660 };
3661
3662 static struct dmi_system_id dmi_platform_minix_z83_4[] = {
3663         {
3664                 .ident = "MINIX Z83-4",
3665                 .matches = {
3666                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3667                         DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3668                 },
3669         },
3670         { }
3671 };
3672
3673 static bool rt5645_check_dp(struct device *dev)
3674 {
3675         if (device_property_present(dev, "realtek,in2-differential") ||
3676                 device_property_present(dev, "realtek,dmic1-data-pin") ||
3677                 device_property_present(dev, "realtek,dmic2-data-pin") ||
3678                 device_property_present(dev, "realtek,jd-mode"))
3679                 return true;
3680
3681         return false;
3682 }
3683
3684 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3685 {
3686         rt5645->pdata.in2_diff = device_property_read_bool(dev,
3687                 "realtek,in2-differential");
3688         device_property_read_u32(dev,
3689                 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3690         device_property_read_u32(dev,
3691                 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3692         device_property_read_u32(dev,
3693                 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3694
3695         return 0;
3696 }
3697
3698 static int rt5645_i2c_probe(struct i2c_client *i2c,
3699                     const struct i2c_device_id *id)
3700 {
3701         struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3702         struct rt5645_priv *rt5645;
3703         int ret, i;
3704         unsigned int val;
3705         struct regmap *regmap;
3706
3707         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3708                                 GFP_KERNEL);
3709         if (rt5645 == NULL)
3710                 return -ENOMEM;
3711
3712         rt5645->i2c = i2c;
3713         i2c_set_clientdata(i2c, rt5645);
3714
3715         if (pdata)
3716                 rt5645->pdata = *pdata;
3717         else if (dmi_check_system(dmi_platform_intel_broadwell))
3718                 rt5645->pdata = buddy_platform_data;
3719         else if (rt5645_check_dp(&i2c->dev))
3720                 rt5645_parse_dt(rt5645, &i2c->dev);
3721         else if (dmi_check_system(dmi_platform_intel_braswell))
3722                 rt5645->pdata = general_platform_data;
3723         else if (dmi_check_system(dmi_platform_gpd_win))
3724                 rt5645->pdata = gpd_win_platform_data;
3725         else if (dmi_check_system(dmi_platform_asus_t100ha))
3726                 rt5645->pdata = general_platform_data2;
3727         else if (dmi_check_system(dmi_platform_minix_z83_4))
3728                 rt5645->pdata = minix_z83_4_platform_data;
3729
3730         if (quirk != -1) {
3731                 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3732                 rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3733                 rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3734                 rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3735                 rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3736                 rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3737         }
3738
3739         rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3740                                                        GPIOD_IN);
3741
3742         if (IS_ERR(rt5645->gpiod_hp_det)) {
3743                 dev_info(&i2c->dev, "failed to initialize gpiod\n");
3744                 ret = PTR_ERR(rt5645->gpiod_hp_det);
3745                 /*
3746                  * Continue if optional gpiod is missing, bail for all other
3747                  * errors, including -EPROBE_DEFER
3748                  */
3749                 if (ret != -ENOENT)
3750                         return ret;
3751         }
3752
3753         for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3754                 rt5645->supplies[i].supply = rt5645_supply_names[i];
3755
3756         ret = devm_regulator_bulk_get(&i2c->dev,
3757                                       ARRAY_SIZE(rt5645->supplies),
3758                                       rt5645->supplies);
3759         if (ret) {
3760                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3761                 return ret;
3762         }
3763
3764         ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3765                                     rt5645->supplies);
3766         if (ret) {
3767                 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3768                 return ret;
3769         }
3770
3771         regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3772         if (IS_ERR(regmap)) {
3773                 ret = PTR_ERR(regmap);
3774                 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3775                         ret);
3776                 return ret;
3777         }
3778         regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3779
3780         switch (val) {
3781         case RT5645_DEVICE_ID:
3782                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3783                 rt5645->codec_type = CODEC_TYPE_RT5645;
3784                 break;
3785         case RT5650_DEVICE_ID:
3786                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3787                 rt5645->codec_type = CODEC_TYPE_RT5650;
3788                 break;
3789         default:
3790                 dev_err(&i2c->dev,
3791                         "Device with ID register %#x is not rt5645 or rt5650\n",
3792                         val);
3793                 ret = -ENODEV;
3794                 goto err_enable;
3795         }
3796
3797         if (IS_ERR(rt5645->regmap)) {
3798                 ret = PTR_ERR(rt5645->regmap);
3799                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3800                         ret);
3801                 return ret;
3802         }
3803
3804         regmap_write(rt5645->regmap, RT5645_RESET, 0);
3805
3806         ret = regmap_register_patch(rt5645->regmap, init_list,
3807                                     ARRAY_SIZE(init_list));
3808         if (ret != 0)
3809                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3810
3811         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3812                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3813                                     ARRAY_SIZE(rt5650_init_list));
3814                 if (ret != 0)
3815                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3816                                            ret);
3817         }
3818
3819         regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
3820
3821         if (rt5645->pdata.in2_diff)
3822                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3823                                         RT5645_IN_DF2, RT5645_IN_DF2);
3824
3825         if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3826                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3827                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3828         }
3829         switch (rt5645->pdata.dmic1_data_pin) {
3830         case RT5645_DMIC_DATA_IN2N:
3831                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3832                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3833                 break;
3834
3835         case RT5645_DMIC_DATA_GPIO5:
3836                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3837                         RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3838                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3839                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3840                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3841                         RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3842                 break;
3843
3844         case RT5645_DMIC_DATA_GPIO11:
3845                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3846                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3847                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3848                         RT5645_GP11_PIN_MASK,
3849                         RT5645_GP11_PIN_DMIC1_SDA);
3850                 break;
3851
3852         default:
3853                 break;
3854         }
3855
3856         switch (rt5645->pdata.dmic2_data_pin) {
3857         case RT5645_DMIC_DATA_IN2P:
3858                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3859                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3860                 break;
3861
3862         case RT5645_DMIC_DATA_GPIO6:
3863                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3864                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3865                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3866                         RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3867                 break;
3868
3869         case RT5645_DMIC_DATA_GPIO10:
3870                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3871                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3872                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3873                         RT5645_GP10_PIN_MASK,
3874                         RT5645_GP10_PIN_DMIC2_SDA);
3875                 break;
3876
3877         case RT5645_DMIC_DATA_GPIO12:
3878                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3879                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3880                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3881                         RT5645_GP12_PIN_MASK,
3882                         RT5645_GP12_PIN_DMIC2_SDA);
3883                 break;
3884
3885         default:
3886                 break;
3887         }
3888
3889         if (rt5645->pdata.jd_mode) {
3890                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3891                                    RT5645_IRQ_CLK_GATE_CTRL,
3892                                    RT5645_IRQ_CLK_GATE_CTRL);
3893                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3894                                    RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3895                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3896                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3897                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3898                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3899                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3900                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3901                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3902                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3903                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3904                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3905                 switch (rt5645->pdata.jd_mode) {
3906                 case 1:
3907                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3908                                            RT5645_JD1_MODE_MASK,
3909                                            RT5645_JD1_MODE_0);
3910                         break;
3911                 case 2:
3912                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3913                                            RT5645_JD1_MODE_MASK,
3914                                            RT5645_JD1_MODE_1);
3915                         break;
3916                 case 3:
3917                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3918                                            RT5645_JD1_MODE_MASK,
3919                                            RT5645_JD1_MODE_2);
3920                         break;
3921                 default:
3922                         break;
3923                 }
3924                 if (rt5645->pdata.inv_jd1_1) {
3925                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3926                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3927                 }
3928         }
3929
3930         regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
3931                 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
3932
3933         if (rt5645->pdata.level_trigger_irq) {
3934                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3935                         RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3936         }
3937         setup_timer(&rt5645->btn_check_timer,
3938                 rt5645_btn_check_callback, (unsigned long)rt5645);
3939
3940         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
3941         INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
3942
3943         if (rt5645->i2c->irq) {
3944                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
3945                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
3946                         | IRQF_ONESHOT, "rt5645", rt5645);
3947                 if (ret) {
3948                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
3949                         goto err_enable;
3950                 }
3951         }
3952
3953         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
3954                                      rt5645_dai, ARRAY_SIZE(rt5645_dai));
3955         if (ret)
3956                 goto err_irq;
3957
3958         return 0;
3959
3960 err_irq:
3961         if (rt5645->i2c->irq)
3962                 free_irq(rt5645->i2c->irq, rt5645);
3963 err_enable:
3964         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3965         return ret;
3966 }
3967
3968 static int rt5645_i2c_remove(struct i2c_client *i2c)
3969 {
3970         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3971
3972         if (i2c->irq)
3973                 free_irq(i2c->irq, rt5645);
3974
3975         cancel_delayed_work_sync(&rt5645->jack_detect_work);
3976         cancel_delayed_work_sync(&rt5645->rcclock_work);
3977         del_timer_sync(&rt5645->btn_check_timer);
3978
3979         snd_soc_unregister_codec(&i2c->dev);
3980         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3981
3982         return 0;
3983 }
3984
3985 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
3986 {
3987         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3988
3989         regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3990                 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
3991         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
3992                 RT5645_CBJ_MN_JD);
3993         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
3994                 0);
3995         msleep(20);
3996         regmap_write(rt5645->regmap, RT5645_RESET, 0);
3997 }
3998
3999 static struct i2c_driver rt5645_i2c_driver = {
4000         .driver = {
4001                 .name = "rt5645",
4002                 .of_match_table = of_match_ptr(rt5645_of_match),
4003                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4004         },
4005         .probe = rt5645_i2c_probe,
4006         .remove = rt5645_i2c_remove,
4007         .shutdown = rt5645_i2c_shutdown,
4008         .id_table = rt5645_i2c_id,
4009 };
4010 module_i2c_driver(rt5645_i2c_driver);
4011
4012 MODULE_DESCRIPTION("ASoC RT5645 driver");
4013 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4014 MODULE_LICENSE("GPL v2");