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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ALSA SoC Texas Instruments TAS6424 Quad-Channel Audio Amplifier
4 *
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
6 * Author: Andreas Dannenberg <dannenberg@ti.com>
7 * Andrew F. Davis <afd@ti.com>
8 */
9
10 #ifndef __TAS6424_H__
11 #define __TAS6424_H__
12
13 #define TAS6424_RATES (SNDRV_PCM_RATE_44100 | \
14 SNDRV_PCM_RATE_48000 | \
15 SNDRV_PCM_RATE_96000)
16
17 #define TAS6424_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
18 SNDRV_PCM_FMTBIT_S24_LE)
19
20 /* Register Address Map */
21 #define TAS6424_MODE_CTRL 0x00
22 #define TAS6424_MISC_CTRL1 0x01
23 #define TAS6424_MISC_CTRL2 0x02
24 #define TAS6424_SAP_CTRL 0x03
25 #define TAS6424_CH_STATE_CTRL 0x04
26 #define TAS6424_CH1_VOL_CTRL 0x05
27 #define TAS6424_CH2_VOL_CTRL 0x06
28 #define TAS6424_CH3_VOL_CTRL 0x07
29 #define TAS6424_CH4_VOL_CTRL 0x08
30 #define TAS6424_DC_DIAG_CTRL1 0x09
31 #define TAS6424_DC_DIAG_CTRL2 0x0a
32 #define TAS6424_DC_DIAG_CTRL3 0x0b
33 #define TAS6424_DC_LOAD_DIAG_REP12 0x0c
34 #define TAS6424_DC_LOAD_DIAG_REP34 0x0d
35 #define TAS6424_DC_LOAD_DIAG_REPLO 0x0e
36 #define TAS6424_CHANNEL_STATE 0x0f
37 #define TAS6424_CHANNEL_FAULT 0x10
38 #define TAS6424_GLOB_FAULT1 0x11
39 #define TAS6424_GLOB_FAULT2 0x12
40 #define TAS6424_WARN 0x13
41 #define TAS6424_PIN_CTRL 0x14
42 #define TAS6424_AC_DIAG_CTRL1 0x15
43 #define TAS6424_AC_DIAG_CTRL2 0x16
44 #define TAS6424_AC_LOAD_DIAG_REP1 0x17
45 #define TAS6424_AC_LOAD_DIAG_REP2 0x18
46 #define TAS6424_AC_LOAD_DIAG_REP3 0x19
47 #define TAS6424_AC_LOAD_DIAG_REP4 0x1a
48 #define TAS6424_MISC_CTRL3 0x21
49 #define TAS6424_CLIP_CTRL 0x22
50 #define TAS6424_CLIP_WINDOW 0x23
51 #define TAS6424_CLIP_WARN 0x24
52 #define TAS6424_CBC_STAT 0x25
53 #define TAS6424_MISC_CTRL4 0x26
54 #define TAS6424_MAX TAS6424_MISC_CTRL4
55
56 /* TAS6424_MODE_CTRL_REG */
57 #define TAS6424_RESET BIT(7)
58
59 /* TAS6424_SAP_CTRL_REG */
60 #define TAS6424_SAP_RATE_MASK GENMASK(7, 6)
61 #define TAS6424_SAP_RATE_44100 (0x00 << 6)
62 #define TAS6424_SAP_RATE_48000 (0x01 << 6)
63 #define TAS6424_SAP_RATE_96000 (0x02 << 6)
64 #define TAS6424_SAP_TDM_SLOT_LAST BIT(5)
65 #define TAS6424_SAP_TDM_SLOT_SZ_16 BIT(4)
66 #define TAS6424_SAP_TDM_SLOT_SWAP BIT(3)
67 #define TAS6424_SAP_FMT_MASK GENMASK(2, 0)
68 #define TAS6424_SAP_RIGHTJ_24 (0x00 << 0)
69 #define TAS6424_SAP_RIGHTJ_20 (0x01 << 0)
70 #define TAS6424_SAP_RIGHTJ_18 (0x02 << 0)
71 #define TAS6424_SAP_RIGHTJ_16 (0x03 << 0)
72 #define TAS6424_SAP_I2S (0x04 << 0)
73 #define TAS6424_SAP_LEFTJ (0x05 << 0)
74 #define TAS6424_SAP_DSP (0x06 << 0)
75
76 /* TAS6424_CH_STATE_CTRL_REG */
77 #define TAS6424_CH1_STATE_MASK GENMASK(7, 6)
78 #define TAS6424_CH1_STATE_PLAY (0x00 << 6)
79 #define TAS6424_CH1_STATE_HIZ (0x01 << 6)
80 #define TAS6424_CH1_STATE_MUTE (0x02 << 6)
81 #define TAS6424_CH1_STATE_DIAG (0x03 << 6)
82 #define TAS6424_CH2_STATE_MASK GENMASK(5, 4)
83 #define TAS6424_CH2_STATE_PLAY (0x00 << 4)
84 #define TAS6424_CH2_STATE_HIZ (0x01 << 4)
85 #define TAS6424_CH2_STATE_MUTE (0x02 << 4)
86 #define TAS6424_CH2_STATE_DIAG (0x03 << 4)
87 #define TAS6424_CH3_STATE_MASK GENMASK(3, 2)
88 #define TAS6424_CH3_STATE_PLAY (0x00 << 2)
89 #define TAS6424_CH3_STATE_HIZ (0x01 << 2)
90 #define TAS6424_CH3_STATE_MUTE (0x02 << 2)
91 #define TAS6424_CH3_STATE_DIAG (0x03 << 2)
92 #define TAS6424_CH4_STATE_MASK GENMASK(1, 0)
93 #define TAS6424_CH4_STATE_PLAY (0x00 << 0)
94 #define TAS6424_CH4_STATE_HIZ (0x01 << 0)
95 #define TAS6424_CH4_STATE_MUTE (0x02 << 0)
96 #define TAS6424_CH4_STATE_DIAG (0x03 << 0)
97 #define TAS6424_ALL_STATE_PLAY (TAS6424_CH1_STATE_PLAY | \
98 TAS6424_CH2_STATE_PLAY | \
99 TAS6424_CH3_STATE_PLAY | \
100 TAS6424_CH4_STATE_PLAY)
101 #define TAS6424_ALL_STATE_HIZ (TAS6424_CH1_STATE_HIZ | \
102 TAS6424_CH2_STATE_HIZ | \
103 TAS6424_CH3_STATE_HIZ | \
104 TAS6424_CH4_STATE_HIZ)
105 #define TAS6424_ALL_STATE_MUTE (TAS6424_CH1_STATE_MUTE | \
106 TAS6424_CH2_STATE_MUTE | \
107 TAS6424_CH3_STATE_MUTE | \
108 TAS6424_CH4_STATE_MUTE)
109 #define TAS6424_ALL_STATE_DIAG (TAS6424_CH1_STATE_DIAG | \
110 TAS6424_CH2_STATE_DIAG | \
111 TAS6424_CH3_STATE_DIAG | \
112 TAS6424_CH4_STATE_DIAG)
113
114 /* TAS6424_DC_DIAG_CTRL1 */
115 #define TAS6424_LDGBYPASS_SHIFT 0
116 #define TAS6424_LDGBYPASS_MASK BIT(TAS6424_LDGBYPASS_SHIFT)
117
118 /* TAS6424_GLOB_FAULT1_REG */
119 #define TAS6424_FAULT_OC_CH1 BIT(7)
120 #define TAS6424_FAULT_OC_CH2 BIT(6)
121 #define TAS6424_FAULT_OC_CH3 BIT(5)
122 #define TAS6424_FAULT_OC_CH4 BIT(4)
123 #define TAS6424_FAULT_DC_CH1 BIT(3)
124 #define TAS6424_FAULT_DC_CH2 BIT(2)
125 #define TAS6424_FAULT_DC_CH3 BIT(1)
126 #define TAS6424_FAULT_DC_CH4 BIT(0)
127
128 /* TAS6424_GLOB_FAULT1_REG */
129 #define TAS6424_FAULT_CLOCK BIT(4)
130 #define TAS6424_FAULT_PVDD_OV BIT(3)
131 #define TAS6424_FAULT_VBAT_OV BIT(2)
132 #define TAS6424_FAULT_PVDD_UV BIT(1)
133 #define TAS6424_FAULT_VBAT_UV BIT(0)
134
135 /* TAS6424_GLOB_FAULT2_REG */
136 #define TAS6424_FAULT_OTSD BIT(4)
137 #define TAS6424_FAULT_OTSD_CH1 BIT(3)
138 #define TAS6424_FAULT_OTSD_CH2 BIT(2)
139 #define TAS6424_FAULT_OTSD_CH3 BIT(1)
140 #define TAS6424_FAULT_OTSD_CH4 BIT(0)
141
142 /* TAS6424_WARN_REG */
143 #define TAS6424_WARN_VDD_UV BIT(6)
144 #define TAS6424_WARN_VDD_POR BIT(5)
145 #define TAS6424_WARN_VDD_OTW BIT(4)
146 #define TAS6424_WARN_VDD_OTW_CH1 BIT(3)
147 #define TAS6424_WARN_VDD_OTW_CH2 BIT(2)
148 #define TAS6424_WARN_VDD_OTW_CH3 BIT(1)
149 #define TAS6424_WARN_VDD_OTW_CH4 BIT(0)
150
151 /* TAS6424_MISC_CTRL3_REG */
152 #define TAS6424_CLEAR_FAULT BIT(7)
153 #define TAS6424_PBTL_CH_SEL BIT(6)
154 #define TAS6424_MASK_CBC_WARN BIT(5)
155 #define TAS6424_MASK_VDD_UV BIT(4)
156 #define TAS6424_OTSD_AUTO_RECOVERY BIT(3)
157
158 #endif /* __TAS6424_H__ */