]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - sound/soc/codecs/twl4030.c
projects / mirror_ubuntu-jammy-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs
[mirror_ubuntu-jammy-kernel.git] / sound / soc / codecs / twl4030.c
1 /*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/pm.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/slab.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/soc-dapm.h>
36 #include <sound/initval.h>
37 #include <sound/tlv.h>
38
39 #include "twl4030.h"
40
41 /*
42 * twl4030 register cache & default register settings
43 */
44 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
45 0x00, /* this register not used */
46 0x91, /* REG_CODEC_MODE (0x1) */
47 0xc3, /* REG_OPTION (0x2) */
48 0x00, /* REG_UNKNOWN (0x3) */
49 0x00, /* REG_MICBIAS_CTL (0x4) */
50 0x20, /* REG_ANAMICL (0x5) */
51 0x00, /* REG_ANAMICR (0x6) */
52 0x00, /* REG_AVADC_CTL (0x7) */
53 0x00, /* REG_ADCMICSEL (0x8) */
54 0x00, /* REG_DIGMIXING (0x9) */
55 0x0c, /* REG_ATXL1PGA (0xA) */
56 0x0c, /* REG_ATXR1PGA (0xB) */
57 0x00, /* REG_AVTXL2PGA (0xC) */
58 0x00, /* REG_AVTXR2PGA (0xD) */
59 0x00, /* REG_AUDIO_IF (0xE) */
60 0x00, /* REG_VOICE_IF (0xF) */
61 0x00, /* REG_ARXR1PGA (0x10) */
62 0x00, /* REG_ARXL1PGA (0x11) */
63 0x6c, /* REG_ARXR2PGA (0x12) */
64 0x6c, /* REG_ARXL2PGA (0x13) */
65 0x00, /* REG_VRXPGA (0x14) */
66 0x00, /* REG_VSTPGA (0x15) */
67 0x00, /* REG_VRX2ARXPGA (0x16) */
68 0x00, /* REG_AVDAC_CTL (0x17) */
69 0x00, /* REG_ARX2VTXPGA (0x18) */
70 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
71 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
72 0x4a, /* REG_ARXL2_APGA_CTL (0x1B) */
73 0x4a, /* REG_ARXR2_APGA_CTL (0x1C) */
74 0x00, /* REG_ATX2ARXPGA (0x1D) */
75 0x00, /* REG_BT_IF (0x1E) */
76 0x00, /* REG_BTPGA (0x1F) */
77 0x00, /* REG_BTSTPGA (0x20) */
78 0x00, /* REG_EAR_CTL (0x21) */
79 0x00, /* REG_HS_SEL (0x22) */
80 0x00, /* REG_HS_GAIN_SET (0x23) */
81 0x00, /* REG_HS_POPN_SET (0x24) */
82 0x00, /* REG_PREDL_CTL (0x25) */
83 0x00, /* REG_PREDR_CTL (0x26) */
84 0x00, /* REG_PRECKL_CTL (0x27) */
85 0x00, /* REG_PRECKR_CTL (0x28) */
86 0x00, /* REG_HFL_CTL (0x29) */
87 0x00, /* REG_HFR_CTL (0x2A) */
88 0x00, /* REG_ALC_CTL (0x2B) */
89 0x00, /* REG_ALC_SET1 (0x2C) */
90 0x00, /* REG_ALC_SET2 (0x2D) */
91 0x00, /* REG_BOOST_CTL (0x2E) */
92 0x00, /* REG_SOFTVOL_CTL (0x2F) */
93 0x00, /* REG_DTMF_FREQSEL (0x30) */
94 0x00, /* REG_DTMF_TONEXT1H (0x31) */
95 0x00, /* REG_DTMF_TONEXT1L (0x32) */
96 0x00, /* REG_DTMF_TONEXT2H (0x33) */
97 0x00, /* REG_DTMF_TONEXT2L (0x34) */
98 0x00, /* REG_DTMF_TONOFF (0x35) */
99 0x00, /* REG_DTMF_WANONOFF (0x36) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
102 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
103 0x06, /* REG_APLL_CTL (0x3A) */
104 0x00, /* REG_DTMF_CTL (0x3B) */
105 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
106 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
107 0x00, /* REG_MISC_SET_1 (0x3E) */
108 0x00, /* REG_PCMBTMUX (0x3F) */
109 0x00, /* not used (0x40) */
110 0x00, /* not used (0x41) */
111 0x00, /* not used (0x42) */
112 0x00, /* REG_RX_PATH_SEL (0x43) */
113 0x00, /* REG_VDL_APGA_CTL (0x44) */
114 0x00, /* REG_VIBRA_CTL (0x45) */
115 0x00, /* REG_VIBRA_SET (0x46) */
116 0x00, /* REG_VIBRA_PWM_SET (0x47) */
117 0x00, /* REG_ANAMIC_GAIN (0x48) */
118 0x00, /* REG_MISC_SET_2 (0x49) */
119 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
120 };
121
122 /* codec private data */
123 struct twl4030_priv {
124 struct snd_soc_codec codec;
125
126 unsigned int codec_powered;
127
128 /* reference counts of AIF/APLL users */
129 unsigned int apll_enabled;
130
131 struct snd_pcm_substream *master_substream;
132 struct snd_pcm_substream *slave_substream;
133
134 unsigned int configured;
135 unsigned int rate;
136 unsigned int sample_bits;
137 unsigned int channels;
138
139 unsigned int sysclk;
140
141 /* Output (with associated amp) states */
142 u8 hsl_enabled, hsr_enabled;
143 u8 earpiece_enabled;
144 u8 predrivel_enabled, predriver_enabled;
145 u8 carkitl_enabled, carkitr_enabled;
146 };
147
148 /*
149 * read twl4030 register cache
150 */
151 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
152 unsigned int reg)
153 {
154 u8 *cache = codec->reg_cache;
155
156 if (reg >= TWL4030_CACHEREGNUM)
157 return -EIO;
158
159 return cache[reg];
160 }
161
162 /*
163 * write twl4030 register cache
164 */
165 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
166 u8 reg, u8 value)
167 {
168 u8 *cache = codec->reg_cache;
169
170 if (reg >= TWL4030_CACHEREGNUM)
171 return;
172 cache[reg] = value;
173 }
174
175 /*
176 * write to the twl4030 register space
177 */
178 static int twl4030_write(struct snd_soc_codec *codec,
179 unsigned int reg, unsigned int value)
180 {
181 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
182 int write_to_reg = 0;
183
184 twl4030_write_reg_cache(codec, reg, value);
185 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
186 /* Decide if the given register can be written */
187 switch (reg) {
188 case TWL4030_REG_EAR_CTL:
189 if (twl4030->earpiece_enabled)
190 write_to_reg = 1;
191 break;
192 case TWL4030_REG_PREDL_CTL:
193 if (twl4030->predrivel_enabled)
194 write_to_reg = 1;
195 break;
196 case TWL4030_REG_PREDR_CTL:
197 if (twl4030->predriver_enabled)
198 write_to_reg = 1;
199 break;
200 case TWL4030_REG_PRECKL_CTL:
201 if (twl4030->carkitl_enabled)
202 write_to_reg = 1;
203 break;
204 case TWL4030_REG_PRECKR_CTL:
205 if (twl4030->carkitr_enabled)
206 write_to_reg = 1;
207 break;
208 case TWL4030_REG_HS_GAIN_SET:
209 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
210 write_to_reg = 1;
211 break;
212 default:
213 /* All other register can be written */
214 write_to_reg = 1;
215 break;
216 }
217 if (write_to_reg)
218 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
219 value, reg);
220 }
221 return 0;
222 }
223
224 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
225 {
226 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
227 int mode;
228
229 if (enable == twl4030->codec_powered)
230 return;
231
232 if (enable)
233 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
234 else
235 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
236
237 if (mode >= 0) {
238 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
239 twl4030->codec_powered = enable;
240 }
241
242 /* REVISIT: this delay is present in TI sample drivers */
243 /* but there seems to be no TRM requirement for it */
244 udelay(10);
245 }
246
247 static void twl4030_init_chip(struct snd_soc_codec *codec)
248 {
249 u8 *cache = codec->reg_cache;
250 int i;
251
252 /* clear CODECPDZ prior to setting register defaults */
253 twl4030_codec_enable(codec, 0);
254
255 /* set all audio section registers to reasonable defaults */
256 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
257 if (i != TWL4030_REG_APLL_CTL)
258 twl4030_write(codec, i, cache[i]);
259
260 }
261
262 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
263 {
264 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
265 int status = -1;
266
267 if (enable) {
268 twl4030->apll_enabled++;
269 if (twl4030->apll_enabled == 1)
270 status = twl4030_codec_enable_resource(
271 TWL4030_CODEC_RES_APLL);
272 } else {
273 twl4030->apll_enabled--;
274 if (!twl4030->apll_enabled)
275 status = twl4030_codec_disable_resource(
276 TWL4030_CODEC_RES_APLL);
277 }
278
279 if (status >= 0)
280 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
281 }
282
283 static void twl4030_power_up(struct snd_soc_codec *codec)
284 {
285 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
286 u8 anamicl, regmisc1, byte;
287 int i = 0;
288
289 if (twl4030->codec_powered)
290 return;
291
292 /* set CODECPDZ to turn on codec */
293 twl4030_codec_enable(codec, 1);
294
295 /* initiate offset cancellation */
296 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
297 twl4030_write(codec, TWL4030_REG_ANAMICL,
298 anamicl | TWL4030_CNCL_OFFSET_START);
299
300 /* wait for offset cancellation to complete */
301 do {
302 /* this takes a little while, so don't slam i2c */
303 udelay(2000);
304 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
305 TWL4030_REG_ANAMICL);
306 } while ((i++ < 100) &&
307 ((byte & TWL4030_CNCL_OFFSET_START) ==
308 TWL4030_CNCL_OFFSET_START));
309
310 /* Make sure that the reg_cache has the same value as the HW */
311 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
312
313 /* anti-pop when changing analog gain */
314 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
315 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
316 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
317
318 /* toggle CODECPDZ as per TRM */
319 twl4030_codec_enable(codec, 0);
320 twl4030_codec_enable(codec, 1);
321 }
322
323 /*
324 * Unconditional power down
325 */
326 static void twl4030_power_down(struct snd_soc_codec *codec)
327 {
328 /* power down */
329 twl4030_codec_enable(codec, 0);
330 }
331
332 /* Earpiece */
333 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
334 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
335 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
336 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
337 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
338 };
339
340 /* PreDrive Left */
341 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
342 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
343 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
344 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
345 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
346 };
347
348 /* PreDrive Right */
349 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
350 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
351 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
352 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
353 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
354 };
355
356 /* Headset Left */
357 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
358 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
359 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
360 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
361 };
362
363 /* Headset Right */
364 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
365 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
366 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
367 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
368 };
369
370 /* Carkit Left */
371 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
372 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
373 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
374 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
375 };
376
377 /* Carkit Right */
378 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
380 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
381 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
382 };
383
384 /* Handsfree Left */
385 static const char *twl4030_handsfreel_texts[] =
386 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
387
388 static const struct soc_enum twl4030_handsfreel_enum =
389 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
390 ARRAY_SIZE(twl4030_handsfreel_texts),
391 twl4030_handsfreel_texts);
392
393 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
394 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
395
396 /* Handsfree Left virtual mute */
397 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
398 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
399
400 /* Handsfree Right */
401 static const char *twl4030_handsfreer_texts[] =
402 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
403
404 static const struct soc_enum twl4030_handsfreer_enum =
405 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
406 ARRAY_SIZE(twl4030_handsfreer_texts),
407 twl4030_handsfreer_texts);
408
409 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
410 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
411
412 /* Handsfree Right virtual mute */
413 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
414 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
415
416 /* Vibra */
417 /* Vibra audio path selection */
418 static const char *twl4030_vibra_texts[] =
419 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
420
421 static const struct soc_enum twl4030_vibra_enum =
422 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
423 ARRAY_SIZE(twl4030_vibra_texts),
424 twl4030_vibra_texts);
425
426 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
427 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
428
429 /* Vibra path selection: local vibrator (PWM) or audio driven */
430 static const char *twl4030_vibrapath_texts[] =
431 {"Local vibrator", "Audio"};
432
433 static const struct soc_enum twl4030_vibrapath_enum =
434 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
435 ARRAY_SIZE(twl4030_vibrapath_texts),
436 twl4030_vibrapath_texts);
437
438 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
439 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
440
441 /* Left analog microphone selection */
442 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
443 SOC_DAPM_SINGLE("Main Mic Capture Switch",
444 TWL4030_REG_ANAMICL, 0, 1, 0),
445 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
446 TWL4030_REG_ANAMICL, 1, 1, 0),
447 SOC_DAPM_SINGLE("AUXL Capture Switch",
448 TWL4030_REG_ANAMICL, 2, 1, 0),
449 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
450 TWL4030_REG_ANAMICL, 3, 1, 0),
451 };
452
453 /* Right analog microphone selection */
454 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
455 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
456 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
457 };
458
459 /* TX1 L/R Analog/Digital microphone selection */
460 static const char *twl4030_micpathtx1_texts[] =
461 {"Analog", "Digimic0"};
462
463 static const struct soc_enum twl4030_micpathtx1_enum =
464 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
465 ARRAY_SIZE(twl4030_micpathtx1_texts),
466 twl4030_micpathtx1_texts);
467
468 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
469 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
470
471 /* TX2 L/R Analog/Digital microphone selection */
472 static const char *twl4030_micpathtx2_texts[] =
473 {"Analog", "Digimic1"};
474
475 static const struct soc_enum twl4030_micpathtx2_enum =
476 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
477 ARRAY_SIZE(twl4030_micpathtx2_texts),
478 twl4030_micpathtx2_texts);
479
480 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
481 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
482
483 /* Analog bypass for AudioR1 */
484 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
485 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
486
487 /* Analog bypass for AudioL1 */
488 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
489 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
490
491 /* Analog bypass for AudioR2 */
492 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
493 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
494
495 /* Analog bypass for AudioL2 */
496 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
497 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
498
499 /* Analog bypass for Voice */
500 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
501 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
502
503 /* Digital bypass gain, 0 mutes the bypass */
504 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
505 TLV_DB_RANGE_HEAD(2),
506 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
507 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
508 };
509
510 /* Digital bypass left (TX1L -> RX2L) */
511 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
512 SOC_DAPM_SINGLE_TLV("Volume",
513 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
514 twl4030_dapm_dbypass_tlv);
515
516 /* Digital bypass right (TX1R -> RX2R) */
517 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
518 SOC_DAPM_SINGLE_TLV("Volume",
519 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
520 twl4030_dapm_dbypass_tlv);
521
522 /*
523 * Voice Sidetone GAIN volume control:
524 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
525 */
526 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
527
528 /* Digital bypass voice: sidetone (VUL -> VDL)*/
529 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
530 SOC_DAPM_SINGLE_TLV("Volume",
531 TWL4030_REG_VSTPGA, 0, 0x29, 0,
532 twl4030_dapm_dbypassv_tlv);
533
534 static int micpath_event(struct snd_soc_dapm_widget *w,
535 struct snd_kcontrol *kcontrol, int event)
536 {
537 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
538 unsigned char adcmicsel, micbias_ctl;
539
540 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
541 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
542 /* Prepare the bits for the given TX path:
543 * shift_l == 0: TX1 microphone path
544 * shift_l == 2: TX2 microphone path */
545 if (e->shift_l) {
546 /* TX2 microphone path */
547 if (adcmicsel & TWL4030_TX2IN_SEL)
548 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
549 else
550 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
551 } else {
552 /* TX1 microphone path */
553 if (adcmicsel & TWL4030_TX1IN_SEL)
554 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
555 else
556 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
557 }
558
559 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
560
561 return 0;
562 }
563
564 /*
565 * Output PGA builder:
566 * Handle the muting and unmuting of the given output (turning off the
567 * amplifier associated with the output pin)
568 * On mute bypass the reg_cache and write 0 to the register
569 * On unmute: restore the register content from the reg_cache
570 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
571 */
572 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
573 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
574 struct snd_kcontrol *kcontrol, int event) \
575 { \
576 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
577 \
578 switch (event) { \
579 case SND_SOC_DAPM_POST_PMU: \
580 twl4030->pin_name##_enabled = 1; \
581 twl4030_write(w->codec, reg, \
582 twl4030_read_reg_cache(w->codec, reg)); \
583 break; \
584 case SND_SOC_DAPM_POST_PMD: \
585 twl4030->pin_name##_enabled = 0; \
586 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
587 0, reg); \
588 break; \
589 } \
590 return 0; \
591 }
592
593 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
594 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
595 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
596 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
597 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
598
599 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
600 {
601 unsigned char hs_ctl;
602
603 hs_ctl = twl4030_read_reg_cache(codec, reg);
604
605 if (ramp) {
606 /* HF ramp-up */
607 hs_ctl |= TWL4030_HF_CTL_REF_EN;
608 twl4030_write(codec, reg, hs_ctl);
609 udelay(10);
610 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
611 twl4030_write(codec, reg, hs_ctl);
612 udelay(40);
613 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
614 hs_ctl |= TWL4030_HF_CTL_HB_EN;
615 twl4030_write(codec, reg, hs_ctl);
616 } else {
617 /* HF ramp-down */
618 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
619 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
620 twl4030_write(codec, reg, hs_ctl);
621 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
622 twl4030_write(codec, reg, hs_ctl);
623 udelay(40);
624 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
625 twl4030_write(codec, reg, hs_ctl);
626 }
627 }
628
629 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
630 struct snd_kcontrol *kcontrol, int event)
631 {
632 switch (event) {
633 case SND_SOC_DAPM_POST_PMU:
634 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
635 break;
636 case SND_SOC_DAPM_POST_PMD:
637 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
638 break;
639 }
640 return 0;
641 }
642
643 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
644 struct snd_kcontrol *kcontrol, int event)
645 {
646 switch (event) {
647 case SND_SOC_DAPM_POST_PMU:
648 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
649 break;
650 case SND_SOC_DAPM_POST_PMD:
651 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
652 break;
653 }
654 return 0;
655 }
656
657 static int vibramux_event(struct snd_soc_dapm_widget *w,
658 struct snd_kcontrol *kcontrol, int event)
659 {
660 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
661 return 0;
662 }
663
664 static int apll_event(struct snd_soc_dapm_widget *w,
665 struct snd_kcontrol *kcontrol, int event)
666 {
667 switch (event) {
668 case SND_SOC_DAPM_PRE_PMU:
669 twl4030_apll_enable(w->codec, 1);
670 break;
671 case SND_SOC_DAPM_POST_PMD:
672 twl4030_apll_enable(w->codec, 0);
673 break;
674 }
675 return 0;
676 }
677
678 static int aif_event(struct snd_soc_dapm_widget *w,
679 struct snd_kcontrol *kcontrol, int event)
680 {
681 u8 audio_if;
682
683 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
684 switch (event) {
685 case SND_SOC_DAPM_PRE_PMU:
686 /* Enable AIF */
687 /* enable the PLL before we use it to clock the DAI */
688 twl4030_apll_enable(w->codec, 1);
689
690 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
691 audio_if | TWL4030_AIF_EN);
692 break;
693 case SND_SOC_DAPM_POST_PMD:
694 /* disable the DAI before we stop it's source PLL */
695 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
696 audio_if & ~TWL4030_AIF_EN);
697 twl4030_apll_enable(w->codec, 0);
698 break;
699 }
700 return 0;
701 }
702
703 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
704 {
705 struct snd_soc_device *socdev = codec->socdev;
706 struct twl4030_setup_data *setup = socdev->codec_data;
707
708 unsigned char hs_gain, hs_pop;
709 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
710 /* Base values for ramp delay calculation: 2^19 - 2^26 */
711 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
712 8388608, 16777216, 33554432, 67108864};
713
714 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
715 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
716
717 /* Enable external mute control, this dramatically reduces
718 * the pop-noise */
719 if (setup && setup->hs_extmute) {
720 if (setup->set_hs_extmute) {
721 setup->set_hs_extmute(1);
722 } else {
723 hs_pop |= TWL4030_EXTMUTE;
724 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
725 }
726 }
727
728 if (ramp) {
729 /* Headset ramp-up according to the TRM */
730 hs_pop |= TWL4030_VMID_EN;
731 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
732 /* Actually write to the register */
733 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
734 hs_gain,
735 TWL4030_REG_HS_GAIN_SET);
736 hs_pop |= TWL4030_RAMP_EN;
737 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
738 /* Wait ramp delay time + 1, so the VMID can settle */
739 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
740 twl4030->sysclk) + 1);
741 } else {
742 /* Headset ramp-down _not_ according to
743 * the TRM, but in a way that it is working */
744 hs_pop &= ~TWL4030_RAMP_EN;
745 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
746 /* Wait ramp delay time + 1, so the VMID can settle */
747 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
748 twl4030->sysclk) + 1);
749 /* Bypass the reg_cache to mute the headset */
750 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
751 hs_gain & (~0x0f),
752 TWL4030_REG_HS_GAIN_SET);
753
754 hs_pop &= ~TWL4030_VMID_EN;
755 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
756 }
757
758 /* Disable external mute */
759 if (setup && setup->hs_extmute) {
760 if (setup->set_hs_extmute) {
761 setup->set_hs_extmute(0);
762 } else {
763 hs_pop &= ~TWL4030_EXTMUTE;
764 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
765 }
766 }
767 }
768
769 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
770 struct snd_kcontrol *kcontrol, int event)
771 {
772 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
773
774 switch (event) {
775 case SND_SOC_DAPM_POST_PMU:
776 /* Do the ramp-up only once */
777 if (!twl4030->hsr_enabled)
778 headset_ramp(w->codec, 1);
779
780 twl4030->hsl_enabled = 1;
781 break;
782 case SND_SOC_DAPM_POST_PMD:
783 /* Do the ramp-down only if both headsetL/R is disabled */
784 if (!twl4030->hsr_enabled)
785 headset_ramp(w->codec, 0);
786
787 twl4030->hsl_enabled = 0;
788 break;
789 }
790 return 0;
791 }
792
793 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
794 struct snd_kcontrol *kcontrol, int event)
795 {
796 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
797
798 switch (event) {
799 case SND_SOC_DAPM_POST_PMU:
800 /* Do the ramp-up only once */
801 if (!twl4030->hsl_enabled)
802 headset_ramp(w->codec, 1);
803
804 twl4030->hsr_enabled = 1;
805 break;
806 case SND_SOC_DAPM_POST_PMD:
807 /* Do the ramp-down only if both headsetL/R is disabled */
808 if (!twl4030->hsl_enabled)
809 headset_ramp(w->codec, 0);
810
811 twl4030->hsr_enabled = 0;
812 break;
813 }
814 return 0;
815 }
816
817 /*
818 * Some of the gain controls in TWL (mostly those which are associated with
819 * the outputs) are implemented in an interesting way:
820 * 0x0 : Power down (mute)
821 * 0x1 : 6dB
822 * 0x2 : 0 dB
823 * 0x3 : -6 dB
824 * Inverting not going to help with these.
825 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
826 */
827 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
828 xinvert, tlv_array) \
829 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
830 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
831 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
832 .tlv.p = (tlv_array), \
833 .info = snd_soc_info_volsw, \
834 .get = snd_soc_get_volsw_twl4030, \
835 .put = snd_soc_put_volsw_twl4030, \
836 .private_value = (unsigned long)&(struct soc_mixer_control) \
837 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
838 .max = xmax, .invert = xinvert} }
839 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
840 xinvert, tlv_array) \
841 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
842 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
843 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
844 .tlv.p = (tlv_array), \
845 .info = snd_soc_info_volsw_2r, \
846 .get = snd_soc_get_volsw_r2_twl4030,\
847 .put = snd_soc_put_volsw_r2_twl4030, \
848 .private_value = (unsigned long)&(struct soc_mixer_control) \
849 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
850 .rshift = xshift, .max = xmax, .invert = xinvert} }
851 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
852 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
853 xinvert, tlv_array)
854
855 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857 {
858 struct soc_mixer_control *mc =
859 (struct soc_mixer_control *)kcontrol->private_value;
860 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
861 unsigned int reg = mc->reg;
862 unsigned int shift = mc->shift;
863 unsigned int rshift = mc->rshift;
864 int max = mc->max;
865 int mask = (1 << fls(max)) - 1;
866
867 ucontrol->value.integer.value[0] =
868 (snd_soc_read(codec, reg) >> shift) & mask;
869 if (ucontrol->value.integer.value[0])
870 ucontrol->value.integer.value[0] =
871 max + 1 - ucontrol->value.integer.value[0];
872
873 if (shift != rshift) {
874 ucontrol->value.integer.value[1] =
875 (snd_soc_read(codec, reg) >> rshift) & mask;
876 if (ucontrol->value.integer.value[1])
877 ucontrol->value.integer.value[1] =
878 max + 1 - ucontrol->value.integer.value[1];
879 }
880
881 return 0;
882 }
883
884 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
885 struct snd_ctl_elem_value *ucontrol)
886 {
887 struct soc_mixer_control *mc =
888 (struct soc_mixer_control *)kcontrol->private_value;
889 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
890 unsigned int reg = mc->reg;
891 unsigned int shift = mc->shift;
892 unsigned int rshift = mc->rshift;
893 int max = mc->max;
894 int mask = (1 << fls(max)) - 1;
895 unsigned short val, val2, val_mask;
896
897 val = (ucontrol->value.integer.value[0] & mask);
898
899 val_mask = mask << shift;
900 if (val)
901 val = max + 1 - val;
902 val = val << shift;
903 if (shift != rshift) {
904 val2 = (ucontrol->value.integer.value[1] & mask);
905 val_mask |= mask << rshift;
906 if (val2)
907 val2 = max + 1 - val2;
908 val |= val2 << rshift;
909 }
910 return snd_soc_update_bits(codec, reg, val_mask, val);
911 }
912
913 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
914 struct snd_ctl_elem_value *ucontrol)
915 {
916 struct soc_mixer_control *mc =
917 (struct soc_mixer_control *)kcontrol->private_value;
918 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
919 unsigned int reg = mc->reg;
920 unsigned int reg2 = mc->rreg;
921 unsigned int shift = mc->shift;
922 int max = mc->max;
923 int mask = (1<<fls(max))-1;
924
925 ucontrol->value.integer.value[0] =
926 (snd_soc_read(codec, reg) >> shift) & mask;
927 ucontrol->value.integer.value[1] =
928 (snd_soc_read(codec, reg2) >> shift) & mask;
929
930 if (ucontrol->value.integer.value[0])
931 ucontrol->value.integer.value[0] =
932 max + 1 - ucontrol->value.integer.value[0];
933 if (ucontrol->value.integer.value[1])
934 ucontrol->value.integer.value[1] =
935 max + 1 - ucontrol->value.integer.value[1];
936
937 return 0;
938 }
939
940 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
941 struct snd_ctl_elem_value *ucontrol)
942 {
943 struct soc_mixer_control *mc =
944 (struct soc_mixer_control *)kcontrol->private_value;
945 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
946 unsigned int reg = mc->reg;
947 unsigned int reg2 = mc->rreg;
948 unsigned int shift = mc->shift;
949 int max = mc->max;
950 int mask = (1 << fls(max)) - 1;
951 int err;
952 unsigned short val, val2, val_mask;
953
954 val_mask = mask << shift;
955 val = (ucontrol->value.integer.value[0] & mask);
956 val2 = (ucontrol->value.integer.value[1] & mask);
957
958 if (val)
959 val = max + 1 - val;
960 if (val2)
961 val2 = max + 1 - val2;
962
963 val = val << shift;
964 val2 = val2 << shift;
965
966 err = snd_soc_update_bits(codec, reg, val_mask, val);
967 if (err < 0)
968 return err;
969
970 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
971 return err;
972 }
973
974 /* Codec operation modes */
975 static const char *twl4030_op_modes_texts[] = {
976 "Option 2 (voice/audio)", "Option 1 (audio)"
977 };
978
979 static const struct soc_enum twl4030_op_modes_enum =
980 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
981 ARRAY_SIZE(twl4030_op_modes_texts),
982 twl4030_op_modes_texts);
983
984 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
985 struct snd_ctl_elem_value *ucontrol)
986 {
987 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
988 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
989 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
990 unsigned short val;
991 unsigned short mask, bitmask;
992
993 if (twl4030->configured) {
994 printk(KERN_ERR "twl4030 operation mode cannot be "
995 "changed on-the-fly\n");
996 return -EBUSY;
997 }
998
999 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1000 ;
1001 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1002 return -EINVAL;
1003
1004 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1005 mask = (bitmask - 1) << e->shift_l;
1006 if (e->shift_l != e->shift_r) {
1007 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1008 return -EINVAL;
1009 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1010 mask |= (bitmask - 1) << e->shift_r;
1011 }
1012
1013 return snd_soc_update_bits(codec, e->reg, mask, val);
1014 }
1015
1016 /*
1017 * FGAIN volume control:
1018 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1019 */
1020 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1021
1022 /*
1023 * CGAIN volume control:
1024 * 0 dB to 12 dB in 6 dB steps
1025 * value 2 and 3 means 12 dB
1026 */
1027 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1028
1029 /*
1030 * Voice Downlink GAIN volume control:
1031 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1032 */
1033 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1034
1035 /*
1036 * Analog playback gain
1037 * -24 dB to 12 dB in 2 dB steps
1038 */
1039 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1040
1041 /*
1042 * Gain controls tied to outputs
1043 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1044 */
1045 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1046
1047 /*
1048 * Gain control for earpiece amplifier
1049 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1050 */
1051 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1052
1053 /*
1054 * Capture gain after the ADCs
1055 * from 0 dB to 31 dB in 1 dB steps
1056 */
1057 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1058
1059 /*
1060 * Gain control for input amplifiers
1061 * 0 dB to 30 dB in 6 dB steps
1062 */
1063 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1064
1065 /* AVADC clock priority */
1066 static const char *twl4030_avadc_clk_priority_texts[] = {
1067 "Voice high priority", "HiFi high priority"
1068 };
1069
1070 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1071 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1072 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1073 twl4030_avadc_clk_priority_texts);
1074
1075 static const char *twl4030_rampdelay_texts[] = {
1076 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1077 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1078 "3495/2581/1748 ms"
1079 };
1080
1081 static const struct soc_enum twl4030_rampdelay_enum =
1082 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1083 ARRAY_SIZE(twl4030_rampdelay_texts),
1084 twl4030_rampdelay_texts);
1085
1086 /* Vibra H-bridge direction mode */
1087 static const char *twl4030_vibradirmode_texts[] = {
1088 "Vibra H-bridge direction", "Audio data MSB",
1089 };
1090
1091 static const struct soc_enum twl4030_vibradirmode_enum =
1092 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1093 ARRAY_SIZE(twl4030_vibradirmode_texts),
1094 twl4030_vibradirmode_texts);
1095
1096 /* Vibra H-bridge direction */
1097 static const char *twl4030_vibradir_texts[] = {
1098 "Positive polarity", "Negative polarity",
1099 };
1100
1101 static const struct soc_enum twl4030_vibradir_enum =
1102 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1103 ARRAY_SIZE(twl4030_vibradir_texts),
1104 twl4030_vibradir_texts);
1105
1106 /* Digimic Left and right swapping */
1107 static const char *twl4030_digimicswap_texts[] = {
1108 "Not swapped", "Swapped",
1109 };
1110
1111 static const struct soc_enum twl4030_digimicswap_enum =
1112 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1113 ARRAY_SIZE(twl4030_digimicswap_texts),
1114 twl4030_digimicswap_texts);
1115
1116 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1117 /* Codec operation mode control */
1118 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1119 snd_soc_get_enum_double,
1120 snd_soc_put_twl4030_opmode_enum_double),
1121
1122 /* Common playback gain controls */
1123 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1124 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1125 0, 0x3f, 0, digital_fine_tlv),
1126 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1127 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1128 0, 0x3f, 0, digital_fine_tlv),
1129
1130 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1131 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1132 6, 0x2, 0, digital_coarse_tlv),
1133 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1134 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1135 6, 0x2, 0, digital_coarse_tlv),
1136
1137 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1138 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1139 3, 0x12, 1, analog_tlv),
1140 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1141 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1142 3, 0x12, 1, analog_tlv),
1143 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1144 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1145 1, 1, 0),
1146 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1147 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1148 1, 1, 0),
1149
1150 /* Common voice downlink gain controls */
1151 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1152 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1153
1154 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1155 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1156
1157 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1158 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1159
1160 /* Separate output gain controls */
1161 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1162 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1163 4, 3, 0, output_tvl),
1164
1165 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1166 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1167
1168 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1169 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1170 4, 3, 0, output_tvl),
1171
1172 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1173 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
1174
1175 /* Common capture gain controls */
1176 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1177 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1178 0, 0x1f, 0, digital_capture_tlv),
1179 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1180 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1181 0, 0x1f, 0, digital_capture_tlv),
1182
1183 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1184 0, 3, 5, 0, input_gain_tlv),
1185
1186 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1187
1188 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1189
1190 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1191 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1192
1193 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1194 };
1195
1196 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1197 /* Left channel inputs */
1198 SND_SOC_DAPM_INPUT("MAINMIC"),
1199 SND_SOC_DAPM_INPUT("HSMIC"),
1200 SND_SOC_DAPM_INPUT("AUXL"),
1201 SND_SOC_DAPM_INPUT("CARKITMIC"),
1202 /* Right channel inputs */
1203 SND_SOC_DAPM_INPUT("SUBMIC"),
1204 SND_SOC_DAPM_INPUT("AUXR"),
1205 /* Digital microphones (Stereo) */
1206 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1207 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1208
1209 /* Outputs */
1210 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1211 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1212 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1213 SND_SOC_DAPM_OUTPUT("HSOL"),
1214 SND_SOC_DAPM_OUTPUT("HSOR"),
1215 SND_SOC_DAPM_OUTPUT("CARKITL"),
1216 SND_SOC_DAPM_OUTPUT("CARKITR"),
1217 SND_SOC_DAPM_OUTPUT("HFL"),
1218 SND_SOC_DAPM_OUTPUT("HFR"),
1219 SND_SOC_DAPM_OUTPUT("VIBRA"),
1220
1221 /* AIF and APLL clocks for running DAIs (including loopback) */
1222 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1223 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1224 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1225
1226 /* DACs */
1227 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1228 SND_SOC_NOPM, 0, 0),
1229 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1230 SND_SOC_NOPM, 0, 0),
1231 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1232 SND_SOC_NOPM, 0, 0),
1233 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1234 SND_SOC_NOPM, 0, 0),
1235 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1236 SND_SOC_NOPM, 0, 0),
1237
1238 /* Analog bypasses */
1239 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1240 &twl4030_dapm_abypassr1_control),
1241 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1242 &twl4030_dapm_abypassl1_control),
1243 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1244 &twl4030_dapm_abypassr2_control),
1245 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1246 &twl4030_dapm_abypassl2_control),
1247 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1248 &twl4030_dapm_abypassv_control),
1249
1250 /* Master analog loopback switch */
1251 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1252 NULL, 0),
1253
1254 /* Digital bypasses */
1255 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1256 &twl4030_dapm_dbypassl_control),
1257 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1258 &twl4030_dapm_dbypassr_control),
1259 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1260 &twl4030_dapm_dbypassv_control),
1261
1262 /* Digital mixers, power control for the physical DACs */
1263 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1264 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1265 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1266 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1267 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1268 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1269 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1270 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1271 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1272 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1273
1274 /* Analog mixers, power control for the physical PGAs */
1275 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1276 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1277 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1278 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1279 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1280 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1281 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1282 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1283 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1284 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1285
1286 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1287 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1288
1289 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1290 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1291
1292 /* Output MIXER controls */
1293 /* Earpiece */
1294 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1295 &twl4030_dapm_earpiece_controls[0],
1296 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1297 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1298 0, 0, NULL, 0, earpiecepga_event,
1299 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1300 /* PreDrivL/R */
1301 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1302 &twl4030_dapm_predrivel_controls[0],
1303 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1304 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1305 0, 0, NULL, 0, predrivelpga_event,
1306 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1307 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1308 &twl4030_dapm_predriver_controls[0],
1309 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1310 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1311 0, 0, NULL, 0, predriverpga_event,
1312 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1313 /* HeadsetL/R */
1314 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1315 &twl4030_dapm_hsol_controls[0],
1316 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1317 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1318 0, 0, NULL, 0, headsetlpga_event,
1319 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1320 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1321 &twl4030_dapm_hsor_controls[0],
1322 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1323 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1324 0, 0, NULL, 0, headsetrpga_event,
1325 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1326 /* CarkitL/R */
1327 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1328 &twl4030_dapm_carkitl_controls[0],
1329 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1330 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1331 0, 0, NULL, 0, carkitlpga_event,
1332 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1333 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1334 &twl4030_dapm_carkitr_controls[0],
1335 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1336 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1337 0, 0, NULL, 0, carkitrpga_event,
1338 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1339
1340 /* Output MUX controls */
1341 /* HandsfreeL/R */
1342 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1343 &twl4030_dapm_handsfreel_control),
1344 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1345 &twl4030_dapm_handsfreelmute_control),
1346 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1347 0, 0, NULL, 0, handsfreelpga_event,
1348 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1349 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1350 &twl4030_dapm_handsfreer_control),
1351 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1352 &twl4030_dapm_handsfreermute_control),
1353 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1354 0, 0, NULL, 0, handsfreerpga_event,
1355 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1356 /* Vibra */
1357 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1358 &twl4030_dapm_vibra_control, vibramux_event,
1359 SND_SOC_DAPM_PRE_PMU),
1360 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1361 &twl4030_dapm_vibrapath_control),
1362
1363 /* Introducing four virtual ADC, since TWL4030 have four channel for
1364 capture */
1365 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1366 SND_SOC_NOPM, 0, 0),
1367 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1368 SND_SOC_NOPM, 0, 0),
1369 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1370 SND_SOC_NOPM, 0, 0),
1371 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1372 SND_SOC_NOPM, 0, 0),
1373
1374 /* Analog/Digital mic path selection.
1375 TX1 Left/Right: either analog Left/Right or Digimic0
1376 TX2 Left/Right: either analog Left/Right or Digimic1 */
1377 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1378 &twl4030_dapm_micpathtx1_control, micpath_event,
1379 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1380 SND_SOC_DAPM_POST_REG),
1381 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1382 &twl4030_dapm_micpathtx2_control, micpath_event,
1383 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1384 SND_SOC_DAPM_POST_REG),
1385
1386 /* Analog input mixers for the capture amplifiers */
1387 SND_SOC_DAPM_MIXER("Analog Left",
1388 TWL4030_REG_ANAMICL, 4, 0,
1389 &twl4030_dapm_analoglmic_controls[0],
1390 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1391 SND_SOC_DAPM_MIXER("Analog Right",
1392 TWL4030_REG_ANAMICR, 4, 0,
1393 &twl4030_dapm_analogrmic_controls[0],
1394 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1395
1396 SND_SOC_DAPM_PGA("ADC Physical Left",
1397 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1398 SND_SOC_DAPM_PGA("ADC Physical Right",
1399 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1400
1401 SND_SOC_DAPM_PGA("Digimic0 Enable",
1402 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1403 SND_SOC_DAPM_PGA("Digimic1 Enable",
1404 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1405
1406 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1407 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1408 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1409
1410 };
1411
1412 static const struct snd_soc_dapm_route intercon[] = {
1413 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1414 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1415 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1416 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1417 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1418
1419 /* Supply for the digital part (APLL) */
1420 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1421
1422 {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
1423 {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
1424 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1425 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1426
1427 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1428 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1429 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1430 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1431 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1432
1433 /* Internal playback routings */
1434 /* Earpiece */
1435 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1436 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1437 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1438 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1439 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1440 /* PreDrivL */
1441 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1442 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1443 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1444 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1445 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1446 /* PreDrivR */
1447 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1448 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1449 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1450 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1451 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1452 /* HeadsetL */
1453 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1454 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1455 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1456 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1457 /* HeadsetR */
1458 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1459 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1460 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1461 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1462 /* CarkitL */
1463 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1464 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1465 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1466 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1467 /* CarkitR */
1468 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1469 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1470 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1471 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1472 /* HandsfreeL */
1473 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1474 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1475 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1476 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1477 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1478 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1479 /* HandsfreeR */
1480 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1481 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1482 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1483 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1484 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1485 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1486 /* Vibra */
1487 {"Vibra Mux", "AudioL1", "DAC Left1"},
1488 {"Vibra Mux", "AudioR1", "DAC Right1"},
1489 {"Vibra Mux", "AudioL2", "DAC Left2"},
1490 {"Vibra Mux", "AudioR2", "DAC Right2"},
1491
1492 /* outputs */
1493 /* Must be always connected (for AIF and APLL) */
1494 {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
1495 {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
1496 {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
1497 {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
1498 /* Must be always connected (for APLL) */
1499 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1500 /* Physical outputs */
1501 {"EARPIECE", NULL, "Earpiece PGA"},
1502 {"PREDRIVEL", NULL, "PredriveL PGA"},
1503 {"PREDRIVER", NULL, "PredriveR PGA"},
1504 {"HSOL", NULL, "HeadsetL PGA"},
1505 {"HSOR", NULL, "HeadsetR PGA"},
1506 {"CARKITL", NULL, "CarkitL PGA"},
1507 {"CARKITR", NULL, "CarkitR PGA"},
1508 {"HFL", NULL, "HandsfreeL PGA"},
1509 {"HFR", NULL, "HandsfreeR PGA"},
1510 {"Vibra Route", "Audio", "Vibra Mux"},
1511 {"VIBRA", NULL, "Vibra Route"},
1512
1513 /* Capture path */
1514 /* Must be always connected (for AIF and APLL) */
1515 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1516 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1517 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1518 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1519 /* Physical inputs */
1520 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1521 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1522 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1523 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1524
1525 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1526 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1527
1528 {"ADC Physical Left", NULL, "Analog Left"},
1529 {"ADC Physical Right", NULL, "Analog Right"},
1530
1531 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1532 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1533
1534 /* TX1 Left capture path */
1535 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1536 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1537 /* TX1 Right capture path */
1538 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1539 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1540 /* TX2 Left capture path */
1541 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1542 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1543 /* TX2 Right capture path */
1544 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1545 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1546
1547 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1548 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1549 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1550 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1551
1552 {"ADC Virtual Left1", NULL, "AIF Enable"},
1553 {"ADC Virtual Right1", NULL, "AIF Enable"},
1554 {"ADC Virtual Left2", NULL, "AIF Enable"},
1555 {"ADC Virtual Right2", NULL, "AIF Enable"},
1556
1557 /* Analog bypass routes */
1558 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1559 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1560 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1561 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1562 {"Voice Analog Loopback", "Switch", "Analog Left"},
1563
1564 /* Supply for the Analog loopbacks */
1565 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1566 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1567 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1568 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1569 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1570
1571 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1572 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1573 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1574 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1575 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1576
1577 /* Digital bypass routes */
1578 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1579 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1580 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1581
1582 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1583 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1584 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1585
1586 };
1587
1588 static int twl4030_add_widgets(struct snd_soc_codec *codec)
1589 {
1590 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1591 ARRAY_SIZE(twl4030_dapm_widgets));
1592
1593 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1594
1595 return 0;
1596 }
1597
1598 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1599 enum snd_soc_bias_level level)
1600 {
1601 switch (level) {
1602 case SND_SOC_BIAS_ON:
1603 break;
1604 case SND_SOC_BIAS_PREPARE:
1605 break;
1606 case SND_SOC_BIAS_STANDBY:
1607 if (codec->bias_level == SND_SOC_BIAS_OFF)
1608 twl4030_power_up(codec);
1609 break;
1610 case SND_SOC_BIAS_OFF:
1611 twl4030_power_down(codec);
1612 break;
1613 }
1614 codec->bias_level = level;
1615
1616 return 0;
1617 }
1618
1619 static void twl4030_constraints(struct twl4030_priv *twl4030,
1620 struct snd_pcm_substream *mst_substream)
1621 {
1622 struct snd_pcm_substream *slv_substream;
1623
1624 /* Pick the stream, which need to be constrained */
1625 if (mst_substream == twl4030->master_substream)
1626 slv_substream = twl4030->slave_substream;
1627 else if (mst_substream == twl4030->slave_substream)
1628 slv_substream = twl4030->master_substream;
1629 else /* This should not happen.. */
1630 return;
1631
1632 /* Set the constraints according to the already configured stream */
1633 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1634 SNDRV_PCM_HW_PARAM_RATE,
1635 twl4030->rate,
1636 twl4030->rate);
1637
1638 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1639 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1640 twl4030->sample_bits,
1641 twl4030->sample_bits);
1642
1643 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1644 SNDRV_PCM_HW_PARAM_CHANNELS,
1645 twl4030->channels,
1646 twl4030->channels);
1647 }
1648
1649 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1650 * capture has to be enabled/disabled. */
1651 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1652 int enable)
1653 {
1654 u8 reg, mask;
1655
1656 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1657
1658 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1659 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1660 else
1661 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1662
1663 if (enable)
1664 reg |= mask;
1665 else
1666 reg &= ~mask;
1667
1668 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1669 }
1670
1671 static int twl4030_startup(struct snd_pcm_substream *substream,
1672 struct snd_soc_dai *dai)
1673 {
1674 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1675 struct snd_soc_device *socdev = rtd->socdev;
1676 struct snd_soc_codec *codec = socdev->card->codec;
1677 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1678
1679 if (twl4030->master_substream) {
1680 twl4030->slave_substream = substream;
1681 /* The DAI has one configuration for playback and capture, so
1682 * if the DAI has been already configured then constrain this
1683 * substream to match it. */
1684 if (twl4030->configured)
1685 twl4030_constraints(twl4030, twl4030->master_substream);
1686 } else {
1687 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1688 TWL4030_OPTION_1)) {
1689 /* In option2 4 channel is not supported, set the
1690 * constraint for the first stream for channels, the
1691 * second stream will 'inherit' this cosntraint */
1692 snd_pcm_hw_constraint_minmax(substream->runtime,
1693 SNDRV_PCM_HW_PARAM_CHANNELS,
1694 2, 2);
1695 }
1696 twl4030->master_substream = substream;
1697 }
1698
1699 return 0;
1700 }
1701
1702 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1703 struct snd_soc_dai *dai)
1704 {
1705 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1706 struct snd_soc_device *socdev = rtd->socdev;
1707 struct snd_soc_codec *codec = socdev->card->codec;
1708 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1709
1710 if (twl4030->master_substream == substream)
1711 twl4030->master_substream = twl4030->slave_substream;
1712
1713 twl4030->slave_substream = NULL;
1714
1715 /* If all streams are closed, or the remaining stream has not yet
1716 * been configured than set the DAI as not configured. */
1717 if (!twl4030->master_substream)
1718 twl4030->configured = 0;
1719 else if (!twl4030->master_substream->runtime->channels)
1720 twl4030->configured = 0;
1721
1722 /* If the closing substream had 4 channel, do the necessary cleanup */
1723 if (substream->runtime->channels == 4)
1724 twl4030_tdm_enable(codec, substream->stream, 0);
1725 }
1726
1727 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1728 struct snd_pcm_hw_params *params,
1729 struct snd_soc_dai *dai)
1730 {
1731 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1732 struct snd_soc_device *socdev = rtd->socdev;
1733 struct snd_soc_codec *codec = socdev->card->codec;
1734 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1735 u8 mode, old_mode, format, old_format;
1736
1737 /* If the substream has 4 channel, do the necessary setup */
1738 if (params_channels(params) == 4) {
1739 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1740 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1741
1742 /* Safety check: are we in the correct operating mode and
1743 * the interface is in TDM mode? */
1744 if ((mode & TWL4030_OPTION_1) &&
1745 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1746 twl4030_tdm_enable(codec, substream->stream, 1);
1747 else
1748 return -EINVAL;
1749 }
1750
1751 if (twl4030->configured)
1752 /* Ignoring hw_params for already configured DAI */
1753 return 0;
1754
1755 /* bit rate */
1756 old_mode = twl4030_read_reg_cache(codec,
1757 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1758 mode = old_mode & ~TWL4030_APLL_RATE;
1759
1760 switch (params_rate(params)) {
1761 case 8000:
1762 mode |= TWL4030_APLL_RATE_8000;
1763 break;
1764 case 11025:
1765 mode |= TWL4030_APLL_RATE_11025;
1766 break;
1767 case 12000:
1768 mode |= TWL4030_APLL_RATE_12000;
1769 break;
1770 case 16000:
1771 mode |= TWL4030_APLL_RATE_16000;
1772 break;
1773 case 22050:
1774 mode |= TWL4030_APLL_RATE_22050;
1775 break;
1776 case 24000:
1777 mode |= TWL4030_APLL_RATE_24000;
1778 break;
1779 case 32000:
1780 mode |= TWL4030_APLL_RATE_32000;
1781 break;
1782 case 44100:
1783 mode |= TWL4030_APLL_RATE_44100;
1784 break;
1785 case 48000:
1786 mode |= TWL4030_APLL_RATE_48000;
1787 break;
1788 case 96000:
1789 mode |= TWL4030_APLL_RATE_96000;
1790 break;
1791 default:
1792 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1793 params_rate(params));
1794 return -EINVAL;
1795 }
1796
1797 if (mode != old_mode) {
1798 /* change rate and set CODECPDZ */
1799 twl4030_codec_enable(codec, 0);
1800 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1801 twl4030_codec_enable(codec, 1);
1802 }
1803
1804 /* sample size */
1805 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1806 format = old_format;
1807 format &= ~TWL4030_DATA_WIDTH;
1808 switch (params_format(params)) {
1809 case SNDRV_PCM_FORMAT_S16_LE:
1810 format |= TWL4030_DATA_WIDTH_16S_16W;
1811 break;
1812 case SNDRV_PCM_FORMAT_S24_LE:
1813 format |= TWL4030_DATA_WIDTH_32S_24W;
1814 break;
1815 default:
1816 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1817 params_format(params));
1818 return -EINVAL;
1819 }
1820
1821 if (format != old_format) {
1822
1823 /* clear CODECPDZ before changing format (codec requirement) */
1824 twl4030_codec_enable(codec, 0);
1825
1826 /* change format */
1827 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1828
1829 /* set CODECPDZ afterwards */
1830 twl4030_codec_enable(codec, 1);
1831 }
1832
1833 /* Store the important parameters for the DAI configuration and set
1834 * the DAI as configured */
1835 twl4030->configured = 1;
1836 twl4030->rate = params_rate(params);
1837 twl4030->sample_bits = hw_param_interval(params,
1838 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1839 twl4030->channels = params_channels(params);
1840
1841 /* If both playback and capture streams are open, and one of them
1842 * is setting the hw parameters right now (since we are here), set
1843 * constraints to the other stream to match the current one. */
1844 if (twl4030->slave_substream)
1845 twl4030_constraints(twl4030, substream);
1846
1847 return 0;
1848 }
1849
1850 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1851 int clk_id, unsigned int freq, int dir)
1852 {
1853 struct snd_soc_codec *codec = codec_dai->codec;
1854 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1855
1856 switch (freq) {
1857 case 19200000:
1858 case 26000000:
1859 case 38400000:
1860 break;
1861 default:
1862 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1863 return -EINVAL;
1864 }
1865
1866 if ((freq / 1000) != twl4030->sysclk) {
1867 dev_err(codec->dev,
1868 "Mismatch in APLL mclk: %u (configured: %u)\n",
1869 freq, twl4030->sysclk * 1000);
1870 return -EINVAL;
1871 }
1872
1873 return 0;
1874 }
1875
1876 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1877 unsigned int fmt)
1878 {
1879 struct snd_soc_codec *codec = codec_dai->codec;
1880 u8 old_format, format;
1881
1882 /* get format */
1883 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1884 format = old_format;
1885
1886 /* set master/slave audio interface */
1887 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1888 case SND_SOC_DAIFMT_CBM_CFM:
1889 format &= ~(TWL4030_AIF_SLAVE_EN);
1890 format &= ~(TWL4030_CLK256FS_EN);
1891 break;
1892 case SND_SOC_DAIFMT_CBS_CFS:
1893 format |= TWL4030_AIF_SLAVE_EN;
1894 format |= TWL4030_CLK256FS_EN;
1895 break;
1896 default:
1897 return -EINVAL;
1898 }
1899
1900 /* interface format */
1901 format &= ~TWL4030_AIF_FORMAT;
1902 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1903 case SND_SOC_DAIFMT_I2S:
1904 format |= TWL4030_AIF_FORMAT_CODEC;
1905 break;
1906 case SND_SOC_DAIFMT_DSP_A:
1907 format |= TWL4030_AIF_FORMAT_TDM;
1908 break;
1909 default:
1910 return -EINVAL;
1911 }
1912
1913 if (format != old_format) {
1914
1915 /* clear CODECPDZ before changing format (codec requirement) */
1916 twl4030_codec_enable(codec, 0);
1917
1918 /* change format */
1919 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1920
1921 /* set CODECPDZ afterwards */
1922 twl4030_codec_enable(codec, 1);
1923 }
1924
1925 return 0;
1926 }
1927
1928 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1929 {
1930 struct snd_soc_codec *codec = dai->codec;
1931 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1932
1933 if (tristate)
1934 reg |= TWL4030_AIF_TRI_EN;
1935 else
1936 reg &= ~TWL4030_AIF_TRI_EN;
1937
1938 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1939 }
1940
1941 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1942 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1943 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1944 int enable)
1945 {
1946 u8 reg, mask;
1947
1948 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1949
1950 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1951 mask = TWL4030_ARXL1_VRX_EN;
1952 else
1953 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1954
1955 if (enable)
1956 reg |= mask;
1957 else
1958 reg &= ~mask;
1959
1960 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1961 }
1962
1963 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1964 struct snd_soc_dai *dai)
1965 {
1966 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1967 struct snd_soc_device *socdev = rtd->socdev;
1968 struct snd_soc_codec *codec = socdev->card->codec;
1969 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1970 u8 mode;
1971
1972 /* If the system master clock is not 26MHz, the voice PCM interface is
1973 * not avilable.
1974 */
1975 if (twl4030->sysclk != 26000) {
1976 dev_err(codec->dev, "The board is configured for %u Hz, while"
1977 "the Voice interface needs 26MHz APLL mclk\n",
1978 twl4030->sysclk * 1000);
1979 return -EINVAL;
1980 }
1981
1982 /* If the codec mode is not option2, the voice PCM interface is not
1983 * avilable.
1984 */
1985 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1986 & TWL4030_OPT_MODE;
1987
1988 if (mode != TWL4030_OPTION_2) {
1989 printk(KERN_ERR "TWL4030 voice startup: "
1990 "the codec mode is not option2\n");
1991 return -EINVAL;
1992 }
1993
1994 return 0;
1995 }
1996
1997 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1998 struct snd_soc_dai *dai)
1999 {
2000 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2001 struct snd_soc_device *socdev = rtd->socdev;
2002 struct snd_soc_codec *codec = socdev->card->codec;
2003
2004 /* Enable voice digital filters */
2005 twl4030_voice_enable(codec, substream->stream, 0);
2006 }
2007
2008 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2009 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2010 {
2011 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2012 struct snd_soc_device *socdev = rtd->socdev;
2013 struct snd_soc_codec *codec = socdev->card->codec;
2014 u8 old_mode, mode;
2015
2016 /* Enable voice digital filters */
2017 twl4030_voice_enable(codec, substream->stream, 1);
2018
2019 /* bit rate */
2020 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2021 & ~(TWL4030_CODECPDZ);
2022 mode = old_mode;
2023
2024 switch (params_rate(params)) {
2025 case 8000:
2026 mode &= ~(TWL4030_SEL_16K);
2027 break;
2028 case 16000:
2029 mode |= TWL4030_SEL_16K;
2030 break;
2031 default:
2032 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2033 params_rate(params));
2034 return -EINVAL;
2035 }
2036
2037 if (mode != old_mode) {
2038 /* change rate and set CODECPDZ */
2039 twl4030_codec_enable(codec, 0);
2040 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2041 twl4030_codec_enable(codec, 1);
2042 }
2043
2044 return 0;
2045 }
2046
2047 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2048 int clk_id, unsigned int freq, int dir)
2049 {
2050 struct snd_soc_codec *codec = codec_dai->codec;
2051 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2052
2053 if (freq != 26000000) {
2054 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2055 "interface needs 26MHz APLL mclk\n", freq);
2056 return -EINVAL;
2057 }
2058 if ((freq / 1000) != twl4030->sysclk) {
2059 dev_err(codec->dev,
2060 "Mismatch in APLL mclk: %u (configured: %u)\n",
2061 freq, twl4030->sysclk * 1000);
2062 return -EINVAL;
2063 }
2064 return 0;
2065 }
2066
2067 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2068 unsigned int fmt)
2069 {
2070 struct snd_soc_codec *codec = codec_dai->codec;
2071 u8 old_format, format;
2072
2073 /* get format */
2074 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2075 format = old_format;
2076
2077 /* set master/slave audio interface */
2078 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2079 case SND_SOC_DAIFMT_CBM_CFM:
2080 format &= ~(TWL4030_VIF_SLAVE_EN);
2081 break;
2082 case SND_SOC_DAIFMT_CBS_CFS:
2083 format |= TWL4030_VIF_SLAVE_EN;
2084 break;
2085 default:
2086 return -EINVAL;
2087 }
2088
2089 /* clock inversion */
2090 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2091 case SND_SOC_DAIFMT_IB_NF:
2092 format &= ~(TWL4030_VIF_FORMAT);
2093 break;
2094 case SND_SOC_DAIFMT_NB_IF:
2095 format |= TWL4030_VIF_FORMAT;
2096 break;
2097 default:
2098 return -EINVAL;
2099 }
2100
2101 if (format != old_format) {
2102 /* change format and set CODECPDZ */
2103 twl4030_codec_enable(codec, 0);
2104 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2105 twl4030_codec_enable(codec, 1);
2106 }
2107
2108 return 0;
2109 }
2110
2111 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2112 {
2113 struct snd_soc_codec *codec = dai->codec;
2114 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2115
2116 if (tristate)
2117 reg |= TWL4030_VIF_TRI_EN;
2118 else
2119 reg &= ~TWL4030_VIF_TRI_EN;
2120
2121 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2122 }
2123
2124 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2125 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2126
2127 static struct snd_soc_dai_ops twl4030_dai_ops = {
2128 .startup = twl4030_startup,
2129 .shutdown = twl4030_shutdown,
2130 .hw_params = twl4030_hw_params,
2131 .set_sysclk = twl4030_set_dai_sysclk,
2132 .set_fmt = twl4030_set_dai_fmt,
2133 .set_tristate = twl4030_set_tristate,
2134 };
2135
2136 static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2137 .startup = twl4030_voice_startup,
2138 .shutdown = twl4030_voice_shutdown,
2139 .hw_params = twl4030_voice_hw_params,
2140 .set_sysclk = twl4030_voice_set_dai_sysclk,
2141 .set_fmt = twl4030_voice_set_dai_fmt,
2142 .set_tristate = twl4030_voice_set_tristate,
2143 };
2144
2145 struct snd_soc_dai twl4030_dai[] = {
2146 {
2147 .name = "twl4030",
2148 .playback = {
2149 .stream_name = "HiFi Playback",
2150 .channels_min = 2,
2151 .channels_max = 4,
2152 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2153 .formats = TWL4030_FORMATS,},
2154 .capture = {
2155 .stream_name = "Capture",
2156 .channels_min = 2,
2157 .channels_max = 4,
2158 .rates = TWL4030_RATES,
2159 .formats = TWL4030_FORMATS,},
2160 .ops = &twl4030_dai_ops,
2161 },
2162 {
2163 .name = "twl4030 Voice",
2164 .playback = {
2165 .stream_name = "Voice Playback",
2166 .channels_min = 1,
2167 .channels_max = 1,
2168 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2169 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2170 .capture = {
2171 .stream_name = "Capture",
2172 .channels_min = 1,
2173 .channels_max = 2,
2174 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2175 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2176 .ops = &twl4030_dai_voice_ops,
2177 },
2178 };
2179 EXPORT_SYMBOL_GPL(twl4030_dai);
2180
2181 static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
2182 {
2183 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2184 struct snd_soc_codec *codec = socdev->card->codec;
2185
2186 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2187
2188 return 0;
2189 }
2190
2191 static int twl4030_soc_resume(struct platform_device *pdev)
2192 {
2193 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2194 struct snd_soc_codec *codec = socdev->card->codec;
2195
2196 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2197 return 0;
2198 }
2199
2200 static struct snd_soc_codec *twl4030_codec;
2201
2202 static int twl4030_soc_probe(struct platform_device *pdev)
2203 {
2204 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2205 struct twl4030_setup_data *setup = socdev->codec_data;
2206 struct snd_soc_codec *codec;
2207 struct twl4030_priv *twl4030;
2208 int ret;
2209
2210 BUG_ON(!twl4030_codec);
2211
2212 codec = twl4030_codec;
2213 twl4030 = snd_soc_codec_get_drvdata(codec);
2214 socdev->card->codec = codec;
2215
2216 /* Configuration for headset ramp delay from setup data */
2217 if (setup) {
2218 unsigned char hs_pop;
2219
2220 if (setup->sysclk != twl4030->sysclk)
2221 dev_warn(&pdev->dev,
2222 "Mismatch in APLL mclk: %u (configured: %u)\n",
2223 setup->sysclk, twl4030->sysclk);
2224
2225 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
2226 hs_pop &= ~TWL4030_RAMP_DELAY;
2227 hs_pop |= (setup->ramp_delay_value << 2);
2228 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
2229 }
2230
2231 /* register pcms */
2232 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2233 if (ret < 0) {
2234 dev_err(&pdev->dev, "failed to create pcms\n");
2235 return ret;
2236 }
2237
2238 snd_soc_add_controls(codec, twl4030_snd_controls,
2239 ARRAY_SIZE(twl4030_snd_controls));
2240 twl4030_add_widgets(codec);
2241
2242 return 0;
2243 }
2244
2245 static int twl4030_soc_remove(struct platform_device *pdev)
2246 {
2247 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
2248 struct snd_soc_codec *codec = socdev->card->codec;
2249
2250 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2251 snd_soc_free_pcms(socdev);
2252 snd_soc_dapm_free(socdev);
2253
2254 return 0;
2255 }
2256
2257 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2258 {
2259 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2260 struct snd_soc_codec *codec;
2261 struct twl4030_priv *twl4030;
2262 int ret;
2263
2264 if (!pdata) {
2265 dev_err(&pdev->dev, "platform_data is missing\n");
2266 return -EINVAL;
2267 }
2268
2269 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2270 if (twl4030 == NULL) {
2271 dev_err(&pdev->dev, "Can not allocate memroy\n");
2272 return -ENOMEM;
2273 }
2274
2275 codec = &twl4030->codec;
2276 snd_soc_codec_set_drvdata(codec, twl4030);
2277 codec->dev = &pdev->dev;
2278 twl4030_dai[0].dev = &pdev->dev;
2279 twl4030_dai[1].dev = &pdev->dev;
2280
2281 mutex_init(&codec->mutex);
2282 INIT_LIST_HEAD(&codec->dapm_widgets);
2283 INIT_LIST_HEAD(&codec->dapm_paths);
2284
2285 codec->name = "twl4030";
2286 codec->owner = THIS_MODULE;
2287 codec->read = twl4030_read_reg_cache;
2288 codec->write = twl4030_write;
2289 codec->set_bias_level = twl4030_set_bias_level;
2290 codec->dai = twl4030_dai;
2291 codec->num_dai = ARRAY_SIZE(twl4030_dai);
2292 codec->reg_cache_size = sizeof(twl4030_reg);
2293 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2294 GFP_KERNEL);
2295 if (codec->reg_cache == NULL) {
2296 ret = -ENOMEM;
2297 goto error_cache;
2298 }
2299
2300 platform_set_drvdata(pdev, twl4030);
2301 twl4030_codec = codec;
2302
2303 /* Set the defaults, and power up the codec */
2304 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
2305 twl4030_init_chip(codec);
2306 codec->bias_level = SND_SOC_BIAS_OFF;
2307 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2308
2309 ret = snd_soc_register_codec(codec);
2310 if (ret != 0) {
2311 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2312 goto error_codec;
2313 }
2314
2315 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2316 if (ret != 0) {
2317 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2318 snd_soc_unregister_codec(codec);
2319 goto error_codec;
2320 }
2321
2322 return 0;
2323
2324 error_codec:
2325 twl4030_power_down(codec);
2326 kfree(codec->reg_cache);
2327 error_cache:
2328 kfree(twl4030);
2329 return ret;
2330 }
2331
2332 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2333 {
2334 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2335
2336 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2337 snd_soc_unregister_codec(&twl4030->codec);
2338 kfree(twl4030->codec.reg_cache);
2339 kfree(twl4030);
2340
2341 twl4030_codec = NULL;
2342 return 0;
2343 }
2344
2345 MODULE_ALIAS("platform:twl4030_codec_audio");
2346
2347 static struct platform_driver twl4030_codec_driver = {
2348 .probe = twl4030_codec_probe,
2349 .remove = __devexit_p(twl4030_codec_remove),
2350 .driver = {
2351 .name = "twl4030_codec_audio",
2352 .owner = THIS_MODULE,
2353 },
2354 };
2355
2356 static int __init twl4030_modinit(void)
2357 {
2358 return platform_driver_register(&twl4030_codec_driver);
2359 }
2360 module_init(twl4030_modinit);
2361
2362 static void __exit twl4030_exit(void)
2363 {
2364 platform_driver_unregister(&twl4030_codec_driver);
2365 }
2366 module_exit(twl4030_exit);
2367
2368 struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2369 .probe = twl4030_soc_probe,
2370 .remove = twl4030_soc_remove,
2371 .suspend = twl4030_soc_suspend,
2372 .resume = twl4030_soc_resume,
2373 };
2374 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2375
2376 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2377 MODULE_AUTHOR("Steve Sakoman");
2378 MODULE_LICENSE("GPL");
Ubuntu Jammy Linux kernel mirror