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ASoC: twl4030: Parameter alignment fixes (for code consistency)
[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / twl4030.c
1 /*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/pm.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/of.h>
30 #include <linux/of_gpio.h>
31 #include <linux/i2c/twl.h>
32 #include <linux/slab.h>
33 #include <linux/gpio.h>
34 #include <sound/core.h>
35 #include <sound/pcm.h>
36 #include <sound/pcm_params.h>
37 #include <sound/soc.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40
41 /* Register descriptions are here */
42 #include <linux/mfd/twl4030-audio.h>
43
44 /* TWL4030 PMBR1 Register */
45 #define TWL4030_PMBR1_REG 0x0D
46 /* TWL4030 PMBR1 Register GPIO6 mux bits */
47 #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
49 #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
50
51 /* codec private data */
52 struct twl4030_priv {
53 unsigned int codec_powered;
54
55 /* reference counts of AIF/APLL users */
56 unsigned int apll_enabled;
57
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
60
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
65
66 unsigned int sysclk;
67
68 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
73 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
74
75 struct twl4030_codec_data *pdata;
76 };
77
78 static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79 {
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87 }
88
89 static void twl4030_update_ctl_cache(struct snd_soc_codec *codec,
90 unsigned int reg, unsigned int value)
91 {
92 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
93
94 switch (reg) {
95 case TWL4030_REG_EAR_CTL:
96 case TWL4030_REG_PREDL_CTL:
97 case TWL4030_REG_PREDR_CTL:
98 case TWL4030_REG_PRECKL_CTL:
99 case TWL4030_REG_PRECKR_CTL:
100 case TWL4030_REG_HS_GAIN_SET:
101 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
102 break;
103 default:
104 break;
105 }
106 }
107
108 static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
109 {
110 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
111 u8 value = 0;
112
113 if (reg >= TWL4030_CACHEREGNUM)
114 return -EIO;
115
116 switch (reg) {
117 case TWL4030_REG_EAR_CTL:
118 case TWL4030_REG_PREDL_CTL:
119 case TWL4030_REG_PREDR_CTL:
120 case TWL4030_REG_PRECKL_CTL:
121 case TWL4030_REG_PRECKR_CTL:
122 case TWL4030_REG_HS_GAIN_SET:
123 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
124 break;
125 default:
126 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
127 break;
128 }
129
130 return value;
131 }
132
133 static bool twl4030_can_write_to_chip(struct snd_soc_codec *codec,
134 unsigned int reg)
135 {
136 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
137 bool write_to_reg = false;
138
139 /* Decide if the given register can be written */
140 switch (reg) {
141 case TWL4030_REG_EAR_CTL:
142 if (twl4030->earpiece_enabled)
143 write_to_reg = true;
144 break;
145 case TWL4030_REG_PREDL_CTL:
146 if (twl4030->predrivel_enabled)
147 write_to_reg = true;
148 break;
149 case TWL4030_REG_PREDR_CTL:
150 if (twl4030->predriver_enabled)
151 write_to_reg = true;
152 break;
153 case TWL4030_REG_PRECKL_CTL:
154 if (twl4030->carkitl_enabled)
155 write_to_reg = true;
156 break;
157 case TWL4030_REG_PRECKR_CTL:
158 if (twl4030->carkitr_enabled)
159 write_to_reg = true;
160 break;
161 case TWL4030_REG_HS_GAIN_SET:
162 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
163 write_to_reg = true;
164 break;
165 default:
166 /* All other register can be written */
167 write_to_reg = true;
168 break;
169 }
170
171 return write_to_reg;
172 }
173
174 static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
175 unsigned int value)
176 {
177 twl4030_update_ctl_cache(codec, reg, value);
178 if (twl4030_can_write_to_chip(codec, reg))
179 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
180
181 return 0;
182 }
183
184 static inline void twl4030_wait_ms(int time)
185 {
186 if (time < 60) {
187 time *= 1000;
188 usleep_range(time, time + 500);
189 } else {
190 msleep(time);
191 }
192 }
193
194 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
195 {
196 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
197 int mode;
198
199 if (enable == twl4030->codec_powered)
200 return;
201
202 if (enable)
203 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
204 else
205 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
206
207 if (mode >= 0)
208 twl4030->codec_powered = enable;
209
210 /* REVISIT: this delay is present in TI sample drivers */
211 /* but there seems to be no TRM requirement for it */
212 udelay(10);
213 }
214
215 static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
216 struct device_node *node)
217 {
218 int value;
219
220 of_property_read_u32(node, "ti,digimic_delay",
221 &pdata->digimic_delay);
222 of_property_read_u32(node, "ti,ramp_delay_value",
223 &pdata->ramp_delay_value);
224 of_property_read_u32(node, "ti,offset_cncl_path",
225 &pdata->offset_cncl_path);
226 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
227 pdata->hs_extmute = value;
228
229 pdata->hs_extmute_gpio = of_get_named_gpio(node,
230 "ti,hs_extmute_gpio", 0);
231 if (gpio_is_valid(pdata->hs_extmute_gpio))
232 pdata->hs_extmute = 1;
233 }
234
235 static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
236 {
237 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
238 struct device_node *twl4030_codec_node = NULL;
239
240 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
241 "codec");
242
243 if (!pdata && twl4030_codec_node) {
244 pdata = devm_kzalloc(codec->dev,
245 sizeof(struct twl4030_codec_data),
246 GFP_KERNEL);
247 if (!pdata) {
248 dev_err(codec->dev, "Can not allocate memory\n");
249 return NULL;
250 }
251 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
252 }
253
254 return pdata;
255 }
256
257 static void twl4030_init_chip(struct snd_soc_codec *codec)
258 {
259 struct twl4030_codec_data *pdata;
260 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
261 u8 reg, byte;
262 int i = 0;
263
264 pdata = twl4030_get_pdata(codec);
265
266 if (pdata && pdata->hs_extmute) {
267 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
268 int ret;
269
270 if (!pdata->hs_extmute_gpio)
271 dev_warn(codec->dev,
272 "Extmute GPIO is 0 is this correct?\n");
273
274 ret = gpio_request_one(pdata->hs_extmute_gpio,
275 GPIOF_OUT_INIT_LOW,
276 "hs_extmute");
277 if (ret) {
278 dev_err(codec->dev,
279 "Failed to get hs_extmute GPIO\n");
280 pdata->hs_extmute_gpio = -1;
281 }
282 } else {
283 u8 pin_mux;
284
285 /* Set TWL4030 GPIO6 as EXTMUTE signal */
286 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
287 TWL4030_PMBR1_REG);
288 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
289 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
290 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
291 TWL4030_PMBR1_REG);
292 }
293 }
294
295 /* Initialize the local ctl register cache */
296 tw4030_init_ctl_cache(twl4030);
297
298 /* anti-pop when changing analog gain */
299 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
300 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
301 reg | TWL4030_SMOOTH_ANAVOL_EN);
302
303 twl4030_write(codec, TWL4030_REG_OPTION,
304 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
305 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
306
307 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
308 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
309
310 /* Machine dependent setup */
311 if (!pdata)
312 return;
313
314 twl4030->pdata = pdata;
315
316 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
317 reg &= ~TWL4030_RAMP_DELAY;
318 reg |= (pdata->ramp_delay_value << 2);
319 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
320
321 /* initiate offset cancellation */
322 twl4030_codec_enable(codec, 1);
323
324 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
325 reg &= ~TWL4030_OFFSET_CNCL_SEL;
326 reg |= pdata->offset_cncl_path;
327 twl4030_write(codec, TWL4030_REG_ANAMICL,
328 reg | TWL4030_CNCL_OFFSET_START);
329
330 /*
331 * Wait for offset cancellation to complete.
332 * Since this takes a while, do not slam the i2c.
333 * Start polling the status after ~20ms.
334 */
335 msleep(20);
336 do {
337 usleep_range(1000, 2000);
338 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
339 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
340 TWL4030_REG_ANAMICL);
341 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
342 } while ((i++ < 100) &&
343 ((byte & TWL4030_CNCL_OFFSET_START) ==
344 TWL4030_CNCL_OFFSET_START));
345
346 twl4030_codec_enable(codec, 0);
347 }
348
349 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
350 {
351 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
352 int status = -1;
353
354 if (enable) {
355 twl4030->apll_enabled++;
356 if (twl4030->apll_enabled == 1)
357 status = twl4030_audio_enable_resource(
358 TWL4030_AUDIO_RES_APLL);
359 } else {
360 twl4030->apll_enabled--;
361 if (!twl4030->apll_enabled)
362 status = twl4030_audio_disable_resource(
363 TWL4030_AUDIO_RES_APLL);
364 }
365 }
366
367 /* Earpiece */
368 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
369 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
370 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
371 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
372 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
373 };
374
375 /* PreDrive Left */
376 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
377 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
378 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
379 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
380 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
381 };
382
383 /* PreDrive Right */
384 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
385 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
386 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
387 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
388 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
389 };
390
391 /* Headset Left */
392 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
393 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
394 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
395 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
396 };
397
398 /* Headset Right */
399 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
400 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
401 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
402 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
403 };
404
405 /* Carkit Left */
406 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
407 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
408 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
409 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
410 };
411
412 /* Carkit Right */
413 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
414 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
415 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
416 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
417 };
418
419 /* Handsfree Left */
420 static const char *twl4030_handsfreel_texts[] =
421 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
422
423 static const struct soc_enum twl4030_handsfreel_enum =
424 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
425 ARRAY_SIZE(twl4030_handsfreel_texts),
426 twl4030_handsfreel_texts);
427
428 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
429 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
430
431 /* Handsfree Left virtual mute */
432 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
433 SOC_DAPM_SINGLE_VIRT("Switch", 1);
434
435 /* Handsfree Right */
436 static const char *twl4030_handsfreer_texts[] =
437 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
438
439 static const struct soc_enum twl4030_handsfreer_enum =
440 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
441 ARRAY_SIZE(twl4030_handsfreer_texts),
442 twl4030_handsfreer_texts);
443
444 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
445 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
446
447 /* Handsfree Right virtual mute */
448 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
449 SOC_DAPM_SINGLE_VIRT("Switch", 1);
450
451 /* Vibra */
452 /* Vibra audio path selection */
453 static const char *twl4030_vibra_texts[] =
454 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
455
456 static const struct soc_enum twl4030_vibra_enum =
457 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
458 ARRAY_SIZE(twl4030_vibra_texts),
459 twl4030_vibra_texts);
460
461 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
462 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
463
464 /* Vibra path selection: local vibrator (PWM) or audio driven */
465 static const char *twl4030_vibrapath_texts[] =
466 {"Local vibrator", "Audio"};
467
468 static const struct soc_enum twl4030_vibrapath_enum =
469 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
470 ARRAY_SIZE(twl4030_vibrapath_texts),
471 twl4030_vibrapath_texts);
472
473 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
474 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
475
476 /* Left analog microphone selection */
477 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
478 SOC_DAPM_SINGLE("Main Mic Capture Switch",
479 TWL4030_REG_ANAMICL, 0, 1, 0),
480 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
481 TWL4030_REG_ANAMICL, 1, 1, 0),
482 SOC_DAPM_SINGLE("AUXL Capture Switch",
483 TWL4030_REG_ANAMICL, 2, 1, 0),
484 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
485 TWL4030_REG_ANAMICL, 3, 1, 0),
486 };
487
488 /* Right analog microphone selection */
489 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
490 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
491 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
492 };
493
494 /* TX1 L/R Analog/Digital microphone selection */
495 static const char *twl4030_micpathtx1_texts[] =
496 {"Analog", "Digimic0"};
497
498 static const struct soc_enum twl4030_micpathtx1_enum =
499 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
500 ARRAY_SIZE(twl4030_micpathtx1_texts),
501 twl4030_micpathtx1_texts);
502
503 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
504 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
505
506 /* TX2 L/R Analog/Digital microphone selection */
507 static const char *twl4030_micpathtx2_texts[] =
508 {"Analog", "Digimic1"};
509
510 static const struct soc_enum twl4030_micpathtx2_enum =
511 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
512 ARRAY_SIZE(twl4030_micpathtx2_texts),
513 twl4030_micpathtx2_texts);
514
515 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
516 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
517
518 /* Analog bypass for AudioR1 */
519 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
521
522 /* Analog bypass for AudioL1 */
523 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
525
526 /* Analog bypass for AudioR2 */
527 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
528 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
529
530 /* Analog bypass for AudioL2 */
531 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
532 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
533
534 /* Analog bypass for Voice */
535 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
536 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
537
538 /* Digital bypass gain, mute instead of -30dB */
539 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
540 TLV_DB_RANGE_HEAD(3),
541 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
542 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
543 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
544 };
545
546 /* Digital bypass left (TX1L -> RX2L) */
547 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
548 SOC_DAPM_SINGLE_TLV("Volume",
549 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
550 twl4030_dapm_dbypass_tlv);
551
552 /* Digital bypass right (TX1R -> RX2R) */
553 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
554 SOC_DAPM_SINGLE_TLV("Volume",
555 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
556 twl4030_dapm_dbypass_tlv);
557
558 /*
559 * Voice Sidetone GAIN volume control:
560 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
561 */
562 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
563
564 /* Digital bypass voice: sidetone (VUL -> VDL)*/
565 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
566 SOC_DAPM_SINGLE_TLV("Volume",
567 TWL4030_REG_VSTPGA, 0, 0x29, 0,
568 twl4030_dapm_dbypassv_tlv);
569
570 /*
571 * Output PGA builder:
572 * Handle the muting and unmuting of the given output (turning off the
573 * amplifier associated with the output pin)
574 * On mute bypass the reg_cache and write 0 to the register
575 * On unmute: restore the register content from the reg_cache
576 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
577 */
578 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
579 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
580 struct snd_kcontrol *kcontrol, int event) \
581 { \
582 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
583 \
584 switch (event) { \
585 case SND_SOC_DAPM_POST_PMU: \
586 twl4030->pin_name##_enabled = 1; \
587 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
588 break; \
589 case SND_SOC_DAPM_POST_PMD: \
590 twl4030->pin_name##_enabled = 0; \
591 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
592 break; \
593 } \
594 return 0; \
595 }
596
597 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
598 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
599 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
600 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
601 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
602
603 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
604 {
605 unsigned char hs_ctl;
606
607 hs_ctl = twl4030_read(codec, reg);
608
609 if (ramp) {
610 /* HF ramp-up */
611 hs_ctl |= TWL4030_HF_CTL_REF_EN;
612 twl4030_write(codec, reg, hs_ctl);
613 udelay(10);
614 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
615 twl4030_write(codec, reg, hs_ctl);
616 udelay(40);
617 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
618 hs_ctl |= TWL4030_HF_CTL_HB_EN;
619 twl4030_write(codec, reg, hs_ctl);
620 } else {
621 /* HF ramp-down */
622 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
623 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
624 twl4030_write(codec, reg, hs_ctl);
625 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
626 twl4030_write(codec, reg, hs_ctl);
627 udelay(40);
628 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
629 twl4030_write(codec, reg, hs_ctl);
630 }
631 }
632
633 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
634 struct snd_kcontrol *kcontrol, int event)
635 {
636 switch (event) {
637 case SND_SOC_DAPM_POST_PMU:
638 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
639 break;
640 case SND_SOC_DAPM_POST_PMD:
641 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
642 break;
643 }
644 return 0;
645 }
646
647 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
648 struct snd_kcontrol *kcontrol, int event)
649 {
650 switch (event) {
651 case SND_SOC_DAPM_POST_PMU:
652 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
653 break;
654 case SND_SOC_DAPM_POST_PMD:
655 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
656 break;
657 }
658 return 0;
659 }
660
661 static int vibramux_event(struct snd_soc_dapm_widget *w,
662 struct snd_kcontrol *kcontrol, int event)
663 {
664 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
665 return 0;
666 }
667
668 static int apll_event(struct snd_soc_dapm_widget *w,
669 struct snd_kcontrol *kcontrol, int event)
670 {
671 switch (event) {
672 case SND_SOC_DAPM_PRE_PMU:
673 twl4030_apll_enable(w->codec, 1);
674 break;
675 case SND_SOC_DAPM_POST_PMD:
676 twl4030_apll_enable(w->codec, 0);
677 break;
678 }
679 return 0;
680 }
681
682 static int aif_event(struct snd_soc_dapm_widget *w,
683 struct snd_kcontrol *kcontrol, int event)
684 {
685 u8 audio_if;
686
687 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
688 switch (event) {
689 case SND_SOC_DAPM_PRE_PMU:
690 /* Enable AIF */
691 /* enable the PLL before we use it to clock the DAI */
692 twl4030_apll_enable(w->codec, 1);
693
694 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
695 audio_if | TWL4030_AIF_EN);
696 break;
697 case SND_SOC_DAPM_POST_PMD:
698 /* disable the DAI before we stop it's source PLL */
699 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
700 audio_if & ~TWL4030_AIF_EN);
701 twl4030_apll_enable(w->codec, 0);
702 break;
703 }
704 return 0;
705 }
706
707 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
708 {
709 unsigned char hs_gain, hs_pop;
710 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
711 struct twl4030_codec_data *pdata = twl4030->pdata;
712 /* Base values for ramp delay calculation: 2^19 - 2^26 */
713 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
714 8388608, 16777216, 33554432, 67108864};
715 unsigned int delay;
716
717 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
718 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
719 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
720 twl4030->sysclk) + 1;
721
722 /* Enable external mute control, this dramatically reduces
723 * the pop-noise */
724 if (pdata && pdata->hs_extmute) {
725 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
726 gpio_set_value(pdata->hs_extmute_gpio, 1);
727 } else {
728 hs_pop |= TWL4030_EXTMUTE;
729 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
730 }
731 }
732
733 if (ramp) {
734 /* Headset ramp-up according to the TRM */
735 hs_pop |= TWL4030_VMID_EN;
736 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
737 /* Actually write to the register */
738 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
739 TWL4030_REG_HS_GAIN_SET);
740 hs_pop |= TWL4030_RAMP_EN;
741 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
742 /* Wait ramp delay time + 1, so the VMID can settle */
743 twl4030_wait_ms(delay);
744 } else {
745 /* Headset ramp-down _not_ according to
746 * the TRM, but in a way that it is working */
747 hs_pop &= ~TWL4030_RAMP_EN;
748 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
749 /* Wait ramp delay time + 1, so the VMID can settle */
750 twl4030_wait_ms(delay);
751 /* Bypass the reg_cache to mute the headset */
752 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
753 TWL4030_REG_HS_GAIN_SET);
754
755 hs_pop &= ~TWL4030_VMID_EN;
756 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
757 }
758
759 /* Disable external mute */
760 if (pdata && pdata->hs_extmute) {
761 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
762 gpio_set_value(pdata->hs_extmute_gpio, 0);
763 } else {
764 hs_pop &= ~TWL4030_EXTMUTE;
765 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
766 }
767 }
768 }
769
770 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
771 struct snd_kcontrol *kcontrol, int event)
772 {
773 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
774
775 switch (event) {
776 case SND_SOC_DAPM_POST_PMU:
777 /* Do the ramp-up only once */
778 if (!twl4030->hsr_enabled)
779 headset_ramp(w->codec, 1);
780
781 twl4030->hsl_enabled = 1;
782 break;
783 case SND_SOC_DAPM_POST_PMD:
784 /* Do the ramp-down only if both headsetL/R is disabled */
785 if (!twl4030->hsr_enabled)
786 headset_ramp(w->codec, 0);
787
788 twl4030->hsl_enabled = 0;
789 break;
790 }
791 return 0;
792 }
793
794 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
795 struct snd_kcontrol *kcontrol, int event)
796 {
797 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
798
799 switch (event) {
800 case SND_SOC_DAPM_POST_PMU:
801 /* Do the ramp-up only once */
802 if (!twl4030->hsl_enabled)
803 headset_ramp(w->codec, 1);
804
805 twl4030->hsr_enabled = 1;
806 break;
807 case SND_SOC_DAPM_POST_PMD:
808 /* Do the ramp-down only if both headsetL/R is disabled */
809 if (!twl4030->hsl_enabled)
810 headset_ramp(w->codec, 0);
811
812 twl4030->hsr_enabled = 0;
813 break;
814 }
815 return 0;
816 }
817
818 static int digimic_event(struct snd_soc_dapm_widget *w,
819 struct snd_kcontrol *kcontrol, int event)
820 {
821 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
822 struct twl4030_codec_data *pdata = twl4030->pdata;
823
824 if (pdata && pdata->digimic_delay)
825 twl4030_wait_ms(pdata->digimic_delay);
826 return 0;
827 }
828
829 /*
830 * Some of the gain controls in TWL (mostly those which are associated with
831 * the outputs) are implemented in an interesting way:
832 * 0x0 : Power down (mute)
833 * 0x1 : 6dB
834 * 0x2 : 0 dB
835 * 0x3 : -6 dB
836 * Inverting not going to help with these.
837 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
838 */
839 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
840 struct snd_ctl_elem_value *ucontrol)
841 {
842 struct soc_mixer_control *mc =
843 (struct soc_mixer_control *)kcontrol->private_value;
844 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
845 unsigned int reg = mc->reg;
846 unsigned int shift = mc->shift;
847 unsigned int rshift = mc->rshift;
848 int max = mc->max;
849 int mask = (1 << fls(max)) - 1;
850
851 ucontrol->value.integer.value[0] =
852 (snd_soc_read(codec, reg) >> shift) & mask;
853 if (ucontrol->value.integer.value[0])
854 ucontrol->value.integer.value[0] =
855 max + 1 - ucontrol->value.integer.value[0];
856
857 if (shift != rshift) {
858 ucontrol->value.integer.value[1] =
859 (snd_soc_read(codec, reg) >> rshift) & mask;
860 if (ucontrol->value.integer.value[1])
861 ucontrol->value.integer.value[1] =
862 max + 1 - ucontrol->value.integer.value[1];
863 }
864
865 return 0;
866 }
867
868 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
869 struct snd_ctl_elem_value *ucontrol)
870 {
871 struct soc_mixer_control *mc =
872 (struct soc_mixer_control *)kcontrol->private_value;
873 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
874 unsigned int reg = mc->reg;
875 unsigned int shift = mc->shift;
876 unsigned int rshift = mc->rshift;
877 int max = mc->max;
878 int mask = (1 << fls(max)) - 1;
879 unsigned short val, val2, val_mask;
880
881 val = (ucontrol->value.integer.value[0] & mask);
882
883 val_mask = mask << shift;
884 if (val)
885 val = max + 1 - val;
886 val = val << shift;
887 if (shift != rshift) {
888 val2 = (ucontrol->value.integer.value[1] & mask);
889 val_mask |= mask << rshift;
890 if (val2)
891 val2 = max + 1 - val2;
892 val |= val2 << rshift;
893 }
894 return snd_soc_update_bits(codec, reg, val_mask, val);
895 }
896
897 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
898 struct snd_ctl_elem_value *ucontrol)
899 {
900 struct soc_mixer_control *mc =
901 (struct soc_mixer_control *)kcontrol->private_value;
902 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
903 unsigned int reg = mc->reg;
904 unsigned int reg2 = mc->rreg;
905 unsigned int shift = mc->shift;
906 int max = mc->max;
907 int mask = (1<<fls(max))-1;
908
909 ucontrol->value.integer.value[0] =
910 (snd_soc_read(codec, reg) >> shift) & mask;
911 ucontrol->value.integer.value[1] =
912 (snd_soc_read(codec, reg2) >> shift) & mask;
913
914 if (ucontrol->value.integer.value[0])
915 ucontrol->value.integer.value[0] =
916 max + 1 - ucontrol->value.integer.value[0];
917 if (ucontrol->value.integer.value[1])
918 ucontrol->value.integer.value[1] =
919 max + 1 - ucontrol->value.integer.value[1];
920
921 return 0;
922 }
923
924 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
926 {
927 struct soc_mixer_control *mc =
928 (struct soc_mixer_control *)kcontrol->private_value;
929 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
930 unsigned int reg = mc->reg;
931 unsigned int reg2 = mc->rreg;
932 unsigned int shift = mc->shift;
933 int max = mc->max;
934 int mask = (1 << fls(max)) - 1;
935 int err;
936 unsigned short val, val2, val_mask;
937
938 val_mask = mask << shift;
939 val = (ucontrol->value.integer.value[0] & mask);
940 val2 = (ucontrol->value.integer.value[1] & mask);
941
942 if (val)
943 val = max + 1 - val;
944 if (val2)
945 val2 = max + 1 - val2;
946
947 val = val << shift;
948 val2 = val2 << shift;
949
950 err = snd_soc_update_bits(codec, reg, val_mask, val);
951 if (err < 0)
952 return err;
953
954 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
955 return err;
956 }
957
958 /* Codec operation modes */
959 static const char *twl4030_op_modes_texts[] = {
960 "Option 2 (voice/audio)", "Option 1 (audio)"
961 };
962
963 static const struct soc_enum twl4030_op_modes_enum =
964 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
965 ARRAY_SIZE(twl4030_op_modes_texts),
966 twl4030_op_modes_texts);
967
968 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
969 struct snd_ctl_elem_value *ucontrol)
970 {
971 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
972 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
973 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
974 unsigned short val;
975 unsigned short mask;
976
977 if (twl4030->configured) {
978 dev_err(codec->dev,
979 "operation mode cannot be changed on-the-fly\n");
980 return -EBUSY;
981 }
982
983 if (ucontrol->value.enumerated.item[0] > e->max - 1)
984 return -EINVAL;
985
986 val = ucontrol->value.enumerated.item[0] << e->shift_l;
987 mask = e->mask << e->shift_l;
988 if (e->shift_l != e->shift_r) {
989 if (ucontrol->value.enumerated.item[1] > e->max - 1)
990 return -EINVAL;
991 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
992 mask |= e->mask << e->shift_r;
993 }
994
995 return snd_soc_update_bits(codec, e->reg, mask, val);
996 }
997
998 /*
999 * FGAIN volume control:
1000 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1001 */
1002 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1003
1004 /*
1005 * CGAIN volume control:
1006 * 0 dB to 12 dB in 6 dB steps
1007 * value 2 and 3 means 12 dB
1008 */
1009 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1010
1011 /*
1012 * Voice Downlink GAIN volume control:
1013 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1014 */
1015 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1016
1017 /*
1018 * Analog playback gain
1019 * -24 dB to 12 dB in 2 dB steps
1020 */
1021 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1022
1023 /*
1024 * Gain controls tied to outputs
1025 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1026 */
1027 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1028
1029 /*
1030 * Gain control for earpiece amplifier
1031 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1032 */
1033 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1034
1035 /*
1036 * Capture gain after the ADCs
1037 * from 0 dB to 31 dB in 1 dB steps
1038 */
1039 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1040
1041 /*
1042 * Gain control for input amplifiers
1043 * 0 dB to 30 dB in 6 dB steps
1044 */
1045 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1046
1047 /* AVADC clock priority */
1048 static const char *twl4030_avadc_clk_priority_texts[] = {
1049 "Voice high priority", "HiFi high priority"
1050 };
1051
1052 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1053 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1054 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1055 twl4030_avadc_clk_priority_texts);
1056
1057 static const char *twl4030_rampdelay_texts[] = {
1058 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1059 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1060 "3495/2581/1748 ms"
1061 };
1062
1063 static const struct soc_enum twl4030_rampdelay_enum =
1064 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1065 ARRAY_SIZE(twl4030_rampdelay_texts),
1066 twl4030_rampdelay_texts);
1067
1068 /* Vibra H-bridge direction mode */
1069 static const char *twl4030_vibradirmode_texts[] = {
1070 "Vibra H-bridge direction", "Audio data MSB",
1071 };
1072
1073 static const struct soc_enum twl4030_vibradirmode_enum =
1074 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1075 ARRAY_SIZE(twl4030_vibradirmode_texts),
1076 twl4030_vibradirmode_texts);
1077
1078 /* Vibra H-bridge direction */
1079 static const char *twl4030_vibradir_texts[] = {
1080 "Positive polarity", "Negative polarity",
1081 };
1082
1083 static const struct soc_enum twl4030_vibradir_enum =
1084 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1085 ARRAY_SIZE(twl4030_vibradir_texts),
1086 twl4030_vibradir_texts);
1087
1088 /* Digimic Left and right swapping */
1089 static const char *twl4030_digimicswap_texts[] = {
1090 "Not swapped", "Swapped",
1091 };
1092
1093 static const struct soc_enum twl4030_digimicswap_enum =
1094 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1095 ARRAY_SIZE(twl4030_digimicswap_texts),
1096 twl4030_digimicswap_texts);
1097
1098 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1099 /* Codec operation mode control */
1100 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1101 snd_soc_get_enum_double,
1102 snd_soc_put_twl4030_opmode_enum_double),
1103
1104 /* Common playback gain controls */
1105 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1106 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1107 0, 0x3f, 0, digital_fine_tlv),
1108 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1109 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1110 0, 0x3f, 0, digital_fine_tlv),
1111
1112 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1113 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1114 6, 0x2, 0, digital_coarse_tlv),
1115 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1116 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1117 6, 0x2, 0, digital_coarse_tlv),
1118
1119 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1120 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1121 3, 0x12, 1, analog_tlv),
1122 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1123 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1124 3, 0x12, 1, analog_tlv),
1125 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1126 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1127 1, 1, 0),
1128 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1129 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1130 1, 1, 0),
1131
1132 /* Common voice downlink gain controls */
1133 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1134 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1135
1136 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1137 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1138
1139 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1140 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1141
1142 /* Separate output gain controls */
1143 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1144 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1145 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1146 snd_soc_put_volsw_r2_twl4030, output_tvl),
1147
1148 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1149 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1150 snd_soc_put_volsw_twl4030, output_tvl),
1151
1152 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1153 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1154 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1155 snd_soc_put_volsw_r2_twl4030, output_tvl),
1156
1157 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1158 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1159 snd_soc_put_volsw_twl4030, output_ear_tvl),
1160
1161 /* Common capture gain controls */
1162 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1163 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1164 0, 0x1f, 0, digital_capture_tlv),
1165 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1166 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1167 0, 0x1f, 0, digital_capture_tlv),
1168
1169 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1170 0, 3, 5, 0, input_gain_tlv),
1171
1172 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1173
1174 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1175
1176 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1177 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1178
1179 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1180 };
1181
1182 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1183 /* Left channel inputs */
1184 SND_SOC_DAPM_INPUT("MAINMIC"),
1185 SND_SOC_DAPM_INPUT("HSMIC"),
1186 SND_SOC_DAPM_INPUT("AUXL"),
1187 SND_SOC_DAPM_INPUT("CARKITMIC"),
1188 /* Right channel inputs */
1189 SND_SOC_DAPM_INPUT("SUBMIC"),
1190 SND_SOC_DAPM_INPUT("AUXR"),
1191 /* Digital microphones (Stereo) */
1192 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1193 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1194
1195 /* Outputs */
1196 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1197 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1198 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1199 SND_SOC_DAPM_OUTPUT("HSOL"),
1200 SND_SOC_DAPM_OUTPUT("HSOR"),
1201 SND_SOC_DAPM_OUTPUT("CARKITL"),
1202 SND_SOC_DAPM_OUTPUT("CARKITR"),
1203 SND_SOC_DAPM_OUTPUT("HFL"),
1204 SND_SOC_DAPM_OUTPUT("HFR"),
1205 SND_SOC_DAPM_OUTPUT("VIBRA"),
1206
1207 /* AIF and APLL clocks for running DAIs (including loopback) */
1208 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1209 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1210 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1211
1212 /* DACs */
1213 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1214 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1215 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1216 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1217 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
1218
1219 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1220 TWL4030_REG_VOICE_IF, 6, 0),
1221
1222 /* Analog bypasses */
1223 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1224 &twl4030_dapm_abypassr1_control),
1225 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1226 &twl4030_dapm_abypassl1_control),
1227 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1228 &twl4030_dapm_abypassr2_control),
1229 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1230 &twl4030_dapm_abypassl2_control),
1231 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1232 &twl4030_dapm_abypassv_control),
1233
1234 /* Master analog loopback switch */
1235 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1236 NULL, 0),
1237
1238 /* Digital bypasses */
1239 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1240 &twl4030_dapm_dbypassl_control),
1241 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1242 &twl4030_dapm_dbypassr_control),
1243 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1244 &twl4030_dapm_dbypassv_control),
1245
1246 /* Digital mixers, power control for the physical DACs */
1247 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1248 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1249 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1250 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1251 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1252 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1253 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1254 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1255 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1256 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1257
1258 /* Analog mixers, power control for the physical PGAs */
1259 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1260 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1261 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1262 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1263 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1264 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1265 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1266 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1267 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1268 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1269
1270 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1271 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1272
1273 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1274 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1275
1276 /* Output MIXER controls */
1277 /* Earpiece */
1278 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1279 &twl4030_dapm_earpiece_controls[0],
1280 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1281 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1282 0, 0, NULL, 0, earpiecepga_event,
1283 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1284 /* PreDrivL/R */
1285 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1286 &twl4030_dapm_predrivel_controls[0],
1287 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1288 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1289 0, 0, NULL, 0, predrivelpga_event,
1290 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1291 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1292 &twl4030_dapm_predriver_controls[0],
1293 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1294 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1295 0, 0, NULL, 0, predriverpga_event,
1296 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1297 /* HeadsetL/R */
1298 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1299 &twl4030_dapm_hsol_controls[0],
1300 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1301 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1302 0, 0, NULL, 0, headsetlpga_event,
1303 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1304 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1305 &twl4030_dapm_hsor_controls[0],
1306 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1307 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1308 0, 0, NULL, 0, headsetrpga_event,
1309 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1310 /* CarkitL/R */
1311 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1312 &twl4030_dapm_carkitl_controls[0],
1313 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1314 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1315 0, 0, NULL, 0, carkitlpga_event,
1316 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1317 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1318 &twl4030_dapm_carkitr_controls[0],
1319 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1320 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1321 0, 0, NULL, 0, carkitrpga_event,
1322 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1323
1324 /* Output MUX controls */
1325 /* HandsfreeL/R */
1326 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1327 &twl4030_dapm_handsfreel_control),
1328 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1329 &twl4030_dapm_handsfreelmute_control),
1330 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1331 0, 0, NULL, 0, handsfreelpga_event,
1332 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1333 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1334 &twl4030_dapm_handsfreer_control),
1335 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1336 &twl4030_dapm_handsfreermute_control),
1337 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1338 0, 0, NULL, 0, handsfreerpga_event,
1339 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1340 /* Vibra */
1341 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1342 &twl4030_dapm_vibra_control, vibramux_event,
1343 SND_SOC_DAPM_PRE_PMU),
1344 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1345 &twl4030_dapm_vibrapath_control),
1346
1347 /* Introducing four virtual ADC, since TWL4030 have four channel for
1348 capture */
1349 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1350 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1351 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1352 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
1353
1354 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1355 TWL4030_REG_VOICE_IF, 5, 0),
1356
1357 /* Analog/Digital mic path selection.
1358 TX1 Left/Right: either analog Left/Right or Digimic0
1359 TX2 Left/Right: either analog Left/Right or Digimic1 */
1360 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1361 &twl4030_dapm_micpathtx1_control),
1362 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1363 &twl4030_dapm_micpathtx2_control),
1364
1365 /* Analog input mixers for the capture amplifiers */
1366 SND_SOC_DAPM_MIXER("Analog Left",
1367 TWL4030_REG_ANAMICL, 4, 0,
1368 &twl4030_dapm_analoglmic_controls[0],
1369 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1370 SND_SOC_DAPM_MIXER("Analog Right",
1371 TWL4030_REG_ANAMICR, 4, 0,
1372 &twl4030_dapm_analogrmic_controls[0],
1373 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1374
1375 SND_SOC_DAPM_PGA("ADC Physical Left",
1376 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1377 SND_SOC_DAPM_PGA("ADC Physical Right",
1378 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1379
1380 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1381 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1382 digimic_event, SND_SOC_DAPM_POST_PMU),
1383 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1384 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1385 digimic_event, SND_SOC_DAPM_POST_PMU),
1386
1387 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1388 NULL, 0),
1389 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1390 NULL, 0),
1391
1392 /* Microphone bias */
1393 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1394 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1395 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1396 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1397 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1398 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
1399
1400 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
1401 };
1402
1403 static const struct snd_soc_dapm_route intercon[] = {
1404 /* Stream -> DAC mapping */
1405 {"DAC Right1", NULL, "HiFi Playback"},
1406 {"DAC Left1", NULL, "HiFi Playback"},
1407 {"DAC Right2", NULL, "HiFi Playback"},
1408 {"DAC Left2", NULL, "HiFi Playback"},
1409 {"DAC Voice", NULL, "VAIFIN"},
1410
1411 /* ADC -> Stream mapping */
1412 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1413 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1414 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1415 {"HiFi Capture", NULL, "ADC Virtual Right2"},
1416 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1417 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1418 {"VAIFOUT", NULL, "VIF Enable"},
1419
1420 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1421 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1422 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1423 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1424 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1425
1426 /* Supply for the digital part (APLL) */
1427 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1428
1429 {"DAC Left1", NULL, "AIF Enable"},
1430 {"DAC Right1", NULL, "AIF Enable"},
1431 {"DAC Left2", NULL, "AIF Enable"},
1432 {"DAC Right1", NULL, "AIF Enable"},
1433 {"DAC Voice", NULL, "VIF Enable"},
1434
1435 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1436 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1437
1438 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1439 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1440 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1441 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1442 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1443
1444 /* Internal playback routings */
1445 /* Earpiece */
1446 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1447 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1448 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1449 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1450 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1451 /* PreDrivL */
1452 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1453 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1454 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1455 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1456 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1457 /* PreDrivR */
1458 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1459 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1460 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1461 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1462 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1463 /* HeadsetL */
1464 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1465 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1466 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1467 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1468 /* HeadsetR */
1469 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1470 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1471 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1472 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1473 /* CarkitL */
1474 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1475 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1476 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1477 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1478 /* CarkitR */
1479 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1480 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1481 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1482 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1483 /* HandsfreeL */
1484 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1485 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1486 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1487 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1488 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1489 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1490 /* HandsfreeR */
1491 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1492 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1493 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1494 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1495 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1496 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1497 /* Vibra */
1498 {"Vibra Mux", "AudioL1", "DAC Left1"},
1499 {"Vibra Mux", "AudioR1", "DAC Right1"},
1500 {"Vibra Mux", "AudioL2", "DAC Left2"},
1501 {"Vibra Mux", "AudioR2", "DAC Right2"},
1502
1503 /* outputs */
1504 /* Must be always connected (for AIF and APLL) */
1505 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1506 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1507 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1508 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1509 /* Must be always connected (for APLL) */
1510 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1511 /* Physical outputs */
1512 {"EARPIECE", NULL, "Earpiece PGA"},
1513 {"PREDRIVEL", NULL, "PredriveL PGA"},
1514 {"PREDRIVER", NULL, "PredriveR PGA"},
1515 {"HSOL", NULL, "HeadsetL PGA"},
1516 {"HSOR", NULL, "HeadsetR PGA"},
1517 {"CARKITL", NULL, "CarkitL PGA"},
1518 {"CARKITR", NULL, "CarkitR PGA"},
1519 {"HFL", NULL, "HandsfreeL PGA"},
1520 {"HFR", NULL, "HandsfreeR PGA"},
1521 {"Vibra Route", "Audio", "Vibra Mux"},
1522 {"VIBRA", NULL, "Vibra Route"},
1523
1524 /* Capture path */
1525 /* Must be always connected (for AIF and APLL) */
1526 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1527 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1528 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1529 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1530 /* Physical inputs */
1531 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1532 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1533 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1534 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1535
1536 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1537 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1538
1539 {"ADC Physical Left", NULL, "Analog Left"},
1540 {"ADC Physical Right", NULL, "Analog Right"},
1541
1542 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1543 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1544
1545 {"DIGIMIC0", NULL, "micbias1 select"},
1546 {"DIGIMIC1", NULL, "micbias2 select"},
1547
1548 /* TX1 Left capture path */
1549 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1550 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1551 /* TX1 Right capture path */
1552 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1553 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1554 /* TX2 Left capture path */
1555 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1556 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1557 /* TX2 Right capture path */
1558 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1559 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1560
1561 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1562 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1563 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1564 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1565
1566 {"ADC Virtual Left1", NULL, "AIF Enable"},
1567 {"ADC Virtual Right1", NULL, "AIF Enable"},
1568 {"ADC Virtual Left2", NULL, "AIF Enable"},
1569 {"ADC Virtual Right2", NULL, "AIF Enable"},
1570
1571 /* Analog bypass routes */
1572 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1573 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1574 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1575 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1576 {"Voice Analog Loopback", "Switch", "Analog Left"},
1577
1578 /* Supply for the Analog loopbacks */
1579 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1580 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1581 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1582 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1583 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1584
1585 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1586 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1587 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1588 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1589 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1590
1591 /* Digital bypass routes */
1592 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1593 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1594 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1595
1596 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1597 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1598 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1599
1600 };
1601
1602 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1603 enum snd_soc_bias_level level)
1604 {
1605 switch (level) {
1606 case SND_SOC_BIAS_ON:
1607 break;
1608 case SND_SOC_BIAS_PREPARE:
1609 break;
1610 case SND_SOC_BIAS_STANDBY:
1611 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1612 twl4030_codec_enable(codec, 1);
1613 break;
1614 case SND_SOC_BIAS_OFF:
1615 twl4030_codec_enable(codec, 0);
1616 break;
1617 }
1618 codec->dapm.bias_level = level;
1619
1620 return 0;
1621 }
1622
1623 static void twl4030_constraints(struct twl4030_priv *twl4030,
1624 struct snd_pcm_substream *mst_substream)
1625 {
1626 struct snd_pcm_substream *slv_substream;
1627
1628 /* Pick the stream, which need to be constrained */
1629 if (mst_substream == twl4030->master_substream)
1630 slv_substream = twl4030->slave_substream;
1631 else if (mst_substream == twl4030->slave_substream)
1632 slv_substream = twl4030->master_substream;
1633 else /* This should not happen.. */
1634 return;
1635
1636 /* Set the constraints according to the already configured stream */
1637 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1638 SNDRV_PCM_HW_PARAM_RATE,
1639 twl4030->rate,
1640 twl4030->rate);
1641
1642 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1643 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1644 twl4030->sample_bits,
1645 twl4030->sample_bits);
1646
1647 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1648 SNDRV_PCM_HW_PARAM_CHANNELS,
1649 twl4030->channels,
1650 twl4030->channels);
1651 }
1652
1653 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1654 * capture has to be enabled/disabled. */
1655 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1656 int enable)
1657 {
1658 u8 reg, mask;
1659
1660 reg = twl4030_read(codec, TWL4030_REG_OPTION);
1661
1662 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1663 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1664 else
1665 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1666
1667 if (enable)
1668 reg |= mask;
1669 else
1670 reg &= ~mask;
1671
1672 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1673 }
1674
1675 static int twl4030_startup(struct snd_pcm_substream *substream,
1676 struct snd_soc_dai *dai)
1677 {
1678 struct snd_soc_codec *codec = dai->codec;
1679 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1680
1681 if (twl4030->master_substream) {
1682 twl4030->slave_substream = substream;
1683 /* The DAI has one configuration for playback and capture, so
1684 * if the DAI has been already configured then constrain this
1685 * substream to match it. */
1686 if (twl4030->configured)
1687 twl4030_constraints(twl4030, twl4030->master_substream);
1688 } else {
1689 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
1690 TWL4030_OPTION_1)) {
1691 /* In option2 4 channel is not supported, set the
1692 * constraint for the first stream for channels, the
1693 * second stream will 'inherit' this cosntraint */
1694 snd_pcm_hw_constraint_minmax(substream->runtime,
1695 SNDRV_PCM_HW_PARAM_CHANNELS,
1696 2, 2);
1697 }
1698 twl4030->master_substream = substream;
1699 }
1700
1701 return 0;
1702 }
1703
1704 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1705 struct snd_soc_dai *dai)
1706 {
1707 struct snd_soc_codec *codec = dai->codec;
1708 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1709
1710 if (twl4030->master_substream == substream)
1711 twl4030->master_substream = twl4030->slave_substream;
1712
1713 twl4030->slave_substream = NULL;
1714
1715 /* If all streams are closed, or the remaining stream has not yet
1716 * been configured than set the DAI as not configured. */
1717 if (!twl4030->master_substream)
1718 twl4030->configured = 0;
1719 else if (!twl4030->master_substream->runtime->channels)
1720 twl4030->configured = 0;
1721
1722 /* If the closing substream had 4 channel, do the necessary cleanup */
1723 if (substream->runtime->channels == 4)
1724 twl4030_tdm_enable(codec, substream->stream, 0);
1725 }
1726
1727 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1728 struct snd_pcm_hw_params *params,
1729 struct snd_soc_dai *dai)
1730 {
1731 struct snd_soc_codec *codec = dai->codec;
1732 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1733 u8 mode, old_mode, format, old_format;
1734
1735 /* If the substream has 4 channel, do the necessary setup */
1736 if (params_channels(params) == 4) {
1737 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1738 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
1739
1740 /* Safety check: are we in the correct operating mode and
1741 * the interface is in TDM mode? */
1742 if ((mode & TWL4030_OPTION_1) &&
1743 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1744 twl4030_tdm_enable(codec, substream->stream, 1);
1745 else
1746 return -EINVAL;
1747 }
1748
1749 if (twl4030->configured)
1750 /* Ignoring hw_params for already configured DAI */
1751 return 0;
1752
1753 /* bit rate */
1754 old_mode = twl4030_read(codec,
1755 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1756 mode = old_mode & ~TWL4030_APLL_RATE;
1757
1758 switch (params_rate(params)) {
1759 case 8000:
1760 mode |= TWL4030_APLL_RATE_8000;
1761 break;
1762 case 11025:
1763 mode |= TWL4030_APLL_RATE_11025;
1764 break;
1765 case 12000:
1766 mode |= TWL4030_APLL_RATE_12000;
1767 break;
1768 case 16000:
1769 mode |= TWL4030_APLL_RATE_16000;
1770 break;
1771 case 22050:
1772 mode |= TWL4030_APLL_RATE_22050;
1773 break;
1774 case 24000:
1775 mode |= TWL4030_APLL_RATE_24000;
1776 break;
1777 case 32000:
1778 mode |= TWL4030_APLL_RATE_32000;
1779 break;
1780 case 44100:
1781 mode |= TWL4030_APLL_RATE_44100;
1782 break;
1783 case 48000:
1784 mode |= TWL4030_APLL_RATE_48000;
1785 break;
1786 case 96000:
1787 mode |= TWL4030_APLL_RATE_96000;
1788 break;
1789 default:
1790 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
1791 params_rate(params));
1792 return -EINVAL;
1793 }
1794
1795 /* sample size */
1796 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1797 format = old_format;
1798 format &= ~TWL4030_DATA_WIDTH;
1799 switch (params_format(params)) {
1800 case SNDRV_PCM_FORMAT_S16_LE:
1801 format |= TWL4030_DATA_WIDTH_16S_16W;
1802 break;
1803 case SNDRV_PCM_FORMAT_S32_LE:
1804 format |= TWL4030_DATA_WIDTH_32S_24W;
1805 break;
1806 default:
1807 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
1808 params_format(params));
1809 return -EINVAL;
1810 }
1811
1812 if (format != old_format || mode != old_mode) {
1813 if (twl4030->codec_powered) {
1814 /*
1815 * If the codec is powered, than we need to toggle the
1816 * codec power.
1817 */
1818 twl4030_codec_enable(codec, 0);
1819 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1820 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1821 twl4030_codec_enable(codec, 1);
1822 } else {
1823 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1824 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1825 }
1826 }
1827
1828 /* Store the important parameters for the DAI configuration and set
1829 * the DAI as configured */
1830 twl4030->configured = 1;
1831 twl4030->rate = params_rate(params);
1832 twl4030->sample_bits = hw_param_interval(params,
1833 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1834 twl4030->channels = params_channels(params);
1835
1836 /* If both playback and capture streams are open, and one of them
1837 * is setting the hw parameters right now (since we are here), set
1838 * constraints to the other stream to match the current one. */
1839 if (twl4030->slave_substream)
1840 twl4030_constraints(twl4030, substream);
1841
1842 return 0;
1843 }
1844
1845 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1846 unsigned int freq, int dir)
1847 {
1848 struct snd_soc_codec *codec = codec_dai->codec;
1849 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1850
1851 switch (freq) {
1852 case 19200000:
1853 case 26000000:
1854 case 38400000:
1855 break;
1856 default:
1857 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
1858 return -EINVAL;
1859 }
1860
1861 if ((freq / 1000) != twl4030->sysclk) {
1862 dev_err(codec->dev,
1863 "Mismatch in HFCLKIN: %u (configured: %u)\n",
1864 freq, twl4030->sysclk * 1000);
1865 return -EINVAL;
1866 }
1867
1868 return 0;
1869 }
1870
1871 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1872 {
1873 struct snd_soc_codec *codec = codec_dai->codec;
1874 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1875 u8 old_format, format;
1876
1877 /* get format */
1878 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1879 format = old_format;
1880
1881 /* set master/slave audio interface */
1882 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1883 case SND_SOC_DAIFMT_CBM_CFM:
1884 format &= ~(TWL4030_AIF_SLAVE_EN);
1885 format &= ~(TWL4030_CLK256FS_EN);
1886 break;
1887 case SND_SOC_DAIFMT_CBS_CFS:
1888 format |= TWL4030_AIF_SLAVE_EN;
1889 format |= TWL4030_CLK256FS_EN;
1890 break;
1891 default:
1892 return -EINVAL;
1893 }
1894
1895 /* interface format */
1896 format &= ~TWL4030_AIF_FORMAT;
1897 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1898 case SND_SOC_DAIFMT_I2S:
1899 format |= TWL4030_AIF_FORMAT_CODEC;
1900 break;
1901 case SND_SOC_DAIFMT_DSP_A:
1902 format |= TWL4030_AIF_FORMAT_TDM;
1903 break;
1904 default:
1905 return -EINVAL;
1906 }
1907
1908 if (format != old_format) {
1909 if (twl4030->codec_powered) {
1910 /*
1911 * If the codec is powered, than we need to toggle the
1912 * codec power.
1913 */
1914 twl4030_codec_enable(codec, 0);
1915 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1916 twl4030_codec_enable(codec, 1);
1917 } else {
1918 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1919 }
1920 }
1921
1922 return 0;
1923 }
1924
1925 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1926 {
1927 struct snd_soc_codec *codec = dai->codec;
1928 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1929
1930 if (tristate)
1931 reg |= TWL4030_AIF_TRI_EN;
1932 else
1933 reg &= ~TWL4030_AIF_TRI_EN;
1934
1935 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1936 }
1937
1938 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1939 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1940 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1941 int enable)
1942 {
1943 u8 reg, mask;
1944
1945 reg = twl4030_read(codec, TWL4030_REG_OPTION);
1946
1947 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1948 mask = TWL4030_ARXL1_VRX_EN;
1949 else
1950 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1951
1952 if (enable)
1953 reg |= mask;
1954 else
1955 reg &= ~mask;
1956
1957 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1958 }
1959
1960 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1961 struct snd_soc_dai *dai)
1962 {
1963 struct snd_soc_codec *codec = dai->codec;
1964 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1965 u8 mode;
1966
1967 /* If the system master clock is not 26MHz, the voice PCM interface is
1968 * not available.
1969 */
1970 if (twl4030->sysclk != 26000) {
1971 dev_err(codec->dev,
1972 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1973 __func__, twl4030->sysclk);
1974 return -EINVAL;
1975 }
1976
1977 /* If the codec mode is not option2, the voice PCM interface is not
1978 * available.
1979 */
1980 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
1981 & TWL4030_OPT_MODE;
1982
1983 if (mode != TWL4030_OPTION_2) {
1984 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1985 __func__);
1986 return -EINVAL;
1987 }
1988
1989 return 0;
1990 }
1991
1992 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1993 struct snd_soc_dai *dai)
1994 {
1995 struct snd_soc_codec *codec = dai->codec;
1996
1997 /* Enable voice digital filters */
1998 twl4030_voice_enable(codec, substream->stream, 0);
1999 }
2000
2001 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2002 struct snd_pcm_hw_params *params,
2003 struct snd_soc_dai *dai)
2004 {
2005 struct snd_soc_codec *codec = dai->codec;
2006 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2007 u8 old_mode, mode;
2008
2009 /* Enable voice digital filters */
2010 twl4030_voice_enable(codec, substream->stream, 1);
2011
2012 /* bit rate */
2013 old_mode = twl4030_read(codec,
2014 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
2015 mode = old_mode;
2016
2017 switch (params_rate(params)) {
2018 case 8000:
2019 mode &= ~(TWL4030_SEL_16K);
2020 break;
2021 case 16000:
2022 mode |= TWL4030_SEL_16K;
2023 break;
2024 default:
2025 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
2026 params_rate(params));
2027 return -EINVAL;
2028 }
2029
2030 if (mode != old_mode) {
2031 if (twl4030->codec_powered) {
2032 /*
2033 * If the codec is powered, than we need to toggle the
2034 * codec power.
2035 */
2036 twl4030_codec_enable(codec, 0);
2037 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2038 twl4030_codec_enable(codec, 1);
2039 } else {
2040 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2041 }
2042 }
2043
2044 return 0;
2045 }
2046
2047 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2048 int clk_id, unsigned int freq, int dir)
2049 {
2050 struct snd_soc_codec *codec = codec_dai->codec;
2051 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2052
2053 if (freq != 26000000) {
2054 dev_err(codec->dev,
2055 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2056 __func__, freq / 1000);
2057 return -EINVAL;
2058 }
2059 if ((freq / 1000) != twl4030->sysclk) {
2060 dev_err(codec->dev,
2061 "Mismatch in HFCLKIN: %u (configured: %u)\n",
2062 freq, twl4030->sysclk * 1000);
2063 return -EINVAL;
2064 }
2065 return 0;
2066 }
2067
2068 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2069 unsigned int fmt)
2070 {
2071 struct snd_soc_codec *codec = codec_dai->codec;
2072 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2073 u8 old_format, format;
2074
2075 /* get format */
2076 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
2077 format = old_format;
2078
2079 /* set master/slave audio interface */
2080 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2081 case SND_SOC_DAIFMT_CBM_CFM:
2082 format &= ~(TWL4030_VIF_SLAVE_EN);
2083 break;
2084 case SND_SOC_DAIFMT_CBS_CFS:
2085 format |= TWL4030_VIF_SLAVE_EN;
2086 break;
2087 default:
2088 return -EINVAL;
2089 }
2090
2091 /* clock inversion */
2092 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2093 case SND_SOC_DAIFMT_IB_NF:
2094 format &= ~(TWL4030_VIF_FORMAT);
2095 break;
2096 case SND_SOC_DAIFMT_NB_IF:
2097 format |= TWL4030_VIF_FORMAT;
2098 break;
2099 default:
2100 return -EINVAL;
2101 }
2102
2103 if (format != old_format) {
2104 if (twl4030->codec_powered) {
2105 /*
2106 * If the codec is powered, than we need to toggle the
2107 * codec power.
2108 */
2109 twl4030_codec_enable(codec, 0);
2110 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2111 twl4030_codec_enable(codec, 1);
2112 } else {
2113 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2114 }
2115 }
2116
2117 return 0;
2118 }
2119
2120 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2121 {
2122 struct snd_soc_codec *codec = dai->codec;
2123 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
2124
2125 if (tristate)
2126 reg |= TWL4030_VIF_TRI_EN;
2127 else
2128 reg &= ~TWL4030_VIF_TRI_EN;
2129
2130 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2131 }
2132
2133 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2134 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2135
2136 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2137 .startup = twl4030_startup,
2138 .shutdown = twl4030_shutdown,
2139 .hw_params = twl4030_hw_params,
2140 .set_sysclk = twl4030_set_dai_sysclk,
2141 .set_fmt = twl4030_set_dai_fmt,
2142 .set_tristate = twl4030_set_tristate,
2143 };
2144
2145 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2146 .startup = twl4030_voice_startup,
2147 .shutdown = twl4030_voice_shutdown,
2148 .hw_params = twl4030_voice_hw_params,
2149 .set_sysclk = twl4030_voice_set_dai_sysclk,
2150 .set_fmt = twl4030_voice_set_dai_fmt,
2151 .set_tristate = twl4030_voice_set_tristate,
2152 };
2153
2154 static struct snd_soc_dai_driver twl4030_dai[] = {
2155 {
2156 .name = "twl4030-hifi",
2157 .playback = {
2158 .stream_name = "HiFi Playback",
2159 .channels_min = 2,
2160 .channels_max = 4,
2161 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2162 .formats = TWL4030_FORMATS,
2163 .sig_bits = 24,},
2164 .capture = {
2165 .stream_name = "HiFi Capture",
2166 .channels_min = 2,
2167 .channels_max = 4,
2168 .rates = TWL4030_RATES,
2169 .formats = TWL4030_FORMATS,
2170 .sig_bits = 24,},
2171 .ops = &twl4030_dai_hifi_ops,
2172 },
2173 {
2174 .name = "twl4030-voice",
2175 .playback = {
2176 .stream_name = "Voice Playback",
2177 .channels_min = 1,
2178 .channels_max = 1,
2179 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2180 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2181 .capture = {
2182 .stream_name = "Voice Capture",
2183 .channels_min = 1,
2184 .channels_max = 2,
2185 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2186 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2187 .ops = &twl4030_dai_voice_ops,
2188 },
2189 };
2190
2191 static int twl4030_soc_probe(struct snd_soc_codec *codec)
2192 {
2193 struct twl4030_priv *twl4030;
2194
2195 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2196 GFP_KERNEL);
2197 if (twl4030 == NULL) {
2198 dev_err(codec->dev, "Can not allocate memory\n");
2199 return -ENOMEM;
2200 }
2201 snd_soc_codec_set_drvdata(codec, twl4030);
2202 /* Set the defaults, and power up the codec */
2203 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2204
2205 twl4030_init_chip(codec);
2206
2207 return 0;
2208 }
2209
2210 static int twl4030_soc_remove(struct snd_soc_codec *codec)
2211 {
2212 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2213 struct twl4030_codec_data *pdata = twl4030->pdata;
2214
2215 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2216
2217 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2218 gpio_free(pdata->hs_extmute_gpio);
2219
2220 return 0;
2221 }
2222
2223 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2224 .probe = twl4030_soc_probe,
2225 .remove = twl4030_soc_remove,
2226 .read = twl4030_read,
2227 .write = twl4030_write,
2228 .set_bias_level = twl4030_set_bias_level,
2229 .idle_bias_off = true,
2230
2231 .controls = twl4030_snd_controls,
2232 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2233 .dapm_widgets = twl4030_dapm_widgets,
2234 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2235 .dapm_routes = intercon,
2236 .num_dapm_routes = ARRAY_SIZE(intercon),
2237 };
2238
2239 static int twl4030_codec_probe(struct platform_device *pdev)
2240 {
2241 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2242 twl4030_dai, ARRAY_SIZE(twl4030_dai));
2243 }
2244
2245 static int twl4030_codec_remove(struct platform_device *pdev)
2246 {
2247 snd_soc_unregister_codec(&pdev->dev);
2248 return 0;
2249 }
2250
2251 MODULE_ALIAS("platform:twl4030-codec");
2252
2253 static struct platform_driver twl4030_codec_driver = {
2254 .probe = twl4030_codec_probe,
2255 .remove = twl4030_codec_remove,
2256 .driver = {
2257 .name = "twl4030-codec",
2258 .owner = THIS_MODULE,
2259 },
2260 };
2261
2262 module_platform_driver(twl4030_codec_driver);
2263
2264 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2265 MODULE_AUTHOR("Steve Sakoman");
2266 MODULE_LICENSE("GPL");
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