2 * wm8350.c -- WM8350 ALSA SoC audio driver
4 * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/wm8350/audio.h>
20 #include <linux/mfd/wm8350/core.h>
21 #include <linux/regulator/consumer.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
32 #define WM8350_OUTn_0dB 0x39
34 #define WM8350_RAMP_NONE 0
35 #define WM8350_RAMP_UP 1
36 #define WM8350_RAMP_DOWN 2
38 /* We only include the analogue supplies here; the digital supplies
39 * need to be available well before this driver can be probed.
41 static const char *supply_names
[] = {
46 struct wm8350_output
{
54 struct wm8350_jack_data
{
55 struct snd_soc_jack
*jack
;
60 struct snd_soc_codec codec
;
61 struct wm8350_output out1
;
62 struct wm8350_output out2
;
63 struct wm8350_jack_data hpl
;
64 struct wm8350_jack_data hpr
;
65 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
68 static unsigned int wm8350_codec_cache_read(struct snd_soc_codec
*codec
,
71 struct wm8350
*wm8350
= codec
->control_data
;
72 return wm8350
->reg_cache
[reg
];
75 static unsigned int wm8350_codec_read(struct snd_soc_codec
*codec
,
78 struct wm8350
*wm8350
= codec
->control_data
;
79 return wm8350_reg_read(wm8350
, reg
);
82 static int wm8350_codec_write(struct snd_soc_codec
*codec
, unsigned int reg
,
85 struct wm8350
*wm8350
= codec
->control_data
;
86 return wm8350_reg_write(wm8350
, reg
, value
);
90 * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
92 static inline int wm8350_out1_ramp_step(struct snd_soc_codec
*codec
)
94 struct wm8350_data
*wm8350_data
= codec
->private_data
;
95 struct wm8350_output
*out1
= &wm8350_data
->out1
;
96 struct wm8350
*wm8350
= codec
->control_data
;
97 int left_complete
= 0, right_complete
= 0;
101 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
);
102 val
= (reg
& WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
104 if (out1
->ramp
== WM8350_RAMP_UP
) {
106 if (val
< out1
->left_vol
) {
108 reg
&= ~WM8350_OUT1L_VOL_MASK
;
109 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
110 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
113 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
117 reg
&= ~WM8350_OUT1L_VOL_MASK
;
118 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
119 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
126 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
);
127 val
= (reg
& WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
128 if (out1
->ramp
== WM8350_RAMP_UP
) {
130 if (val
< out1
->right_vol
) {
132 reg
&= ~WM8350_OUT1R_VOL_MASK
;
133 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
134 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
137 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
141 reg
&= ~WM8350_OUT1R_VOL_MASK
;
142 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
143 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
148 /* only hit the update bit if either volume has changed this step */
149 if (!left_complete
|| !right_complete
)
150 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
, WM8350_OUT1_VU
);
152 return left_complete
& right_complete
;
156 * Ramp OUT2 PGA volume to minimise pops at stream startup and shutdown.
158 static inline int wm8350_out2_ramp_step(struct snd_soc_codec
*codec
)
160 struct wm8350_data
*wm8350_data
= codec
->private_data
;
161 struct wm8350_output
*out2
= &wm8350_data
->out2
;
162 struct wm8350
*wm8350
= codec
->control_data
;
163 int left_complete
= 0, right_complete
= 0;
167 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
);
168 val
= (reg
& WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
169 if (out2
->ramp
== WM8350_RAMP_UP
) {
171 if (val
< out2
->left_vol
) {
173 reg
&= ~WM8350_OUT2L_VOL_MASK
;
174 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
175 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
178 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
182 reg
&= ~WM8350_OUT2L_VOL_MASK
;
183 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
184 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
191 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
);
192 val
= (reg
& WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
193 if (out2
->ramp
== WM8350_RAMP_UP
) {
195 if (val
< out2
->right_vol
) {
197 reg
&= ~WM8350_OUT2R_VOL_MASK
;
198 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
199 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
202 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
206 reg
&= ~WM8350_OUT2R_VOL_MASK
;
207 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
208 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
213 /* only hit the update bit if either volume has changed this step */
214 if (!left_complete
|| !right_complete
)
215 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
, WM8350_OUT2_VU
);
217 return left_complete
& right_complete
;
221 * This work ramps both output PGAs at stream start/stop time to
222 * minimise pop associated with DAPM power switching.
223 * It's best to enable Zero Cross when ramping occurs to minimise any
226 static void wm8350_pga_work(struct work_struct
*work
)
228 struct snd_soc_codec
*codec
=
229 container_of(work
, struct snd_soc_codec
, delayed_work
.work
);
230 struct wm8350_data
*wm8350_data
= codec
->private_data
;
231 struct wm8350_output
*out1
= &wm8350_data
->out1
,
232 *out2
= &wm8350_data
->out2
;
233 int i
, out1_complete
, out2_complete
;
235 /* do we need to ramp at all ? */
236 if (out1
->ramp
== WM8350_RAMP_NONE
&& out2
->ramp
== WM8350_RAMP_NONE
)
239 /* PGA volumes have 6 bits of resolution to ramp */
240 for (i
= 0; i
<= 63; i
++) {
241 out1_complete
= 1, out2_complete
= 1;
242 if (out1
->ramp
!= WM8350_RAMP_NONE
)
243 out1_complete
= wm8350_out1_ramp_step(codec
);
244 if (out2
->ramp
!= WM8350_RAMP_NONE
)
245 out2_complete
= wm8350_out2_ramp_step(codec
);
247 /* ramp finished ? */
248 if (out1_complete
&& out2_complete
)
251 /* we need to delay longer on the up ramp */
252 if (out1
->ramp
== WM8350_RAMP_UP
||
253 out2
->ramp
== WM8350_RAMP_UP
) {
254 /* delay is longer over 0dB as increases are larger */
255 if (i
>= WM8350_OUTn_0dB
)
256 schedule_timeout_interruptible(msecs_to_jiffies
259 schedule_timeout_interruptible(msecs_to_jiffies
262 udelay(50); /* doesn't matter if we delay longer */
265 out1
->ramp
= WM8350_RAMP_NONE
;
266 out2
->ramp
= WM8350_RAMP_NONE
;
273 static int pga_event(struct snd_soc_dapm_widget
*w
,
274 struct snd_kcontrol
*kcontrol
, int event
)
276 struct snd_soc_codec
*codec
= w
->codec
;
277 struct wm8350_data
*wm8350_data
= codec
->private_data
;
278 struct wm8350_output
*out
;
283 out
= &wm8350_data
->out1
;
287 out
= &wm8350_data
->out2
;
296 case SND_SOC_DAPM_POST_PMU
:
297 out
->ramp
= WM8350_RAMP_UP
;
300 if (!delayed_work_pending(&codec
->delayed_work
))
301 schedule_delayed_work(&codec
->delayed_work
,
302 msecs_to_jiffies(1));
305 case SND_SOC_DAPM_PRE_PMD
:
306 out
->ramp
= WM8350_RAMP_DOWN
;
309 if (!delayed_work_pending(&codec
->delayed_work
))
310 schedule_delayed_work(&codec
->delayed_work
,
311 msecs_to_jiffies(1));
318 static int wm8350_put_volsw_2r_vu(struct snd_kcontrol
*kcontrol
,
319 struct snd_ctl_elem_value
*ucontrol
)
321 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
322 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
323 struct wm8350_output
*out
= NULL
;
324 struct soc_mixer_control
*mc
=
325 (struct soc_mixer_control
*)kcontrol
->private_value
;
327 unsigned int reg
= mc
->reg
;
330 /* For OUT1 and OUT2 we shadow the values and only actually write
331 * them out when active in order to ensure the amplifier comes on
332 * as quietly as possible. */
334 case WM8350_LOUT1_VOLUME
:
335 out
= &wm8350_priv
->out1
;
337 case WM8350_LOUT2_VOLUME
:
338 out
= &wm8350_priv
->out2
;
345 out
->left_vol
= ucontrol
->value
.integer
.value
[0];
346 out
->right_vol
= ucontrol
->value
.integer
.value
[1];
351 ret
= snd_soc_put_volsw_2r(kcontrol
, ucontrol
);
355 /* now hit the volume update bits (always bit 8) */
356 val
= wm8350_codec_read(codec
, reg
);
357 wm8350_codec_write(codec
, reg
, val
| WM8350_OUT1_VU
);
361 static int wm8350_get_volsw_2r(struct snd_kcontrol
*kcontrol
,
362 struct snd_ctl_elem_value
*ucontrol
)
364 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
365 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
366 struct wm8350_output
*out1
= &wm8350_priv
->out1
;
367 struct wm8350_output
*out2
= &wm8350_priv
->out2
;
368 struct soc_mixer_control
*mc
=
369 (struct soc_mixer_control
*)kcontrol
->private_value
;
370 unsigned int reg
= mc
->reg
;
372 /* If these are cached registers use the cache */
374 case WM8350_LOUT1_VOLUME
:
375 ucontrol
->value
.integer
.value
[0] = out1
->left_vol
;
376 ucontrol
->value
.integer
.value
[1] = out1
->right_vol
;
379 case WM8350_LOUT2_VOLUME
:
380 ucontrol
->value
.integer
.value
[0] = out2
->left_vol
;
381 ucontrol
->value
.integer
.value
[1] = out2
->right_vol
;
388 return snd_soc_get_volsw_2r(kcontrol
, ucontrol
);
391 /* double control with volume update */
392 #define SOC_WM8350_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, \
393 xinvert, tlv_array) \
394 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
395 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
396 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
397 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
398 .tlv.p = (tlv_array), \
399 .info = snd_soc_info_volsw_2r, \
400 .get = wm8350_get_volsw_2r, .put = wm8350_put_volsw_2r_vu, \
401 .private_value = (unsigned long)&(struct soc_mixer_control) \
402 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
403 .rshift = xshift, .max = xmax, .invert = xinvert}, }
405 static const char *wm8350_deemp
[] = { "None", "32kHz", "44.1kHz", "48kHz" };
406 static const char *wm8350_pol
[] = { "Normal", "Inv R", "Inv L", "Inv L & R" };
407 static const char *wm8350_dacmutem
[] = { "Normal", "Soft" };
408 static const char *wm8350_dacmutes
[] = { "Fast", "Slow" };
409 static const char *wm8350_adcfilter
[] = { "None", "High Pass" };
410 static const char *wm8350_adchp
[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
411 static const char *wm8350_lr
[] = { "Left", "Right" };
413 static const struct soc_enum wm8350_enum
[] = {
414 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 4, 4, wm8350_deemp
),
415 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 0, 4, wm8350_pol
),
416 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 14, 2, wm8350_dacmutem
),
417 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 13, 2, wm8350_dacmutes
),
418 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 15, 2, wm8350_adcfilter
),
419 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 8, 4, wm8350_adchp
),
420 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 0, 4, wm8350_pol
),
421 SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME
, 15, 2, wm8350_lr
),
424 static DECLARE_TLV_DB_LINEAR(pre_amp_tlv
, -1200, 3525);
425 static DECLARE_TLV_DB_LINEAR(out_pga_tlv
, -5700, 600);
426 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv
, -7163, 36, 1);
427 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv
, -12700, 50, 1);
428 static DECLARE_TLV_DB_SCALE(out_mix_tlv
, -1500, 300, 1);
430 static const unsigned int capture_sd_tlv
[] = {
431 TLV_DB_RANGE_HEAD(2),
432 0, 12, TLV_DB_SCALE_ITEM(-3600, 300, 1),
433 13, 15, TLV_DB_SCALE_ITEM(0, 0, 0),
436 static const struct snd_kcontrol_new wm8350_snd_controls
[] = {
437 SOC_ENUM("Playback Deemphasis", wm8350_enum
[0]),
438 SOC_ENUM("Playback DAC Inversion", wm8350_enum
[1]),
439 SOC_WM8350_DOUBLE_R_TLV("Playback PCM Volume",
440 WM8350_DAC_DIGITAL_VOLUME_L
,
441 WM8350_DAC_DIGITAL_VOLUME_R
,
442 0, 255, 0, dac_pcm_tlv
),
443 SOC_ENUM("Playback PCM Mute Function", wm8350_enum
[2]),
444 SOC_ENUM("Playback PCM Mute Speed", wm8350_enum
[3]),
445 SOC_ENUM("Capture PCM Filter", wm8350_enum
[4]),
446 SOC_ENUM("Capture PCM HP Filter", wm8350_enum
[5]),
447 SOC_ENUM("Capture ADC Inversion", wm8350_enum
[6]),
448 SOC_WM8350_DOUBLE_R_TLV("Capture PCM Volume",
449 WM8350_ADC_DIGITAL_VOLUME_L
,
450 WM8350_ADC_DIGITAL_VOLUME_R
,
451 0, 255, 0, adc_pcm_tlv
),
452 SOC_DOUBLE_TLV("Capture Sidetone Volume",
454 8, 4, 15, 1, capture_sd_tlv
),
455 SOC_WM8350_DOUBLE_R_TLV("Capture Volume",
456 WM8350_LEFT_INPUT_VOLUME
,
457 WM8350_RIGHT_INPUT_VOLUME
,
458 2, 63, 0, pre_amp_tlv
),
459 SOC_DOUBLE_R("Capture ZC Switch",
460 WM8350_LEFT_INPUT_VOLUME
,
461 WM8350_RIGHT_INPUT_VOLUME
, 13, 1, 0),
462 SOC_SINGLE_TLV("Left Input Left Sidetone Volume",
463 WM8350_OUTPUT_LEFT_MIXER_VOLUME
, 1, 7, 0, out_mix_tlv
),
464 SOC_SINGLE_TLV("Left Input Right Sidetone Volume",
465 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
466 5, 7, 0, out_mix_tlv
),
467 SOC_SINGLE_TLV("Left Input Bypass Volume",
468 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
469 9, 7, 0, out_mix_tlv
),
470 SOC_SINGLE_TLV("Right Input Left Sidetone Volume",
471 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
472 1, 7, 0, out_mix_tlv
),
473 SOC_SINGLE_TLV("Right Input Right Sidetone Volume",
474 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
475 5, 7, 0, out_mix_tlv
),
476 SOC_SINGLE_TLV("Right Input Bypass Volume",
477 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
478 13, 7, 0, out_mix_tlv
),
479 SOC_SINGLE("Left Input Mixer +20dB Switch",
480 WM8350_INPUT_MIXER_VOLUME_L
, 0, 1, 0),
481 SOC_SINGLE("Right Input Mixer +20dB Switch",
482 WM8350_INPUT_MIXER_VOLUME_R
, 0, 1, 0),
483 SOC_SINGLE_TLV("Out4 Capture Volume",
484 WM8350_INPUT_MIXER_VOLUME
,
485 1, 7, 0, out_mix_tlv
),
486 SOC_WM8350_DOUBLE_R_TLV("Out1 Playback Volume",
489 2, 63, 0, out_pga_tlv
),
490 SOC_DOUBLE_R("Out1 Playback ZC Switch",
492 WM8350_ROUT1_VOLUME
, 13, 1, 0),
493 SOC_WM8350_DOUBLE_R_TLV("Out2 Playback Volume",
496 2, 63, 0, out_pga_tlv
),
497 SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8350_LOUT2_VOLUME
,
498 WM8350_ROUT2_VOLUME
, 13, 1, 0),
499 SOC_SINGLE("Out2 Right Invert Switch", WM8350_ROUT2_VOLUME
, 10, 1, 0),
500 SOC_SINGLE_TLV("Out2 Beep Volume", WM8350_BEEP_VOLUME
,
501 5, 7, 0, out_mix_tlv
),
503 SOC_DOUBLE_R("Out1 Playback Switch",
507 SOC_DOUBLE_R("Out2 Playback Switch",
517 /* Left Playback Mixer */
518 static const struct snd_kcontrol_new wm8350_left_play_mixer_controls
[] = {
519 SOC_DAPM_SINGLE("Playback Switch",
520 WM8350_LEFT_MIXER_CONTROL
, 11, 1, 0),
521 SOC_DAPM_SINGLE("Left Bypass Switch",
522 WM8350_LEFT_MIXER_CONTROL
, 2, 1, 0),
523 SOC_DAPM_SINGLE("Right Playback Switch",
524 WM8350_LEFT_MIXER_CONTROL
, 12, 1, 0),
525 SOC_DAPM_SINGLE("Left Sidetone Switch",
526 WM8350_LEFT_MIXER_CONTROL
, 0, 1, 0),
527 SOC_DAPM_SINGLE("Right Sidetone Switch",
528 WM8350_LEFT_MIXER_CONTROL
, 1, 1, 0),
531 /* Right Playback Mixer */
532 static const struct snd_kcontrol_new wm8350_right_play_mixer_controls
[] = {
533 SOC_DAPM_SINGLE("Playback Switch",
534 WM8350_RIGHT_MIXER_CONTROL
, 12, 1, 0),
535 SOC_DAPM_SINGLE("Right Bypass Switch",
536 WM8350_RIGHT_MIXER_CONTROL
, 3, 1, 0),
537 SOC_DAPM_SINGLE("Left Playback Switch",
538 WM8350_RIGHT_MIXER_CONTROL
, 11, 1, 0),
539 SOC_DAPM_SINGLE("Left Sidetone Switch",
540 WM8350_RIGHT_MIXER_CONTROL
, 0, 1, 0),
541 SOC_DAPM_SINGLE("Right Sidetone Switch",
542 WM8350_RIGHT_MIXER_CONTROL
, 1, 1, 0),
546 static const struct snd_kcontrol_new wm8350_out4_mixer_controls
[] = {
547 SOC_DAPM_SINGLE("Right Playback Switch",
548 WM8350_OUT4_MIXER_CONTROL
, 12, 1, 0),
549 SOC_DAPM_SINGLE("Left Playback Switch",
550 WM8350_OUT4_MIXER_CONTROL
, 11, 1, 0),
551 SOC_DAPM_SINGLE("Right Capture Switch",
552 WM8350_OUT4_MIXER_CONTROL
, 9, 1, 0),
553 SOC_DAPM_SINGLE("Out3 Playback Switch",
554 WM8350_OUT4_MIXER_CONTROL
, 2, 1, 0),
555 SOC_DAPM_SINGLE("Right Mixer Switch",
556 WM8350_OUT4_MIXER_CONTROL
, 1, 1, 0),
557 SOC_DAPM_SINGLE("Left Mixer Switch",
558 WM8350_OUT4_MIXER_CONTROL
, 0, 1, 0),
562 static const struct snd_kcontrol_new wm8350_out3_mixer_controls
[] = {
563 SOC_DAPM_SINGLE("Left Playback Switch",
564 WM8350_OUT3_MIXER_CONTROL
, 11, 1, 0),
565 SOC_DAPM_SINGLE("Left Capture Switch",
566 WM8350_OUT3_MIXER_CONTROL
, 8, 1, 0),
567 SOC_DAPM_SINGLE("Out4 Playback Switch",
568 WM8350_OUT3_MIXER_CONTROL
, 3, 1, 0),
569 SOC_DAPM_SINGLE("Left Mixer Switch",
570 WM8350_OUT3_MIXER_CONTROL
, 0, 1, 0),
573 /* Left Input Mixer */
574 static const struct snd_kcontrol_new wm8350_left_capt_mixer_controls
[] = {
575 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
576 WM8350_INPUT_MIXER_VOLUME_L
, 1, 7, 0, out_mix_tlv
),
577 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
578 WM8350_INPUT_MIXER_VOLUME_L
, 9, 7, 0, out_mix_tlv
),
579 SOC_DAPM_SINGLE("PGA Capture Switch",
580 WM8350_LEFT_INPUT_VOLUME
, 14, 1, 0),
583 /* Right Input Mixer */
584 static const struct snd_kcontrol_new wm8350_right_capt_mixer_controls
[] = {
585 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
586 WM8350_INPUT_MIXER_VOLUME_R
, 5, 7, 0, out_mix_tlv
),
587 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
588 WM8350_INPUT_MIXER_VOLUME_R
, 13, 7, 0, out_mix_tlv
),
589 SOC_DAPM_SINGLE("PGA Capture Switch",
590 WM8350_RIGHT_INPUT_VOLUME
, 14, 1, 0),
594 static const struct snd_kcontrol_new wm8350_left_mic_mixer_controls
[] = {
595 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 1, 1, 0),
596 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 0, 1, 0),
597 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 2, 1, 0),
600 /* Right Mic Mixer */
601 static const struct snd_kcontrol_new wm8350_right_mic_mixer_controls
[] = {
602 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 9, 1, 0),
603 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 8, 1, 0),
604 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 10, 1, 0),
608 static const struct snd_kcontrol_new wm8350_beep_switch_controls
=
609 SOC_DAPM_SINGLE("Switch", WM8350_BEEP_VOLUME
, 15, 1, 1);
611 /* Out4 Capture Mux */
612 static const struct snd_kcontrol_new wm8350_out4_capture_controls
=
613 SOC_DAPM_ENUM("Route", wm8350_enum
[8]);
615 static const struct snd_soc_dapm_widget wm8350_dapm_widgets
[] = {
617 SND_SOC_DAPM_PGA("IN3R PGA", WM8350_POWER_MGMT_2
, 11, 0, NULL
, 0),
618 SND_SOC_DAPM_PGA("IN3L PGA", WM8350_POWER_MGMT_2
, 10, 0, NULL
, 0),
619 SND_SOC_DAPM_PGA_E("Right Out2 PGA", WM8350_POWER_MGMT_3
, 3, 0, NULL
,
621 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
622 SND_SOC_DAPM_PGA_E("Left Out2 PGA", WM8350_POWER_MGMT_3
, 2, 0, NULL
, 0,
624 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
625 SND_SOC_DAPM_PGA_E("Right Out1 PGA", WM8350_POWER_MGMT_3
, 1, 0, NULL
,
627 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
628 SND_SOC_DAPM_PGA_E("Left Out1 PGA", WM8350_POWER_MGMT_3
, 0, 0, NULL
, 0,
630 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
632 SND_SOC_DAPM_MIXER("Right Capture Mixer", WM8350_POWER_MGMT_2
,
633 7, 0, &wm8350_right_capt_mixer_controls
[0],
634 ARRAY_SIZE(wm8350_right_capt_mixer_controls
)),
636 SND_SOC_DAPM_MIXER("Left Capture Mixer", WM8350_POWER_MGMT_2
,
637 6, 0, &wm8350_left_capt_mixer_controls
[0],
638 ARRAY_SIZE(wm8350_left_capt_mixer_controls
)),
640 SND_SOC_DAPM_MIXER("Out4 Mixer", WM8350_POWER_MGMT_2
, 5, 0,
641 &wm8350_out4_mixer_controls
[0],
642 ARRAY_SIZE(wm8350_out4_mixer_controls
)),
644 SND_SOC_DAPM_MIXER("Out3 Mixer", WM8350_POWER_MGMT_2
, 4, 0,
645 &wm8350_out3_mixer_controls
[0],
646 ARRAY_SIZE(wm8350_out3_mixer_controls
)),
648 SND_SOC_DAPM_MIXER("Right Playback Mixer", WM8350_POWER_MGMT_2
, 1, 0,
649 &wm8350_right_play_mixer_controls
[0],
650 ARRAY_SIZE(wm8350_right_play_mixer_controls
)),
652 SND_SOC_DAPM_MIXER("Left Playback Mixer", WM8350_POWER_MGMT_2
, 0, 0,
653 &wm8350_left_play_mixer_controls
[0],
654 ARRAY_SIZE(wm8350_left_play_mixer_controls
)),
656 SND_SOC_DAPM_MIXER("Left Mic Mixer", WM8350_POWER_MGMT_2
, 8, 0,
657 &wm8350_left_mic_mixer_controls
[0],
658 ARRAY_SIZE(wm8350_left_mic_mixer_controls
)),
660 SND_SOC_DAPM_MIXER("Right Mic Mixer", WM8350_POWER_MGMT_2
, 9, 0,
661 &wm8350_right_mic_mixer_controls
[0],
662 ARRAY_SIZE(wm8350_right_mic_mixer_controls
)),
664 /* virtual mixer for Beep and Out2R */
665 SND_SOC_DAPM_MIXER("Out2 Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
667 SND_SOC_DAPM_SWITCH("Beep", WM8350_POWER_MGMT_3
, 7, 0,
668 &wm8350_beep_switch_controls
),
670 SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
671 WM8350_POWER_MGMT_4
, 3, 0),
672 SND_SOC_DAPM_ADC("Left ADC", "Left Capture",
673 WM8350_POWER_MGMT_4
, 2, 0),
674 SND_SOC_DAPM_DAC("Right DAC", "Right Playback",
675 WM8350_POWER_MGMT_4
, 5, 0),
676 SND_SOC_DAPM_DAC("Left DAC", "Left Playback",
677 WM8350_POWER_MGMT_4
, 4, 0),
679 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8350_POWER_MGMT_1
, 4, 0),
681 SND_SOC_DAPM_MUX("Out4 Capture Channel", SND_SOC_NOPM
, 0, 0,
682 &wm8350_out4_capture_controls
),
684 SND_SOC_DAPM_OUTPUT("OUT1R"),
685 SND_SOC_DAPM_OUTPUT("OUT1L"),
686 SND_SOC_DAPM_OUTPUT("OUT2R"),
687 SND_SOC_DAPM_OUTPUT("OUT2L"),
688 SND_SOC_DAPM_OUTPUT("OUT3"),
689 SND_SOC_DAPM_OUTPUT("OUT4"),
691 SND_SOC_DAPM_INPUT("IN1RN"),
692 SND_SOC_DAPM_INPUT("IN1RP"),
693 SND_SOC_DAPM_INPUT("IN2R"),
694 SND_SOC_DAPM_INPUT("IN1LP"),
695 SND_SOC_DAPM_INPUT("IN1LN"),
696 SND_SOC_DAPM_INPUT("IN2L"),
697 SND_SOC_DAPM_INPUT("IN3R"),
698 SND_SOC_DAPM_INPUT("IN3L"),
701 static const struct snd_soc_dapm_route audio_map
[] = {
703 /* left playback mixer */
704 {"Left Playback Mixer", "Playback Switch", "Left DAC"},
705 {"Left Playback Mixer", "Left Bypass Switch", "IN3L PGA"},
706 {"Left Playback Mixer", "Right Playback Switch", "Right DAC"},
707 {"Left Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
708 {"Left Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
710 /* right playback mixer */
711 {"Right Playback Mixer", "Playback Switch", "Right DAC"},
712 {"Right Playback Mixer", "Right Bypass Switch", "IN3R PGA"},
713 {"Right Playback Mixer", "Left Playback Switch", "Left DAC"},
714 {"Right Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
715 {"Right Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
717 /* out4 playback mixer */
718 {"Out4 Mixer", "Right Playback Switch", "Right DAC"},
719 {"Out4 Mixer", "Left Playback Switch", "Left DAC"},
720 {"Out4 Mixer", "Right Capture Switch", "Right Capture Mixer"},
721 {"Out4 Mixer", "Out3 Playback Switch", "Out3 Mixer"},
722 {"Out4 Mixer", "Right Mixer Switch", "Right Playback Mixer"},
723 {"Out4 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
724 {"OUT4", NULL
, "Out4 Mixer"},
726 /* out3 playback mixer */
727 {"Out3 Mixer", "Left Playback Switch", "Left DAC"},
728 {"Out3 Mixer", "Left Capture Switch", "Left Capture Mixer"},
729 {"Out3 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
730 {"Out3 Mixer", "Out4 Playback Switch", "Out4 Mixer"},
731 {"OUT3", NULL
, "Out3 Mixer"},
734 {"Right Out2 PGA", NULL
, "Right Playback Mixer"},
735 {"Left Out2 PGA", NULL
, "Left Playback Mixer"},
736 {"OUT2L", NULL
, "Left Out2 PGA"},
737 {"OUT2R", NULL
, "Right Out2 PGA"},
740 {"Right Out1 PGA", NULL
, "Right Playback Mixer"},
741 {"Left Out1 PGA", NULL
, "Left Playback Mixer"},
742 {"OUT1L", NULL
, "Left Out1 PGA"},
743 {"OUT1R", NULL
, "Right Out1 PGA"},
746 {"Left ADC", NULL
, "Left Capture Mixer"},
747 {"Right ADC", NULL
, "Right Capture Mixer"},
749 /* Left capture mixer */
750 {"Left Capture Mixer", "L2 Capture Volume", "IN2L"},
751 {"Left Capture Mixer", "L3 Capture Volume", "IN3L PGA"},
752 {"Left Capture Mixer", "PGA Capture Switch", "Left Mic Mixer"},
753 {"Left Capture Mixer", NULL
, "Out4 Capture Channel"},
755 /* Right capture mixer */
756 {"Right Capture Mixer", "L2 Capture Volume", "IN2R"},
757 {"Right Capture Mixer", "L3 Capture Volume", "IN3R PGA"},
758 {"Right Capture Mixer", "PGA Capture Switch", "Right Mic Mixer"},
759 {"Right Capture Mixer", NULL
, "Out4 Capture Channel"},
762 {"IN3L PGA", NULL
, "IN3L"},
763 {"IN3R PGA", NULL
, "IN3R"},
766 {"Left Mic Mixer", "INN Capture Switch", "IN1LN"},
767 {"Left Mic Mixer", "INP Capture Switch", "IN1LP"},
768 {"Left Mic Mixer", "IN2 Capture Switch", "IN2L"},
770 /* Right Mic mixer */
771 {"Right Mic Mixer", "INN Capture Switch", "IN1RN"},
772 {"Right Mic Mixer", "INP Capture Switch", "IN1RP"},
773 {"Right Mic Mixer", "IN2 Capture Switch", "IN2R"},
776 {"Out4 Capture Channel", NULL
, "Out4 Mixer"},
779 {"Beep", NULL
, "IN3R PGA"},
782 static int wm8350_add_widgets(struct snd_soc_codec
*codec
)
786 ret
= snd_soc_dapm_new_controls(codec
,
788 ARRAY_SIZE(wm8350_dapm_widgets
));
790 dev_err(codec
->dev
, "dapm control register failed\n");
794 /* set up audio paths */
795 ret
= snd_soc_dapm_add_routes(codec
, audio_map
, ARRAY_SIZE(audio_map
));
797 dev_err(codec
->dev
, "DAPM route register failed\n");
801 return snd_soc_dapm_new_widgets(codec
);
804 static int wm8350_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
805 int clk_id
, unsigned int freq
, int dir
)
807 struct snd_soc_codec
*codec
= codec_dai
->codec
;
808 struct wm8350
*wm8350
= codec
->control_data
;
812 case WM8350_MCLK_SEL_MCLK
:
813 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
816 case WM8350_MCLK_SEL_PLL_MCLK
:
817 case WM8350_MCLK_SEL_PLL_DAC
:
818 case WM8350_MCLK_SEL_PLL_ADC
:
819 case WM8350_MCLK_SEL_PLL_32K
:
820 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
822 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
823 ~WM8350_FLL_CLK_SRC_MASK
;
824 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
, fll_4
| clk_id
);
829 if (dir
== WM8350_MCLK_DIR_OUT
)
830 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
833 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
839 static int wm8350_set_clkdiv(struct snd_soc_dai
*codec_dai
, int div_id
, int div
)
841 struct snd_soc_codec
*codec
= codec_dai
->codec
;
845 case WM8350_ADC_CLKDIV
:
846 val
= wm8350_codec_read(codec
, WM8350_ADC_DIVIDER
) &
847 ~WM8350_ADC_CLKDIV_MASK
;
848 wm8350_codec_write(codec
, WM8350_ADC_DIVIDER
, val
| div
);
850 case WM8350_DAC_CLKDIV
:
851 val
= wm8350_codec_read(codec
, WM8350_DAC_CLOCK_CONTROL
) &
852 ~WM8350_DAC_CLKDIV_MASK
;
853 wm8350_codec_write(codec
, WM8350_DAC_CLOCK_CONTROL
, val
| div
);
855 case WM8350_BCLK_CLKDIV
:
856 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
857 ~WM8350_BCLK_DIV_MASK
;
858 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
860 case WM8350_OPCLK_CLKDIV
:
861 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
862 ~WM8350_OPCLK_DIV_MASK
;
863 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
865 case WM8350_SYS_CLKDIV
:
866 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
867 ~WM8350_MCLK_DIV_MASK
;
868 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
870 case WM8350_DACLR_CLKDIV
:
871 val
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
872 ~WM8350_DACLRC_RATE_MASK
;
873 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, val
| div
);
875 case WM8350_ADCLR_CLKDIV
:
876 val
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
877 ~WM8350_ADCLRC_RATE_MASK
;
878 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, val
| div
);
887 static int wm8350_set_dai_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
889 struct snd_soc_codec
*codec
= codec_dai
->codec
;
890 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
891 ~(WM8350_AIF_BCLK_INV
| WM8350_AIF_LRCLK_INV
| WM8350_AIF_FMT_MASK
);
892 u16 master
= wm8350_codec_read(codec
, WM8350_AI_DAC_CONTROL
) &
894 u16 dac_lrc
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
896 u16 adc_lrc
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
899 /* set master/slave audio interface */
900 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
901 case SND_SOC_DAIFMT_CBM_CFM
:
902 master
|= WM8350_BCLK_MSTR
;
903 dac_lrc
|= WM8350_DACLRC_ENA
;
904 adc_lrc
|= WM8350_ADCLRC_ENA
;
906 case SND_SOC_DAIFMT_CBS_CFS
:
912 /* interface format */
913 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
914 case SND_SOC_DAIFMT_I2S
:
917 case SND_SOC_DAIFMT_RIGHT_J
:
919 case SND_SOC_DAIFMT_LEFT_J
:
922 case SND_SOC_DAIFMT_DSP_A
:
925 case SND_SOC_DAIFMT_DSP_B
:
926 iface
|= 0x3 << 8; /* lg not sure which mode */
932 /* clock inversion */
933 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
934 case SND_SOC_DAIFMT_NB_NF
:
936 case SND_SOC_DAIFMT_IB_IF
:
937 iface
|= WM8350_AIF_LRCLK_INV
| WM8350_AIF_BCLK_INV
;
939 case SND_SOC_DAIFMT_IB_NF
:
940 iface
|= WM8350_AIF_BCLK_INV
;
942 case SND_SOC_DAIFMT_NB_IF
:
943 iface
|= WM8350_AIF_LRCLK_INV
;
949 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
950 wm8350_codec_write(codec
, WM8350_AI_DAC_CONTROL
, master
);
951 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, dac_lrc
);
952 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, adc_lrc
);
956 static int wm8350_pcm_trigger(struct snd_pcm_substream
*substream
,
957 int cmd
, struct snd_soc_dai
*codec_dai
)
959 struct snd_soc_codec
*codec
= codec_dai
->codec
;
960 int master
= wm8350_codec_cache_read(codec
, WM8350_AI_DAC_CONTROL
) &
964 /* Check that the DACs or ADCs are enabled since they are
965 * required for LRC in master mode. The DACs or ADCs need a
966 * valid audio path i.e. pin -> ADC or DAC -> pin before
967 * the LRC will be enabled in master mode. */
968 if (!master
|| cmd
!= SNDRV_PCM_TRIGGER_START
)
971 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
) {
972 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
973 (WM8350_ADCR_ENA
| WM8350_ADCL_ENA
);
975 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
976 (WM8350_DACR_ENA
| WM8350_DACL_ENA
);
981 "%s: invalid audio path - no clocks available\n",
988 static int wm8350_pcm_hw_params(struct snd_pcm_substream
*substream
,
989 struct snd_pcm_hw_params
*params
,
990 struct snd_soc_dai
*codec_dai
)
992 struct snd_soc_codec
*codec
= codec_dai
->codec
;
993 struct wm8350
*wm8350
= codec
->control_data
;
994 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
998 switch (params_format(params
)) {
999 case SNDRV_PCM_FORMAT_S16_LE
:
1001 case SNDRV_PCM_FORMAT_S20_3LE
:
1004 case SNDRV_PCM_FORMAT_S24_LE
:
1007 case SNDRV_PCM_FORMAT_S32_LE
:
1012 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
1014 /* The sloping stopband filter is recommended for use with
1015 * lower sample rates to improve performance.
1017 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
1018 if (params_rate(params
) < 24000)
1019 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
1020 WM8350_DAC_SB_FILT
);
1022 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
1023 WM8350_DAC_SB_FILT
);
1029 static int wm8350_mute(struct snd_soc_dai
*dai
, int mute
)
1031 struct snd_soc_codec
*codec
= dai
->codec
;
1032 struct wm8350
*wm8350
= codec
->control_data
;
1035 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1037 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1043 int div
; /* FLL_OUTDIV */
1046 int ratio
; /* FLL_FRATIO */
1049 /* The size in bits of the fll divide multiplied by 10
1050 * to allow rounding later */
1051 #define FIXED_FLL_SIZE ((1 << 16) * 10)
1053 static inline int fll_factors(struct _fll_div
*fll_div
, unsigned int input
,
1054 unsigned int output
)
1057 unsigned int t1
, t2
, K
, Nmod
;
1059 if (output
>= 2815250 && output
<= 3125000)
1061 else if (output
>= 5625000 && output
<= 6250000)
1063 else if (output
>= 11250000 && output
<= 12500000)
1065 else if (output
>= 22500000 && output
<= 25000000)
1068 printk(KERN_ERR
"wm8350: fll freq %d out of range\n", output
);
1077 t1
= output
* (1 << (fll_div
->div
+ 1));
1078 t2
= input
* fll_div
->ratio
;
1080 fll_div
->n
= t1
/ t2
;
1084 Kpart
= FIXED_FLL_SIZE
* (long long)Nmod
;
1086 K
= Kpart
& 0xFFFFFFFF;
1088 /* Check if we need to round */
1092 /* Move down to proper range now rounding is done */
1101 static int wm8350_set_fll(struct snd_soc_dai
*codec_dai
,
1102 int pll_id
, unsigned int freq_in
,
1103 unsigned int freq_out
)
1105 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1106 struct wm8350
*wm8350
= codec
->control_data
;
1107 struct _fll_div fll_div
;
1111 /* power down FLL - we need to do this for reconfiguration */
1112 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1113 WM8350_FLL_ENA
| WM8350_FLL_OSC_ENA
);
1115 if (freq_out
== 0 || freq_in
== 0)
1118 ret
= fll_factors(&fll_div
, freq_in
, freq_out
);
1121 dev_dbg(wm8350
->dev
,
1122 "FLL in %u FLL out %u N 0x%x K 0x%x div %d ratio %d",
1123 freq_in
, freq_out
, fll_div
.n
, fll_div
.k
, fll_div
.div
,
1126 /* set up N.K & dividers */
1127 fll_1
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_1
) &
1128 ~(WM8350_FLL_OUTDIV_MASK
| WM8350_FLL_RSP_RATE_MASK
| 0xc000);
1129 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_1
,
1130 fll_1
| (fll_div
.div
<< 8) | 0x50);
1131 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_2
,
1132 (fll_div
.ratio
<< 11) | (fll_div
.
1133 n
& WM8350_FLL_N_MASK
));
1134 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_3
, fll_div
.k
);
1135 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
1136 ~(WM8350_FLL_FRAC
| WM8350_FLL_SLOW_LOCK_REF
);
1137 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
,
1138 fll_4
| (fll_div
.k
? WM8350_FLL_FRAC
: 0) |
1139 (fll_div
.ratio
== 8 ? WM8350_FLL_SLOW_LOCK_REF
: 0));
1142 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_OSC_ENA
);
1143 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_ENA
);
1148 static int wm8350_set_bias_level(struct snd_soc_codec
*codec
,
1149 enum snd_soc_bias_level level
)
1151 struct wm8350
*wm8350
= codec
->control_data
;
1152 struct wm8350_data
*priv
= codec
->private_data
;
1153 struct wm8350_audio_platform_data
*platform
=
1154 wm8350
->codec
.platform_data
;
1159 case SND_SOC_BIAS_ON
:
1160 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1161 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1162 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1163 pm1
| WM8350_VMID_50K
|
1164 platform
->codec_current_on
<< 14);
1167 case SND_SOC_BIAS_PREPARE
:
1168 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
);
1169 pm1
&= ~WM8350_VMID_MASK
;
1170 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1171 pm1
| WM8350_VMID_50K
);
1174 case SND_SOC_BIAS_STANDBY
:
1175 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1176 ret
= regulator_bulk_enable(ARRAY_SIZE(priv
->supplies
),
1181 /* Enable the system clock */
1182 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
,
1185 /* mute DAC & outputs */
1186 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
,
1187 WM8350_DAC_MUTE_ENA
);
1189 /* discharge cap memory */
1190 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1191 platform
->dis_out1
|
1192 (platform
->dis_out2
<< 2) |
1193 (platform
->dis_out3
<< 4) |
1194 (platform
->dis_out4
<< 6));
1196 /* wait for discharge */
1197 schedule_timeout_interruptible(msecs_to_jiffies
1199 cap_discharge_msecs
));
1201 /* enable antipop */
1202 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1203 (platform
->vmid_s_curve
<< 8));
1206 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1208 codec_current_charge
<< 14) |
1209 WM8350_VMID_5K
| WM8350_VMIDEN
|
1213 schedule_timeout_interruptible(msecs_to_jiffies
1215 vmid_charge_msecs
));
1217 /* turn on vmid 300k */
1218 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1219 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1220 pm1
|= WM8350_VMID_300K
|
1221 (platform
->codec_current_standby
<< 14);
1222 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1226 /* enable analogue bias */
1227 pm1
|= WM8350_BIASEN
;
1228 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1230 /* disable antipop */
1231 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1234 /* turn on vmid 300k and reduce current */
1235 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1236 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1237 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1238 pm1
| WM8350_VMID_300K
|
1240 codec_current_standby
<< 14));
1245 case SND_SOC_BIAS_OFF
:
1247 /* mute DAC & enable outputs */
1248 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1250 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_3
,
1251 WM8350_OUT1L_ENA
| WM8350_OUT1R_ENA
|
1252 WM8350_OUT2L_ENA
| WM8350_OUT2R_ENA
);
1254 /* enable anti pop S curve */
1255 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1256 (platform
->vmid_s_curve
<< 8));
1259 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1261 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1264 schedule_timeout_interruptible(msecs_to_jiffies
1266 vmid_discharge_msecs
));
1268 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1269 (platform
->vmid_s_curve
<< 8) |
1270 platform
->dis_out1
|
1271 (platform
->dis_out2
<< 2) |
1272 (platform
->dis_out3
<< 4) |
1273 (platform
->dis_out4
<< 6));
1275 /* turn off VBuf and drain */
1276 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1277 ~(WM8350_VBUFEN
| WM8350_VMID_MASK
);
1278 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1279 pm1
| WM8350_OUTPUT_DRAIN_EN
);
1282 schedule_timeout_interruptible(msecs_to_jiffies
1283 (platform
->drain_msecs
));
1285 pm1
&= ~WM8350_BIASEN
;
1286 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1288 /* disable anti-pop */
1289 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1291 wm8350_clear_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1293 wm8350_clear_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1295 wm8350_clear_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1297 wm8350_clear_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1300 /* disable clock gen */
1301 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1304 regulator_bulk_disable(ARRAY_SIZE(priv
->supplies
),
1308 codec
->bias_level
= level
;
1312 static int wm8350_suspend(struct platform_device
*pdev
, pm_message_t state
)
1314 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1315 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1317 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1321 static int wm8350_resume(struct platform_device
*pdev
)
1323 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1324 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1326 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1328 if (codec
->suspend_bias_level
== SND_SOC_BIAS_ON
)
1329 wm8350_set_bias_level(codec
, SND_SOC_BIAS_ON
);
1334 static void wm8350_hp_jack_handler(struct wm8350
*wm8350
, int irq
, void *data
)
1336 struct wm8350_data
*priv
= data
;
1340 struct wm8350_jack_data
*jack
= NULL
;
1343 case WM8350_IRQ_CODEC_JCK_DET_L
:
1345 mask
= WM8350_JACK_L_LVL
;
1348 case WM8350_IRQ_CODEC_JCK_DET_R
:
1350 mask
= WM8350_JACK_R_LVL
;
1358 dev_warn(wm8350
->dev
, "Jack interrupt called with no jack\n");
1365 reg
= wm8350_reg_read(wm8350
, WM8350_JACK_PIN_STATUS
);
1367 report
= jack
->report
;
1371 snd_soc_jack_report(jack
->jack
, report
, jack
->report
);
1375 * wm8350_hp_jack_detect - Enable headphone jack detection.
1377 * @codec: WM8350 codec
1378 * @which: left or right jack detect signal
1379 * @jack: jack to report detection events on
1380 * @report: value to report
1382 * Enables the headphone jack detection of the WM8350.
1384 int wm8350_hp_jack_detect(struct snd_soc_codec
*codec
, enum wm8350_jack which
,
1385 struct snd_soc_jack
*jack
, int report
)
1387 struct wm8350_data
*priv
= codec
->private_data
;
1388 struct wm8350
*wm8350
= codec
->control_data
;
1394 priv
->hpl
.jack
= jack
;
1395 priv
->hpl
.report
= report
;
1396 irq
= WM8350_IRQ_CODEC_JCK_DET_L
;
1397 ena
= WM8350_JDL_ENA
;
1401 priv
->hpr
.jack
= jack
;
1402 priv
->hpr
.report
= report
;
1403 irq
= WM8350_IRQ_CODEC_JCK_DET_R
;
1404 ena
= WM8350_JDR_ENA
;
1411 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1412 wm8350_set_bits(wm8350
, WM8350_JACK_DETECT
, ena
);
1415 wm8350_hp_jack_handler(wm8350
, irq
, priv
);
1417 wm8350_unmask_irq(wm8350
, irq
);
1421 EXPORT_SYMBOL_GPL(wm8350_hp_jack_detect
);
1423 static struct snd_soc_codec
*wm8350_codec
;
1425 static int wm8350_probe(struct platform_device
*pdev
)
1427 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1428 struct snd_soc_codec
*codec
;
1429 struct wm8350
*wm8350
;
1430 struct wm8350_data
*priv
;
1432 struct wm8350_output
*out1
;
1433 struct wm8350_output
*out2
;
1435 BUG_ON(!wm8350_codec
);
1437 socdev
->card
->codec
= wm8350_codec
;
1438 codec
= socdev
->card
->codec
;
1439 wm8350
= codec
->control_data
;
1440 priv
= codec
->private_data
;
1442 /* Enable the codec */
1443 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1445 /* Enable robust clocking mode in ADC */
1446 wm8350_codec_write(codec
, WM8350_SECURITY
, 0xa7);
1447 wm8350_codec_write(codec
, 0xde, 0x13);
1448 wm8350_codec_write(codec
, WM8350_SECURITY
, 0);
1450 /* read OUT1 & OUT2 volumes */
1453 out1
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
) &
1454 WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1455 out1
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
) &
1456 WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1457 out2
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
) &
1458 WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1459 out2
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
) &
1460 WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1461 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
, 0);
1462 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
, 0);
1463 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
, 0);
1464 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
, 0);
1466 /* Latch VU bits & mute */
1467 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1468 WM8350_OUT1_VU
| WM8350_OUT1L_MUTE
);
1469 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1470 WM8350_OUT2_VU
| WM8350_OUT2L_MUTE
);
1471 wm8350_set_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1472 WM8350_OUT1_VU
| WM8350_OUT1R_MUTE
);
1473 wm8350_set_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1474 WM8350_OUT2_VU
| WM8350_OUT2R_MUTE
);
1476 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1477 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1478 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
,
1479 wm8350_hp_jack_handler
, priv
);
1480 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
,
1481 wm8350_hp_jack_handler
, priv
);
1483 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1485 dev_err(&pdev
->dev
, "failed to create pcms\n");
1489 snd_soc_add_controls(codec
, wm8350_snd_controls
,
1490 ARRAY_SIZE(wm8350_snd_controls
));
1491 wm8350_add_widgets(codec
);
1493 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1495 ret
= snd_soc_init_card(socdev
);
1497 dev_err(&pdev
->dev
, "failed to register card\n");
1504 snd_soc_free_pcms(socdev
);
1505 snd_soc_dapm_free(socdev
);
1509 static int wm8350_remove(struct platform_device
*pdev
)
1511 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1512 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1513 struct wm8350
*wm8350
= codec
->control_data
;
1514 struct wm8350_data
*priv
= codec
->private_data
;
1517 wm8350_clear_bits(wm8350
, WM8350_JACK_DETECT
,
1518 WM8350_JDL_ENA
| WM8350_JDR_ENA
);
1519 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1521 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1522 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1523 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1524 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1526 priv
->hpl
.jack
= NULL
;
1527 priv
->hpr
.jack
= NULL
;
1529 /* cancel any work waiting to be queued. */
1530 ret
= cancel_delayed_work(&codec
->delayed_work
);
1532 /* if there was any work waiting then we run it now and
1533 * wait for its completion */
1535 schedule_delayed_work(&codec
->delayed_work
, 0);
1536 flush_scheduled_work();
1539 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1541 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1546 #define WM8350_RATES (SNDRV_PCM_RATE_8000_96000)
1548 #define WM8350_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1549 SNDRV_PCM_FMTBIT_S20_3LE |\
1550 SNDRV_PCM_FMTBIT_S24_LE)
1552 static struct snd_soc_dai_ops wm8350_dai_ops
= {
1553 .hw_params
= wm8350_pcm_hw_params
,
1554 .digital_mute
= wm8350_mute
,
1555 .trigger
= wm8350_pcm_trigger
,
1556 .set_fmt
= wm8350_set_dai_fmt
,
1557 .set_sysclk
= wm8350_set_dai_sysclk
,
1558 .set_pll
= wm8350_set_fll
,
1559 .set_clkdiv
= wm8350_set_clkdiv
,
1562 struct snd_soc_dai wm8350_dai
= {
1565 .stream_name
= "Playback",
1568 .rates
= WM8350_RATES
,
1569 .formats
= WM8350_FORMATS
,
1572 .stream_name
= "Capture",
1575 .rates
= WM8350_RATES
,
1576 .formats
= WM8350_FORMATS
,
1578 .ops
= &wm8350_dai_ops
,
1580 EXPORT_SYMBOL_GPL(wm8350_dai
);
1582 struct snd_soc_codec_device soc_codec_dev_wm8350
= {
1583 .probe
= wm8350_probe
,
1584 .remove
= wm8350_remove
,
1585 .suspend
= wm8350_suspend
,
1586 .resume
= wm8350_resume
,
1588 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8350
);
1590 static __devinit
int wm8350_codec_probe(struct platform_device
*pdev
)
1592 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1593 struct wm8350_data
*priv
;
1594 struct snd_soc_codec
*codec
;
1597 if (wm8350
->codec
.platform_data
== NULL
) {
1598 dev_err(&pdev
->dev
, "No audio platform data supplied\n");
1602 priv
= kzalloc(sizeof(struct wm8350_data
), GFP_KERNEL
);
1606 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
1607 priv
->supplies
[i
].supply
= supply_names
[i
];
1609 ret
= regulator_bulk_get(wm8350
->dev
, ARRAY_SIZE(priv
->supplies
),
1614 codec
= &priv
->codec
;
1615 wm8350
->codec
.codec
= codec
;
1617 wm8350_dai
.dev
= &pdev
->dev
;
1619 mutex_init(&codec
->mutex
);
1620 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1621 INIT_LIST_HEAD(&codec
->dapm_paths
);
1622 codec
->dev
= &pdev
->dev
;
1623 codec
->name
= "WM8350";
1624 codec
->owner
= THIS_MODULE
;
1625 codec
->read
= wm8350_codec_read
;
1626 codec
->write
= wm8350_codec_write
;
1627 codec
->bias_level
= SND_SOC_BIAS_OFF
;
1628 codec
->set_bias_level
= wm8350_set_bias_level
;
1629 codec
->dai
= &wm8350_dai
;
1631 codec
->reg_cache_size
= WM8350_MAX_REGISTER
;
1632 codec
->private_data
= priv
;
1633 codec
->control_data
= wm8350
;
1635 /* Put the codec into reset if it wasn't already */
1636 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1638 INIT_DELAYED_WORK(&codec
->delayed_work
, wm8350_pga_work
);
1639 ret
= snd_soc_register_codec(codec
);
1643 wm8350_codec
= codec
;
1645 ret
= snd_soc_register_dai(&wm8350_dai
);
1651 snd_soc_unregister_codec(codec
);
1653 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1656 wm8350_codec
= NULL
;
1660 static int __devexit
wm8350_codec_remove(struct platform_device
*pdev
)
1662 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1663 struct snd_soc_codec
*codec
= wm8350
->codec
.codec
;
1664 struct wm8350_data
*priv
= codec
->private_data
;
1666 snd_soc_unregister_dai(&wm8350_dai
);
1667 snd_soc_unregister_codec(codec
);
1668 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1670 wm8350_codec
= NULL
;
1675 static int wm8350_codec_suspend(struct platform_device
*pdev
, pm_message_t m
)
1677 return snd_soc_suspend_device(&pdev
->dev
);
1680 static int wm8350_codec_resume(struct platform_device
*pdev
)
1682 return snd_soc_resume_device(&pdev
->dev
);
1685 #define wm8350_codec_suspend NULL
1686 #define wm8350_codec_resume NULL
1689 static struct platform_driver wm8350_codec_driver
= {
1691 .name
= "wm8350-codec",
1692 .owner
= THIS_MODULE
,
1694 .probe
= wm8350_codec_probe
,
1695 .remove
= __devexit_p(wm8350_codec_remove
),
1696 .suspend
= wm8350_codec_suspend
,
1697 .resume
= wm8350_codec_resume
,
1700 static __init
int wm8350_init(void)
1702 return platform_driver_register(&wm8350_codec_driver
);
1704 module_init(wm8350_init
);
1706 static __exit
void wm8350_exit(void)
1708 platform_driver_unregister(&wm8350_codec_driver
);
1710 module_exit(wm8350_exit
);
1712 MODULE_DESCRIPTION("ASoC WM8350 driver");
1713 MODULE_AUTHOR("Liam Girdwood");
1714 MODULE_LICENSE("GPL");
1715 MODULE_ALIAS("platform:wm8350-codec");