2 * wm8962.c -- WM8962 ALSA SoC Audio driver
4 * Copyright 2010 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/gcd.h>
20 #include <linux/gpio.h>
21 #include <linux/i2c.h>
22 #include <linux/input.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
26 #include <linux/workqueue.h>
27 #include <sound/core.h>
28 #include <sound/jack.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/soc.h>
32 #include <sound/soc-dapm.h>
33 #include <sound/initval.h>
34 #include <sound/tlv.h>
35 #include <sound/wm8962.h>
39 #define WM8962_NUM_SUPPLIES 8
40 static const char *wm8962_supply_names
[WM8962_NUM_SUPPLIES
] = {
51 /* codec private data */
53 struct snd_soc_codec
*codec
;
55 u16 reg_cache
[WM8962_MAX_REGISTER
+ 1];
60 int bclk
; /* Desired BCLK */
67 struct delayed_work mic_work
;
68 struct snd_soc_jack
*jack
;
70 struct regulator_bulk_data supplies
[WM8962_NUM_SUPPLIES
];
71 struct notifier_block disable_nb
[WM8962_NUM_SUPPLIES
];
73 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
74 struct input_dev
*beep
;
75 struct work_struct beep_work
;
80 struct gpio_chip gpio_chip
;
84 /* We can't use the same notifier block for more than one supply and
85 * there's no way I can see to get from a callback to the caller
86 * except container_of().
88 #define WM8962_REGULATOR_EVENT(n) \
89 static int wm8962_regulator_event_##n(struct notifier_block *nb, \
90 unsigned long event, void *data) \
92 struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \
94 if (event & REGULATOR_EVENT_DISABLE) { \
95 wm8962->codec->cache_sync = 1; \
100 WM8962_REGULATOR_EVENT(0)
101 WM8962_REGULATOR_EVENT(1)
102 WM8962_REGULATOR_EVENT(2)
103 WM8962_REGULATOR_EVENT(3)
104 WM8962_REGULATOR_EVENT(4)
105 WM8962_REGULATOR_EVENT(5)
106 WM8962_REGULATOR_EVENT(6)
107 WM8962_REGULATOR_EVENT(7)
109 static int wm8962_volatile_register(unsigned int reg
)
111 if (wm8962_reg_access
[reg
].vol
)
117 static int wm8962_readable_register(unsigned int reg
)
119 if (wm8962_reg_access
[reg
].read
)
125 static int wm8962_reset(struct snd_soc_codec
*codec
)
127 return snd_soc_write(codec
, WM8962_SOFTWARE_RESET
, 0);
130 static const DECLARE_TLV_DB_SCALE(inpga_tlv
, -2325, 75, 0);
131 static const DECLARE_TLV_DB_SCALE(mixin_tlv
, -1500, 300, 0);
132 static const unsigned int mixinpga_tlv
[] = {
133 TLV_DB_RANGE_HEAD(7),
134 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0),
135 2, 2, TLV_DB_SCALE_ITEM(1300, 1300, 0),
136 3, 4, TLV_DB_SCALE_ITEM(1800, 200, 0),
137 5, 5, TLV_DB_SCALE_ITEM(2400, 0, 0),
138 6, 7, TLV_DB_SCALE_ITEM(2700, 300, 0),
140 static const DECLARE_TLV_DB_SCALE(beep_tlv
, -9600, 600, 1);
141 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -7200, 75, 1);
142 static const DECLARE_TLV_DB_SCALE(st_tlv
, -3600, 300, 0);
143 static const DECLARE_TLV_DB_SCALE(inmix_tlv
, -600, 600, 0);
144 static const DECLARE_TLV_DB_SCALE(bypass_tlv
, -1500, 300, 0);
145 static const DECLARE_TLV_DB_SCALE(out_tlv
, -12100, 100, 1);
146 static const DECLARE_TLV_DB_SCALE(hp_tlv
, -700, 100, 0);
147 static const unsigned int classd_tlv
[] = {
148 TLV_DB_RANGE_HEAD(7),
149 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
150 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
153 /* The VU bits for the headphones are in a different register to the mute
154 * bits and only take effect on the PGA if it is actually powered.
156 static int wm8962_put_hp_sw(struct snd_kcontrol
*kcontrol
,
157 struct snd_ctl_elem_value
*ucontrol
)
159 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
160 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
161 u16
*reg_cache
= wm8962
->reg_cache
;
164 /* Apply the update (if any) */
165 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
169 /* If the left PGA is enabled hit that VU bit... */
170 if (reg_cache
[WM8962_PWR_MGMT_2
] & WM8962_HPOUTL_PGA_ENA
)
171 return snd_soc_write(codec
, WM8962_HPOUTL_VOLUME
,
172 reg_cache
[WM8962_HPOUTL_VOLUME
]);
174 /* ...otherwise the right. The VU is stereo. */
175 if (reg_cache
[WM8962_PWR_MGMT_2
] & WM8962_HPOUTR_PGA_ENA
)
176 return snd_soc_write(codec
, WM8962_HPOUTR_VOLUME
,
177 reg_cache
[WM8962_HPOUTR_VOLUME
]);
182 /* The VU bits for the speakers are in a different register to the mute
183 * bits and only take effect on the PGA if it is actually powered.
185 static int wm8962_put_spk_sw(struct snd_kcontrol
*kcontrol
,
186 struct snd_ctl_elem_value
*ucontrol
)
188 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
189 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
190 u16
*reg_cache
= wm8962
->reg_cache
;
193 /* Apply the update (if any) */
194 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
198 /* If the left PGA is enabled hit that VU bit... */
199 if (reg_cache
[WM8962_PWR_MGMT_2
] & WM8962_SPKOUTL_PGA_ENA
)
200 return snd_soc_write(codec
, WM8962_SPKOUTL_VOLUME
,
201 reg_cache
[WM8962_SPKOUTL_VOLUME
]);
203 /* ...otherwise the right. The VU is stereo. */
204 if (reg_cache
[WM8962_PWR_MGMT_2
] & WM8962_SPKOUTR_PGA_ENA
)
205 return snd_soc_write(codec
, WM8962_SPKOUTR_VOLUME
,
206 reg_cache
[WM8962_SPKOUTR_VOLUME
]);
211 static const struct snd_kcontrol_new wm8962_snd_controls
[] = {
212 SOC_DOUBLE("Input Mixer Switch", WM8962_INPUT_MIXER_CONTROL_1
, 3, 2, 1, 1),
214 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8962_LEFT_INPUT_MIXER_VOLUME
, 6, 7, 0,
216 SOC_SINGLE_TLV("MIXINL PGA Volume", WM8962_LEFT_INPUT_MIXER_VOLUME
, 3, 7, 0,
218 SOC_SINGLE_TLV("MIXINL IN3L Volume", WM8962_LEFT_INPUT_MIXER_VOLUME
, 0, 7, 0,
221 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME
, 6, 7, 0,
223 SOC_SINGLE_TLV("MIXINR PGA Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME
, 3, 7, 0,
225 SOC_SINGLE_TLV("MIXINR IN3R Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME
, 0, 7, 0,
228 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8962_LEFT_ADC_VOLUME
,
229 WM8962_RIGHT_ADC_VOLUME
, 1, 127, 0, digital_tlv
),
230 SOC_DOUBLE_R_TLV("Capture Volume", WM8962_LEFT_INPUT_VOLUME
,
231 WM8962_RIGHT_INPUT_VOLUME
, 0, 63, 0, inpga_tlv
),
232 SOC_DOUBLE_R("Capture Switch", WM8962_LEFT_INPUT_VOLUME
,
233 WM8962_RIGHT_INPUT_VOLUME
, 7, 1, 1),
234 SOC_DOUBLE_R("Capture ZC Switch", WM8962_LEFT_INPUT_VOLUME
,
235 WM8962_RIGHT_INPUT_VOLUME
, 6, 1, 1),
237 SOC_DOUBLE_R_TLV("Sidetone Volume", WM8962_DAC_DSP_MIXING_1
,
238 WM8962_DAC_DSP_MIXING_2
, 4, 12, 0, st_tlv
),
240 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8962_LEFT_DAC_VOLUME
,
241 WM8962_RIGHT_DAC_VOLUME
, 1, 127, 0, digital_tlv
),
242 SOC_SINGLE("DAC High Performance Switch", WM8962_ADC_DAC_CONTROL_2
, 0, 1, 0),
244 SOC_SINGLE("ADC High Performance Switch", WM8962_ADDITIONAL_CONTROL_1
,
247 SOC_SINGLE_TLV("Beep Volume", WM8962_BEEP_GENERATOR_1
, 4, 15, 0, beep_tlv
),
249 SOC_DOUBLE_R_TLV("Headphone Volume", WM8962_HPOUTL_VOLUME
,
250 WM8962_HPOUTR_VOLUME
, 0, 127, 0, out_tlv
),
251 SOC_DOUBLE_EXT("Headphone Switch", WM8962_PWR_MGMT_2
, 1, 0, 1, 1,
252 snd_soc_get_volsw
, wm8962_put_hp_sw
),
253 SOC_DOUBLE_R("Headphone ZC Switch", WM8962_HPOUTL_VOLUME
, WM8962_HPOUTR_VOLUME
,
255 SOC_DOUBLE_TLV("Headphone Aux Volume", WM8962_ANALOGUE_HP_2
, 3, 6, 7, 0,
258 SOC_DOUBLE_R("Headphone Mixer Switch", WM8962_HEADPHONE_MIXER_3
,
259 WM8962_HEADPHONE_MIXER_4
, 8, 1, 1),
261 SOC_SINGLE_TLV("HPMIXL IN4L Volume", WM8962_HEADPHONE_MIXER_3
,
262 3, 7, 0, bypass_tlv
),
263 SOC_SINGLE_TLV("HPMIXL IN4R Volume", WM8962_HEADPHONE_MIXER_3
,
264 0, 7, 0, bypass_tlv
),
265 SOC_SINGLE_TLV("HPMIXL MIXINL Volume", WM8962_HEADPHONE_MIXER_3
,
267 SOC_SINGLE_TLV("HPMIXL MIXINR Volume", WM8962_HEADPHONE_MIXER_3
,
270 SOC_SINGLE_TLV("HPMIXR IN4L Volume", WM8962_HEADPHONE_MIXER_4
,
271 3, 7, 0, bypass_tlv
),
272 SOC_SINGLE_TLV("HPMIXR IN4R Volume", WM8962_HEADPHONE_MIXER_4
,
273 0, 7, 0, bypass_tlv
),
274 SOC_SINGLE_TLV("HPMIXR MIXINL Volume", WM8962_HEADPHONE_MIXER_4
,
276 SOC_SINGLE_TLV("HPMIXR MIXINR Volume", WM8962_HEADPHONE_MIXER_4
,
279 SOC_SINGLE_TLV("Speaker Boost Volume", WM8962_CLASS_D_CONTROL_2
, 0, 7, 0,
283 static const struct snd_kcontrol_new wm8962_spk_mono_controls
[] = {
284 SOC_SINGLE_TLV("Speaker Volume", WM8962_SPKOUTL_VOLUME
, 0, 127, 0, out_tlv
),
285 SOC_SINGLE_EXT("Speaker Switch", WM8962_CLASS_D_CONTROL_1
, 1, 1, 1,
286 snd_soc_get_volsw
, wm8962_put_spk_sw
),
287 SOC_SINGLE("Speaker ZC Switch", WM8962_SPKOUTL_VOLUME
, 7, 1, 0),
289 SOC_SINGLE("Speaker Mixer Switch", WM8962_SPEAKER_MIXER_3
, 8, 1, 1),
290 SOC_SINGLE_TLV("Speaker Mixer IN4L Volume", WM8962_SPEAKER_MIXER_3
,
291 3, 7, 0, bypass_tlv
),
292 SOC_SINGLE_TLV("Speaker Mixer IN4R Volume", WM8962_SPEAKER_MIXER_3
,
293 0, 7, 0, bypass_tlv
),
294 SOC_SINGLE_TLV("Speaker Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_3
,
296 SOC_SINGLE_TLV("Speaker Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_3
,
298 SOC_SINGLE_TLV("Speaker Mixer DACL Volume", WM8962_SPEAKER_MIXER_5
,
300 SOC_SINGLE_TLV("Speaker Mixer DACR Volume", WM8962_SPEAKER_MIXER_5
,
304 static const struct snd_kcontrol_new wm8962_spk_stereo_controls
[] = {
305 SOC_DOUBLE_R_TLV("Speaker Volume", WM8962_SPKOUTL_VOLUME
,
306 WM8962_SPKOUTR_VOLUME
, 0, 127, 0, out_tlv
),
307 SOC_DOUBLE_EXT("Speaker Switch", WM8962_CLASS_D_CONTROL_1
, 1, 0, 1, 1,
308 snd_soc_get_volsw
, wm8962_put_spk_sw
),
309 SOC_DOUBLE_R("Speaker ZC Switch", WM8962_SPKOUTL_VOLUME
, WM8962_SPKOUTR_VOLUME
,
312 SOC_DOUBLE_R("Speaker Mixer Switch", WM8962_SPEAKER_MIXER_3
,
313 WM8962_SPEAKER_MIXER_4
, 8, 1, 1),
315 SOC_SINGLE_TLV("SPKOUTL Mixer IN4L Volume", WM8962_SPEAKER_MIXER_3
,
316 3, 7, 0, bypass_tlv
),
317 SOC_SINGLE_TLV("SPKOUTL Mixer IN4R Volume", WM8962_SPEAKER_MIXER_3
,
318 0, 7, 0, bypass_tlv
),
319 SOC_SINGLE_TLV("SPKOUTL Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_3
,
321 SOC_SINGLE_TLV("SPKOUTL Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_3
,
323 SOC_SINGLE_TLV("SPKOUTL Mixer DACL Volume", WM8962_SPEAKER_MIXER_5
,
325 SOC_SINGLE_TLV("SPKOUTL Mixer DACR Volume", WM8962_SPEAKER_MIXER_5
,
328 SOC_SINGLE_TLV("SPKOUTR Mixer IN4L Volume", WM8962_SPEAKER_MIXER_4
,
329 3, 7, 0, bypass_tlv
),
330 SOC_SINGLE_TLV("SPKOUTR Mixer IN4R Volume", WM8962_SPEAKER_MIXER_4
,
331 0, 7, 0, bypass_tlv
),
332 SOC_SINGLE_TLV("SPKOUTR Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_4
,
334 SOC_SINGLE_TLV("SPKOUTR Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_4
,
336 SOC_SINGLE_TLV("SPKOUTR Mixer DACL Volume", WM8962_SPEAKER_MIXER_5
,
338 SOC_SINGLE_TLV("SPKOUTR Mixer DACR Volume", WM8962_SPEAKER_MIXER_5
,
342 static int sysclk_event(struct snd_soc_dapm_widget
*w
,
343 struct snd_kcontrol
*kcontrol
, int event
)
345 struct snd_soc_codec
*codec
= w
->codec
;
349 src
= snd_soc_read(codec
, WM8962_CLOCKING2
) & WM8962_SYSCLK_SRC_MASK
;
355 case 0x200: /* FLL */
359 dev_err(codec
->dev
, "Unknown SYSCLK source %x\n", src
);
364 case SND_SOC_DAPM_PRE_PMU
:
366 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
,
367 WM8962_FLL_ENA
, WM8962_FLL_ENA
);
370 case SND_SOC_DAPM_POST_PMD
:
372 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
,
384 static int cp_event(struct snd_soc_dapm_widget
*w
,
385 struct snd_kcontrol
*kcontrol
, int event
)
388 case SND_SOC_DAPM_POST_PMU
:
400 static int hp_event(struct snd_soc_dapm_widget
*w
,
401 struct snd_kcontrol
*kcontrol
, int event
)
403 struct snd_soc_codec
*codec
= w
->codec
;
406 int expected
= (WM8962_DCS_STARTUP_DONE_HP1L
|
407 WM8962_DCS_STARTUP_DONE_HP1R
);
410 case SND_SOC_DAPM_POST_PMU
:
411 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
412 WM8962_HP1L_ENA
| WM8962_HP1R_ENA
,
413 WM8962_HP1L_ENA
| WM8962_HP1R_ENA
);
416 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
417 WM8962_HP1L_ENA_DLY
| WM8962_HP1R_ENA_DLY
,
418 WM8962_HP1L_ENA_DLY
| WM8962_HP1R_ENA_DLY
);
420 /* Start the DC servo */
421 snd_soc_update_bits(codec
, WM8962_DC_SERVO_1
,
422 WM8962_HP1L_DCS_ENA
| WM8962_HP1R_DCS_ENA
|
423 WM8962_HP1L_DCS_STARTUP
|
424 WM8962_HP1R_DCS_STARTUP
,
425 WM8962_HP1L_DCS_ENA
| WM8962_HP1R_DCS_ENA
|
426 WM8962_HP1L_DCS_STARTUP
|
427 WM8962_HP1R_DCS_STARTUP
);
429 /* Wait for it to complete, should be well under 100ms */
433 reg
= snd_soc_read(codec
, WM8962_DC_SERVO_6
);
436 "Failed to read DCS status: %d\n",
440 dev_dbg(codec
->dev
, "DCS status: %x\n", reg
);
441 } while (++timeout
< 200 && (reg
& expected
) != expected
);
443 if ((reg
& expected
) != expected
)
444 dev_err(codec
->dev
, "DC servo timed out\n");
446 dev_dbg(codec
->dev
, "DC servo complete after %dms\n",
449 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
450 WM8962_HP1L_ENA_OUTP
|
451 WM8962_HP1R_ENA_OUTP
,
452 WM8962_HP1L_ENA_OUTP
|
453 WM8962_HP1R_ENA_OUTP
);
456 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
457 WM8962_HP1L_RMV_SHORT
|
458 WM8962_HP1R_RMV_SHORT
,
459 WM8962_HP1L_RMV_SHORT
|
460 WM8962_HP1R_RMV_SHORT
);
463 case SND_SOC_DAPM_PRE_PMD
:
464 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
465 WM8962_HP1L_RMV_SHORT
|
466 WM8962_HP1R_RMV_SHORT
, 0);
470 snd_soc_update_bits(codec
, WM8962_DC_SERVO_1
,
471 WM8962_HP1L_DCS_ENA
| WM8962_HP1R_DCS_ENA
|
472 WM8962_HP1L_DCS_STARTUP
|
473 WM8962_HP1R_DCS_STARTUP
,
476 snd_soc_update_bits(codec
, WM8962_ANALOGUE_HP_0
,
477 WM8962_HP1L_ENA
| WM8962_HP1R_ENA
|
478 WM8962_HP1L_ENA_DLY
| WM8962_HP1R_ENA_DLY
|
479 WM8962_HP1L_ENA_OUTP
|
480 WM8962_HP1R_ENA_OUTP
, 0);
493 /* VU bits for the output PGAs only take effect while the PGA is powered */
494 static int out_pga_event(struct snd_soc_dapm_widget
*w
,
495 struct snd_kcontrol
*kcontrol
, int event
)
497 struct snd_soc_codec
*codec
= w
->codec
;
498 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
499 u16
*reg_cache
= wm8962
->reg_cache
;
503 case WM8962_HPOUTR_PGA_ENA_SHIFT
:
504 reg
= WM8962_HPOUTR_VOLUME
;
506 case WM8962_HPOUTL_PGA_ENA_SHIFT
:
507 reg
= WM8962_HPOUTL_VOLUME
;
509 case WM8962_SPKOUTR_PGA_ENA_SHIFT
:
510 reg
= WM8962_SPKOUTR_VOLUME
;
512 case WM8962_SPKOUTL_PGA_ENA_SHIFT
:
513 reg
= WM8962_SPKOUTL_VOLUME
;
521 case SND_SOC_DAPM_POST_PMU
:
522 return snd_soc_write(codec
, reg
, reg_cache
[reg
]);
529 static const char *st_text
[] = { "None", "Right", "Left" };
531 static const struct soc_enum str_enum
=
532 SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_1
, 2, 3, st_text
);
534 static const struct snd_kcontrol_new str_mux
=
535 SOC_DAPM_ENUM("Right Sidetone", str_enum
);
537 static const struct soc_enum stl_enum
=
538 SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_2
, 2, 3, st_text
);
540 static const struct snd_kcontrol_new stl_mux
=
541 SOC_DAPM_ENUM("Left Sidetone", stl_enum
);
543 static const char *outmux_text
[] = { "DAC", "Mixer" };
545 static const struct soc_enum spkoutr_enum
=
546 SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_2
, 7, 2, outmux_text
);
548 static const struct snd_kcontrol_new spkoutr_mux
=
549 SOC_DAPM_ENUM("SPKOUTR Mux", spkoutr_enum
);
551 static const struct soc_enum spkoutl_enum
=
552 SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_1
, 7, 2, outmux_text
);
554 static const struct snd_kcontrol_new spkoutl_mux
=
555 SOC_DAPM_ENUM("SPKOUTL Mux", spkoutl_enum
);
557 static const struct soc_enum hpoutr_enum
=
558 SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_2
, 7, 2, outmux_text
);
560 static const struct snd_kcontrol_new hpoutr_mux
=
561 SOC_DAPM_ENUM("HPOUTR Mux", hpoutr_enum
);
563 static const struct soc_enum hpoutl_enum
=
564 SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_1
, 7, 2, outmux_text
);
566 static const struct snd_kcontrol_new hpoutl_mux
=
567 SOC_DAPM_ENUM("HPOUTL Mux", hpoutl_enum
);
569 static const struct snd_kcontrol_new inpgal
[] = {
570 SOC_DAPM_SINGLE("IN1L Switch", WM8962_LEFT_INPUT_PGA_CONTROL
, 3, 1, 0),
571 SOC_DAPM_SINGLE("IN2L Switch", WM8962_LEFT_INPUT_PGA_CONTROL
, 2, 1, 0),
572 SOC_DAPM_SINGLE("IN3L Switch", WM8962_LEFT_INPUT_PGA_CONTROL
, 1, 1, 0),
573 SOC_DAPM_SINGLE("IN4L Switch", WM8962_LEFT_INPUT_PGA_CONTROL
, 0, 1, 0),
576 static const struct snd_kcontrol_new inpgar
[] = {
577 SOC_DAPM_SINGLE("IN1R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL
, 3, 1, 0),
578 SOC_DAPM_SINGLE("IN2R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL
, 2, 1, 0),
579 SOC_DAPM_SINGLE("IN3R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL
, 1, 1, 0),
580 SOC_DAPM_SINGLE("IN4R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL
, 0, 1, 0),
583 static const struct snd_kcontrol_new mixinl
[] = {
584 SOC_DAPM_SINGLE("IN2L Switch", WM8962_INPUT_MIXER_CONTROL_2
, 5, 1, 0),
585 SOC_DAPM_SINGLE("IN3L Switch", WM8962_INPUT_MIXER_CONTROL_2
, 4, 1, 0),
586 SOC_DAPM_SINGLE("PGA Switch", WM8962_INPUT_MIXER_CONTROL_2
, 3, 1, 0),
589 static const struct snd_kcontrol_new mixinr
[] = {
590 SOC_DAPM_SINGLE("IN2R Switch", WM8962_INPUT_MIXER_CONTROL_2
, 2, 1, 0),
591 SOC_DAPM_SINGLE("IN3R Switch", WM8962_INPUT_MIXER_CONTROL_2
, 1, 1, 0),
592 SOC_DAPM_SINGLE("PGA Switch", WM8962_INPUT_MIXER_CONTROL_2
, 0, 1, 0),
595 static const struct snd_kcontrol_new hpmixl
[] = {
596 SOC_DAPM_SINGLE("DACL Switch", WM8962_HEADPHONE_MIXER_1
, 5, 1, 0),
597 SOC_DAPM_SINGLE("DACR Switch", WM8962_HEADPHONE_MIXER_1
, 4, 1, 0),
598 SOC_DAPM_SINGLE("MIXINL Switch", WM8962_HEADPHONE_MIXER_1
, 3, 1, 0),
599 SOC_DAPM_SINGLE("MIXINR Switch", WM8962_HEADPHONE_MIXER_1
, 2, 1, 0),
600 SOC_DAPM_SINGLE("IN4L Switch", WM8962_HEADPHONE_MIXER_1
, 1, 1, 0),
601 SOC_DAPM_SINGLE("IN4R Switch", WM8962_HEADPHONE_MIXER_1
, 0, 1, 0),
604 static const struct snd_kcontrol_new hpmixr
[] = {
605 SOC_DAPM_SINGLE("DACL Switch", WM8962_HEADPHONE_MIXER_2
, 5, 1, 0),
606 SOC_DAPM_SINGLE("DACR Switch", WM8962_HEADPHONE_MIXER_2
, 4, 1, 0),
607 SOC_DAPM_SINGLE("MIXINL Switch", WM8962_HEADPHONE_MIXER_2
, 3, 1, 0),
608 SOC_DAPM_SINGLE("MIXINR Switch", WM8962_HEADPHONE_MIXER_2
, 2, 1, 0),
609 SOC_DAPM_SINGLE("IN4L Switch", WM8962_HEADPHONE_MIXER_2
, 1, 1, 0),
610 SOC_DAPM_SINGLE("IN4R Switch", WM8962_HEADPHONE_MIXER_2
, 0, 1, 0),
613 static const struct snd_kcontrol_new spkmixl
[] = {
614 SOC_DAPM_SINGLE("DACL Switch", WM8962_SPEAKER_MIXER_1
, 5, 1, 0),
615 SOC_DAPM_SINGLE("DACR Switch", WM8962_SPEAKER_MIXER_1
, 4, 1, 0),
616 SOC_DAPM_SINGLE("MIXINL Switch", WM8962_SPEAKER_MIXER_1
, 3, 1, 0),
617 SOC_DAPM_SINGLE("MIXINR Switch", WM8962_SPEAKER_MIXER_1
, 2, 1, 0),
618 SOC_DAPM_SINGLE("IN4L Switch", WM8962_SPEAKER_MIXER_1
, 1, 1, 0),
619 SOC_DAPM_SINGLE("IN4R Switch", WM8962_SPEAKER_MIXER_1
, 0, 1, 0),
622 static const struct snd_kcontrol_new spkmixr
[] = {
623 SOC_DAPM_SINGLE("DACL Switch", WM8962_SPEAKER_MIXER_2
, 5, 1, 0),
624 SOC_DAPM_SINGLE("DACR Switch", WM8962_SPEAKER_MIXER_2
, 4, 1, 0),
625 SOC_DAPM_SINGLE("MIXINL Switch", WM8962_SPEAKER_MIXER_2
, 3, 1, 0),
626 SOC_DAPM_SINGLE("MIXINR Switch", WM8962_SPEAKER_MIXER_2
, 2, 1, 0),
627 SOC_DAPM_SINGLE("IN4L Switch", WM8962_SPEAKER_MIXER_2
, 1, 1, 0),
628 SOC_DAPM_SINGLE("IN4R Switch", WM8962_SPEAKER_MIXER_2
, 0, 1, 0),
631 static const struct snd_soc_dapm_widget wm8962_dapm_widgets
[] = {
632 SND_SOC_DAPM_INPUT("IN1L"),
633 SND_SOC_DAPM_INPUT("IN1R"),
634 SND_SOC_DAPM_INPUT("IN2L"),
635 SND_SOC_DAPM_INPUT("IN2R"),
636 SND_SOC_DAPM_INPUT("IN3L"),
637 SND_SOC_DAPM_INPUT("IN3R"),
638 SND_SOC_DAPM_INPUT("IN4L"),
639 SND_SOC_DAPM_INPUT("IN4R"),
640 SND_SOC_DAPM_INPUT("Beep"),
642 SND_SOC_DAPM_MICBIAS("MICBIAS", WM8962_PWR_MGMT_1
, 1, 0),
644 SND_SOC_DAPM_SUPPLY("Class G", WM8962_CHARGE_PUMP_B
, 0, 1, NULL
, 0),
645 SND_SOC_DAPM_SUPPLY("SYSCLK", WM8962_CLOCKING2
, 5, 0, sysclk_event
,
646 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMD
),
647 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8962_CHARGE_PUMP_1
, 0, 0, cp_event
,
648 SND_SOC_DAPM_POST_PMU
),
649 SND_SOC_DAPM_SUPPLY("TOCLK", WM8962_ADDITIONAL_CONTROL_1
, 0, 0, NULL
, 0),
651 SND_SOC_DAPM_MIXER("INPGAL", WM8962_LEFT_INPUT_PGA_CONTROL
, 4, 0,
652 inpgal
, ARRAY_SIZE(inpgal
)),
653 SND_SOC_DAPM_MIXER("INPGAR", WM8962_RIGHT_INPUT_PGA_CONTROL
, 4, 0,
654 inpgar
, ARRAY_SIZE(inpgar
)),
655 SND_SOC_DAPM_MIXER("MIXINL", WM8962_PWR_MGMT_1
, 5, 0,
656 mixinl
, ARRAY_SIZE(mixinl
)),
657 SND_SOC_DAPM_MIXER("MIXINR", WM8962_PWR_MGMT_1
, 4, 0,
658 mixinr
, ARRAY_SIZE(mixinr
)),
660 SND_SOC_DAPM_ADC("ADCL", "Capture", WM8962_PWR_MGMT_1
, 3, 0),
661 SND_SOC_DAPM_ADC("ADCR", "Capture", WM8962_PWR_MGMT_1
, 2, 0),
663 SND_SOC_DAPM_MUX("STL", SND_SOC_NOPM
, 0, 0, &stl_mux
),
664 SND_SOC_DAPM_MUX("STR", SND_SOC_NOPM
, 0, 0, &str_mux
),
666 SND_SOC_DAPM_DAC("DACL", "Playback", WM8962_PWR_MGMT_2
, 8, 0),
667 SND_SOC_DAPM_DAC("DACR", "Playback", WM8962_PWR_MGMT_2
, 7, 0),
669 SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM
, 0, 0, NULL
, 0),
670 SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM
, 0, 0, NULL
, 0),
672 SND_SOC_DAPM_MIXER("HPMIXL", WM8962_MIXER_ENABLES
, 3, 0,
673 hpmixl
, ARRAY_SIZE(hpmixl
)),
674 SND_SOC_DAPM_MIXER("HPMIXR", WM8962_MIXER_ENABLES
, 2, 0,
675 hpmixr
, ARRAY_SIZE(hpmixr
)),
677 SND_SOC_DAPM_MUX_E("HPOUTL PGA", WM8962_PWR_MGMT_2
, 6, 0, &hpoutl_mux
,
678 out_pga_event
, SND_SOC_DAPM_POST_PMU
),
679 SND_SOC_DAPM_MUX_E("HPOUTR PGA", WM8962_PWR_MGMT_2
, 5, 0, &hpoutr_mux
,
680 out_pga_event
, SND_SOC_DAPM_POST_PMU
),
682 SND_SOC_DAPM_PGA_E("HPOUT", SND_SOC_NOPM
, 0, 0, NULL
, 0, hp_event
,
683 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
685 SND_SOC_DAPM_OUTPUT("HPOUTL"),
686 SND_SOC_DAPM_OUTPUT("HPOUTR"),
689 static const struct snd_soc_dapm_widget wm8962_dapm_spk_mono_widgets
[] = {
690 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8962_MIXER_ENABLES
, 1, 0,
691 spkmixl
, ARRAY_SIZE(spkmixl
)),
692 SND_SOC_DAPM_MUX_E("Speaker PGA", WM8962_PWR_MGMT_2
, 4, 0, &spkoutl_mux
,
693 out_pga_event
, SND_SOC_DAPM_POST_PMU
),
694 SND_SOC_DAPM_PGA("Speaker Output", WM8962_CLASS_D_CONTROL_1
, 7, 0, NULL
, 0),
695 SND_SOC_DAPM_OUTPUT("SPKOUT"),
698 static const struct snd_soc_dapm_widget wm8962_dapm_spk_stereo_widgets
[] = {
699 SND_SOC_DAPM_MIXER("SPKOUTL Mixer", WM8962_MIXER_ENABLES
, 1, 0,
700 spkmixl
, ARRAY_SIZE(spkmixl
)),
701 SND_SOC_DAPM_MIXER("SPKOUTR Mixer", WM8962_MIXER_ENABLES
, 0, 0,
702 spkmixr
, ARRAY_SIZE(spkmixr
)),
704 SND_SOC_DAPM_MUX_E("SPKOUTL PGA", WM8962_PWR_MGMT_2
, 4, 0, &spkoutl_mux
,
705 out_pga_event
, SND_SOC_DAPM_POST_PMU
),
706 SND_SOC_DAPM_MUX_E("SPKOUTR PGA", WM8962_PWR_MGMT_2
, 3, 0, &spkoutr_mux
,
707 out_pga_event
, SND_SOC_DAPM_POST_PMU
),
709 SND_SOC_DAPM_PGA("SPKOUTR Output", WM8962_CLASS_D_CONTROL_1
, 7, 0, NULL
, 0),
710 SND_SOC_DAPM_PGA("SPKOUTL Output", WM8962_CLASS_D_CONTROL_1
, 6, 0, NULL
, 0),
712 SND_SOC_DAPM_OUTPUT("SPKOUTL"),
713 SND_SOC_DAPM_OUTPUT("SPKOUTR"),
716 static const struct snd_soc_dapm_route wm8962_intercon
[] = {
717 { "INPGAL", "IN1L Switch", "IN1L" },
718 { "INPGAL", "IN2L Switch", "IN2L" },
719 { "INPGAL", "IN3L Switch", "IN3L" },
720 { "INPGAL", "IN4L Switch", "IN4L" },
722 { "INPGAR", "IN1R Switch", "IN1R" },
723 { "INPGAR", "IN2R Switch", "IN2R" },
724 { "INPGAR", "IN3R Switch", "IN3R" },
725 { "INPGAR", "IN4R Switch", "IN4R" },
727 { "MIXINL", "IN2L Switch", "IN2L" },
728 { "MIXINL", "IN3L Switch", "IN3L" },
729 { "MIXINL", "PGA Switch", "INPGAL" },
731 { "MIXINR", "IN2R Switch", "IN2R" },
732 { "MIXINR", "IN3R Switch", "IN3R" },
733 { "MIXINR", "PGA Switch", "INPGAR" },
735 { "ADCL", NULL
, "SYSCLK" },
736 { "ADCL", NULL
, "TOCLK" },
737 { "ADCL", NULL
, "MIXINL" },
739 { "ADCR", NULL
, "SYSCLK" },
740 { "ADCR", NULL
, "TOCLK" },
741 { "ADCR", NULL
, "MIXINR" },
743 { "STL", "Left", "ADCL" },
744 { "STL", "Right", "ADCR" },
746 { "STR", "Left", "ADCL" },
747 { "STR", "Right", "ADCR" },
749 { "DACL", NULL
, "SYSCLK" },
750 { "DACL", NULL
, "TOCLK" },
751 { "DACL", NULL
, "Beep" },
752 { "DACL", NULL
, "STL" },
754 { "DACR", NULL
, "SYSCLK" },
755 { "DACR", NULL
, "TOCLK" },
756 { "DACR", NULL
, "Beep" },
757 { "DACR", NULL
, "STR" },
759 { "HPMIXL", "IN4L Switch", "IN4L" },
760 { "HPMIXL", "IN4R Switch", "IN4R" },
761 { "HPMIXL", "DACL Switch", "DACL" },
762 { "HPMIXL", "DACR Switch", "DACR" },
763 { "HPMIXL", "MIXINL Switch", "MIXINL" },
764 { "HPMIXL", "MIXINR Switch", "MIXINR" },
766 { "HPMIXR", "IN4L Switch", "IN4L" },
767 { "HPMIXR", "IN4R Switch", "IN4R" },
768 { "HPMIXR", "DACL Switch", "DACL" },
769 { "HPMIXR", "DACR Switch", "DACR" },
770 { "HPMIXR", "MIXINL Switch", "MIXINL" },
771 { "HPMIXR", "MIXINR Switch", "MIXINR" },
773 { "Left Bypass", NULL
, "HPMIXL" },
774 { "Left Bypass", NULL
, "Class G" },
776 { "Right Bypass", NULL
, "HPMIXR" },
777 { "Right Bypass", NULL
, "Class G" },
779 { "HPOUTL PGA", "Mixer", "Left Bypass" },
780 { "HPOUTL PGA", "DAC", "DACL" },
782 { "HPOUTR PGA", "Mixer", "Right Bypass" },
783 { "HPOUTR PGA", "DAC", "DACR" },
785 { "HPOUT", NULL
, "HPOUTL PGA" },
786 { "HPOUT", NULL
, "HPOUTR PGA" },
787 { "HPOUT", NULL
, "Charge Pump" },
788 { "HPOUT", NULL
, "SYSCLK" },
789 { "HPOUT", NULL
, "TOCLK" },
791 { "HPOUTL", NULL
, "HPOUT" },
792 { "HPOUTR", NULL
, "HPOUT" },
795 static const struct snd_soc_dapm_route wm8962_spk_mono_intercon
[] = {
796 { "Speaker Mixer", "IN4L Switch", "IN4L" },
797 { "Speaker Mixer", "IN4R Switch", "IN4R" },
798 { "Speaker Mixer", "DACL Switch", "DACL" },
799 { "Speaker Mixer", "DACR Switch", "DACR" },
800 { "Speaker Mixer", "MIXINL Switch", "MIXINL" },
801 { "Speaker Mixer", "MIXINR Switch", "MIXINR" },
803 { "Speaker PGA", "Mixer", "Speaker Mixer" },
804 { "Speaker PGA", "DAC", "DACL" },
806 { "Speaker Output", NULL
, "Speaker PGA" },
807 { "Speaker Output", NULL
, "SYSCLK" },
808 { "Speaker Output", NULL
, "TOCLK" },
810 { "SPKOUT", NULL
, "Speaker Output" },
813 static const struct snd_soc_dapm_route wm8962_spk_stereo_intercon
[] = {
814 { "SPKOUTL Mixer", "IN4L Switch", "IN4L" },
815 { "SPKOUTL Mixer", "IN4R Switch", "IN4R" },
816 { "SPKOUTL Mixer", "DACL Switch", "DACL" },
817 { "SPKOUTL Mixer", "DACR Switch", "DACR" },
818 { "SPKOUTL Mixer", "MIXINL Switch", "MIXINL" },
819 { "SPKOUTL Mixer", "MIXINR Switch", "MIXINR" },
821 { "SPKOUTR Mixer", "IN4L Switch", "IN4L" },
822 { "SPKOUTR Mixer", "IN4R Switch", "IN4R" },
823 { "SPKOUTR Mixer", "DACL Switch", "DACL" },
824 { "SPKOUTR Mixer", "DACR Switch", "DACR" },
825 { "SPKOUTR Mixer", "MIXINL Switch", "MIXINL" },
826 { "SPKOUTR Mixer", "MIXINR Switch", "MIXINR" },
828 { "SPKOUTL PGA", "Mixer", "SPKOUTL Mixer" },
829 { "SPKOUTL PGA", "DAC", "DACL" },
831 { "SPKOUTR PGA", "Mixer", "SPKOUTR Mixer" },
832 { "SPKOUTR PGA", "DAC", "DACR" },
834 { "SPKOUTL Output", NULL
, "SPKOUTL PGA" },
835 { "SPKOUTL Output", NULL
, "SYSCLK" },
836 { "SPKOUTL Output", NULL
, "TOCLK" },
838 { "SPKOUTR Output", NULL
, "SPKOUTR PGA" },
839 { "SPKOUTR Output", NULL
, "SYSCLK" },
840 { "SPKOUTR Output", NULL
, "TOCLK" },
842 { "SPKOUTL", NULL
, "SPKOUTL Output" },
843 { "SPKOUTR", NULL
, "SPKOUTR Output" },
846 static int wm8962_add_widgets(struct snd_soc_codec
*codec
)
848 struct wm8962_pdata
*pdata
= dev_get_platdata(codec
->dev
);
850 snd_soc_add_controls(codec
, wm8962_snd_controls
,
851 ARRAY_SIZE(wm8962_snd_controls
));
852 if (pdata
&& pdata
->spk_mono
)
853 snd_soc_add_controls(codec
, wm8962_spk_mono_controls
,
854 ARRAY_SIZE(wm8962_spk_mono_controls
));
856 snd_soc_add_controls(codec
, wm8962_spk_stereo_controls
,
857 ARRAY_SIZE(wm8962_spk_stereo_controls
));
860 snd_soc_dapm_new_controls(codec
, wm8962_dapm_widgets
,
861 ARRAY_SIZE(wm8962_dapm_widgets
));
862 if (pdata
&& pdata
->spk_mono
)
863 snd_soc_dapm_new_controls(codec
, wm8962_dapm_spk_mono_widgets
,
864 ARRAY_SIZE(wm8962_dapm_spk_mono_widgets
));
866 snd_soc_dapm_new_controls(codec
, wm8962_dapm_spk_stereo_widgets
,
867 ARRAY_SIZE(wm8962_dapm_spk_stereo_widgets
));
869 snd_soc_dapm_add_routes(codec
, wm8962_intercon
,
870 ARRAY_SIZE(wm8962_intercon
));
871 if (pdata
&& pdata
->spk_mono
)
872 snd_soc_dapm_add_routes(codec
, wm8962_spk_mono_intercon
,
873 ARRAY_SIZE(wm8962_spk_mono_intercon
));
875 snd_soc_dapm_add_routes(codec
, wm8962_spk_stereo_intercon
,
876 ARRAY_SIZE(wm8962_spk_stereo_intercon
));
879 snd_soc_dapm_disable_pin(codec
, "Beep");
884 static void wm8962_sync_cache(struct snd_soc_codec
*codec
)
886 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
889 if (!codec
->cache_sync
)
892 dev_dbg(codec
->dev
, "Syncing cache\n");
894 codec
->cache_only
= 0;
896 /* Sync back cached values if they're different from the
899 for (i
= 1; i
< ARRAY_SIZE(wm8962
->reg_cache
); i
++) {
900 if (i
== WM8962_SOFTWARE_RESET
)
902 if (wm8962
->reg_cache
[i
] == wm8962_reg
[i
])
905 snd_soc_write(codec
, i
, wm8962
->reg_cache
[i
]);
908 codec
->cache_sync
= 0;
911 /* -1 for reserved values */
912 static const int bclk_divs
[] = {
913 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32
916 static void wm8962_configure_bclk(struct snd_soc_codec
*codec
)
918 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
924 dev_dbg(codec
->dev
, "No BCLK rate configured\n");
928 dspclk
= snd_soc_read(codec
, WM8962_CLOCKING1
);
930 dev_err(codec
->dev
, "Failed to read DSPCLK: %d\n", dspclk
);
934 dspclk
= (dspclk
& WM8962_DSPCLK_DIV_MASK
) >> WM8962_DSPCLK_DIV_SHIFT
;
937 dspclk
= wm8962
->sysclk_rate
;
940 dspclk
= wm8962
->sysclk_rate
/ 2;
943 dspclk
= wm8962
->sysclk_rate
/ 4;
946 dev_warn(codec
->dev
, "Unknown DSPCLK divisor read back\n");
947 dspclk
= wm8962
->sysclk
;
950 dev_dbg(codec
->dev
, "DSPCLK is %dHz, BCLK %d\n", dspclk
, wm8962
->bclk
);
952 /* We're expecting an exact match */
953 for (i
= 0; i
< ARRAY_SIZE(bclk_divs
); i
++) {
954 if (bclk_divs
[i
] < 0)
957 if (dspclk
/ bclk_divs
[i
] == wm8962
->bclk
) {
958 dev_dbg(codec
->dev
, "Selected BCLK_DIV %d for %dHz\n",
959 bclk_divs
[i
], wm8962
->bclk
);
964 if (i
== ARRAY_SIZE(bclk_divs
)) {
965 dev_err(codec
->dev
, "Unsupported BCLK ratio %d\n",
966 dspclk
/ wm8962
->bclk
);
970 aif2
|= wm8962
->bclk
/ wm8962
->lrclk
;
971 dev_dbg(codec
->dev
, "Selected LRCLK divisor %d for %dHz\n",
972 wm8962
->bclk
/ wm8962
->lrclk
, wm8962
->lrclk
);
974 snd_soc_update_bits(codec
, WM8962_CLOCKING2
,
975 WM8962_BCLK_DIV_MASK
, clocking2
);
976 snd_soc_update_bits(codec
, WM8962_AUDIO_INTERFACE_2
,
977 WM8962_AIF_RATE_MASK
, aif2
);
980 static int wm8962_set_bias_level(struct snd_soc_codec
*codec
,
981 enum snd_soc_bias_level level
)
983 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
986 if (level
== codec
->bias_level
)
990 case SND_SOC_BIAS_ON
:
993 case SND_SOC_BIAS_PREPARE
:
995 snd_soc_update_bits(codec
, WM8962_PWR_MGMT_1
,
996 WM8962_VMID_SEL_MASK
, 0x80);
999 case SND_SOC_BIAS_STANDBY
:
1000 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1001 ret
= regulator_bulk_enable(ARRAY_SIZE(wm8962
->supplies
),
1005 "Failed to enable supplies: %d\n",
1010 wm8962_sync_cache(codec
);
1012 snd_soc_update_bits(codec
, WM8962_ANTI_POP
,
1013 WM8962_STARTUP_BIAS_ENA
|
1014 WM8962_VMID_BUF_ENA
,
1015 WM8962_STARTUP_BIAS_ENA
|
1016 WM8962_VMID_BUF_ENA
);
1018 /* Bias enable at 2*50k for ramp */
1019 snd_soc_update_bits(codec
, WM8962_PWR_MGMT_1
,
1020 WM8962_VMID_SEL_MASK
|
1022 WM8962_BIAS_ENA
| 0x180);
1026 snd_soc_update_bits(codec
, WM8962_CLOCKING2
,
1030 wm8962_configure_bclk(codec
);
1034 snd_soc_update_bits(codec
, WM8962_PWR_MGMT_1
,
1035 WM8962_VMID_SEL_MASK
, 0x100);
1038 case SND_SOC_BIAS_OFF
:
1039 snd_soc_update_bits(codec
, WM8962_PWR_MGMT_1
,
1040 WM8962_VMID_SEL_MASK
| WM8962_BIAS_ENA
, 0);
1042 snd_soc_update_bits(codec
, WM8962_ANTI_POP
,
1043 WM8962_STARTUP_BIAS_ENA
|
1044 WM8962_VMID_BUF_ENA
, 0);
1046 regulator_bulk_disable(ARRAY_SIZE(wm8962
->supplies
),
1050 codec
->bias_level
= level
;
1054 static const struct {
1071 static const int sysclk_rates
[] = {
1072 64, 128, 192, 256, 384, 512, 768, 1024, 1408, 1536,
1075 static int wm8962_hw_params(struct snd_pcm_substream
*substream
,
1076 struct snd_pcm_hw_params
*params
,
1077 struct snd_soc_dai
*dai
)
1079 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1080 struct snd_soc_codec
*codec
= rtd
->codec
;
1081 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1082 int rate
= params_rate(params
);
1088 wm8962
->bclk
= snd_soc_params_to_bclk(params
);
1089 wm8962
->lrclk
= params_rate(params
);
1091 for (i
= 0; i
< ARRAY_SIZE(sr_vals
); i
++) {
1092 if (sr_vals
[i
].rate
== rate
) {
1093 adctl3
|= sr_vals
[i
].reg
;
1097 if (i
== ARRAY_SIZE(sr_vals
)) {
1098 dev_err(codec
->dev
, "Unsupported rate %dHz\n", rate
);
1102 if (rate
% 8000 == 0)
1103 adctl3
|= WM8962_SAMPLE_RATE_INT_MODE
;
1105 for (i
= 0; i
< ARRAY_SIZE(sysclk_rates
); i
++) {
1106 if (sysclk_rates
[i
] == wm8962
->sysclk_rate
/ rate
) {
1107 clocking4
|= i
<< WM8962_SYSCLK_RATE_SHIFT
;
1111 if (i
== ARRAY_SIZE(sysclk_rates
)) {
1112 dev_err(codec
->dev
, "Unsupported sysclk ratio %d\n",
1113 wm8962
->sysclk_rate
/ rate
);
1117 switch (params_format(params
)) {
1118 case SNDRV_PCM_FORMAT_S16_LE
:
1120 case SNDRV_PCM_FORMAT_S20_3LE
:
1123 case SNDRV_PCM_FORMAT_S24_LE
:
1126 case SNDRV_PCM_FORMAT_S32_LE
:
1133 snd_soc_update_bits(codec
, WM8962_AUDIO_INTERFACE_0
,
1134 WM8962_WL_MASK
, aif0
);
1135 snd_soc_update_bits(codec
, WM8962_ADDITIONAL_CONTROL_3
,
1136 WM8962_SAMPLE_RATE_INT_MODE
|
1137 WM8962_SAMPLE_RATE_MASK
, adctl3
);
1138 snd_soc_update_bits(codec
, WM8962_CLOCKING_4
,
1139 WM8962_SYSCLK_RATE_MASK
, clocking4
);
1141 wm8962_configure_bclk(codec
);
1146 static int wm8962_set_dai_sysclk(struct snd_soc_dai
*dai
, int clk_id
,
1147 unsigned int freq
, int dir
)
1149 struct snd_soc_codec
*codec
= dai
->codec
;
1150 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1154 case WM8962_SYSCLK_MCLK
:
1155 wm8962
->sysclk
= WM8962_SYSCLK_MCLK
;
1158 case WM8962_SYSCLK_FLL
:
1159 wm8962
->sysclk
= WM8962_SYSCLK_FLL
;
1160 src
= 1 << WM8962_SYSCLK_SRC_SHIFT
;
1161 WARN_ON(freq
!= wm8962
->fll_fout
);
1167 snd_soc_update_bits(codec
, WM8962_CLOCKING2
, WM8962_SYSCLK_SRC_MASK
,
1170 wm8962
->sysclk_rate
= freq
;
1175 static int wm8962_set_dai_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
1177 struct snd_soc_codec
*codec
= dai
->codec
;
1180 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1181 case SND_SOC_DAIFMT_DSP_A
:
1182 aif0
|= WM8962_LRCLK_INV
;
1183 case SND_SOC_DAIFMT_DSP_B
:
1186 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1187 case SND_SOC_DAIFMT_NB_NF
:
1188 case SND_SOC_DAIFMT_IB_NF
:
1195 case SND_SOC_DAIFMT_RIGHT_J
:
1197 case SND_SOC_DAIFMT_LEFT_J
:
1200 case SND_SOC_DAIFMT_I2S
:
1207 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1208 case SND_SOC_DAIFMT_NB_NF
:
1210 case SND_SOC_DAIFMT_IB_NF
:
1211 aif0
|= WM8962_BCLK_INV
;
1213 case SND_SOC_DAIFMT_NB_IF
:
1214 aif0
|= WM8962_LRCLK_INV
;
1216 case SND_SOC_DAIFMT_IB_IF
:
1217 aif0
|= WM8962_BCLK_INV
| WM8962_LRCLK_INV
;
1223 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1224 case SND_SOC_DAIFMT_CBM_CFM
:
1225 aif0
|= WM8962_MSTR
;
1227 case SND_SOC_DAIFMT_CBS_CFS
:
1233 snd_soc_update_bits(codec
, WM8962_AUDIO_INTERFACE_0
,
1234 WM8962_FMT_MASK
| WM8962_BCLK_INV
| WM8962_MSTR
|
1235 WM8962_LRCLK_INV
, aif0
);
1249 /* The size in bits of the FLL divide multiplied by 10
1250 * to allow rounding later */
1251 #define FIXED_FLL_SIZE ((1 << 16) * 10)
1259 { 0, 64000, 4, 16 },
1260 { 64000, 128000, 3, 8 },
1261 { 128000, 256000, 2, 4 },
1262 { 256000, 1000000, 1, 2 },
1263 { 1000000, 13500000, 0, 1 },
1266 static int fll_factors(struct _fll_div
*fll_div
, unsigned int Fref
,
1269 unsigned int target
;
1271 unsigned int fratio
, gcd_fll
;
1274 /* Fref must be <=13.5MHz */
1276 fll_div
->fll_refclk_div
= 0;
1277 while ((Fref
/ div
) > 13500000) {
1279 fll_div
->fll_refclk_div
++;
1282 pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
1288 pr_debug("FLL Fref=%u Fout=%u\n", Fref
, Fout
);
1290 /* Apply the division for our remaining calculations */
1293 /* Fvco should be 90-100MHz; don't check the upper bound */
1295 while (Fout
* div
< 90000000) {
1298 pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
1303 target
= Fout
* div
;
1304 fll_div
->fll_outdiv
= div
- 1;
1306 pr_debug("FLL Fvco=%dHz\n", target
);
1308 /* Find an appropraite FLL_FRATIO and factor it out of the target */
1309 for (i
= 0; i
< ARRAY_SIZE(fll_fratios
); i
++) {
1310 if (fll_fratios
[i
].min
<= Fref
&& Fref
<= fll_fratios
[i
].max
) {
1311 fll_div
->fll_fratio
= fll_fratios
[i
].fll_fratio
;
1312 fratio
= fll_fratios
[i
].ratio
;
1316 if (i
== ARRAY_SIZE(fll_fratios
)) {
1317 pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref
);
1321 fll_div
->n
= target
/ (fratio
* Fref
);
1323 if (target
% Fref
== 0) {
1325 fll_div
->lambda
= 0;
1327 gcd_fll
= gcd(target
, fratio
* Fref
);
1329 fll_div
->theta
= (target
- (fll_div
->n
* fratio
* Fref
))
1331 fll_div
->lambda
= (fratio
* Fref
) / gcd_fll
;
1334 pr_debug("FLL N=%x THETA=%x LAMBDA=%x\n",
1335 fll_div
->n
, fll_div
->theta
, fll_div
->lambda
);
1336 pr_debug("FLL_FRATIO=%x FLL_OUTDIV=%x FLL_REFCLK_DIV=%x\n",
1337 fll_div
->fll_fratio
, fll_div
->fll_outdiv
,
1338 fll_div
->fll_refclk_div
);
1343 static int wm8962_set_fll(struct snd_soc_dai
*dai
, int fll_id
, int source
,
1344 unsigned int Fref
, unsigned int Fout
)
1346 struct snd_soc_codec
*codec
= dai
->codec
;
1347 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1348 struct _fll_div fll_div
;
1350 int fll1
= snd_soc_read(codec
, WM8962_FLL_CONTROL_1
) & WM8962_FLL_ENA
;
1353 if (source
== wm8962
->fll_src
&& Fref
== wm8962
->fll_fref
&&
1354 Fout
== wm8962
->fll_fout
)
1358 dev_dbg(codec
->dev
, "FLL disabled\n");
1360 wm8962
->fll_fref
= 0;
1361 wm8962
->fll_fout
= 0;
1363 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
,
1369 ret
= fll_factors(&fll_div
, Fref
, Fout
);
1374 case WM8962_FLL_MCLK
:
1375 case WM8962_FLL_BCLK
:
1376 case WM8962_FLL_OSC
:
1377 fll1
|= (fll_id
- 1) << WM8962_FLL_REFCLK_SRC_SHIFT
;
1379 case WM8962_FLL_INT
:
1380 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
,
1381 WM8962_FLL_OSC_ENA
, WM8962_FLL_OSC_ENA
);
1382 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_5
,
1383 WM8962_FLL_FRC_NCO
, WM8962_FLL_FRC_NCO
);
1386 dev_err(codec
->dev
, "Unknown FLL source %d\n", ret
);
1390 if (fll_div
.theta
|| fll_div
.lambda
)
1391 fll1
|= WM8962_FLL_FRAC
;
1393 /* Stop the FLL while we reconfigure */
1394 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
, WM8962_FLL_ENA
, 0);
1396 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_2
,
1397 WM8962_FLL_OUTDIV_MASK
|
1398 WM8962_FLL_REFCLK_DIV_MASK
,
1399 (fll_div
.fll_outdiv
<< WM8962_FLL_OUTDIV_SHIFT
) |
1400 (fll_div
.fll_refclk_div
));
1402 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_3
,
1403 WM8962_FLL_FRATIO_MASK
, fll_div
.fll_fratio
);
1405 snd_soc_write(codec
, WM8962_FLL_CONTROL_6
, fll_div
.theta
);
1406 snd_soc_write(codec
, WM8962_FLL_CONTROL_7
, fll_div
.lambda
);
1407 snd_soc_write(codec
, WM8962_FLL_CONTROL_8
, fll_div
.n
);
1409 snd_soc_update_bits(codec
, WM8962_FLL_CONTROL_1
,
1410 WM8962_FLL_FRAC
| WM8962_FLL_REFCLK_SRC_MASK
|
1411 WM8962_FLL_ENA
, fll1
);
1413 dev_dbg(codec
->dev
, "FLL configured for %dHz->%dHz\n", Fref
, Fout
);
1415 wm8962
->fll_fref
= Fref
;
1416 wm8962
->fll_fout
= Fout
;
1417 wm8962
->fll_src
= source
;
1422 static int wm8962_mute(struct snd_soc_dai
*dai
, int mute
)
1424 struct snd_soc_codec
*codec
= dai
->codec
;
1428 val
= WM8962_DAC_MUTE
;
1432 return snd_soc_update_bits(codec
, WM8962_ADC_DAC_CONTROL_1
,
1433 WM8962_DAC_MUTE
, val
);
1436 #define WM8962_RATES SNDRV_PCM_RATE_8000_96000
1438 #define WM8962_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1439 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1441 static struct snd_soc_dai_ops wm8962_dai_ops
= {
1442 .hw_params
= wm8962_hw_params
,
1443 .set_sysclk
= wm8962_set_dai_sysclk
,
1444 .set_fmt
= wm8962_set_dai_fmt
,
1445 .set_pll
= wm8962_set_fll
,
1446 .digital_mute
= wm8962_mute
,
1449 static struct snd_soc_dai_driver wm8962_dai
= {
1452 .stream_name
= "Playback",
1455 .rates
= WM8962_RATES
,
1456 .formats
= WM8962_FORMATS
,
1459 .stream_name
= "Capture",
1462 .rates
= WM8962_RATES
,
1463 .formats
= WM8962_FORMATS
,
1465 .ops
= &wm8962_dai_ops
,
1466 .symmetric_rates
= 1,
1469 static void wm8962_mic_work(struct work_struct
*work
)
1471 struct wm8962_priv
*wm8962
= container_of(work
,
1474 struct snd_soc_codec
*codec
= wm8962
->codec
;
1479 reg
= snd_soc_read(codec
, WM8962_ADDITIONAL_CONTROL_4
);
1481 if (reg
& WM8962_MICDET_STS
) {
1482 status
|= SND_JACK_MICROPHONE
;
1483 irq_pol
|= WM8962_MICD_IRQ_POL
;
1486 if (reg
& WM8962_MICSHORT_STS
) {
1487 status
|= SND_JACK_BTN_0
;
1488 irq_pol
|= WM8962_MICSCD_IRQ_POL
;
1491 snd_soc_jack_report(wm8962
->jack
, status
,
1492 SND_JACK_MICROPHONE
| SND_JACK_BTN_0
);
1494 snd_soc_update_bits(codec
, WM8962_MICINT_SOURCE_POL
,
1495 WM8962_MICSCD_IRQ_POL
|
1496 WM8962_MICD_IRQ_POL
, irq_pol
);
1499 static irqreturn_t
wm8962_irq(int irq
, void *data
)
1501 struct snd_soc_codec
*codec
= data
;
1502 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1506 mask
= snd_soc_read(codec
, WM8962_INTERRUPT_STATUS_2
);
1508 active
= snd_soc_read(codec
, WM8962_INTERRUPT_STATUS_2
);
1511 if (active
& WM8962_FIFOS_ERR_EINT
)
1512 dev_err(codec
->dev
, "FIFO error\n");
1514 if (active
& WM8962_TEMP_SHUT_EINT
)
1515 dev_crit(codec
->dev
, "Thermal shutdown\n");
1517 if (active
& (WM8962_MICSCD_EINT
| WM8962_MICD_EINT
)) {
1518 dev_dbg(codec
->dev
, "Microphone event detected\n");
1520 schedule_delayed_work(&wm8962
->mic_work
,
1521 msecs_to_jiffies(250));
1524 /* Acknowledge the interrupts */
1525 snd_soc_write(codec
, WM8962_INTERRUPT_STATUS_2
, active
);
1531 * wm8962_mic_detect - Enable microphone detection via the WM8962 IRQ
1533 * @codec: WM8962 codec
1534 * @jack: jack to report detection events on
1536 * Enable microphone detection via IRQ on the WM8962. If GPIOs are
1537 * being used to bring out signals to the processor then only platform
1538 * data configuration is needed for WM8962 and processor GPIOs should
1539 * be configured using snd_soc_jack_add_gpios() instead.
1541 * If no jack is supplied detection will be disabled.
1543 int wm8962_mic_detect(struct snd_soc_codec
*codec
, struct snd_soc_jack
*jack
)
1545 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1546 int irq_mask
, enable
;
1548 wm8962
->jack
= jack
;
1551 enable
= WM8962_MICDET_ENA
;
1553 irq_mask
= WM8962_MICD_EINT
| WM8962_MICSCD_EINT
;
1557 snd_soc_update_bits(codec
, WM8962_INTERRUPT_STATUS_2_MASK
,
1558 WM8962_MICD_EINT
| WM8962_MICSCD_EINT
, irq_mask
);
1559 snd_soc_update_bits(codec
, WM8962_ADDITIONAL_CONTROL_4
,
1560 WM8962_MICDET_ENA
, enable
);
1562 /* Send an initial empty report */
1563 snd_soc_jack_report(wm8962
->jack
, 0,
1564 SND_JACK_MICROPHONE
| SND_JACK_BTN_0
);
1568 EXPORT_SYMBOL_GPL(wm8962_mic_detect
);
1571 static int wm8962_resume(struct snd_soc_codec
*codec
)
1573 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1574 u16
*reg_cache
= codec
->reg_cache
;
1577 /* Restore the registers */
1578 for (i
= 1; i
< ARRAY_SIZE(wm8962
->reg_cache
); i
++) {
1580 case WM8962_SOFTWARE_RESET
:
1586 if (reg_cache
[i
] != wm8962_reg
[i
])
1587 snd_soc_write(codec
, i
, reg_cache
[i
]);
1593 #define wm8962_resume NULL
1596 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
1597 static int beep_rates
[] = {
1598 500, 1000, 2000, 4000,
1601 static void wm8962_beep_work(struct work_struct
*work
)
1603 struct wm8962_priv
*wm8962
=
1604 container_of(work
, struct wm8962_priv
, beep_work
);
1605 struct snd_soc_codec
*codec
= wm8962
->codec
;
1610 if (wm8962
->beep_rate
) {
1611 for (i
= 0; i
< ARRAY_SIZE(beep_rates
); i
++) {
1612 if (abs(wm8962
->beep_rate
- beep_rates
[i
]) <
1613 abs(wm8962
->beep_rate
- beep_rates
[best
]))
1617 dev_dbg(codec
->dev
, "Set beep rate %dHz for requested %dHz\n",
1618 beep_rates
[best
], wm8962
->beep_rate
);
1620 reg
= WM8962_BEEP_ENA
| (best
<< WM8962_BEEP_RATE_SHIFT
);
1622 snd_soc_dapm_enable_pin(codec
, "Beep");
1624 dev_dbg(codec
->dev
, "Disabling beep\n");
1625 snd_soc_dapm_disable_pin(codec
, "Beep");
1628 snd_soc_update_bits(codec
, WM8962_BEEP_GENERATOR_1
,
1629 WM8962_BEEP_ENA
| WM8962_BEEP_RATE_MASK
, reg
);
1631 snd_soc_dapm_sync(codec
);
1634 /* For usability define a way of injecting beep events for the device -
1635 * many systems will not have a keyboard.
1637 static int wm8962_beep_event(struct input_dev
*dev
, unsigned int type
,
1638 unsigned int code
, int hz
)
1640 struct snd_soc_codec
*codec
= input_get_drvdata(dev
);
1641 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1643 dev_dbg(codec
->dev
, "Beep event %x %x\n", code
, hz
);
1655 /* Kick the beep from a workqueue */
1656 wm8962
->beep_rate
= hz
;
1657 schedule_work(&wm8962
->beep_work
);
1661 static ssize_t
wm8962_beep_set(struct device
*dev
,
1662 struct device_attribute
*attr
,
1663 const char *buf
, size_t count
)
1665 struct wm8962_priv
*wm8962
= dev_get_drvdata(dev
);
1668 strict_strtol(buf
, 10, &time
);
1670 input_event(wm8962
->beep
, EV_SND
, SND_TONE
, time
);
1675 static DEVICE_ATTR(beep
, 0200, NULL
, wm8962_beep_set
);
1677 static void wm8962_init_beep(struct snd_soc_codec
*codec
)
1679 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1682 wm8962
->beep
= input_allocate_device();
1683 if (!wm8962
->beep
) {
1684 dev_err(codec
->dev
, "Failed to allocate beep device\n");
1688 INIT_WORK(&wm8962
->beep_work
, wm8962_beep_work
);
1689 wm8962
->beep_rate
= 0;
1691 wm8962
->beep
->name
= "WM8962 Beep Generator";
1692 wm8962
->beep
->phys
= dev_name(codec
->dev
);
1693 wm8962
->beep
->id
.bustype
= BUS_I2C
;
1695 wm8962
->beep
->evbit
[0] = BIT_MASK(EV_SND
);
1696 wm8962
->beep
->sndbit
[0] = BIT_MASK(SND_BELL
) | BIT_MASK(SND_TONE
);
1697 wm8962
->beep
->event
= wm8962_beep_event
;
1698 wm8962
->beep
->dev
.parent
= codec
->dev
;
1699 input_set_drvdata(wm8962
->beep
, codec
);
1701 ret
= input_register_device(wm8962
->beep
);
1703 input_free_device(wm8962
->beep
);
1704 wm8962
->beep
= NULL
;
1705 dev_err(codec
->dev
, "Failed to register beep device\n");
1708 ret
= device_create_file(codec
->dev
, &dev_attr_beep
);
1710 dev_err(codec
->dev
, "Failed to create keyclick file: %d\n",
1715 static void wm8962_free_beep(struct snd_soc_codec
*codec
)
1717 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1719 device_remove_file(codec
->dev
, &dev_attr_beep
);
1720 input_unregister_device(wm8962
->beep
);
1721 cancel_work_sync(&wm8962
->beep_work
);
1722 wm8962
->beep
= NULL
;
1724 snd_soc_update_bits(codec
, WM8962_BEEP_GENERATOR_1
, WM8962_BEEP_ENA
,0);
1727 static void wm8962_init_beep(struct snd_soc_codec
*codec
)
1731 static void wm8962_free_beep(struct snd_soc_codec
*codec
)
1736 #ifdef CONFIG_GPIOLIB
1737 static inline struct wm8962_priv
*gpio_to_wm8962(struct gpio_chip
*chip
)
1739 return container_of(chip
, struct wm8962_priv
, gpio_chip
);
1742 static int wm8962_gpio_request(struct gpio_chip
*chip
, unsigned offset
)
1744 struct wm8962_priv
*wm8962
= gpio_to_wm8962(chip
);
1745 struct snd_soc_codec
*codec
= wm8962
->codec
;
1749 /* The WM8962 GPIOs aren't linearly numbered. For simplicity
1750 * we export linear numbers and error out if the unsupported
1751 * ones are requsted.
1753 switch (offset
+ 1) {
1755 mask
= WM8962_CLKOUT2_SEL_MASK
;
1756 val
= 1 << WM8962_CLKOUT2_SEL_SHIFT
;
1759 mask
= WM8962_CLKOUT3_SEL_MASK
;
1760 val
= 1 << WM8962_CLKOUT3_SEL_SHIFT
;
1769 /* Some of the GPIOs are behind MFP configuration */
1771 snd_soc_update_bits(codec
, WM8962_ANALOGUE_CLOCKING1
,
1777 static void wm8962_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
1779 struct wm8962_priv
*wm8962
= gpio_to_wm8962(chip
);
1780 struct snd_soc_codec
*codec
= wm8962
->codec
;
1782 snd_soc_update_bits(codec
, WM8962_GPIO_BASE
+ offset
,
1783 WM8962_GP2_LVL
, value
<< WM8962_GP2_LVL_SHIFT
);
1786 static int wm8962_gpio_direction_out(struct gpio_chip
*chip
,
1787 unsigned offset
, int value
)
1789 struct wm8962_priv
*wm8962
= gpio_to_wm8962(chip
);
1790 struct snd_soc_codec
*codec
= wm8962
->codec
;
1793 /* Force function 1 (logic output) */
1794 val
= (1 << WM8962_GP2_FN_SHIFT
) | (value
<< WM8962_GP2_LVL_SHIFT
);
1796 return snd_soc_update_bits(codec
, WM8962_GPIO_BASE
+ offset
,
1797 WM8962_GP2_FN_MASK
| WM8962_GP2_LVL
, val
);
1800 static struct gpio_chip wm8962_template_chip
= {
1802 .owner
= THIS_MODULE
,
1803 .request
= wm8962_gpio_request
,
1804 .direction_output
= wm8962_gpio_direction_out
,
1805 .set
= wm8962_gpio_set
,
1809 static void wm8962_init_gpio(struct snd_soc_codec
*codec
)
1811 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1812 struct wm8962_pdata
*pdata
= dev_get_platdata(codec
->dev
);
1815 wm8962
->gpio_chip
= wm8962_template_chip
;
1816 wm8962
->gpio_chip
.ngpio
= WM8962_MAX_GPIO
;
1817 wm8962
->gpio_chip
.dev
= codec
->dev
;
1819 if (pdata
&& pdata
->gpio_base
)
1820 wm8962
->gpio_chip
.base
= pdata
->gpio_base
;
1822 wm8962
->gpio_chip
.base
= -1;
1824 ret
= gpiochip_add(&wm8962
->gpio_chip
);
1826 dev_err(codec
->dev
, "Failed to add GPIOs: %d\n", ret
);
1829 static void wm8962_free_gpio(struct snd_soc_codec
*codec
)
1831 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1834 ret
= gpiochip_remove(&wm8962
->gpio_chip
);
1836 dev_err(codec
->dev
, "Failed to remove GPIOs: %d\n", ret
);
1839 static void wm8962_init_gpio(struct snd_soc_codec
*codec
)
1843 static void wm8962_free_gpio(struct snd_soc_codec
*codec
)
1848 static int wm8962_probe(struct snd_soc_codec
*codec
)
1851 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
1852 struct wm8962_pdata
*pdata
= dev_get_platdata(codec
->dev
);
1853 struct i2c_client
*i2c
= container_of(codec
->dev
, struct i2c_client
,
1855 int i
, trigger
, irq_pol
;
1857 wm8962
->codec
= codec
;
1858 INIT_DELAYED_WORK(&wm8962
->mic_work
, wm8962_mic_work
);
1860 codec
->cache_sync
= 1;
1861 codec
->idle_bias_off
= 1;
1863 ret
= snd_soc_codec_set_cache_io(codec
, 16, 16, SND_SOC_I2C
);
1865 dev_err(codec
->dev
, "Failed to set cache I/O: %d\n", ret
);
1869 for (i
= 0; i
< ARRAY_SIZE(wm8962
->supplies
); i
++)
1870 wm8962
->supplies
[i
].supply
= wm8962_supply_names
[i
];
1872 ret
= regulator_bulk_get(codec
->dev
, ARRAY_SIZE(wm8962
->supplies
),
1875 dev_err(codec
->dev
, "Failed to request supplies: %d\n", ret
);
1879 wm8962
->disable_nb
[0].notifier_call
= wm8962_regulator_event_0
;
1880 wm8962
->disable_nb
[1].notifier_call
= wm8962_regulator_event_1
;
1881 wm8962
->disable_nb
[2].notifier_call
= wm8962_regulator_event_2
;
1882 wm8962
->disable_nb
[3].notifier_call
= wm8962_regulator_event_3
;
1883 wm8962
->disable_nb
[4].notifier_call
= wm8962_regulator_event_4
;
1884 wm8962
->disable_nb
[5].notifier_call
= wm8962_regulator_event_5
;
1885 wm8962
->disable_nb
[6].notifier_call
= wm8962_regulator_event_6
;
1886 wm8962
->disable_nb
[7].notifier_call
= wm8962_regulator_event_7
;
1888 /* This should really be moved into the regulator core */
1889 for (i
= 0; i
< ARRAY_SIZE(wm8962
->supplies
); i
++) {
1890 ret
= regulator_register_notifier(wm8962
->supplies
[i
].consumer
,
1891 &wm8962
->disable_nb
[i
]);
1894 "Failed to register regulator notifier: %d\n",
1899 ret
= regulator_bulk_enable(ARRAY_SIZE(wm8962
->supplies
),
1902 dev_err(codec
->dev
, "Failed to enable supplies: %d\n", ret
);
1906 ret
= snd_soc_read(codec
, WM8962_SOFTWARE_RESET
);
1908 dev_err(codec
->dev
, "Failed to read ID register\n");
1911 if (ret
!= wm8962_reg
[WM8962_SOFTWARE_RESET
]) {
1912 dev_err(codec
->dev
, "Device is not a WM8962, ID %x != %x\n",
1913 ret
, wm8962_reg
[WM8962_SOFTWARE_RESET
]);
1918 ret
= snd_soc_read(codec
, WM8962_RIGHT_INPUT_VOLUME
);
1920 dev_err(codec
->dev
, "Failed to read device revision: %d\n",
1925 dev_info(codec
->dev
, "customer id %x revision %c\n",
1926 (ret
& WM8962_CUST_ID_MASK
) >> WM8962_CUST_ID_SHIFT
,
1927 ((ret
& WM8962_CHIP_REV_MASK
) >> WM8962_CHIP_REV_SHIFT
)
1930 ret
= wm8962_reset(codec
);
1932 dev_err(codec
->dev
, "Failed to issue reset\n");
1936 /* SYSCLK defaults to on; make sure it is off so we can safely
1937 * write to registers if the device is declocked.
1939 snd_soc_update_bits(codec
, WM8962_CLOCKING2
, WM8962_SYSCLK_ENA
, 0);
1941 regulator_bulk_disable(ARRAY_SIZE(wm8962
->supplies
), wm8962
->supplies
);
1944 /* Apply static configuration for GPIOs */
1945 for (i
= 0; i
< ARRAY_SIZE(pdata
->gpio_init
); i
++)
1946 if (pdata
->gpio_init
[i
])
1947 snd_soc_write(codec
, 0x200 + i
,
1948 pdata
->gpio_init
[i
] & 0xffff);
1950 /* Put the speakers into mono mode? */
1951 if (pdata
->spk_mono
)
1952 wm8962
->reg_cache
[WM8962_CLASS_D_CONTROL_2
]
1955 /* Micbias setup, detection enable and detection
1958 snd_soc_update_bits(codec
, WM8962_ADDITIONAL_CONTROL_4
,
1960 WM8962_MICDET_THR_MASK
|
1961 WM8962_MICSHORT_THR_MASK
|
1966 /* Latch volume update bits */
1967 wm8962
->reg_cache
[WM8962_LEFT_INPUT_VOLUME
] |= WM8962_IN_VU
;
1968 wm8962
->reg_cache
[WM8962_RIGHT_INPUT_VOLUME
] |= WM8962_IN_VU
;
1969 wm8962
->reg_cache
[WM8962_LEFT_ADC_VOLUME
] |= WM8962_ADC_VU
;
1970 wm8962
->reg_cache
[WM8962_RIGHT_ADC_VOLUME
] |= WM8962_ADC_VU
;
1971 wm8962
->reg_cache
[WM8962_LEFT_DAC_VOLUME
] |= WM8962_DAC_VU
;
1972 wm8962
->reg_cache
[WM8962_RIGHT_DAC_VOLUME
] |= WM8962_DAC_VU
;
1973 wm8962
->reg_cache
[WM8962_SPKOUTL_VOLUME
] |= WM8962_SPKOUT_VU
;
1974 wm8962
->reg_cache
[WM8962_SPKOUTR_VOLUME
] |= WM8962_SPKOUT_VU
;
1975 wm8962
->reg_cache
[WM8962_HPOUTL_VOLUME
] |= WM8962_HPOUT_VU
;
1976 wm8962
->reg_cache
[WM8962_HPOUTR_VOLUME
] |= WM8962_HPOUT_VU
;
1978 wm8962_add_widgets(codec
);
1980 wm8962_init_beep(codec
);
1981 wm8962_init_gpio(codec
);
1984 if (pdata
&& pdata
->irq_active_low
) {
1985 trigger
= IRQF_TRIGGER_LOW
;
1986 irq_pol
= WM8962_IRQ_POL
;
1988 trigger
= IRQF_TRIGGER_HIGH
;
1992 snd_soc_update_bits(codec
, WM8962_INTERRUPT_CONTROL
,
1993 WM8962_IRQ_POL
, irq_pol
);
1995 ret
= request_threaded_irq(i2c
->irq
, NULL
, wm8962_irq
,
1996 trigger
| IRQF_ONESHOT
,
1999 dev_err(codec
->dev
, "Failed to request IRQ %d: %d\n",
2003 /* Enable error reporting IRQs by default */
2004 snd_soc_update_bits(codec
,
2005 WM8962_INTERRUPT_STATUS_2_MASK
,
2006 WM8962_TEMP_SHUT_EINT
|
2007 WM8962_FIFOS_ERR_EINT
, 0);
2014 regulator_bulk_disable(ARRAY_SIZE(wm8962
->supplies
), wm8962
->supplies
);
2016 regulator_bulk_free(ARRAY_SIZE(wm8962
->supplies
), wm8962
->supplies
);
2022 static int wm8962_remove(struct snd_soc_codec
*codec
)
2024 struct wm8962_priv
*wm8962
= snd_soc_codec_get_drvdata(codec
);
2025 struct i2c_client
*i2c
= container_of(codec
->dev
, struct i2c_client
,
2030 free_irq(i2c
->irq
, codec
);
2032 cancel_delayed_work_sync(&wm8962
->mic_work
);
2034 wm8962_free_gpio(codec
);
2035 wm8962_free_beep(codec
);
2036 for (i
= 0; i
< ARRAY_SIZE(wm8962
->supplies
); i
++)
2037 regulator_unregister_notifier(wm8962
->supplies
[i
].consumer
,
2038 &wm8962
->disable_nb
[i
]);
2039 regulator_bulk_free(ARRAY_SIZE(wm8962
->supplies
), wm8962
->supplies
);
2044 static struct snd_soc_codec_driver soc_codec_dev_wm8962
= {
2045 .probe
= wm8962_probe
,
2046 .remove
= wm8962_remove
,
2047 .resume
= wm8962_resume
,
2048 .set_bias_level
= wm8962_set_bias_level
,
2049 .reg_cache_size
= WM8962_MAX_REGISTER
+ 1,
2050 .reg_word_size
= sizeof(u16
),
2051 .reg_cache_default
= wm8962_reg
,
2052 .volatile_register
= wm8962_volatile_register
,
2053 .readable_register
= wm8962_readable_register
,
2056 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
2057 static __devinit
int wm8962_i2c_probe(struct i2c_client
*i2c
,
2058 const struct i2c_device_id
*id
)
2060 struct wm8962_priv
*wm8962
;
2063 wm8962
= kzalloc(sizeof(struct wm8962_priv
), GFP_KERNEL
);
2067 i2c_set_clientdata(i2c
, wm8962
);
2069 ret
= snd_soc_register_codec(&i2c
->dev
,
2070 &soc_codec_dev_wm8962
, &wm8962_dai
, 1);
2077 static __devexit
int wm8962_i2c_remove(struct i2c_client
*client
)
2079 snd_soc_unregister_codec(&client
->dev
);
2080 kfree(i2c_get_clientdata(client
));
2084 static const struct i2c_device_id wm8962_i2c_id
[] = {
2088 MODULE_DEVICE_TABLE(i2c
, wm8962_i2c_id
);
2090 static struct i2c_driver wm8962_i2c_driver
= {
2093 .owner
= THIS_MODULE
,
2095 .probe
= wm8962_i2c_probe
,
2096 .remove
= __devexit_p(wm8962_i2c_remove
),
2097 .id_table
= wm8962_i2c_id
,
2101 static int __init
wm8962_modinit(void)
2104 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
2105 ret
= i2c_add_driver(&wm8962_i2c_driver
);
2107 printk(KERN_ERR
"Failed to register WM8962 I2C driver: %d\n",
2113 module_init(wm8962_modinit
);
2115 static void __exit
wm8962_exit(void)
2117 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
2118 i2c_del_driver(&wm8962_i2c_driver
);
2121 module_exit(wm8962_exit
);
2123 MODULE_DESCRIPTION("ASoC WM8962 driver");
2124 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
2125 MODULE_LICENSE("GPL");