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git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - sound/soc/codecs/wm8974.h
2 * wm8974.h -- WM8974 Soc Audio driver
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
12 /* WM8974 register space */
14 #define WM8974_RESET 0x0
15 #define WM8974_POWER1 0x1
16 #define WM8974_POWER2 0x2
17 #define WM8974_POWER3 0x3
18 #define WM8974_IFACE 0x4
19 #define WM8974_COMP 0x5
20 #define WM8974_CLOCK 0x6
21 #define WM8974_ADD 0x7
22 #define WM8974_GPIO 0x8
23 #define WM8974_DAC 0xa
24 #define WM8974_DACVOL 0xb
25 #define WM8974_ADC 0xe
26 #define WM8974_ADCVOL 0xf
27 #define WM8974_EQ1 0x12
28 #define WM8974_EQ2 0x13
29 #define WM8974_EQ3 0x14
30 #define WM8974_EQ4 0x15
31 #define WM8974_EQ5 0x16
32 #define WM8974_DACLIM1 0x18
33 #define WM8974_DACLIM2 0x19
34 #define WM8974_NOTCH1 0x1b
35 #define WM8974_NOTCH2 0x1c
36 #define WM8974_NOTCH3 0x1d
37 #define WM8974_NOTCH4 0x1e
38 #define WM8974_ALC1 0x20
39 #define WM8974_ALC2 0x21
40 #define WM8974_ALC3 0x22
41 #define WM8974_NGATE 0x23
42 #define WM8974_PLLN 0x24
43 #define WM8974_PLLK1 0x25
44 #define WM8974_PLLK2 0x26
45 #define WM8974_PLLK3 0x27
46 #define WM8974_ATTEN 0x28
47 #define WM8974_INPUT 0x2c
48 #define WM8974_INPPGA 0x2d
49 #define WM8974_ADCBOOST 0x2f
50 #define WM8974_OUTPUT 0x31
51 #define WM8974_SPKMIX 0x32
52 #define WM8974_SPKVOL 0x36
53 #define WM8974_MONOMIX 0x38
55 #define WM8974_CACHEREGNUM 57
57 /* Clock divider Id's */
58 #define WM8974_OPCLKDIV 0
59 #define WM8974_MCLKDIV 1
60 #define WM8974_BCLKDIV 2
62 /* PLL Out dividers */
63 #define WM8974_OPCLKDIV_1 (0 << 4)
64 #define WM8974_OPCLKDIV_2 (1 << 4)
65 #define WM8974_OPCLKDIV_3 (2 << 4)
66 #define WM8974_OPCLKDIV_4 (3 << 4)
68 /* BCLK clock dividers */
69 #define WM8974_BCLKDIV_1 (0 << 2)
70 #define WM8974_BCLKDIV_2 (1 << 2)
71 #define WM8974_BCLKDIV_4 (2 << 2)
72 #define WM8974_BCLKDIV_8 (3 << 2)
73 #define WM8974_BCLKDIV_16 (4 << 2)
74 #define WM8974_BCLKDIV_32 (5 << 2)
76 /* MCLK clock dividers */
77 #define WM8974_MCLKDIV_1 (0 << 5)
78 #define WM8974_MCLKDIV_1_5 (1 << 5)
79 #define WM8974_MCLKDIV_2 (2 << 5)
80 #define WM8974_MCLKDIV_3 (3 << 5)
81 #define WM8974_MCLKDIV_4 (4 << 5)
82 #define WM8974_MCLKDIV_6 (5 << 5)
83 #define WM8974_MCLKDIV_8 (6 << 5)
84 #define WM8974_MCLKDIV_12 (7 << 5)