2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
37 #define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39 #define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41 #define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43 #define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45 #define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define ADSP1_CONTROL_1 0x00
49 #define ADSP1_CONTROL_2 0x02
50 #define ADSP1_CONTROL_3 0x03
51 #define ADSP1_CONTROL_4 0x04
52 #define ADSP1_CONTROL_5 0x06
53 #define ADSP1_CONTROL_6 0x07
54 #define ADSP1_CONTROL_7 0x08
55 #define ADSP1_CONTROL_8 0x09
56 #define ADSP1_CONTROL_9 0x0A
57 #define ADSP1_CONTROL_10 0x0B
58 #define ADSP1_CONTROL_11 0x0C
59 #define ADSP1_CONTROL_12 0x0D
60 #define ADSP1_CONTROL_13 0x0F
61 #define ADSP1_CONTROL_14 0x10
62 #define ADSP1_CONTROL_15 0x11
63 #define ADSP1_CONTROL_16 0x12
64 #define ADSP1_CONTROL_17 0x13
65 #define ADSP1_CONTROL_18 0x14
66 #define ADSP1_CONTROL_19 0x16
67 #define ADSP1_CONTROL_20 0x17
68 #define ADSP1_CONTROL_21 0x18
69 #define ADSP1_CONTROL_22 0x1A
70 #define ADSP1_CONTROL_23 0x1B
71 #define ADSP1_CONTROL_24 0x1C
72 #define ADSP1_CONTROL_25 0x1E
73 #define ADSP1_CONTROL_26 0x20
74 #define ADSP1_CONTROL_27 0x21
75 #define ADSP1_CONTROL_28 0x22
76 #define ADSP1_CONTROL_29 0x23
77 #define ADSP1_CONTROL_30 0x24
78 #define ADSP1_CONTROL_31 0x26
83 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
91 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103 #define ADSP1_START 0x0001 /* DSP1_START */
104 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
105 #define ADSP1_START_SHIFT 0 /* DSP1_START */
106 #define ADSP1_START_WIDTH 1 /* DSP1_START */
111 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
115 #define ADSP2_CONTROL 0x0
116 #define ADSP2_CLOCKING 0x1
117 #define ADSP2_STATUS1 0x4
118 #define ADSP2_WDMA_CONFIG_1 0x30
119 #define ADSP2_WDMA_CONFIG_2 0x31
120 #define ADSP2_RDMA_CONFIG_1 0x34
122 #define ADSP2_SCRATCH0 0x40
123 #define ADSP2_SCRATCH1 0x41
124 #define ADSP2_SCRATCH2 0x42
125 #define ADSP2_SCRATCH3 0x43
131 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143 #define ADSP2_START 0x0001 /* DSP1_START */
144 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
145 #define ADSP2_START_SHIFT 0 /* DSP1_START */
146 #define ADSP2_START_WIDTH 1 /* DSP1_START */
151 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
158 #define ADSP2_RAM_RDY 0x0001
159 #define ADSP2_RAM_RDY_MASK 0x0001
160 #define ADSP2_RAM_RDY_SHIFT 0
161 #define ADSP2_RAM_RDY_WIDTH 1
163 #define ADSP_MAX_STD_CTRL_SIZE 512
165 #define WM_ADSP_ACKED_CTL_TIMEOUT_MS 100
166 #define WM_ADSP_ACKED_CTL_N_QUICKPOLLS 10
167 #define WM_ADSP_ACKED_CTL_MIN_VALUE 0
168 #define WM_ADSP_ACKED_CTL_MAX_VALUE 0xFFFFFF
171 * Event control messages
173 #define WM_ADSP_FW_EVENT_SHUTDOWN 0x000001
176 struct list_head list
;
180 static struct wm_adsp_buf
*wm_adsp_buf_alloc(const void *src
, size_t len
,
181 struct list_head
*list
)
183 struct wm_adsp_buf
*buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
188 buf
->buf
= vmalloc(len
);
193 memcpy(buf
->buf
, src
, len
);
196 list_add_tail(&buf
->list
, list
);
201 static void wm_adsp_buf_free(struct list_head
*list
)
203 while (!list_empty(list
)) {
204 struct wm_adsp_buf
*buf
= list_first_entry(list
,
207 list_del(&buf
->list
);
213 #define WM_ADSP_FW_MBC_VSS 0
214 #define WM_ADSP_FW_HIFI 1
215 #define WM_ADSP_FW_TX 2
216 #define WM_ADSP_FW_TX_SPK 3
217 #define WM_ADSP_FW_RX 4
218 #define WM_ADSP_FW_RX_ANC 5
219 #define WM_ADSP_FW_CTRL 6
220 #define WM_ADSP_FW_ASR 7
221 #define WM_ADSP_FW_TRACE 8
222 #define WM_ADSP_FW_SPK_PROT 9
223 #define WM_ADSP_FW_MISC 10
225 #define WM_ADSP_NUM_FW 11
227 static const char *wm_adsp_fw_text
[WM_ADSP_NUM_FW
] = {
228 [WM_ADSP_FW_MBC_VSS
] = "MBC/VSS",
229 [WM_ADSP_FW_HIFI
] = "MasterHiFi",
230 [WM_ADSP_FW_TX
] = "Tx",
231 [WM_ADSP_FW_TX_SPK
] = "Tx Speaker",
232 [WM_ADSP_FW_RX
] = "Rx",
233 [WM_ADSP_FW_RX_ANC
] = "Rx ANC",
234 [WM_ADSP_FW_CTRL
] = "Voice Ctrl",
235 [WM_ADSP_FW_ASR
] = "ASR Assist",
236 [WM_ADSP_FW_TRACE
] = "Dbg Trace",
237 [WM_ADSP_FW_SPK_PROT
] = "Protection",
238 [WM_ADSP_FW_MISC
] = "Misc",
241 struct wm_adsp_system_config_xm_hdr
{
247 __be32 dma_buffer_size
;
250 __be32 build_job_name
[3];
251 __be32 build_job_number
;
254 struct wm_adsp_alg_xm_struct
{
260 __be32 high_water_mark
;
261 __be32 low_water_mark
;
262 __be64 smoothed_power
;
265 struct wm_adsp_buffer
{
266 __be32 X_buf_base
; /* XM base addr of first X area */
267 __be32 X_buf_size
; /* Size of 1st X area in words */
268 __be32 X_buf_base2
; /* XM base addr of 2nd X area */
269 __be32 X_buf_brk
; /* Total X size in words */
270 __be32 Y_buf_base
; /* YM base addr of Y area */
271 __be32 wrap
; /* Total size X and Y in words */
272 __be32 high_water_mark
; /* Point at which IRQ is asserted */
273 __be32 irq_count
; /* bits 1-31 count IRQ assertions */
274 __be32 irq_ack
; /* acked IRQ count, bit 0 enables IRQ */
275 __be32 next_write_index
; /* word index of next write */
276 __be32 next_read_index
; /* word index of next read */
277 __be32 error
; /* error if any */
278 __be32 oldest_block_index
; /* word index of oldest surviving */
279 __be32 requested_rewind
; /* how many blocks rewind was done */
280 __be32 reserved_space
; /* internal */
281 __be32 min_free
; /* min free space since stream start */
282 __be32 blocks_written
[2]; /* total blocks written (64 bit) */
283 __be32 words_written
[2]; /* total words written (64 bit) */
286 struct wm_adsp_compr
;
288 struct wm_adsp_compr_buf
{
290 struct wm_adsp_compr
*compr
;
292 struct wm_adsp_buffer_region
*regions
;
301 struct wm_adsp_compr
{
303 struct wm_adsp_compr_buf
*buf
;
305 struct snd_compr_stream
*stream
;
306 struct snd_compressed_buffer size
;
309 unsigned int copied_total
;
311 unsigned int sample_rate
;
314 #define WM_ADSP_DATA_WORD_SIZE 3
316 #define WM_ADSP_MIN_FRAGMENTS 1
317 #define WM_ADSP_MAX_FRAGMENTS 256
318 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
319 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
321 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
323 #define HOST_BUFFER_FIELD(field) \
324 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
326 #define ALG_XM_FIELD(field) \
327 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
329 static int wm_adsp_buffer_init(struct wm_adsp
*dsp
);
330 static int wm_adsp_buffer_free(struct wm_adsp
*dsp
);
332 struct wm_adsp_buffer_region
{
334 unsigned int cumulative_size
;
335 unsigned int mem_type
;
336 unsigned int base_addr
;
339 struct wm_adsp_buffer_region_def
{
340 unsigned int mem_type
;
341 unsigned int base_offset
;
342 unsigned int size_offset
;
345 static const struct wm_adsp_buffer_region_def default_regions
[] = {
347 .mem_type
= WMFW_ADSP2_XM
,
348 .base_offset
= HOST_BUFFER_FIELD(X_buf_base
),
349 .size_offset
= HOST_BUFFER_FIELD(X_buf_size
),
352 .mem_type
= WMFW_ADSP2_XM
,
353 .base_offset
= HOST_BUFFER_FIELD(X_buf_base2
),
354 .size_offset
= HOST_BUFFER_FIELD(X_buf_brk
),
357 .mem_type
= WMFW_ADSP2_YM
,
358 .base_offset
= HOST_BUFFER_FIELD(Y_buf_base
),
359 .size_offset
= HOST_BUFFER_FIELD(wrap
),
363 struct wm_adsp_fw_caps
{
365 struct snd_codec_desc desc
;
367 const struct wm_adsp_buffer_region_def
*region_defs
;
370 static const struct wm_adsp_fw_caps ctrl_caps
[] = {
372 .id
= SND_AUDIOCODEC_BESPOKE
,
375 .sample_rates
= { 16000 },
376 .num_sample_rates
= 1,
377 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
379 .num_regions
= ARRAY_SIZE(default_regions
),
380 .region_defs
= default_regions
,
384 static const struct wm_adsp_fw_caps trace_caps
[] = {
386 .id
= SND_AUDIOCODEC_BESPOKE
,
390 4000, 8000, 11025, 12000, 16000, 22050,
391 24000, 32000, 44100, 48000, 64000, 88200,
392 96000, 176400, 192000
394 .num_sample_rates
= 15,
395 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
397 .num_regions
= ARRAY_SIZE(default_regions
),
398 .region_defs
= default_regions
,
402 static const struct {
406 const struct wm_adsp_fw_caps
*caps
;
408 } wm_adsp_fw
[WM_ADSP_NUM_FW
] = {
409 [WM_ADSP_FW_MBC_VSS
] = { .file
= "mbc-vss" },
410 [WM_ADSP_FW_HIFI
] = { .file
= "hifi" },
411 [WM_ADSP_FW_TX
] = { .file
= "tx" },
412 [WM_ADSP_FW_TX_SPK
] = { .file
= "tx-spk" },
413 [WM_ADSP_FW_RX
] = { .file
= "rx" },
414 [WM_ADSP_FW_RX_ANC
] = { .file
= "rx-anc" },
415 [WM_ADSP_FW_CTRL
] = {
417 .compr_direction
= SND_COMPRESS_CAPTURE
,
418 .num_caps
= ARRAY_SIZE(ctrl_caps
),
420 .voice_trigger
= true,
422 [WM_ADSP_FW_ASR
] = { .file
= "asr" },
423 [WM_ADSP_FW_TRACE
] = {
425 .compr_direction
= SND_COMPRESS_CAPTURE
,
426 .num_caps
= ARRAY_SIZE(trace_caps
),
429 [WM_ADSP_FW_SPK_PROT
] = { .file
= "spk-prot" },
430 [WM_ADSP_FW_MISC
] = { .file
= "misc" },
433 struct wm_coeff_ctl_ops
{
434 int (*xget
)(struct snd_kcontrol
*kcontrol
,
435 struct snd_ctl_elem_value
*ucontrol
);
436 int (*xput
)(struct snd_kcontrol
*kcontrol
,
437 struct snd_ctl_elem_value
*ucontrol
);
438 int (*xinfo
)(struct snd_kcontrol
*kcontrol
,
439 struct snd_ctl_elem_info
*uinfo
);
442 struct wm_coeff_ctl
{
445 struct wm_adsp_alg_region alg_region
;
446 struct wm_coeff_ctl_ops ops
;
448 unsigned int enabled
:1;
449 struct list_head list
;
454 struct soc_bytes_ext bytes_ext
;
459 static const char *wm_adsp_mem_region_name(unsigned int type
)
477 #ifdef CONFIG_DEBUG_FS
478 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp
*dsp
, const char *s
)
480 char *tmp
= kasprintf(GFP_KERNEL
, "%s\n", s
);
482 kfree(dsp
->wmfw_file_name
);
483 dsp
->wmfw_file_name
= tmp
;
486 static void wm_adsp_debugfs_save_binname(struct wm_adsp
*dsp
, const char *s
)
488 char *tmp
= kasprintf(GFP_KERNEL
, "%s\n", s
);
490 kfree(dsp
->bin_file_name
);
491 dsp
->bin_file_name
= tmp
;
494 static void wm_adsp_debugfs_clear(struct wm_adsp
*dsp
)
496 kfree(dsp
->wmfw_file_name
);
497 kfree(dsp
->bin_file_name
);
498 dsp
->wmfw_file_name
= NULL
;
499 dsp
->bin_file_name
= NULL
;
502 static ssize_t
wm_adsp_debugfs_wmfw_read(struct file
*file
,
503 char __user
*user_buf
,
504 size_t count
, loff_t
*ppos
)
506 struct wm_adsp
*dsp
= file
->private_data
;
509 mutex_lock(&dsp
->pwr_lock
);
511 if (!dsp
->wmfw_file_name
|| !dsp
->booted
)
514 ret
= simple_read_from_buffer(user_buf
, count
, ppos
,
516 strlen(dsp
->wmfw_file_name
));
518 mutex_unlock(&dsp
->pwr_lock
);
522 static ssize_t
wm_adsp_debugfs_bin_read(struct file
*file
,
523 char __user
*user_buf
,
524 size_t count
, loff_t
*ppos
)
526 struct wm_adsp
*dsp
= file
->private_data
;
529 mutex_lock(&dsp
->pwr_lock
);
531 if (!dsp
->bin_file_name
|| !dsp
->booted
)
534 ret
= simple_read_from_buffer(user_buf
, count
, ppos
,
536 strlen(dsp
->bin_file_name
));
538 mutex_unlock(&dsp
->pwr_lock
);
542 static const struct {
544 const struct file_operations fops
;
545 } wm_adsp_debugfs_fops
[] = {
547 .name
= "wmfw_file_name",
550 .read
= wm_adsp_debugfs_wmfw_read
,
554 .name
= "bin_file_name",
557 .read
= wm_adsp_debugfs_bin_read
,
562 static void wm_adsp2_init_debugfs(struct wm_adsp
*dsp
,
563 struct snd_soc_codec
*codec
)
565 struct dentry
*root
= NULL
;
569 if (!codec
->component
.debugfs_root
) {
570 adsp_err(dsp
, "No codec debugfs root\n");
574 root_name
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
578 snprintf(root_name
, PAGE_SIZE
, "dsp%d", dsp
->num
);
579 root
= debugfs_create_dir(root_name
, codec
->component
.debugfs_root
);
585 if (!debugfs_create_bool("booted", S_IRUGO
, root
, &dsp
->booted
))
588 if (!debugfs_create_bool("running", S_IRUGO
, root
, &dsp
->running
))
591 if (!debugfs_create_x32("fw_id", S_IRUGO
, root
, &dsp
->fw_id
))
594 if (!debugfs_create_x32("fw_version", S_IRUGO
, root
,
595 &dsp
->fw_id_version
))
598 for (i
= 0; i
< ARRAY_SIZE(wm_adsp_debugfs_fops
); ++i
) {
599 if (!debugfs_create_file(wm_adsp_debugfs_fops
[i
].name
,
601 &wm_adsp_debugfs_fops
[i
].fops
))
605 dsp
->debugfs_root
= root
;
609 debugfs_remove_recursive(root
);
610 adsp_err(dsp
, "Failed to create debugfs\n");
613 static void wm_adsp2_cleanup_debugfs(struct wm_adsp
*dsp
)
615 wm_adsp_debugfs_clear(dsp
);
616 debugfs_remove_recursive(dsp
->debugfs_root
);
619 static inline void wm_adsp2_init_debugfs(struct wm_adsp
*dsp
,
620 struct snd_soc_codec
*codec
)
624 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp
*dsp
)
628 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp
*dsp
,
633 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp
*dsp
,
638 static inline void wm_adsp_debugfs_clear(struct wm_adsp
*dsp
)
643 static int wm_adsp_fw_get(struct snd_kcontrol
*kcontrol
,
644 struct snd_ctl_elem_value
*ucontrol
)
646 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
647 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
648 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
650 ucontrol
->value
.enumerated
.item
[0] = dsp
[e
->shift_l
].fw
;
655 static int wm_adsp_fw_put(struct snd_kcontrol
*kcontrol
,
656 struct snd_ctl_elem_value
*ucontrol
)
658 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
659 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
660 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
663 if (ucontrol
->value
.enumerated
.item
[0] == dsp
[e
->shift_l
].fw
)
666 if (ucontrol
->value
.enumerated
.item
[0] >= WM_ADSP_NUM_FW
)
669 mutex_lock(&dsp
[e
->shift_l
].pwr_lock
);
671 if (dsp
[e
->shift_l
].booted
|| dsp
[e
->shift_l
].compr
)
674 dsp
[e
->shift_l
].fw
= ucontrol
->value
.enumerated
.item
[0];
676 mutex_unlock(&dsp
[e
->shift_l
].pwr_lock
);
681 static const struct soc_enum wm_adsp_fw_enum
[] = {
682 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
683 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
684 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
685 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
688 const struct snd_kcontrol_new wm_adsp_fw_controls
[] = {
689 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum
[0],
690 wm_adsp_fw_get
, wm_adsp_fw_put
),
691 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum
[1],
692 wm_adsp_fw_get
, wm_adsp_fw_put
),
693 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum
[2],
694 wm_adsp_fw_get
, wm_adsp_fw_put
),
695 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum
[3],
696 wm_adsp_fw_get
, wm_adsp_fw_put
),
698 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls
);
700 static struct wm_adsp_region
const *wm_adsp_find_region(struct wm_adsp
*dsp
,
705 for (i
= 0; i
< dsp
->num_mems
; i
++)
706 if (dsp
->mem
[i
].type
== type
)
712 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region
const *mem
,
719 return mem
->base
+ (offset
* 3);
721 return mem
->base
+ (offset
* 2);
723 return mem
->base
+ (offset
* 2);
725 return mem
->base
+ (offset
* 2);
727 return mem
->base
+ (offset
* 2);
729 WARN(1, "Unknown memory region type");
734 static void wm_adsp2_show_fw_status(struct wm_adsp
*dsp
)
739 ret
= regmap_raw_read(dsp
->regmap
, dsp
->base
+ ADSP2_SCRATCH0
,
740 scratch
, sizeof(scratch
));
742 adsp_err(dsp
, "Failed to read SCRATCH regs: %d\n", ret
);
746 adsp_dbg(dsp
, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
747 be16_to_cpu(scratch
[0]),
748 be16_to_cpu(scratch
[1]),
749 be16_to_cpu(scratch
[2]),
750 be16_to_cpu(scratch
[3]));
753 static inline struct wm_coeff_ctl
*bytes_ext_to_ctl(struct soc_bytes_ext
*ext
)
755 return container_of(ext
, struct wm_coeff_ctl
, bytes_ext
);
758 static int wm_coeff_base_reg(struct wm_coeff_ctl
*ctl
, unsigned int *reg
)
760 const struct wm_adsp_alg_region
*alg_region
= &ctl
->alg_region
;
761 struct wm_adsp
*dsp
= ctl
->dsp
;
762 const struct wm_adsp_region
*mem
;
764 mem
= wm_adsp_find_region(dsp
, alg_region
->type
);
766 adsp_err(dsp
, "No base for region %x\n",
771 *reg
= wm_adsp_region_to_reg(mem
, ctl
->alg_region
.base
+ ctl
->offset
);
776 static int wm_coeff_info(struct snd_kcontrol
*kctl
,
777 struct snd_ctl_elem_info
*uinfo
)
779 struct soc_bytes_ext
*bytes_ext
=
780 (struct soc_bytes_ext
*)kctl
->private_value
;
781 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
784 case WMFW_CTL_TYPE_ACKED
:
785 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
786 uinfo
->value
.integer
.min
= WM_ADSP_ACKED_CTL_MIN_VALUE
;
787 uinfo
->value
.integer
.max
= WM_ADSP_ACKED_CTL_MAX_VALUE
;
788 uinfo
->value
.integer
.step
= 1;
792 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
793 uinfo
->count
= ctl
->len
;
800 static int wm_coeff_write_acked_control(struct wm_coeff_ctl
*ctl
,
801 unsigned int event_id
)
803 struct wm_adsp
*dsp
= ctl
->dsp
;
804 u32 val
= cpu_to_be32(event_id
);
808 ret
= wm_coeff_base_reg(ctl
, ®
);
812 adsp_dbg(dsp
, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n",
813 event_id
, ctl
->alg_region
.alg
,
814 wm_adsp_mem_region_name(ctl
->alg_region
.type
), ctl
->offset
);
816 ret
= regmap_raw_write(dsp
->regmap
, reg
, &val
, sizeof(val
));
818 adsp_err(dsp
, "Failed to write %x: %d\n", reg
, ret
);
823 * Poll for ack, we initially poll at ~1ms intervals for firmwares
824 * that respond quickly, then go to ~10ms polls. A firmware is unlikely
825 * to ack instantly so we do the first 1ms delay before reading the
826 * control to avoid a pointless bus transaction
828 for (i
= 0; i
< WM_ADSP_ACKED_CTL_TIMEOUT_MS
;) {
830 case 0 ... WM_ADSP_ACKED_CTL_N_QUICKPOLLS
- 1:
831 usleep_range(1000, 2000);
835 usleep_range(10000, 20000);
840 ret
= regmap_raw_read(dsp
->regmap
, reg
, &val
, sizeof(val
));
842 adsp_err(dsp
, "Failed to read %x: %d\n", reg
, ret
);
847 adsp_dbg(dsp
, "Acked control ACKED at poll %u\n", i
);
852 adsp_warn(dsp
, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n",
853 reg
, ctl
->alg_region
.alg
,
854 wm_adsp_mem_region_name(ctl
->alg_region
.type
),
860 static int wm_coeff_write_control(struct wm_coeff_ctl
*ctl
,
861 const void *buf
, size_t len
)
863 struct wm_adsp
*dsp
= ctl
->dsp
;
868 ret
= wm_coeff_base_reg(ctl
, ®
);
872 scratch
= kmemdup(buf
, len
, GFP_KERNEL
| GFP_DMA
);
876 ret
= regmap_raw_write(dsp
->regmap
, reg
, scratch
,
879 adsp_err(dsp
, "Failed to write %zu bytes to %x: %d\n",
884 adsp_dbg(dsp
, "Wrote %zu bytes to %x\n", len
, reg
);
891 static int wm_coeff_put(struct snd_kcontrol
*kctl
,
892 struct snd_ctl_elem_value
*ucontrol
)
894 struct soc_bytes_ext
*bytes_ext
=
895 (struct soc_bytes_ext
*)kctl
->private_value
;
896 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
897 char *p
= ucontrol
->value
.bytes
.data
;
900 mutex_lock(&ctl
->dsp
->pwr_lock
);
902 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)
905 memcpy(ctl
->cache
, p
, ctl
->len
);
908 if (ctl
->enabled
&& ctl
->dsp
->running
)
909 ret
= wm_coeff_write_control(ctl
, p
, ctl
->len
);
911 mutex_unlock(&ctl
->dsp
->pwr_lock
);
916 static int wm_coeff_tlv_put(struct snd_kcontrol
*kctl
,
917 const unsigned int __user
*bytes
, unsigned int size
)
919 struct soc_bytes_ext
*bytes_ext
=
920 (struct soc_bytes_ext
*)kctl
->private_value
;
921 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
924 mutex_lock(&ctl
->dsp
->pwr_lock
);
926 if (copy_from_user(ctl
->cache
, bytes
, size
)) {
930 if (ctl
->enabled
&& ctl
->dsp
->running
)
931 ret
= wm_coeff_write_control(ctl
, ctl
->cache
, size
);
932 else if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)
936 mutex_unlock(&ctl
->dsp
->pwr_lock
);
941 static int wm_coeff_put_acked(struct snd_kcontrol
*kctl
,
942 struct snd_ctl_elem_value
*ucontrol
)
944 struct soc_bytes_ext
*bytes_ext
=
945 (struct soc_bytes_ext
*)kctl
->private_value
;
946 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
947 unsigned int val
= ucontrol
->value
.integer
.value
[0];
951 return 0; /* 0 means no event */
953 mutex_lock(&ctl
->dsp
->pwr_lock
);
955 if (ctl
->enabled
&& ctl
->dsp
->running
)
956 ret
= wm_coeff_write_acked_control(ctl
, val
);
960 mutex_unlock(&ctl
->dsp
->pwr_lock
);
965 static int wm_coeff_read_control(struct wm_coeff_ctl
*ctl
,
966 void *buf
, size_t len
)
968 struct wm_adsp
*dsp
= ctl
->dsp
;
973 ret
= wm_coeff_base_reg(ctl
, ®
);
977 scratch
= kmalloc(len
, GFP_KERNEL
| GFP_DMA
);
981 ret
= regmap_raw_read(dsp
->regmap
, reg
, scratch
, len
);
983 adsp_err(dsp
, "Failed to read %zu bytes from %x: %d\n",
988 adsp_dbg(dsp
, "Read %zu bytes from %x\n", len
, reg
);
990 memcpy(buf
, scratch
, len
);
996 static int wm_coeff_get(struct snd_kcontrol
*kctl
,
997 struct snd_ctl_elem_value
*ucontrol
)
999 struct soc_bytes_ext
*bytes_ext
=
1000 (struct soc_bytes_ext
*)kctl
->private_value
;
1001 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
1002 char *p
= ucontrol
->value
.bytes
.data
;
1005 mutex_lock(&ctl
->dsp
->pwr_lock
);
1007 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
) {
1008 if (ctl
->enabled
&& ctl
->dsp
->running
)
1009 ret
= wm_coeff_read_control(ctl
, p
, ctl
->len
);
1013 if (!ctl
->flags
&& ctl
->enabled
&& ctl
->dsp
->running
)
1014 ret
= wm_coeff_read_control(ctl
, ctl
->cache
, ctl
->len
);
1016 memcpy(p
, ctl
->cache
, ctl
->len
);
1019 mutex_unlock(&ctl
->dsp
->pwr_lock
);
1024 static int wm_coeff_tlv_get(struct snd_kcontrol
*kctl
,
1025 unsigned int __user
*bytes
, unsigned int size
)
1027 struct soc_bytes_ext
*bytes_ext
=
1028 (struct soc_bytes_ext
*)kctl
->private_value
;
1029 struct wm_coeff_ctl
*ctl
= bytes_ext_to_ctl(bytes_ext
);
1032 mutex_lock(&ctl
->dsp
->pwr_lock
);
1034 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
) {
1035 if (ctl
->enabled
&& ctl
->dsp
->running
)
1036 ret
= wm_coeff_read_control(ctl
, ctl
->cache
, size
);
1040 if (!ctl
->flags
&& ctl
->enabled
&& ctl
->dsp
->running
)
1041 ret
= wm_coeff_read_control(ctl
, ctl
->cache
, size
);
1044 if (!ret
&& copy_to_user(bytes
, ctl
->cache
, size
))
1047 mutex_unlock(&ctl
->dsp
->pwr_lock
);
1052 static int wm_coeff_get_acked(struct snd_kcontrol
*kcontrol
,
1053 struct snd_ctl_elem_value
*ucontrol
)
1056 * Although it's not useful to read an acked control, we must satisfy
1057 * user-side assumptions that all controls are readable and that a
1058 * write of the same value should be filtered out (it's valid to send
1059 * the same event number again to the firmware). We therefore return 0,
1060 * meaning "no event" so valid event numbers will always be a change
1062 ucontrol
->value
.integer
.value
[0] = 0;
1067 struct wmfw_ctl_work
{
1068 struct wm_adsp
*dsp
;
1069 struct wm_coeff_ctl
*ctl
;
1070 struct work_struct work
;
1073 static unsigned int wmfw_convert_flags(unsigned int in
, unsigned int len
)
1075 unsigned int out
, rd
, wr
, vol
;
1077 if (len
> ADSP_MAX_STD_CTRL_SIZE
) {
1078 rd
= SNDRV_CTL_ELEM_ACCESS_TLV_READ
;
1079 wr
= SNDRV_CTL_ELEM_ACCESS_TLV_WRITE
;
1080 vol
= SNDRV_CTL_ELEM_ACCESS_VOLATILE
;
1082 out
= SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK
;
1084 rd
= SNDRV_CTL_ELEM_ACCESS_READ
;
1085 wr
= SNDRV_CTL_ELEM_ACCESS_WRITE
;
1086 vol
= SNDRV_CTL_ELEM_ACCESS_VOLATILE
;
1092 if (in
& WMFW_CTL_FLAG_READABLE
)
1094 if (in
& WMFW_CTL_FLAG_WRITEABLE
)
1096 if (in
& WMFW_CTL_FLAG_VOLATILE
)
1099 out
|= rd
| wr
| vol
;
1105 static int wmfw_add_ctl(struct wm_adsp
*dsp
, struct wm_coeff_ctl
*ctl
)
1107 struct snd_kcontrol_new
*kcontrol
;
1110 if (!ctl
|| !ctl
->name
)
1113 kcontrol
= kzalloc(sizeof(*kcontrol
), GFP_KERNEL
);
1117 kcontrol
->name
= ctl
->name
;
1118 kcontrol
->info
= wm_coeff_info
;
1119 kcontrol
->iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1120 kcontrol
->tlv
.c
= snd_soc_bytes_tlv_callback
;
1121 kcontrol
->private_value
= (unsigned long)&ctl
->bytes_ext
;
1122 kcontrol
->access
= wmfw_convert_flags(ctl
->flags
, ctl
->len
);
1124 switch (ctl
->type
) {
1125 case WMFW_CTL_TYPE_ACKED
:
1126 kcontrol
->get
= wm_coeff_get_acked
;
1127 kcontrol
->put
= wm_coeff_put_acked
;
1130 kcontrol
->get
= wm_coeff_get
;
1131 kcontrol
->put
= wm_coeff_put
;
1133 ctl
->bytes_ext
.max
= ctl
->len
;
1134 ctl
->bytes_ext
.get
= wm_coeff_tlv_get
;
1135 ctl
->bytes_ext
.put
= wm_coeff_tlv_put
;
1139 ret
= snd_soc_add_codec_controls(dsp
->codec
, kcontrol
, 1);
1152 static int wm_coeff_init_control_caches(struct wm_adsp
*dsp
)
1154 struct wm_coeff_ctl
*ctl
;
1157 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1158 if (!ctl
->enabled
|| ctl
->set
)
1160 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)
1163 ret
= wm_coeff_read_control(ctl
, ctl
->cache
, ctl
->len
);
1171 static int wm_coeff_sync_controls(struct wm_adsp
*dsp
)
1173 struct wm_coeff_ctl
*ctl
;
1176 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1179 if (ctl
->set
&& !(ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)) {
1180 ret
= wm_coeff_write_control(ctl
, ctl
->cache
, ctl
->len
);
1189 static void wm_adsp_signal_event_controls(struct wm_adsp
*dsp
,
1192 struct wm_coeff_ctl
*ctl
;
1195 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1196 if (ctl
->type
!= WMFW_CTL_TYPE_HOSTEVENT
)
1202 ret
= wm_coeff_write_acked_control(ctl
, event
);
1205 "Failed to send 0x%x event to alg 0x%x (%d)\n",
1206 event
, ctl
->alg_region
.alg
, ret
);
1210 static void wm_adsp_ctl_work(struct work_struct
*work
)
1212 struct wmfw_ctl_work
*ctl_work
= container_of(work
,
1213 struct wmfw_ctl_work
,
1216 wmfw_add_ctl(ctl_work
->dsp
, ctl_work
->ctl
);
1220 static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl
*ctl
)
1227 static int wm_adsp_create_control(struct wm_adsp
*dsp
,
1228 const struct wm_adsp_alg_region
*alg_region
,
1229 unsigned int offset
, unsigned int len
,
1230 const char *subname
, unsigned int subname_len
,
1231 unsigned int flags
, unsigned int type
)
1233 struct wm_coeff_ctl
*ctl
;
1234 struct wmfw_ctl_work
*ctl_work
;
1235 char name
[SNDRV_CTL_ELEM_ID_NAME_MAXLEN
];
1236 const char *region_name
;
1239 region_name
= wm_adsp_mem_region_name(alg_region
->type
);
1241 adsp_err(dsp
, "Unknown region type: %d\n", alg_region
->type
);
1245 switch (dsp
->fw_ver
) {
1248 snprintf(name
, SNDRV_CTL_ELEM_ID_NAME_MAXLEN
, "DSP%d %s %x",
1249 dsp
->num
, region_name
, alg_region
->alg
);
1252 ret
= snprintf(name
, SNDRV_CTL_ELEM_ID_NAME_MAXLEN
,
1253 "DSP%d%c %.12s %x", dsp
->num
, *region_name
,
1254 wm_adsp_fw_text
[dsp
->fw
], alg_region
->alg
);
1256 /* Truncate the subname from the start if it is too long */
1258 int avail
= SNDRV_CTL_ELEM_ID_NAME_MAXLEN
- ret
- 2;
1261 if (subname_len
> avail
)
1262 skip
= subname_len
- avail
;
1264 snprintf(name
+ ret
,
1265 SNDRV_CTL_ELEM_ID_NAME_MAXLEN
- ret
, " %.*s",
1266 subname_len
- skip
, subname
+ skip
);
1271 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1272 if (!strcmp(ctl
->name
, name
)) {
1279 ctl
= kzalloc(sizeof(*ctl
), GFP_KERNEL
);
1282 ctl
->fw_name
= wm_adsp_fw_text
[dsp
->fw
];
1283 ctl
->alg_region
= *alg_region
;
1284 ctl
->name
= kmemdup(name
, strlen(name
) + 1, GFP_KERNEL
);
1291 ctl
->ops
.xget
= wm_coeff_get
;
1292 ctl
->ops
.xput
= wm_coeff_put
;
1297 ctl
->offset
= offset
;
1299 ctl
->cache
= kzalloc(ctl
->len
, GFP_KERNEL
);
1305 list_add(&ctl
->list
, &dsp
->ctl_list
);
1307 if (flags
& WMFW_CTL_FLAG_SYS
)
1310 ctl_work
= kzalloc(sizeof(*ctl_work
), GFP_KERNEL
);
1316 ctl_work
->dsp
= dsp
;
1317 ctl_work
->ctl
= ctl
;
1318 INIT_WORK(&ctl_work
->work
, wm_adsp_ctl_work
);
1319 schedule_work(&ctl_work
->work
);
1333 struct wm_coeff_parsed_alg
{
1340 struct wm_coeff_parsed_coeff
{
1350 static int wm_coeff_parse_string(int bytes
, const u8
**pos
, const u8
**str
)
1359 length
= le16_to_cpu(*((__le16
*)*pos
));
1366 *str
= *pos
+ bytes
;
1368 *pos
+= ((length
+ bytes
) + 3) & ~0x03;
1373 static int wm_coeff_parse_int(int bytes
, const u8
**pos
)
1379 val
= le16_to_cpu(*((__le16
*)*pos
));
1382 val
= le32_to_cpu(*((__le32
*)*pos
));
1393 static inline void wm_coeff_parse_alg(struct wm_adsp
*dsp
, const u8
**data
,
1394 struct wm_coeff_parsed_alg
*blk
)
1396 const struct wmfw_adsp_alg_data
*raw
;
1398 switch (dsp
->fw_ver
) {
1401 raw
= (const struct wmfw_adsp_alg_data
*)*data
;
1404 blk
->id
= le32_to_cpu(raw
->id
);
1405 blk
->name
= raw
->name
;
1406 blk
->name_len
= strlen(raw
->name
);
1407 blk
->ncoeff
= le32_to_cpu(raw
->ncoeff
);
1410 blk
->id
= wm_coeff_parse_int(sizeof(raw
->id
), data
);
1411 blk
->name_len
= wm_coeff_parse_string(sizeof(u8
), data
,
1413 wm_coeff_parse_string(sizeof(u16
), data
, NULL
);
1414 blk
->ncoeff
= wm_coeff_parse_int(sizeof(raw
->ncoeff
), data
);
1418 adsp_dbg(dsp
, "Algorithm ID: %#x\n", blk
->id
);
1419 adsp_dbg(dsp
, "Algorithm name: %.*s\n", blk
->name_len
, blk
->name
);
1420 adsp_dbg(dsp
, "# of coefficient descriptors: %#x\n", blk
->ncoeff
);
1423 static inline void wm_coeff_parse_coeff(struct wm_adsp
*dsp
, const u8
**data
,
1424 struct wm_coeff_parsed_coeff
*blk
)
1426 const struct wmfw_adsp_coeff_data
*raw
;
1430 switch (dsp
->fw_ver
) {
1433 raw
= (const struct wmfw_adsp_coeff_data
*)*data
;
1434 *data
= *data
+ sizeof(raw
->hdr
) + le32_to_cpu(raw
->hdr
.size
);
1436 blk
->offset
= le16_to_cpu(raw
->hdr
.offset
);
1437 blk
->mem_type
= le16_to_cpu(raw
->hdr
.type
);
1438 blk
->name
= raw
->name
;
1439 blk
->name_len
= strlen(raw
->name
);
1440 blk
->ctl_type
= le16_to_cpu(raw
->ctl_type
);
1441 blk
->flags
= le16_to_cpu(raw
->flags
);
1442 blk
->len
= le32_to_cpu(raw
->len
);
1446 blk
->offset
= wm_coeff_parse_int(sizeof(raw
->hdr
.offset
), &tmp
);
1447 blk
->mem_type
= wm_coeff_parse_int(sizeof(raw
->hdr
.type
), &tmp
);
1448 length
= wm_coeff_parse_int(sizeof(raw
->hdr
.size
), &tmp
);
1449 blk
->name_len
= wm_coeff_parse_string(sizeof(u8
), &tmp
,
1451 wm_coeff_parse_string(sizeof(u8
), &tmp
, NULL
);
1452 wm_coeff_parse_string(sizeof(u16
), &tmp
, NULL
);
1453 blk
->ctl_type
= wm_coeff_parse_int(sizeof(raw
->ctl_type
), &tmp
);
1454 blk
->flags
= wm_coeff_parse_int(sizeof(raw
->flags
), &tmp
);
1455 blk
->len
= wm_coeff_parse_int(sizeof(raw
->len
), &tmp
);
1457 *data
= *data
+ sizeof(raw
->hdr
) + length
;
1461 adsp_dbg(dsp
, "\tCoefficient type: %#x\n", blk
->mem_type
);
1462 adsp_dbg(dsp
, "\tCoefficient offset: %#x\n", blk
->offset
);
1463 adsp_dbg(dsp
, "\tCoefficient name: %.*s\n", blk
->name_len
, blk
->name
);
1464 adsp_dbg(dsp
, "\tCoefficient flags: %#x\n", blk
->flags
);
1465 adsp_dbg(dsp
, "\tALSA control type: %#x\n", blk
->ctl_type
);
1466 adsp_dbg(dsp
, "\tALSA control len: %#x\n", blk
->len
);
1469 static int wm_adsp_check_coeff_flags(struct wm_adsp
*dsp
,
1470 const struct wm_coeff_parsed_coeff
*coeff_blk
,
1471 unsigned int f_required
,
1472 unsigned int f_illegal
)
1474 if ((coeff_blk
->flags
& f_illegal
) ||
1475 ((coeff_blk
->flags
& f_required
) != f_required
)) {
1476 adsp_err(dsp
, "Illegal flags 0x%x for control type 0x%x\n",
1477 coeff_blk
->flags
, coeff_blk
->ctl_type
);
1484 static int wm_adsp_parse_coeff(struct wm_adsp
*dsp
,
1485 const struct wmfw_region
*region
)
1487 struct wm_adsp_alg_region alg_region
= {};
1488 struct wm_coeff_parsed_alg alg_blk
;
1489 struct wm_coeff_parsed_coeff coeff_blk
;
1490 const u8
*data
= region
->data
;
1493 wm_coeff_parse_alg(dsp
, &data
, &alg_blk
);
1494 for (i
= 0; i
< alg_blk
.ncoeff
; i
++) {
1495 wm_coeff_parse_coeff(dsp
, &data
, &coeff_blk
);
1497 switch (coeff_blk
.ctl_type
) {
1498 case SNDRV_CTL_ELEM_TYPE_BYTES
:
1500 case WMFW_CTL_TYPE_ACKED
:
1501 if (coeff_blk
.flags
& WMFW_CTL_FLAG_SYS
)
1502 continue; /* ignore */
1504 ret
= wm_adsp_check_coeff_flags(dsp
, &coeff_blk
,
1505 WMFW_CTL_FLAG_VOLATILE
|
1506 WMFW_CTL_FLAG_WRITEABLE
|
1507 WMFW_CTL_FLAG_READABLE
,
1512 case WMFW_CTL_TYPE_HOSTEVENT
:
1513 ret
= wm_adsp_check_coeff_flags(dsp
, &coeff_blk
,
1515 WMFW_CTL_FLAG_VOLATILE
|
1516 WMFW_CTL_FLAG_WRITEABLE
|
1517 WMFW_CTL_FLAG_READABLE
,
1523 adsp_err(dsp
, "Unknown control type: %d\n",
1524 coeff_blk
.ctl_type
);
1528 alg_region
.type
= coeff_blk
.mem_type
;
1529 alg_region
.alg
= alg_blk
.id
;
1531 ret
= wm_adsp_create_control(dsp
, &alg_region
,
1537 coeff_blk
.ctl_type
);
1539 adsp_err(dsp
, "Failed to create control: %.*s, %d\n",
1540 coeff_blk
.name_len
, coeff_blk
.name
, ret
);
1546 static int wm_adsp_load(struct wm_adsp
*dsp
)
1548 LIST_HEAD(buf_list
);
1549 const struct firmware
*firmware
;
1550 struct regmap
*regmap
= dsp
->regmap
;
1551 unsigned int pos
= 0;
1552 const struct wmfw_header
*header
;
1553 const struct wmfw_adsp1_sizes
*adsp1_sizes
;
1554 const struct wmfw_adsp2_sizes
*adsp2_sizes
;
1555 const struct wmfw_footer
*footer
;
1556 const struct wmfw_region
*region
;
1557 const struct wm_adsp_region
*mem
;
1558 const char *region_name
;
1559 char *file
, *text
= NULL
;
1560 struct wm_adsp_buf
*buf
;
1563 int ret
, offset
, type
, sizes
;
1565 file
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1569 snprintf(file
, PAGE_SIZE
, "%s-dsp%d-%s.wmfw", dsp
->part
, dsp
->num
,
1570 wm_adsp_fw
[dsp
->fw
].file
);
1571 file
[PAGE_SIZE
- 1] = '\0';
1573 ret
= request_firmware(&firmware
, file
, dsp
->dev
);
1575 adsp_err(dsp
, "Failed to request '%s'\n", file
);
1580 pos
= sizeof(*header
) + sizeof(*adsp1_sizes
) + sizeof(*footer
);
1581 if (pos
>= firmware
->size
) {
1582 adsp_err(dsp
, "%s: file too short, %zu bytes\n",
1583 file
, firmware
->size
);
1587 header
= (void *)&firmware
->data
[0];
1589 if (memcmp(&header
->magic
[0], "WMFW", 4) != 0) {
1590 adsp_err(dsp
, "%s: invalid magic\n", file
);
1594 switch (header
->ver
) {
1596 adsp_warn(dsp
, "%s: Depreciated file format %d\n",
1603 adsp_err(dsp
, "%s: unknown file format %d\n",
1608 adsp_info(dsp
, "Firmware version: %d\n", header
->ver
);
1609 dsp
->fw_ver
= header
->ver
;
1611 if (header
->core
!= dsp
->type
) {
1612 adsp_err(dsp
, "%s: invalid core %d != %d\n",
1613 file
, header
->core
, dsp
->type
);
1617 switch (dsp
->type
) {
1619 pos
= sizeof(*header
) + sizeof(*adsp1_sizes
) + sizeof(*footer
);
1620 adsp1_sizes
= (void *)&(header
[1]);
1621 footer
= (void *)&(adsp1_sizes
[1]);
1622 sizes
= sizeof(*adsp1_sizes
);
1624 adsp_dbg(dsp
, "%s: %d DM, %d PM, %d ZM\n",
1625 file
, le32_to_cpu(adsp1_sizes
->dm
),
1626 le32_to_cpu(adsp1_sizes
->pm
),
1627 le32_to_cpu(adsp1_sizes
->zm
));
1631 pos
= sizeof(*header
) + sizeof(*adsp2_sizes
) + sizeof(*footer
);
1632 adsp2_sizes
= (void *)&(header
[1]);
1633 footer
= (void *)&(adsp2_sizes
[1]);
1634 sizes
= sizeof(*adsp2_sizes
);
1636 adsp_dbg(dsp
, "%s: %d XM, %d YM %d PM, %d ZM\n",
1637 file
, le32_to_cpu(adsp2_sizes
->xm
),
1638 le32_to_cpu(adsp2_sizes
->ym
),
1639 le32_to_cpu(adsp2_sizes
->pm
),
1640 le32_to_cpu(adsp2_sizes
->zm
));
1644 WARN(1, "Unknown DSP type");
1648 if (le32_to_cpu(header
->len
) != sizeof(*header
) +
1649 sizes
+ sizeof(*footer
)) {
1650 adsp_err(dsp
, "%s: unexpected header length %d\n",
1651 file
, le32_to_cpu(header
->len
));
1655 adsp_dbg(dsp
, "%s: timestamp %llu\n", file
,
1656 le64_to_cpu(footer
->timestamp
));
1658 while (pos
< firmware
->size
&&
1659 pos
- firmware
->size
> sizeof(*region
)) {
1660 region
= (void *)&(firmware
->data
[pos
]);
1661 region_name
= "Unknown";
1664 offset
= le32_to_cpu(region
->offset
) & 0xffffff;
1665 type
= be32_to_cpu(region
->type
) & 0xff;
1666 mem
= wm_adsp_find_region(dsp
, type
);
1669 case WMFW_NAME_TEXT
:
1670 region_name
= "Firmware name";
1671 text
= kzalloc(le32_to_cpu(region
->len
) + 1,
1674 case WMFW_ALGORITHM_DATA
:
1675 region_name
= "Algorithm";
1676 ret
= wm_adsp_parse_coeff(dsp
, region
);
1680 case WMFW_INFO_TEXT
:
1681 region_name
= "Information";
1682 text
= kzalloc(le32_to_cpu(region
->len
) + 1,
1686 region_name
= "Absolute";
1694 region_name
= wm_adsp_mem_region_name(type
);
1695 reg
= wm_adsp_region_to_reg(mem
, offset
);
1699 "%s.%d: Unknown region type %x at %d(%x)\n",
1700 file
, regions
, type
, pos
, pos
);
1704 adsp_dbg(dsp
, "%s.%d: %d bytes at %d in %s\n", file
,
1705 regions
, le32_to_cpu(region
->len
), offset
,
1708 if ((pos
+ le32_to_cpu(region
->len
) + sizeof(*region
)) >
1711 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1712 file
, regions
, region_name
,
1713 le32_to_cpu(region
->len
), firmware
->size
);
1719 memcpy(text
, region
->data
, le32_to_cpu(region
->len
));
1720 adsp_info(dsp
, "%s: %s\n", file
, text
);
1726 buf
= wm_adsp_buf_alloc(region
->data
,
1727 le32_to_cpu(region
->len
),
1730 adsp_err(dsp
, "Out of memory\n");
1735 ret
= regmap_raw_write_async(regmap
, reg
, buf
->buf
,
1736 le32_to_cpu(region
->len
));
1739 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1741 le32_to_cpu(region
->len
), offset
,
1747 pos
+= le32_to_cpu(region
->len
) + sizeof(*region
);
1751 ret
= regmap_async_complete(regmap
);
1753 adsp_err(dsp
, "Failed to complete async write: %d\n", ret
);
1757 if (pos
> firmware
->size
)
1758 adsp_warn(dsp
, "%s.%d: %zu bytes at end of file\n",
1759 file
, regions
, pos
- firmware
->size
);
1761 wm_adsp_debugfs_save_wmfwname(dsp
, file
);
1764 regmap_async_complete(regmap
);
1765 wm_adsp_buf_free(&buf_list
);
1766 release_firmware(firmware
);
1774 static void wm_adsp_ctl_fixup_base(struct wm_adsp
*dsp
,
1775 const struct wm_adsp_alg_region
*alg_region
)
1777 struct wm_coeff_ctl
*ctl
;
1779 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1780 if (ctl
->fw_name
== wm_adsp_fw_text
[dsp
->fw
] &&
1781 alg_region
->alg
== ctl
->alg_region
.alg
&&
1782 alg_region
->type
== ctl
->alg_region
.type
) {
1783 ctl
->alg_region
.base
= alg_region
->base
;
1788 static void *wm_adsp_read_algs(struct wm_adsp
*dsp
, size_t n_algs
,
1789 unsigned int pos
, unsigned int len
)
1796 adsp_err(dsp
, "No algorithms\n");
1797 return ERR_PTR(-EINVAL
);
1800 if (n_algs
> 1024) {
1801 adsp_err(dsp
, "Algorithm count %zx excessive\n", n_algs
);
1802 return ERR_PTR(-EINVAL
);
1805 /* Read the terminator first to validate the length */
1806 ret
= regmap_raw_read(dsp
->regmap
, pos
+ len
, &val
, sizeof(val
));
1808 adsp_err(dsp
, "Failed to read algorithm list end: %d\n",
1810 return ERR_PTR(ret
);
1813 if (be32_to_cpu(val
) != 0xbedead)
1814 adsp_warn(dsp
, "Algorithm list end %x 0x%x != 0xbeadead\n",
1815 pos
+ len
, be32_to_cpu(val
));
1817 alg
= kzalloc(len
* 2, GFP_KERNEL
| GFP_DMA
);
1819 return ERR_PTR(-ENOMEM
);
1821 ret
= regmap_raw_read(dsp
->regmap
, pos
, alg
, len
* 2);
1823 adsp_err(dsp
, "Failed to read algorithm list: %d\n", ret
);
1825 return ERR_PTR(ret
);
1831 static struct wm_adsp_alg_region
*
1832 wm_adsp_find_alg_region(struct wm_adsp
*dsp
, int type
, unsigned int id
)
1834 struct wm_adsp_alg_region
*alg_region
;
1836 list_for_each_entry(alg_region
, &dsp
->alg_regions
, list
) {
1837 if (id
== alg_region
->alg
&& type
== alg_region
->type
)
1844 static struct wm_adsp_alg_region
*wm_adsp_create_region(struct wm_adsp
*dsp
,
1845 int type
, __be32 id
,
1848 struct wm_adsp_alg_region
*alg_region
;
1850 alg_region
= kzalloc(sizeof(*alg_region
), GFP_KERNEL
);
1852 return ERR_PTR(-ENOMEM
);
1854 alg_region
->type
= type
;
1855 alg_region
->alg
= be32_to_cpu(id
);
1856 alg_region
->base
= be32_to_cpu(base
);
1858 list_add_tail(&alg_region
->list
, &dsp
->alg_regions
);
1860 if (dsp
->fw_ver
> 0)
1861 wm_adsp_ctl_fixup_base(dsp
, alg_region
);
1866 static void wm_adsp_free_alg_regions(struct wm_adsp
*dsp
)
1868 struct wm_adsp_alg_region
*alg_region
;
1870 while (!list_empty(&dsp
->alg_regions
)) {
1871 alg_region
= list_first_entry(&dsp
->alg_regions
,
1872 struct wm_adsp_alg_region
,
1874 list_del(&alg_region
->list
);
1879 static int wm_adsp1_setup_algs(struct wm_adsp
*dsp
)
1881 struct wmfw_adsp1_id_hdr adsp1_id
;
1882 struct wmfw_adsp1_alg_hdr
*adsp1_alg
;
1883 struct wm_adsp_alg_region
*alg_region
;
1884 const struct wm_adsp_region
*mem
;
1885 unsigned int pos
, len
;
1889 mem
= wm_adsp_find_region(dsp
, WMFW_ADSP1_DM
);
1893 ret
= regmap_raw_read(dsp
->regmap
, mem
->base
, &adsp1_id
,
1896 adsp_err(dsp
, "Failed to read algorithm info: %d\n",
1901 n_algs
= be32_to_cpu(adsp1_id
.n_algs
);
1902 dsp
->fw_id
= be32_to_cpu(adsp1_id
.fw
.id
);
1903 adsp_info(dsp
, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1905 (be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff0000) >> 16,
1906 (be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff00) >> 8,
1907 be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff,
1910 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_ZM
,
1911 adsp1_id
.fw
.id
, adsp1_id
.zm
);
1912 if (IS_ERR(alg_region
))
1913 return PTR_ERR(alg_region
);
1915 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_DM
,
1916 adsp1_id
.fw
.id
, adsp1_id
.dm
);
1917 if (IS_ERR(alg_region
))
1918 return PTR_ERR(alg_region
);
1920 pos
= sizeof(adsp1_id
) / 2;
1921 len
= (sizeof(*adsp1_alg
) * n_algs
) / 2;
1923 adsp1_alg
= wm_adsp_read_algs(dsp
, n_algs
, mem
->base
+ pos
, len
);
1924 if (IS_ERR(adsp1_alg
))
1925 return PTR_ERR(adsp1_alg
);
1927 for (i
= 0; i
< n_algs
; i
++) {
1928 adsp_info(dsp
, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1929 i
, be32_to_cpu(adsp1_alg
[i
].alg
.id
),
1930 (be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff0000) >> 16,
1931 (be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff00) >> 8,
1932 be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff,
1933 be32_to_cpu(adsp1_alg
[i
].dm
),
1934 be32_to_cpu(adsp1_alg
[i
].zm
));
1936 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_DM
,
1937 adsp1_alg
[i
].alg
.id
,
1939 if (IS_ERR(alg_region
)) {
1940 ret
= PTR_ERR(alg_region
);
1943 if (dsp
->fw_ver
== 0) {
1944 if (i
+ 1 < n_algs
) {
1945 len
= be32_to_cpu(adsp1_alg
[i
+ 1].dm
);
1946 len
-= be32_to_cpu(adsp1_alg
[i
].dm
);
1948 wm_adsp_create_control(dsp
, alg_region
, 0,
1950 SNDRV_CTL_ELEM_TYPE_BYTES
);
1952 adsp_warn(dsp
, "Missing length info for region DM with ID %x\n",
1953 be32_to_cpu(adsp1_alg
[i
].alg
.id
));
1957 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_ZM
,
1958 adsp1_alg
[i
].alg
.id
,
1960 if (IS_ERR(alg_region
)) {
1961 ret
= PTR_ERR(alg_region
);
1964 if (dsp
->fw_ver
== 0) {
1965 if (i
+ 1 < n_algs
) {
1966 len
= be32_to_cpu(adsp1_alg
[i
+ 1].zm
);
1967 len
-= be32_to_cpu(adsp1_alg
[i
].zm
);
1969 wm_adsp_create_control(dsp
, alg_region
, 0,
1971 SNDRV_CTL_ELEM_TYPE_BYTES
);
1973 adsp_warn(dsp
, "Missing length info for region ZM with ID %x\n",
1974 be32_to_cpu(adsp1_alg
[i
].alg
.id
));
1984 static int wm_adsp2_setup_algs(struct wm_adsp
*dsp
)
1986 struct wmfw_adsp2_id_hdr adsp2_id
;
1987 struct wmfw_adsp2_alg_hdr
*adsp2_alg
;
1988 struct wm_adsp_alg_region
*alg_region
;
1989 const struct wm_adsp_region
*mem
;
1990 unsigned int pos
, len
;
1994 mem
= wm_adsp_find_region(dsp
, WMFW_ADSP2_XM
);
1998 ret
= regmap_raw_read(dsp
->regmap
, mem
->base
, &adsp2_id
,
2001 adsp_err(dsp
, "Failed to read algorithm info: %d\n",
2006 n_algs
= be32_to_cpu(adsp2_id
.n_algs
);
2007 dsp
->fw_id
= be32_to_cpu(adsp2_id
.fw
.id
);
2008 dsp
->fw_id_version
= be32_to_cpu(adsp2_id
.fw
.ver
);
2009 adsp_info(dsp
, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
2011 (dsp
->fw_id_version
& 0xff0000) >> 16,
2012 (dsp
->fw_id_version
& 0xff00) >> 8,
2013 dsp
->fw_id_version
& 0xff,
2016 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_XM
,
2017 adsp2_id
.fw
.id
, adsp2_id
.xm
);
2018 if (IS_ERR(alg_region
))
2019 return PTR_ERR(alg_region
);
2021 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_YM
,
2022 adsp2_id
.fw
.id
, adsp2_id
.ym
);
2023 if (IS_ERR(alg_region
))
2024 return PTR_ERR(alg_region
);
2026 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_ZM
,
2027 adsp2_id
.fw
.id
, adsp2_id
.zm
);
2028 if (IS_ERR(alg_region
))
2029 return PTR_ERR(alg_region
);
2031 pos
= sizeof(adsp2_id
) / 2;
2032 len
= (sizeof(*adsp2_alg
) * n_algs
) / 2;
2034 adsp2_alg
= wm_adsp_read_algs(dsp
, n_algs
, mem
->base
+ pos
, len
);
2035 if (IS_ERR(adsp2_alg
))
2036 return PTR_ERR(adsp2_alg
);
2038 for (i
= 0; i
< n_algs
; i
++) {
2040 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
2041 i
, be32_to_cpu(adsp2_alg
[i
].alg
.id
),
2042 (be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff0000) >> 16,
2043 (be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff00) >> 8,
2044 be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff,
2045 be32_to_cpu(adsp2_alg
[i
].xm
),
2046 be32_to_cpu(adsp2_alg
[i
].ym
),
2047 be32_to_cpu(adsp2_alg
[i
].zm
));
2049 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_XM
,
2050 adsp2_alg
[i
].alg
.id
,
2052 if (IS_ERR(alg_region
)) {
2053 ret
= PTR_ERR(alg_region
);
2056 if (dsp
->fw_ver
== 0) {
2057 if (i
+ 1 < n_algs
) {
2058 len
= be32_to_cpu(adsp2_alg
[i
+ 1].xm
);
2059 len
-= be32_to_cpu(adsp2_alg
[i
].xm
);
2061 wm_adsp_create_control(dsp
, alg_region
, 0,
2063 SNDRV_CTL_ELEM_TYPE_BYTES
);
2065 adsp_warn(dsp
, "Missing length info for region XM with ID %x\n",
2066 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
2070 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_YM
,
2071 adsp2_alg
[i
].alg
.id
,
2073 if (IS_ERR(alg_region
)) {
2074 ret
= PTR_ERR(alg_region
);
2077 if (dsp
->fw_ver
== 0) {
2078 if (i
+ 1 < n_algs
) {
2079 len
= be32_to_cpu(adsp2_alg
[i
+ 1].ym
);
2080 len
-= be32_to_cpu(adsp2_alg
[i
].ym
);
2082 wm_adsp_create_control(dsp
, alg_region
, 0,
2084 SNDRV_CTL_ELEM_TYPE_BYTES
);
2086 adsp_warn(dsp
, "Missing length info for region YM with ID %x\n",
2087 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
2091 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_ZM
,
2092 adsp2_alg
[i
].alg
.id
,
2094 if (IS_ERR(alg_region
)) {
2095 ret
= PTR_ERR(alg_region
);
2098 if (dsp
->fw_ver
== 0) {
2099 if (i
+ 1 < n_algs
) {
2100 len
= be32_to_cpu(adsp2_alg
[i
+ 1].zm
);
2101 len
-= be32_to_cpu(adsp2_alg
[i
].zm
);
2103 wm_adsp_create_control(dsp
, alg_region
, 0,
2105 SNDRV_CTL_ELEM_TYPE_BYTES
);
2107 adsp_warn(dsp
, "Missing length info for region ZM with ID %x\n",
2108 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
2118 static int wm_adsp_load_coeff(struct wm_adsp
*dsp
)
2120 LIST_HEAD(buf_list
);
2121 struct regmap
*regmap
= dsp
->regmap
;
2122 struct wmfw_coeff_hdr
*hdr
;
2123 struct wmfw_coeff_item
*blk
;
2124 const struct firmware
*firmware
;
2125 const struct wm_adsp_region
*mem
;
2126 struct wm_adsp_alg_region
*alg_region
;
2127 const char *region_name
;
2128 int ret
, pos
, blocks
, type
, offset
, reg
;
2130 struct wm_adsp_buf
*buf
;
2132 file
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
2136 snprintf(file
, PAGE_SIZE
, "%s-dsp%d-%s.bin", dsp
->part
, dsp
->num
,
2137 wm_adsp_fw
[dsp
->fw
].file
);
2138 file
[PAGE_SIZE
- 1] = '\0';
2140 ret
= request_firmware(&firmware
, file
, dsp
->dev
);
2142 adsp_warn(dsp
, "Failed to request '%s'\n", file
);
2148 if (sizeof(*hdr
) >= firmware
->size
) {
2149 adsp_err(dsp
, "%s: file too short, %zu bytes\n",
2150 file
, firmware
->size
);
2154 hdr
= (void *)&firmware
->data
[0];
2155 if (memcmp(hdr
->magic
, "WMDR", 4) != 0) {
2156 adsp_err(dsp
, "%s: invalid magic\n", file
);
2160 switch (be32_to_cpu(hdr
->rev
) & 0xff) {
2164 adsp_err(dsp
, "%s: Unsupported coefficient file format %d\n",
2165 file
, be32_to_cpu(hdr
->rev
) & 0xff);
2170 adsp_dbg(dsp
, "%s: v%d.%d.%d\n", file
,
2171 (le32_to_cpu(hdr
->ver
) >> 16) & 0xff,
2172 (le32_to_cpu(hdr
->ver
) >> 8) & 0xff,
2173 le32_to_cpu(hdr
->ver
) & 0xff);
2175 pos
= le32_to_cpu(hdr
->len
);
2178 while (pos
< firmware
->size
&&
2179 pos
- firmware
->size
> sizeof(*blk
)) {
2180 blk
= (void *)(&firmware
->data
[pos
]);
2182 type
= le16_to_cpu(blk
->type
);
2183 offset
= le16_to_cpu(blk
->offset
);
2185 adsp_dbg(dsp
, "%s.%d: %x v%d.%d.%d\n",
2186 file
, blocks
, le32_to_cpu(blk
->id
),
2187 (le32_to_cpu(blk
->ver
) >> 16) & 0xff,
2188 (le32_to_cpu(blk
->ver
) >> 8) & 0xff,
2189 le32_to_cpu(blk
->ver
) & 0xff);
2190 adsp_dbg(dsp
, "%s.%d: %d bytes at 0x%x in %x\n",
2191 file
, blocks
, le32_to_cpu(blk
->len
), offset
, type
);
2194 region_name
= "Unknown";
2196 case (WMFW_NAME_TEXT
<< 8):
2197 case (WMFW_INFO_TEXT
<< 8):
2199 case (WMFW_ABSOLUTE
<< 8):
2201 * Old files may use this for global
2204 if (le32_to_cpu(blk
->id
) == dsp
->fw_id
&&
2206 region_name
= "global coefficients";
2207 mem
= wm_adsp_find_region(dsp
, type
);
2209 adsp_err(dsp
, "No ZM\n");
2212 reg
= wm_adsp_region_to_reg(mem
, 0);
2215 region_name
= "register";
2224 adsp_dbg(dsp
, "%s.%d: %d bytes in %x for %x\n",
2225 file
, blocks
, le32_to_cpu(blk
->len
),
2226 type
, le32_to_cpu(blk
->id
));
2228 mem
= wm_adsp_find_region(dsp
, type
);
2230 adsp_err(dsp
, "No base for region %x\n", type
);
2234 alg_region
= wm_adsp_find_alg_region(dsp
, type
,
2235 le32_to_cpu(blk
->id
));
2237 reg
= alg_region
->base
;
2238 reg
= wm_adsp_region_to_reg(mem
, reg
);
2241 adsp_err(dsp
, "No %x for algorithm %x\n",
2242 type
, le32_to_cpu(blk
->id
));
2247 adsp_err(dsp
, "%s.%d: Unknown region type %x at %d\n",
2248 file
, blocks
, type
, pos
);
2253 if ((pos
+ le32_to_cpu(blk
->len
) + sizeof(*blk
)) >
2256 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
2257 file
, blocks
, region_name
,
2258 le32_to_cpu(blk
->len
),
2264 buf
= wm_adsp_buf_alloc(blk
->data
,
2265 le32_to_cpu(blk
->len
),
2268 adsp_err(dsp
, "Out of memory\n");
2273 adsp_dbg(dsp
, "%s.%d: Writing %d bytes at %x\n",
2274 file
, blocks
, le32_to_cpu(blk
->len
),
2276 ret
= regmap_raw_write_async(regmap
, reg
, buf
->buf
,
2277 le32_to_cpu(blk
->len
));
2280 "%s.%d: Failed to write to %x in %s: %d\n",
2281 file
, blocks
, reg
, region_name
, ret
);
2285 pos
+= (le32_to_cpu(blk
->len
) + sizeof(*blk
) + 3) & ~0x03;
2289 ret
= regmap_async_complete(regmap
);
2291 adsp_err(dsp
, "Failed to complete async write: %d\n", ret
);
2293 if (pos
> firmware
->size
)
2294 adsp_warn(dsp
, "%s.%d: %zu bytes at end of file\n",
2295 file
, blocks
, pos
- firmware
->size
);
2297 wm_adsp_debugfs_save_binname(dsp
, file
);
2300 regmap_async_complete(regmap
);
2301 release_firmware(firmware
);
2302 wm_adsp_buf_free(&buf_list
);
2308 int wm_adsp1_init(struct wm_adsp
*dsp
)
2310 INIT_LIST_HEAD(&dsp
->alg_regions
);
2312 mutex_init(&dsp
->pwr_lock
);
2316 EXPORT_SYMBOL_GPL(wm_adsp1_init
);
2318 int wm_adsp1_event(struct snd_soc_dapm_widget
*w
,
2319 struct snd_kcontrol
*kcontrol
,
2322 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
2323 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
2324 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
2325 struct wm_coeff_ctl
*ctl
;
2331 mutex_lock(&dsp
->pwr_lock
);
2334 case SND_SOC_DAPM_POST_PMU
:
2335 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2336 ADSP1_SYS_ENA
, ADSP1_SYS_ENA
);
2339 * For simplicity set the DSP clock rate to be the
2340 * SYSCLK rate rather than making it configurable.
2342 if (dsp
->sysclk_reg
) {
2343 ret
= regmap_read(dsp
->regmap
, dsp
->sysclk_reg
, &val
);
2345 adsp_err(dsp
, "Failed to read SYSCLK state: %d\n",
2350 val
= (val
& dsp
->sysclk_mask
) >> dsp
->sysclk_shift
;
2352 ret
= regmap_update_bits(dsp
->regmap
,
2353 dsp
->base
+ ADSP1_CONTROL_31
,
2354 ADSP1_CLK_SEL_MASK
, val
);
2356 adsp_err(dsp
, "Failed to set clock rate: %d\n",
2362 ret
= wm_adsp_load(dsp
);
2366 ret
= wm_adsp1_setup_algs(dsp
);
2370 ret
= wm_adsp_load_coeff(dsp
);
2374 /* Initialize caches for enabled and unset controls */
2375 ret
= wm_coeff_init_control_caches(dsp
);
2379 /* Sync set controls */
2380 ret
= wm_coeff_sync_controls(dsp
);
2386 /* Start the core running */
2387 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2388 ADSP1_CORE_ENA
| ADSP1_START
,
2389 ADSP1_CORE_ENA
| ADSP1_START
);
2391 dsp
->running
= true;
2394 case SND_SOC_DAPM_PRE_PMD
:
2395 dsp
->running
= false;
2396 dsp
->booted
= false;
2399 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2400 ADSP1_CORE_ENA
| ADSP1_START
, 0);
2402 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_19
,
2403 ADSP1_WDMA_BUFFER_LENGTH_MASK
, 0);
2405 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2408 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
)
2412 wm_adsp_free_alg_regions(dsp
);
2419 mutex_unlock(&dsp
->pwr_lock
);
2424 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2427 mutex_unlock(&dsp
->pwr_lock
);
2431 EXPORT_SYMBOL_GPL(wm_adsp1_event
);
2433 static int wm_adsp2_ena(struct wm_adsp
*dsp
)
2438 ret
= regmap_update_bits_async(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2439 ADSP2_SYS_ENA
, ADSP2_SYS_ENA
);
2443 /* Wait for the RAM to start, should be near instantaneous */
2444 for (count
= 0; count
< 10; ++count
) {
2445 ret
= regmap_read(dsp
->regmap
, dsp
->base
+ ADSP2_STATUS1
, &val
);
2449 if (val
& ADSP2_RAM_RDY
)
2452 usleep_range(250, 500);
2455 if (!(val
& ADSP2_RAM_RDY
)) {
2456 adsp_err(dsp
, "Failed to start DSP RAM\n");
2460 adsp_dbg(dsp
, "RAM ready after %d polls\n", count
);
2465 static void wm_adsp2_boot_work(struct work_struct
*work
)
2467 struct wm_adsp
*dsp
= container_of(work
,
2472 mutex_lock(&dsp
->pwr_lock
);
2474 ret
= regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2475 ADSP2_MEM_ENA
, ADSP2_MEM_ENA
);
2479 ret
= wm_adsp2_ena(dsp
);
2483 ret
= wm_adsp_load(dsp
);
2487 ret
= wm_adsp2_setup_algs(dsp
);
2491 ret
= wm_adsp_load_coeff(dsp
);
2495 /* Initialize caches for enabled and unset controls */
2496 ret
= wm_coeff_init_control_caches(dsp
);
2500 /* Turn DSP back off until we are ready to run */
2501 ret
= regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2508 mutex_unlock(&dsp
->pwr_lock
);
2513 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2514 ADSP2_SYS_ENA
| ADSP2_CORE_ENA
| ADSP2_START
, 0);
2516 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2519 mutex_unlock(&dsp
->pwr_lock
);
2522 static void wm_adsp2_set_dspclk(struct wm_adsp
*dsp
, unsigned int freq
)
2526 ret
= regmap_update_bits_async(dsp
->regmap
,
2527 dsp
->base
+ ADSP2_CLOCKING
,
2529 freq
<< ADSP2_CLK_SEL_SHIFT
);
2531 adsp_err(dsp
, "Failed to set clock rate: %d\n", ret
);
2534 int wm_adsp2_preloader_get(struct snd_kcontrol
*kcontrol
,
2535 struct snd_ctl_elem_value
*ucontrol
)
2537 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
2538 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
2540 ucontrol
->value
.integer
.value
[0] = dsp
->preloaded
;
2544 EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get
);
2546 int wm_adsp2_preloader_put(struct snd_kcontrol
*kcontrol
,
2547 struct snd_ctl_elem_value
*ucontrol
)
2549 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
2550 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
2551 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2552 struct soc_mixer_control
*mc
=
2553 (struct soc_mixer_control
*)kcontrol
->private_value
;
2556 snprintf(preload
, ARRAY_SIZE(preload
), "DSP%d Preload", mc
->shift
);
2558 dsp
->preloaded
= ucontrol
->value
.integer
.value
[0];
2560 if (ucontrol
->value
.integer
.value
[0])
2561 snd_soc_dapm_force_enable_pin(dapm
, preload
);
2563 snd_soc_dapm_disable_pin(dapm
, preload
);
2565 snd_soc_dapm_sync(dapm
);
2569 EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put
);
2571 int wm_adsp2_early_event(struct snd_soc_dapm_widget
*w
,
2572 struct snd_kcontrol
*kcontrol
, int event
,
2575 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
2576 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
2577 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
2578 struct wm_coeff_ctl
*ctl
;
2581 case SND_SOC_DAPM_PRE_PMU
:
2582 wm_adsp2_set_dspclk(dsp
, freq
);
2583 queue_work(system_unbound_wq
, &dsp
->boot_work
);
2585 case SND_SOC_DAPM_PRE_PMD
:
2586 mutex_lock(&dsp
->pwr_lock
);
2588 wm_adsp_debugfs_clear(dsp
);
2591 dsp
->fw_id_version
= 0;
2593 dsp
->booted
= false;
2595 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2598 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
)
2601 wm_adsp_free_alg_regions(dsp
);
2603 mutex_unlock(&dsp
->pwr_lock
);
2605 adsp_dbg(dsp
, "Shutdown complete\n");
2613 EXPORT_SYMBOL_GPL(wm_adsp2_early_event
);
2615 int wm_adsp2_event(struct snd_soc_dapm_widget
*w
,
2616 struct snd_kcontrol
*kcontrol
, int event
)
2618 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
2619 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
2620 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
2624 case SND_SOC_DAPM_POST_PMU
:
2625 flush_work(&dsp
->boot_work
);
2627 mutex_lock(&dsp
->pwr_lock
);
2634 ret
= wm_adsp2_ena(dsp
);
2638 /* Sync set controls */
2639 ret
= wm_coeff_sync_controls(dsp
);
2643 ret
= regmap_update_bits(dsp
->regmap
,
2644 dsp
->base
+ ADSP2_CONTROL
,
2645 ADSP2_CORE_ENA
| ADSP2_START
,
2646 ADSP2_CORE_ENA
| ADSP2_START
);
2650 if (wm_adsp_fw
[dsp
->fw
].num_caps
!= 0) {
2651 ret
= wm_adsp_buffer_init(dsp
);
2656 dsp
->running
= true;
2658 mutex_unlock(&dsp
->pwr_lock
);
2662 case SND_SOC_DAPM_PRE_PMD
:
2663 /* Tell the firmware to cleanup */
2664 wm_adsp_signal_event_controls(dsp
, WM_ADSP_FW_EVENT_SHUTDOWN
);
2666 /* Log firmware state, it can be useful for analysis */
2667 wm_adsp2_show_fw_status(dsp
);
2669 mutex_lock(&dsp
->pwr_lock
);
2671 dsp
->running
= false;
2673 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2674 ADSP2_CORE_ENA
| ADSP2_START
, 0);
2676 /* Make sure DMAs are quiesced */
2677 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_RDMA_CONFIG_1
, 0);
2678 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_WDMA_CONFIG_1
, 0);
2679 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_WDMA_CONFIG_2
, 0);
2681 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2684 if (wm_adsp_fw
[dsp
->fw
].num_caps
!= 0)
2685 wm_adsp_buffer_free(dsp
);
2687 mutex_unlock(&dsp
->pwr_lock
);
2689 adsp_dbg(dsp
, "Execution stopped\n");
2698 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2699 ADSP2_SYS_ENA
| ADSP2_CORE_ENA
| ADSP2_START
, 0);
2700 mutex_unlock(&dsp
->pwr_lock
);
2703 EXPORT_SYMBOL_GPL(wm_adsp2_event
);
2705 int wm_adsp2_codec_probe(struct wm_adsp
*dsp
, struct snd_soc_codec
*codec
)
2707 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2710 snprintf(preload
, ARRAY_SIZE(preload
), "DSP%d Preload", dsp
->num
);
2711 snd_soc_dapm_disable_pin(dapm
, preload
);
2713 wm_adsp2_init_debugfs(dsp
, codec
);
2717 return snd_soc_add_codec_controls(codec
,
2718 &wm_adsp_fw_controls
[dsp
->num
- 1],
2721 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe
);
2723 int wm_adsp2_codec_remove(struct wm_adsp
*dsp
, struct snd_soc_codec
*codec
)
2725 wm_adsp2_cleanup_debugfs(dsp
);
2729 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove
);
2731 int wm_adsp2_init(struct wm_adsp
*dsp
)
2736 * Disable the DSP memory by default when in reset for a small
2739 ret
= regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2742 adsp_err(dsp
, "Failed to clear memory retention: %d\n", ret
);
2746 INIT_LIST_HEAD(&dsp
->alg_regions
);
2747 INIT_LIST_HEAD(&dsp
->ctl_list
);
2748 INIT_WORK(&dsp
->boot_work
, wm_adsp2_boot_work
);
2750 mutex_init(&dsp
->pwr_lock
);
2754 EXPORT_SYMBOL_GPL(wm_adsp2_init
);
2756 void wm_adsp2_remove(struct wm_adsp
*dsp
)
2758 struct wm_coeff_ctl
*ctl
;
2760 while (!list_empty(&dsp
->ctl_list
)) {
2761 ctl
= list_first_entry(&dsp
->ctl_list
, struct wm_coeff_ctl
,
2763 list_del(&ctl
->list
);
2764 wm_adsp_free_ctl_blk(ctl
);
2767 EXPORT_SYMBOL_GPL(wm_adsp2_remove
);
2769 static inline int wm_adsp_compr_attached(struct wm_adsp_compr
*compr
)
2771 return compr
->buf
!= NULL
;
2774 static int wm_adsp_compr_attach(struct wm_adsp_compr
*compr
)
2777 * Note this will be more complex once each DSP can support multiple
2780 if (!compr
->dsp
->buffer
)
2783 compr
->buf
= compr
->dsp
->buffer
;
2784 compr
->buf
->compr
= compr
;
2789 static void wm_adsp_compr_detach(struct wm_adsp_compr
*compr
)
2794 /* Wake the poll so it can see buffer is no longer attached */
2796 snd_compr_fragment_elapsed(compr
->stream
);
2798 if (wm_adsp_compr_attached(compr
)) {
2799 compr
->buf
->compr
= NULL
;
2804 int wm_adsp_compr_open(struct wm_adsp
*dsp
, struct snd_compr_stream
*stream
)
2806 struct wm_adsp_compr
*compr
;
2809 mutex_lock(&dsp
->pwr_lock
);
2811 if (wm_adsp_fw
[dsp
->fw
].num_caps
== 0) {
2812 adsp_err(dsp
, "Firmware does not support compressed API\n");
2817 if (wm_adsp_fw
[dsp
->fw
].compr_direction
!= stream
->direction
) {
2818 adsp_err(dsp
, "Firmware does not support stream direction\n");
2824 /* It is expect this limitation will be removed in future */
2825 adsp_err(dsp
, "Only a single stream supported per DSP\n");
2830 compr
= kzalloc(sizeof(*compr
), GFP_KERNEL
);
2837 compr
->stream
= stream
;
2841 stream
->runtime
->private_data
= compr
;
2844 mutex_unlock(&dsp
->pwr_lock
);
2848 EXPORT_SYMBOL_GPL(wm_adsp_compr_open
);
2850 int wm_adsp_compr_free(struct snd_compr_stream
*stream
)
2852 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2853 struct wm_adsp
*dsp
= compr
->dsp
;
2855 mutex_lock(&dsp
->pwr_lock
);
2857 wm_adsp_compr_detach(compr
);
2860 kfree(compr
->raw_buf
);
2863 mutex_unlock(&dsp
->pwr_lock
);
2867 EXPORT_SYMBOL_GPL(wm_adsp_compr_free
);
2869 static int wm_adsp_compr_check_params(struct snd_compr_stream
*stream
,
2870 struct snd_compr_params
*params
)
2872 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2873 struct wm_adsp
*dsp
= compr
->dsp
;
2874 const struct wm_adsp_fw_caps
*caps
;
2875 const struct snd_codec_desc
*desc
;
2878 if (params
->buffer
.fragment_size
< WM_ADSP_MIN_FRAGMENT_SIZE
||
2879 params
->buffer
.fragment_size
> WM_ADSP_MAX_FRAGMENT_SIZE
||
2880 params
->buffer
.fragments
< WM_ADSP_MIN_FRAGMENTS
||
2881 params
->buffer
.fragments
> WM_ADSP_MAX_FRAGMENTS
||
2882 params
->buffer
.fragment_size
% WM_ADSP_DATA_WORD_SIZE
) {
2883 adsp_err(dsp
, "Invalid buffer fragsize=%d fragments=%d\n",
2884 params
->buffer
.fragment_size
,
2885 params
->buffer
.fragments
);
2890 for (i
= 0; i
< wm_adsp_fw
[dsp
->fw
].num_caps
; i
++) {
2891 caps
= &wm_adsp_fw
[dsp
->fw
].caps
[i
];
2894 if (caps
->id
!= params
->codec
.id
)
2897 if (stream
->direction
== SND_COMPRESS_PLAYBACK
) {
2898 if (desc
->max_ch
< params
->codec
.ch_out
)
2901 if (desc
->max_ch
< params
->codec
.ch_in
)
2905 if (!(desc
->formats
& (1 << params
->codec
.format
)))
2908 for (j
= 0; j
< desc
->num_sample_rates
; ++j
)
2909 if (desc
->sample_rates
[j
] == params
->codec
.sample_rate
)
2913 adsp_err(dsp
, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2914 params
->codec
.id
, params
->codec
.ch_in
, params
->codec
.ch_out
,
2915 params
->codec
.sample_rate
, params
->codec
.format
);
2919 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr
*compr
)
2921 return compr
->size
.fragment_size
/ WM_ADSP_DATA_WORD_SIZE
;
2924 int wm_adsp_compr_set_params(struct snd_compr_stream
*stream
,
2925 struct snd_compr_params
*params
)
2927 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2931 ret
= wm_adsp_compr_check_params(stream
, params
);
2935 compr
->size
= params
->buffer
;
2937 adsp_dbg(compr
->dsp
, "fragment_size=%d fragments=%d\n",
2938 compr
->size
.fragment_size
, compr
->size
.fragments
);
2940 size
= wm_adsp_compr_frag_words(compr
) * sizeof(*compr
->raw_buf
);
2941 compr
->raw_buf
= kmalloc(size
, GFP_DMA
| GFP_KERNEL
);
2942 if (!compr
->raw_buf
)
2945 compr
->sample_rate
= params
->codec
.sample_rate
;
2949 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params
);
2951 int wm_adsp_compr_get_caps(struct snd_compr_stream
*stream
,
2952 struct snd_compr_caps
*caps
)
2954 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2955 int fw
= compr
->dsp
->fw
;
2958 if (wm_adsp_fw
[fw
].caps
) {
2959 for (i
= 0; i
< wm_adsp_fw
[fw
].num_caps
; i
++)
2960 caps
->codecs
[i
] = wm_adsp_fw
[fw
].caps
[i
].id
;
2962 caps
->num_codecs
= i
;
2963 caps
->direction
= wm_adsp_fw
[fw
].compr_direction
;
2965 caps
->min_fragment_size
= WM_ADSP_MIN_FRAGMENT_SIZE
;
2966 caps
->max_fragment_size
= WM_ADSP_MAX_FRAGMENT_SIZE
;
2967 caps
->min_fragments
= WM_ADSP_MIN_FRAGMENTS
;
2968 caps
->max_fragments
= WM_ADSP_MAX_FRAGMENTS
;
2973 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps
);
2975 static int wm_adsp_read_data_block(struct wm_adsp
*dsp
, int mem_type
,
2976 unsigned int mem_addr
,
2977 unsigned int num_words
, u32
*data
)
2979 struct wm_adsp_region
const *mem
= wm_adsp_find_region(dsp
, mem_type
);
2980 unsigned int i
, reg
;
2986 reg
= wm_adsp_region_to_reg(mem
, mem_addr
);
2988 ret
= regmap_raw_read(dsp
->regmap
, reg
, data
,
2989 sizeof(*data
) * num_words
);
2993 for (i
= 0; i
< num_words
; ++i
)
2994 data
[i
] = be32_to_cpu(data
[i
]) & 0x00ffffffu
;
2999 static inline int wm_adsp_read_data_word(struct wm_adsp
*dsp
, int mem_type
,
3000 unsigned int mem_addr
, u32
*data
)
3002 return wm_adsp_read_data_block(dsp
, mem_type
, mem_addr
, 1, data
);
3005 static int wm_adsp_write_data_word(struct wm_adsp
*dsp
, int mem_type
,
3006 unsigned int mem_addr
, u32 data
)
3008 struct wm_adsp_region
const *mem
= wm_adsp_find_region(dsp
, mem_type
);
3014 reg
= wm_adsp_region_to_reg(mem
, mem_addr
);
3016 data
= cpu_to_be32(data
& 0x00ffffffu
);
3018 return regmap_raw_write(dsp
->regmap
, reg
, &data
, sizeof(data
));
3021 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf
*buf
,
3022 unsigned int field_offset
, u32
*data
)
3024 return wm_adsp_read_data_word(buf
->dsp
, WMFW_ADSP2_XM
,
3025 buf
->host_buf_ptr
+ field_offset
, data
);
3028 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf
*buf
,
3029 unsigned int field_offset
, u32 data
)
3031 return wm_adsp_write_data_word(buf
->dsp
, WMFW_ADSP2_XM
,
3032 buf
->host_buf_ptr
+ field_offset
, data
);
3035 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf
*buf
)
3037 struct wm_adsp_alg_region
*alg_region
;
3038 struct wm_adsp
*dsp
= buf
->dsp
;
3039 u32 xmalg
, addr
, magic
;
3042 alg_region
= wm_adsp_find_alg_region(dsp
, WMFW_ADSP2_XM
, dsp
->fw_id
);
3043 xmalg
= sizeof(struct wm_adsp_system_config_xm_hdr
) / sizeof(__be32
);
3045 addr
= alg_region
->base
+ xmalg
+ ALG_XM_FIELD(magic
);
3046 ret
= wm_adsp_read_data_word(dsp
, WMFW_ADSP2_XM
, addr
, &magic
);
3050 if (magic
!= WM_ADSP_ALG_XM_STRUCT_MAGIC
)
3053 addr
= alg_region
->base
+ xmalg
+ ALG_XM_FIELD(host_buf_ptr
);
3054 for (i
= 0; i
< 5; ++i
) {
3055 ret
= wm_adsp_read_data_word(dsp
, WMFW_ADSP2_XM
, addr
,
3056 &buf
->host_buf_ptr
);
3060 if (buf
->host_buf_ptr
)
3063 usleep_range(1000, 2000);
3066 if (!buf
->host_buf_ptr
)
3069 adsp_dbg(dsp
, "host_buf_ptr=%x\n", buf
->host_buf_ptr
);
3074 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf
*buf
)
3076 const struct wm_adsp_fw_caps
*caps
= wm_adsp_fw
[buf
->dsp
->fw
].caps
;
3077 struct wm_adsp_buffer_region
*region
;
3081 for (i
= 0; i
< caps
->num_regions
; ++i
) {
3082 region
= &buf
->regions
[i
];
3084 region
->offset
= offset
;
3085 region
->mem_type
= caps
->region_defs
[i
].mem_type
;
3087 ret
= wm_adsp_buffer_read(buf
, caps
->region_defs
[i
].base_offset
,
3088 ®ion
->base_addr
);
3092 ret
= wm_adsp_buffer_read(buf
, caps
->region_defs
[i
].size_offset
,
3097 region
->cumulative_size
= offset
;
3100 "region=%d type=%d base=%04x off=%04x size=%04x\n",
3101 i
, region
->mem_type
, region
->base_addr
,
3102 region
->offset
, region
->cumulative_size
);
3108 static int wm_adsp_buffer_init(struct wm_adsp
*dsp
)
3110 struct wm_adsp_compr_buf
*buf
;
3113 buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
3118 buf
->read_index
= -1;
3119 buf
->irq_count
= 0xFFFFFFFF;
3121 ret
= wm_adsp_buffer_locate(buf
);
3123 adsp_err(dsp
, "Failed to acquire host buffer: %d\n", ret
);
3127 buf
->regions
= kcalloc(wm_adsp_fw
[dsp
->fw
].caps
->num_regions
,
3128 sizeof(*buf
->regions
), GFP_KERNEL
);
3129 if (!buf
->regions
) {
3134 ret
= wm_adsp_buffer_populate(buf
);
3136 adsp_err(dsp
, "Failed to populate host buffer: %d\n", ret
);
3145 kfree(buf
->regions
);
3151 static int wm_adsp_buffer_free(struct wm_adsp
*dsp
)
3154 wm_adsp_compr_detach(dsp
->buffer
->compr
);
3156 kfree(dsp
->buffer
->regions
);
3165 int wm_adsp_compr_trigger(struct snd_compr_stream
*stream
, int cmd
)
3167 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
3168 struct wm_adsp
*dsp
= compr
->dsp
;
3171 adsp_dbg(dsp
, "Trigger: %d\n", cmd
);
3173 mutex_lock(&dsp
->pwr_lock
);
3176 case SNDRV_PCM_TRIGGER_START
:
3177 if (wm_adsp_compr_attached(compr
))
3180 ret
= wm_adsp_compr_attach(compr
);
3182 adsp_err(dsp
, "Failed to link buffer and stream: %d\n",
3187 /* Trigger the IRQ at one fragment of data */
3188 ret
= wm_adsp_buffer_write(compr
->buf
,
3189 HOST_BUFFER_FIELD(high_water_mark
),
3190 wm_adsp_compr_frag_words(compr
));
3192 adsp_err(dsp
, "Failed to set high water mark: %d\n",
3197 case SNDRV_PCM_TRIGGER_STOP
:
3204 mutex_unlock(&dsp
->pwr_lock
);
3208 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger
);
3210 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf
*buf
)
3212 int last_region
= wm_adsp_fw
[buf
->dsp
->fw
].caps
->num_regions
- 1;
3214 return buf
->regions
[last_region
].cumulative_size
;
3217 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf
*buf
)
3219 u32 next_read_index
, next_write_index
;
3220 int write_index
, read_index
, avail
;
3223 /* Only sync read index if we haven't already read a valid index */
3224 if (buf
->read_index
< 0) {
3225 ret
= wm_adsp_buffer_read(buf
,
3226 HOST_BUFFER_FIELD(next_read_index
),
3231 read_index
= sign_extend32(next_read_index
, 23);
3233 if (read_index
< 0) {
3234 adsp_dbg(buf
->dsp
, "Avail check on unstarted stream\n");
3238 buf
->read_index
= read_index
;
3241 ret
= wm_adsp_buffer_read(buf
, HOST_BUFFER_FIELD(next_write_index
),
3246 write_index
= sign_extend32(next_write_index
, 23);
3248 avail
= write_index
- buf
->read_index
;
3250 avail
+= wm_adsp_buffer_size(buf
);
3252 adsp_dbg(buf
->dsp
, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
3253 buf
->read_index
, write_index
, avail
* WM_ADSP_DATA_WORD_SIZE
);
3260 static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf
*buf
)
3264 ret
= wm_adsp_buffer_read(buf
, HOST_BUFFER_FIELD(error
), &buf
->error
);
3266 adsp_err(buf
->dsp
, "Failed to check buffer error: %d\n", ret
);
3269 if (buf
->error
!= 0) {
3270 adsp_err(buf
->dsp
, "Buffer error occurred: %d\n", buf
->error
);
3277 int wm_adsp_compr_handle_irq(struct wm_adsp
*dsp
)
3279 struct wm_adsp_compr_buf
*buf
;
3280 struct wm_adsp_compr
*compr
;
3283 mutex_lock(&dsp
->pwr_lock
);
3293 adsp_dbg(dsp
, "Handling buffer IRQ\n");
3295 ret
= wm_adsp_buffer_get_error(buf
);
3297 goto out_notify
; /* Wake poll to report error */
3299 ret
= wm_adsp_buffer_read(buf
, HOST_BUFFER_FIELD(irq_count
),
3302 adsp_err(dsp
, "Failed to get irq_count: %d\n", ret
);
3306 ret
= wm_adsp_buffer_update_avail(buf
);
3308 adsp_err(dsp
, "Error reading avail: %d\n", ret
);
3312 if (wm_adsp_fw
[dsp
->fw
].voice_trigger
&& buf
->irq_count
== 2)
3313 ret
= WM_ADSP_COMPR_VOICE_TRIGGER
;
3316 if (compr
&& compr
->stream
)
3317 snd_compr_fragment_elapsed(compr
->stream
);
3320 mutex_unlock(&dsp
->pwr_lock
);
3324 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq
);
3326 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf
*buf
)
3328 if (buf
->irq_count
& 0x01)
3331 adsp_dbg(buf
->dsp
, "Enable IRQ(0x%x) for next fragment\n",
3334 buf
->irq_count
|= 0x01;
3336 return wm_adsp_buffer_write(buf
, HOST_BUFFER_FIELD(irq_ack
),
3340 int wm_adsp_compr_pointer(struct snd_compr_stream
*stream
,
3341 struct snd_compr_tstamp
*tstamp
)
3343 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
3344 struct wm_adsp
*dsp
= compr
->dsp
;
3345 struct wm_adsp_compr_buf
*buf
;
3348 adsp_dbg(dsp
, "Pointer request\n");
3350 mutex_lock(&dsp
->pwr_lock
);
3354 if (!compr
->buf
|| compr
->buf
->error
) {
3355 snd_compr_stop_error(stream
, SNDRV_PCM_STATE_XRUN
);
3360 if (buf
->avail
< wm_adsp_compr_frag_words(compr
)) {
3361 ret
= wm_adsp_buffer_update_avail(buf
);
3363 adsp_err(dsp
, "Error reading avail: %d\n", ret
);
3368 * If we really have less than 1 fragment available tell the
3369 * DSP to inform us once a whole fragment is available.
3371 if (buf
->avail
< wm_adsp_compr_frag_words(compr
)) {
3372 ret
= wm_adsp_buffer_get_error(buf
);
3374 if (compr
->buf
->error
)
3375 snd_compr_stop_error(stream
,
3376 SNDRV_PCM_STATE_XRUN
);
3380 ret
= wm_adsp_buffer_reenable_irq(buf
);
3383 "Failed to re-enable buffer IRQ: %d\n",
3390 tstamp
->copied_total
= compr
->copied_total
;
3391 tstamp
->copied_total
+= buf
->avail
* WM_ADSP_DATA_WORD_SIZE
;
3392 tstamp
->sampling_rate
= compr
->sample_rate
;
3395 mutex_unlock(&dsp
->pwr_lock
);
3399 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer
);
3401 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr
*compr
, int target
)
3403 struct wm_adsp_compr_buf
*buf
= compr
->buf
;
3404 u8
*pack_in
= (u8
*)compr
->raw_buf
;
3405 u8
*pack_out
= (u8
*)compr
->raw_buf
;
3406 unsigned int adsp_addr
;
3407 int mem_type
, nwords
, max_read
;
3410 /* Calculate read parameters */
3411 for (i
= 0; i
< wm_adsp_fw
[buf
->dsp
->fw
].caps
->num_regions
; ++i
)
3412 if (buf
->read_index
< buf
->regions
[i
].cumulative_size
)
3415 if (i
== wm_adsp_fw
[buf
->dsp
->fw
].caps
->num_regions
)
3418 mem_type
= buf
->regions
[i
].mem_type
;
3419 adsp_addr
= buf
->regions
[i
].base_addr
+
3420 (buf
->read_index
- buf
->regions
[i
].offset
);
3422 max_read
= wm_adsp_compr_frag_words(compr
);
3423 nwords
= buf
->regions
[i
].cumulative_size
- buf
->read_index
;
3425 if (nwords
> target
)
3427 if (nwords
> buf
->avail
)
3428 nwords
= buf
->avail
;
3429 if (nwords
> max_read
)
3434 /* Read data from DSP */
3435 ret
= wm_adsp_read_data_block(buf
->dsp
, mem_type
, adsp_addr
,
3436 nwords
, compr
->raw_buf
);
3440 /* Remove the padding bytes from the data read from the DSP */
3441 for (i
= 0; i
< nwords
; i
++) {
3442 for (j
= 0; j
< WM_ADSP_DATA_WORD_SIZE
; j
++)
3443 *pack_out
++ = *pack_in
++;
3445 pack_in
+= sizeof(*(compr
->raw_buf
)) - WM_ADSP_DATA_WORD_SIZE
;
3448 /* update read index to account for words read */
3449 buf
->read_index
+= nwords
;
3450 if (buf
->read_index
== wm_adsp_buffer_size(buf
))
3451 buf
->read_index
= 0;
3453 ret
= wm_adsp_buffer_write(buf
, HOST_BUFFER_FIELD(next_read_index
),
3458 /* update avail to account for words read */
3459 buf
->avail
-= nwords
;
3464 static int wm_adsp_compr_read(struct wm_adsp_compr
*compr
,
3465 char __user
*buf
, size_t count
)
3467 struct wm_adsp
*dsp
= compr
->dsp
;
3471 adsp_dbg(dsp
, "Requested read of %zu bytes\n", count
);
3473 if (!compr
->buf
|| compr
->buf
->error
) {
3474 snd_compr_stop_error(compr
->stream
, SNDRV_PCM_STATE_XRUN
);
3478 count
/= WM_ADSP_DATA_WORD_SIZE
;
3481 nwords
= wm_adsp_buffer_capture_block(compr
, count
);
3483 adsp_err(dsp
, "Failed to capture block: %d\n", nwords
);
3487 nbytes
= nwords
* WM_ADSP_DATA_WORD_SIZE
;
3489 adsp_dbg(dsp
, "Read %d bytes\n", nbytes
);
3491 if (copy_to_user(buf
+ ntotal
, compr
->raw_buf
, nbytes
)) {
3492 adsp_err(dsp
, "Failed to copy data to user: %d, %d\n",
3499 } while (nwords
> 0 && count
> 0);
3501 compr
->copied_total
+= ntotal
;
3506 int wm_adsp_compr_copy(struct snd_compr_stream
*stream
, char __user
*buf
,
3509 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
3510 struct wm_adsp
*dsp
= compr
->dsp
;
3513 mutex_lock(&dsp
->pwr_lock
);
3515 if (stream
->direction
== SND_COMPRESS_CAPTURE
)
3516 ret
= wm_adsp_compr_read(compr
, buf
, count
);
3520 mutex_unlock(&dsp
->pwr_lock
);
3524 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy
);
3526 MODULE_LICENSE("GPL v2");