sound/soc/fsl/fsl_ssi.c

   1 /*
   2  * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
   3  *
   4  * Author: Timur Tabi <timur@freescale.com>
   5  *
   6  * Copyright 2007-2008 Freescale Semiconductor, Inc.  This file is licensed
   7  * under the terms of the GNU General Public License version 2.  This
   8  * program is licensed "as is" without any warranty of any kind, whether
   9  * express or implied.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/device.h>
  16 #include <linux/delay.h>
  17
  18 #include <sound/core.h>
  19 #include <sound/pcm.h>
  20 #include <sound/pcm_params.h>
  21 #include <sound/initval.h>
  22 #include <sound/soc.h>
  23
  24 #include <asm/immap_86xx.h>
  25
  26 #include "fsl_ssi.h"
  27
  28 /**
  29  * FSLSSI_I2S_RATES: sample rates supported by the I2S
  30  *
  31  * This driver currently only supports the SSI running in I2S slave mode,
  32  * which means the codec determines the sample rate.  Therefore, we tell
  33  * ALSA that we support all rates and let the codec driver decide what rates
  34  * are really supported.
  35  */
  36 #define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
  37                           SNDRV_PCM_RATE_CONTINUOUS)
  38
  39 /**
  40  * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
  41  *
  42  * This driver currently only supports the SSI running in I2S slave mode.
  43  *
  44  * The SSI has a limitation in that the samples must be in the same byte
  45  * order as the host CPU.  This is because when multiple bytes are written
  46  * to the STX register, the bytes and bits must be written in the same
  47  * order.  The STX is a shift register, so all the bits need to be aligned
  48  * (bit-endianness must match byte-endianness).  Processors typically write
  49  * the bits within a byte in the same order that the bytes of a word are
  50  * written in.  So if the host CPU is big-endian, then only big-endian
  51  * samples will be written to STX properly.
  52  */
  53 #ifdef __BIG_ENDIAN
  54 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
  55          SNDRV_PCM_FMTBIT_S18_3BE | SNDRV_PCM_FMTBIT_S20_3BE | \
  56          SNDRV_PCM_FMTBIT_S24_3BE | SNDRV_PCM_FMTBIT_S24_BE)
  57 #else
  58 #define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
  59          SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  60          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
  61 #endif
  62
  63 /**
  64  * fsl_ssi_private: per-SSI private data
  65  *
  66  * @name: short name for this device ("SSI0", "SSI1", etc)
  67  * @ssi: pointer to the SSI's registers
  68  * @ssi_phys: physical address of the SSI registers
  69  * @irq: IRQ of this SSI
  70  * @first_stream: pointer to the stream that was opened first
  71  * @second_stream: pointer to second stream
  72  * @dev: struct device pointer
  73  * @playback: the number of playback streams opened
  74  * @capture: the number of capture streams opened
  75  * @asynchronous: 0=synchronous mode, 1=asynchronous mode
  76  * @cpu_dai: the CPU DAI for this device
  77  * @dev_attr: the sysfs device attribute structure
  78  * @stats: SSI statistics
  79  */
  80 struct fsl_ssi_private {
  81         char name[8];
  82         struct ccsr_ssi __iomem *ssi;
  83         dma_addr_t ssi_phys;
  84         unsigned int irq;
  85         struct snd_pcm_substream *first_stream;
  86         struct snd_pcm_substream *second_stream;
  87         struct device *dev;
  88         unsigned int playback;
  89         unsigned int capture;
  90         int asynchronous;
  91         struct snd_soc_dai cpu_dai;
  92         struct device_attribute dev_attr;
  93
  94         struct {
  95                 unsigned int rfrc;
  96                 unsigned int tfrc;
  97                 unsigned int cmdau;
  98                 unsigned int cmddu;
  99                 unsigned int rxt;
 100                 unsigned int rdr1;
 101                 unsigned int rdr0;
 102                 unsigned int tde1;
 103                 unsigned int tde0;
 104                 unsigned int roe1;
 105                 unsigned int roe0;
 106                 unsigned int tue1;
 107                 unsigned int tue0;
 108                 unsigned int tfs;
 109                 unsigned int rfs;
 110                 unsigned int tls;
 111                 unsigned int rls;
 112                 unsigned int rff1;
 113                 unsigned int rff0;
 114                 unsigned int tfe1;
 115                 unsigned int tfe0;
 116         } stats;
 117 };
 118
 119 /**
 120  * fsl_ssi_isr: SSI interrupt handler
 121  *
 122  * Although it's possible to use the interrupt handler to send and receive
 123  * data to/from the SSI, we use the DMA instead.  Programming is more
 124  * complicated, but the performance is much better.
 125  *
 126  * This interrupt handler is used only to gather statistics.
 127  *
 128  * @irq: IRQ of the SSI device
 129  * @dev_id: pointer to the ssi_private structure for this SSI device
 130  */
 131 static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
 132 {
 133         struct fsl_ssi_private *ssi_private = dev_id;
 134         struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 135         irqreturn_t ret = IRQ_NONE;
 136         __be32 sisr;
 137         __be32 sisr2 = 0;
 138
 139         /* We got an interrupt, so read the status register to see what we
 140            were interrupted for.  We mask it with the Interrupt Enable register
 141            so that we only check for events that we're interested in.
 142          */
 143         sisr = in_be32(&ssi->sisr) & in_be32(&ssi->sier);
 144
 145         if (sisr & CCSR_SSI_SISR_RFRC) {
 146                 ssi_private->stats.rfrc++;
 147                 sisr2 |= CCSR_SSI_SISR_RFRC;
 148                 ret = IRQ_HANDLED;
 149         }
 150
 151         if (sisr & CCSR_SSI_SISR_TFRC) {
 152                 ssi_private->stats.tfrc++;
 153                 sisr2 |= CCSR_SSI_SISR_TFRC;
 154                 ret = IRQ_HANDLED;
 155         }
 156
 157         if (sisr & CCSR_SSI_SISR_CMDAU) {
 158                 ssi_private->stats.cmdau++;
 159                 ret = IRQ_HANDLED;
 160         }
 161
 162         if (sisr & CCSR_SSI_SISR_CMDDU) {
 163                 ssi_private->stats.cmddu++;
 164                 ret = IRQ_HANDLED;
 165         }
 166
 167         if (sisr & CCSR_SSI_SISR_RXT) {
 168                 ssi_private->stats.rxt++;
 169                 ret = IRQ_HANDLED;
 170         }
 171
 172         if (sisr & CCSR_SSI_SISR_RDR1) {
 173                 ssi_private->stats.rdr1++;
 174                 ret = IRQ_HANDLED;
 175         }
 176
 177         if (sisr & CCSR_SSI_SISR_RDR0) {
 178                 ssi_private->stats.rdr0++;
 179                 ret = IRQ_HANDLED;
 180         }
 181
 182         if (sisr & CCSR_SSI_SISR_TDE1) {
 183                 ssi_private->stats.tde1++;
 184                 ret = IRQ_HANDLED;
 185         }
 186
 187         if (sisr & CCSR_SSI_SISR_TDE0) {
 188                 ssi_private->stats.tde0++;
 189                 ret = IRQ_HANDLED;
 190         }
 191
 192         if (sisr & CCSR_SSI_SISR_ROE1) {
 193                 ssi_private->stats.roe1++;
 194                 sisr2 |= CCSR_SSI_SISR_ROE1;
 195                 ret = IRQ_HANDLED;
 196         }
 197
 198         if (sisr & CCSR_SSI_SISR_ROE0) {
 199                 ssi_private->stats.roe0++;
 200                 sisr2 |= CCSR_SSI_SISR_ROE0;
 201                 ret = IRQ_HANDLED;
 202         }
 203
 204         if (sisr & CCSR_SSI_SISR_TUE1) {
 205                 ssi_private->stats.tue1++;
 206                 sisr2 |= CCSR_SSI_SISR_TUE1;
 207                 ret = IRQ_HANDLED;
 208         }
 209
 210         if (sisr & CCSR_SSI_SISR_TUE0) {
 211                 ssi_private->stats.tue0++;
 212                 sisr2 |= CCSR_SSI_SISR_TUE0;
 213                 ret = IRQ_HANDLED;
 214         }
 215
 216         if (sisr & CCSR_SSI_SISR_TFS) {
 217                 ssi_private->stats.tfs++;
 218                 ret = IRQ_HANDLED;
 219         }
 220
 221         if (sisr & CCSR_SSI_SISR_RFS) {
 222                 ssi_private->stats.rfs++;
 223                 ret = IRQ_HANDLED;
 224         }
 225
 226         if (sisr & CCSR_SSI_SISR_TLS) {
 227                 ssi_private->stats.tls++;
 228                 ret = IRQ_HANDLED;
 229         }
 230
 231         if (sisr & CCSR_SSI_SISR_RLS) {
 232                 ssi_private->stats.rls++;
 233                 ret = IRQ_HANDLED;
 234         }
 235
 236         if (sisr & CCSR_SSI_SISR_RFF1) {
 237                 ssi_private->stats.rff1++;
 238                 ret = IRQ_HANDLED;
 239         }
 240
 241         if (sisr & CCSR_SSI_SISR_RFF0) {
 242                 ssi_private->stats.rff0++;
 243                 ret = IRQ_HANDLED;
 244         }
 245
 246         if (sisr & CCSR_SSI_SISR_TFE1) {
 247                 ssi_private->stats.tfe1++;
 248                 ret = IRQ_HANDLED;
 249         }
 250
 251         if (sisr & CCSR_SSI_SISR_TFE0) {
 252                 ssi_private->stats.tfe0++;
 253                 ret = IRQ_HANDLED;
 254         }
 255
 256         /* Clear the bits that we set */
 257         if (sisr2)
 258                 out_be32(&ssi->sisr, sisr2);
 259
 260         return ret;
 261 }
 262
 263 /**
 264  * fsl_ssi_startup: create a new substream
 265  *
 266  * This is the first function called when a stream is opened.
 267  *
 268  * If this is the first stream open, then grab the IRQ and program most of
 269  * the SSI registers.
 270  */
 271 static int fsl_ssi_startup(struct snd_pcm_substream *substream,
 272                            struct snd_soc_dai *dai)
 273 {
 274         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 275         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 276
 277         /*
 278          * If this is the first stream opened, then request the IRQ
 279          * and initialize the SSI registers.
 280          */
 281         if (!ssi_private->playback && !ssi_private->capture) {
 282                 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 283                 int ret;
 284
 285                 ret = request_irq(ssi_private->irq, fsl_ssi_isr, 0,
 286                                   ssi_private->name, ssi_private);
 287                 if (ret < 0) {
 288                         dev_err(substream->pcm->card->dev,
 289                                 "could not claim irq %u\n", ssi_private->irq);
 290                         return ret;
 291                 }
 292
 293                 /*
 294                  * Section 16.5 of the MPC8610 reference manual says that the
 295                  * SSI needs to be disabled before updating the registers we set
 296                  * here.
 297                  */
 298                 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 299
 300                 /*
 301                  * Program the SSI into I2S Slave Non-Network Synchronous mode.
 302                  * Also enable the transmit and receive FIFO.
 303                  *
 304                  * FIXME: Little-endian samples require a different shift dir
 305                  */
 306                 clrsetbits_be32(&ssi->scr,
 307                         CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN,
 308                         CCSR_SSI_SCR_TFR_CLK_DIS | CCSR_SSI_SCR_I2S_MODE_SLAVE
 309                         | (ssi_private->asynchronous ? 0 : CCSR_SSI_SCR_SYN));
 310
 311                 out_be32(&ssi->stcr,
 312                          CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
 313                          CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS |
 314                          CCSR_SSI_STCR_TSCKP);
 315
 316                 out_be32(&ssi->srcr,
 317                          CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 |
 318                          CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS |
 319                          CCSR_SSI_SRCR_RSCKP);
 320
 321                 /*
 322                  * The DC and PM bits are only used if the SSI is the clock
 323                  * master.
 324                  */
 325
 326                 /* 4. Enable the interrupts and DMA requests */
 327                 out_be32(&ssi->sier,
 328                          CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE |
 329                          CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN |
 330                          CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN |
 331                          CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE |
 332                          CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN);
 333
 334                 /*
 335                  * Set the watermark for transmit FIFI 0 and receive FIFO 0. We
 336                  * don't use FIFO 1.  Since the SSI only supports stereo, the
 337                  * watermark should never be an odd number.
 338                  */
 339                 out_be32(&ssi->sfcsr,
 340                          CCSR_SSI_SFCSR_TFWM0(6) | CCSR_SSI_SFCSR_RFWM0(2));
 341
 342                 /*
 343                  * We keep the SSI disabled because if we enable it, then the
 344                  * DMA controller will start.  It's not supposed to start until
 345                  * the SCR.TE (or SCR.RE) bit is set, but it does anyway.  The
 346                  * DMA controller will transfer one "BWC" of data (i.e. the
 347                  * amount of data that the MR.BWC bits are set to).  The reason
 348                  * this is bad is because at this point, the PCM driver has not
 349                  * finished initializing the DMA controller.
 350                  */
 351         }
 352
 353         if (!ssi_private->first_stream)
 354                 ssi_private->first_stream = substream;
 355         else {
 356                 /* This is the second stream open, so we need to impose sample
 357                  * rate and maybe sample size constraints.  Note that this can
 358                  * cause a race condition if the second stream is opened before
 359                  * the first stream is fully initialized.
 360                  *
 361                  * We provide some protection by checking to make sure the first
 362                  * stream is initialized, but it's not perfect.  ALSA sometimes
 363                  * re-initializes the driver with a different sample rate or
 364                  * size.  If the second stream is opened before the first stream
 365                  * has received its final parameters, then the second stream may
 366                  * be constrained to the wrong sample rate or size.
 367                  *
 368                  * FIXME: This code does not handle opening and closing streams
 369                  * repeatedly.  If you open two streams and then close the first
 370                  * one, you may not be able to open another stream until you
 371                  * close the second one as well.
 372                  */
 373                 struct snd_pcm_runtime *first_runtime =
 374                         ssi_private->first_stream->runtime;
 375
 376                 if (!first_runtime->rate || !first_runtime->sample_bits) {
 377                         dev_err(substream->pcm->card->dev,
 378                                 "set sample rate and size in %s stream first\n",
 379                                 substream->stream == SNDRV_PCM_STREAM_PLAYBACK
 380                                 ? "capture" : "playback");
 381                         return -EAGAIN;
 382                 }
 383
 384                 snd_pcm_hw_constraint_minmax(substream->runtime,
 385                         SNDRV_PCM_HW_PARAM_RATE,
 386                         first_runtime->rate, first_runtime->rate);
 387
 388                 /* If we're in synchronous mode, then we need to constrain
 389                  * the sample size as well.  We don't support independent sample
 390                  * rates in asynchronous mode.
 391                  */
 392                 if (!ssi_private->asynchronous)
 393                         snd_pcm_hw_constraint_minmax(substream->runtime,
 394                                 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
 395                                 first_runtime->sample_bits,
 396                                 first_runtime->sample_bits);
 397
 398                 ssi_private->second_stream = substream;
 399         }
 400
 401         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 402                 ssi_private->playback++;
 403
 404         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 405                 ssi_private->capture++;
 406
 407         return 0;
 408 }
 409
 410 /**
 411  * fsl_ssi_hw_params - program the sample size
 412  *
 413  * Most of the SSI registers have been programmed in the startup function,
 414  * but the word length must be programmed here.  Unfortunately, programming
 415  * the SxCCR.WL bits requires the SSI to be temporarily disabled.  This can
 416  * cause a problem with supporting simultaneous playback and capture.  If
 417  * the SSI is already playing a stream, then that stream may be temporarily
 418  * stopped when you start capture.
 419  *
 420  * Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
 421  * clock master.
 422  */
 423 static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
 424         struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai)
 425 {
 426         struct fsl_ssi_private *ssi_private = cpu_dai->private_data;
 427
 428         if (substream == ssi_private->first_stream) {
 429                 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 430                 unsigned int sample_size =
 431                         snd_pcm_format_width(params_format(hw_params));
 432                 u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
 433
 434                 /* The SSI should always be disabled at this points (SSIEN=0) */
 435
 436                 /* In synchronous mode, the SSI uses STCCR for capture */
 437                 if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ||
 438                     !ssi_private->asynchronous)
 439                         clrsetbits_be32(&ssi->stccr,
 440                                         CCSR_SSI_SxCCR_WL_MASK, wl);
 441                 else
 442                         clrsetbits_be32(&ssi->srccr,
 443                                         CCSR_SSI_SxCCR_WL_MASK, wl);
 444         }
 445
 446         return 0;
 447 }
 448
 449 /**
 450  * fsl_ssi_trigger: start and stop the DMA transfer.
 451  *
 452  * This function is called by ALSA to start, stop, pause, and resume the DMA
 453  * transfer of data.
 454  *
 455  * The DMA channel is in external master start and pause mode, which
 456  * means the SSI completely controls the flow of data.
 457  */
 458 static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
 459                            struct snd_soc_dai *dai)
 460 {
 461         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 462         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 463         struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 464
 465         switch (cmd) {
 466         case SNDRV_PCM_TRIGGER_START:
 467                 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 468         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 469                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 470                         setbits32(&ssi->scr,
 471                                 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE);
 472                 } else {
 473                         long timeout = jiffies + 10;
 474
 475                         setbits32(&ssi->scr,
 476                                 CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE);
 477
 478                         /* Wait until the SSI has filled its FIFO. Without this
 479                          * delay, ALSA complains about overruns.  When the FIFO
 480                          * is full, the DMA controller initiates its first
 481                          * transfer.  Until then, however, the DMA's DAR
 482                          * register is zero, which translates to an
 483                          * out-of-bounds pointer.  This makes ALSA think an
 484                          * overrun has occurred.
 485                          */
 486                         while (!(in_be32(&ssi->sisr) & CCSR_SSI_SISR_RFF0) &&
 487                                (jiffies < timeout));
 488                         if (!(in_be32(&ssi->sisr) & CCSR_SSI_SISR_RFF0))
 489                                 return -EIO;
 490                 }
 491                 break;
 492
 493         case SNDRV_PCM_TRIGGER_STOP:
 494         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 495                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 496                         clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
 497                 else
 498                         clrbits32(&ssi->scr, CCSR_SSI_SCR_RE);
 499                 break;
 500
 501         default:
 502                 return -EINVAL;
 503         }
 504
 505         return 0;
 506 }
 507
 508 /**
 509  * fsl_ssi_shutdown: shutdown the SSI
 510  *
 511  * Shutdown the SSI if there are no other substreams open.
 512  */
 513 static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
 514                              struct snd_soc_dai *dai)
 515 {
 516         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 517         struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
 518
 519         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 520                 ssi_private->playback--;
 521
 522         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
 523                 ssi_private->capture--;
 524
 525         if (ssi_private->first_stream == substream)
 526                 ssi_private->first_stream = ssi_private->second_stream;
 527
 528         ssi_private->second_stream = NULL;
 529
 530         /*
 531          * If this is the last active substream, disable the SSI and release
 532          * the IRQ.
 533          */
 534         if (!ssi_private->playback && !ssi_private->capture) {
 535                 struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
 536
 537                 clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
 538
 539                 free_irq(ssi_private->irq, ssi_private);
 540         }
 541 }
 542
 543 /**
 544  * fsl_ssi_set_sysclk: set the clock frequency and direction
 545  *
 546  * This function is called by the machine driver to tell us what the clock
 547  * frequency and direction are.
 548  *
 549  * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
 550  * and we don't care about the frequency.  Return an error if the direction
 551  * is not SND_SOC_CLOCK_IN.
 552  *
 553  * @clk_id: reserved, should be zero
 554  * @freq: the frequency of the given clock ID, currently ignored
 555  * @dir: SND_SOC_CLOCK_IN (clock slave) or SND_SOC_CLOCK_OUT (clock master)
 556  */
 557 static int fsl_ssi_set_sysclk(struct snd_soc_dai *cpu_dai,
 558                               int clk_id, unsigned int freq, int dir)
 559 {
 560
 561         return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
 562 }
 563
 564 /**
 565  * fsl_ssi_set_fmt: set the serial format.
 566  *
 567  * This function is called by the machine driver to tell us what serial
 568  * format to use.
 569  *
 570  * Currently, we only support I2S mode.  Return an error if the format is
 571  * not SND_SOC_DAIFMT_I2S.
 572  *
 573  * @format: one of SND_SOC_DAIFMT_xxx
 574  */
 575 static int fsl_ssi_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int format)
 576 {
 577         return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
 578 }
 579
 580 /**
 581  * fsl_ssi_dai_template: template CPU DAI for the SSI
 582  */
 583 static struct snd_soc_dai_ops fsl_ssi_dai_ops = {
 584         .startup        = fsl_ssi_startup,
 585         .hw_params      = fsl_ssi_hw_params,
 586         .shutdown       = fsl_ssi_shutdown,
 587         .trigger        = fsl_ssi_trigger,
 588         .set_sysclk     = fsl_ssi_set_sysclk,
 589         .set_fmt        = fsl_ssi_set_fmt,
 590 };
 591
 592 static struct snd_soc_dai fsl_ssi_dai_template = {
 593         .playback = {
 594                 /* The SSI does not support monaural audio. */
 595                 .channels_min = 2,
 596                 .channels_max = 2,
 597                 .rates = FSLSSI_I2S_RATES,
 598                 .formats = FSLSSI_I2S_FORMATS,
 599         },
 600         .capture = {
 601                 .channels_min = 2,
 602                 .channels_max = 2,
 603                 .rates = FSLSSI_I2S_RATES,
 604                 .formats = FSLSSI_I2S_FORMATS,
 605         },
 606         .ops = &fsl_ssi_dai_ops,
 607 };
 608
 609 /**
 610  * fsl_sysfs_ssi_show: display SSI statistics
 611  *
 612  * Display the statistics for the current SSI device.
 613  */
 614 static ssize_t fsl_sysfs_ssi_show(struct device *dev,
 615         struct device_attribute *attr, char *buf)
 616 {
 617         struct fsl_ssi_private *ssi_private =
 618         container_of(attr, struct fsl_ssi_private, dev_attr);
 619         ssize_t length;
 620
 621         length = sprintf(buf, "rfrc=%u", ssi_private->stats.rfrc);
 622         length += sprintf(buf + length, "\ttfrc=%u", ssi_private->stats.tfrc);
 623         length += sprintf(buf + length, "\tcmdau=%u", ssi_private->stats.cmdau);
 624         length += sprintf(buf + length, "\tcmddu=%u", ssi_private->stats.cmddu);
 625         length += sprintf(buf + length, "\trxt=%u", ssi_private->stats.rxt);
 626         length += sprintf(buf + length, "\trdr1=%u", ssi_private->stats.rdr1);
 627         length += sprintf(buf + length, "\trdr0=%u", ssi_private->stats.rdr0);
 628         length += sprintf(buf + length, "\ttde1=%u", ssi_private->stats.tde1);
 629         length += sprintf(buf + length, "\ttde0=%u", ssi_private->stats.tde0);
 630         length += sprintf(buf + length, "\troe1=%u", ssi_private->stats.roe1);
 631         length += sprintf(buf + length, "\troe0=%u", ssi_private->stats.roe0);
 632         length += sprintf(buf + length, "\ttue1=%u", ssi_private->stats.tue1);
 633         length += sprintf(buf + length, "\ttue0=%u", ssi_private->stats.tue0);
 634         length += sprintf(buf + length, "\ttfs=%u", ssi_private->stats.tfs);
 635         length += sprintf(buf + length, "\trfs=%u", ssi_private->stats.rfs);
 636         length += sprintf(buf + length, "\ttls=%u", ssi_private->stats.tls);
 637         length += sprintf(buf + length, "\trls=%u", ssi_private->stats.rls);
 638         length += sprintf(buf + length, "\trff1=%u", ssi_private->stats.rff1);
 639         length += sprintf(buf + length, "\trff0=%u", ssi_private->stats.rff0);
 640         length += sprintf(buf + length, "\ttfe1=%u", ssi_private->stats.tfe1);
 641         length += sprintf(buf + length, "\ttfe0=%u\n", ssi_private->stats.tfe0);
 642
 643         return length;
 644 }
 645
 646 /**
 647  * fsl_ssi_create_dai: create a snd_soc_dai structure
 648  *
 649  * This function is called by the machine driver to create a snd_soc_dai
 650  * structure.  The function creates an ssi_private object, which contains
 651  * the snd_soc_dai.  It also creates the sysfs statistics device.
 652  */
 653 struct snd_soc_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info)
 654 {
 655         struct snd_soc_dai *fsl_ssi_dai;
 656         struct fsl_ssi_private *ssi_private;
 657         int ret = 0;
 658         struct device_attribute *dev_attr;
 659
 660         ssi_private = kzalloc(sizeof(struct fsl_ssi_private), GFP_KERNEL);
 661         if (!ssi_private) {
 662                 dev_err(ssi_info->dev, "could not allocate DAI object\n");
 663                 return NULL;
 664         }
 665         memcpy(&ssi_private->cpu_dai, &fsl_ssi_dai_template,
 666                sizeof(struct snd_soc_dai));
 667
 668         fsl_ssi_dai = &ssi_private->cpu_dai;
 669         dev_attr = &ssi_private->dev_attr;
 670
 671         sprintf(ssi_private->name, "ssi%u", (u8) ssi_info->id);
 672         ssi_private->ssi = ssi_info->ssi;
 673         ssi_private->ssi_phys = ssi_info->ssi_phys;
 674         ssi_private->irq = ssi_info->irq;
 675         ssi_private->dev = ssi_info->dev;
 676         ssi_private->asynchronous = ssi_info->asynchronous;
 677
 678         ssi_private->dev->driver_data = fsl_ssi_dai;
 679
 680         /* Initialize the the device_attribute structure */
 681         dev_attr->attr.name = "ssi-stats";
 682         dev_attr->attr.mode = S_IRUGO;
 683         dev_attr->show = fsl_sysfs_ssi_show;
 684
 685         ret = device_create_file(ssi_private->dev, dev_attr);
 686         if (ret) {
 687                 dev_err(ssi_info->dev, "could not create sysfs %s file\n",
 688                         ssi_private->dev_attr.attr.name);
 689                 kfree(fsl_ssi_dai);
 690                 return NULL;
 691         }
 692
 693         fsl_ssi_dai->private_data = ssi_private;
 694         fsl_ssi_dai->name = ssi_private->name;
 695         fsl_ssi_dai->id = ssi_info->id;
 696         fsl_ssi_dai->dev = ssi_info->dev;
 697
 698         ret = snd_soc_register_dai(fsl_ssi_dai);
 699         if (ret != 0) {
 700                 dev_err(ssi_info->dev, "failed to register DAI: %d\n", ret);
 701                 kfree(fsl_ssi_dai);
 702                 return NULL;
 703         }
 704
 705         return fsl_ssi_dai;
 706 }
 707 EXPORT_SYMBOL_GPL(fsl_ssi_create_dai);
 708
 709 /**
 710  * fsl_ssi_destroy_dai: destroy the snd_soc_dai object
 711  *
 712  * This function undoes the operations of fsl_ssi_create_dai()
 713  */
 714 void fsl_ssi_destroy_dai(struct snd_soc_dai *fsl_ssi_dai)
 715 {
 716         struct fsl_ssi_private *ssi_private =
 717         container_of(fsl_ssi_dai, struct fsl_ssi_private, cpu_dai);
 718
 719         device_remove_file(ssi_private->dev, &ssi_private->dev_attr);
 720
 721         snd_soc_unregister_dai(&ssi_private->cpu_dai);
 722
 723         kfree(ssi_private);
 724 }
 725 EXPORT_SYMBOL_GPL(fsl_ssi_destroy_dai);
 726
 727 static int __init fsl_ssi_init(void)
 728 {
 729         printk(KERN_INFO "Freescale Synchronous Serial Interface (SSI) ASoC Driver\n");
 730
 731         return 0;
 732 }
 733 module_init(fsl_ssi_init);
 734
 735 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
 736 MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
 737 MODULE_LICENSE("GPL");