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[mirror_ubuntu-bionic-kernel.git] / sound / soc / fsl / mpc5200_psc_ac97.c
1 /*
2 * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
3 *
4 * Copyright (C) 2009 Jon Smirl, Digispeaker
5 * Author: Jon Smirl <jonsmirl@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/of_device.h>
14 #include <linux/of_platform.h>
15 #include <linux/delay.h>
16 #include <linux/time.h>
17
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21
22 #include <asm/time.h>
23 #include <asm/delay.h>
24 #include <asm/mpc52xx.h>
25 #include <asm/mpc52xx_psc.h>
26
27 #include "mpc5200_dma.h"
28 #include "mpc5200_psc_ac97.h"
29
30 #define DRV_NAME "mpc5200-psc-ac97"
31
32 /* ALSA only supports a single AC97 device so static is recommend here */
33 static struct psc_dma *psc_dma;
34
35 static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
36 {
37 int status;
38 unsigned int val;
39
40 mutex_lock(&psc_dma->mutex);
41
42 /* Wait for command send status zero = ready */
43 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
44 MPC52xx_PSC_SR_CMDSEND), 100, 0);
45 if (status == 0) {
46 pr_err("timeout on ac97 bus (rdy)\n");
47 mutex_unlock(&psc_dma->mutex);
48 return -ENODEV;
49 }
50
51 /* Force clear the data valid bit */
52 in_be32(&psc_dma->psc_regs->ac97_data);
53
54 /* Send the read */
55 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
56
57 /* Wait for the answer */
58 status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
59 MPC52xx_PSC_SR_DATA_VAL), 100, 0);
60 if (status == 0) {
61 pr_err("timeout on ac97 read (val) %x\n",
62 in_be16(&psc_dma->psc_regs->sr_csr.status));
63 mutex_unlock(&psc_dma->mutex);
64 return -ENODEV;
65 }
66 /* Get the data */
67 val = in_be32(&psc_dma->psc_regs->ac97_data);
68 if (((val >> 24) & 0x7f) != reg) {
69 pr_err("reg echo error on ac97 read\n");
70 mutex_unlock(&psc_dma->mutex);
71 return -ENODEV;
72 }
73 val = (val >> 8) & 0xffff;
74
75 mutex_unlock(&psc_dma->mutex);
76 return (unsigned short) val;
77 }
78
79 static void psc_ac97_write(struct snd_ac97 *ac97,
80 unsigned short reg, unsigned short val)
81 {
82 int status;
83
84 mutex_lock(&psc_dma->mutex);
85
86 /* Wait for command status zero = ready */
87 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
88 MPC52xx_PSC_SR_CMDSEND), 100, 0);
89 if (status == 0) {
90 pr_err("timeout on ac97 bus (write)\n");
91 goto out;
92 }
93 /* Write data */
94 out_be32(&psc_dma->psc_regs->ac97_cmd,
95 ((reg & 0x7f) << 24) | (val << 8));
96
97 out:
98 mutex_unlock(&psc_dma->mutex);
99 }
100
101 static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
102 {
103 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
104
105 mutex_lock(&psc_dma->mutex);
106
107 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
108 udelay(3);
109 out_be32(&regs->sicr, psc_dma->sicr);
110
111 mutex_unlock(&psc_dma->mutex);
112 }
113
114 static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
115 {
116 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
117
118 mutex_lock(&psc_dma->mutex);
119 dev_dbg(psc_dma->dev, "cold reset\n");
120
121 mpc5200_psc_ac97_gpio_reset(psc_dma->id);
122
123 /* Notify the PSC that a reset has occurred */
124 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
125
126 /* Re-enable RX and TX */
127 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
128
129 mutex_unlock(&psc_dma->mutex);
130
131 usleep_range(1000, 2000);
132 psc_ac97_warm_reset(ac97);
133 }
134
135 static struct snd_ac97_bus_ops psc_ac97_ops = {
136 .read = psc_ac97_read,
137 .write = psc_ac97_write,
138 .reset = psc_ac97_cold_reset,
139 .warm_reset = psc_ac97_warm_reset,
140 };
141
142 static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
143 struct snd_pcm_hw_params *params,
144 struct snd_soc_dai *cpu_dai)
145 {
146 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
147 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
148
149 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
150 " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
151 " rate=%i format=%i\n",
152 __func__, substream, params_period_size(params),
153 params_period_bytes(params), params_periods(params),
154 params_buffer_size(params), params_buffer_bytes(params),
155 params_channels(params), params_rate(params),
156 params_format(params));
157
158 /* Determine the set of enable bits to turn on */
159 s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
160 if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
161 s->ac97_slot_bits <<= 16;
162 return 0;
163 }
164
165 static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
166 struct snd_pcm_hw_params *params,
167 struct snd_soc_dai *cpu_dai)
168 {
169 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
170
171 dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
172
173 if (params_channels(params) == 1)
174 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
175 else
176 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
177
178 return 0;
179 }
180
181 static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
182 struct snd_soc_dai *dai)
183 {
184 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
185 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
186
187 switch (cmd) {
188 case SNDRV_PCM_TRIGGER_START:
189 dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
190 substream->pstr->stream);
191
192 /* Set the slot enable bits */
193 psc_dma->slots |= s->ac97_slot_bits;
194 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
195 break;
196
197 case SNDRV_PCM_TRIGGER_STOP:
198 dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
199 substream->pstr->stream);
200
201 /* Clear the slot enable bits */
202 psc_dma->slots &= ~(s->ac97_slot_bits);
203 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
204 break;
205 }
206 return 0;
207 }
208
209 static int psc_ac97_probe(struct snd_soc_dai *cpu_dai)
210 {
211 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
212 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
213
214 /* Go */
215 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
216 return 0;
217 }
218
219 /* ---------------------------------------------------------------------
220 * ALSA SoC Bindings
221 *
222 * - Digital Audio Interface (DAI) template
223 * - create/destroy dai hooks
224 */
225
226 /**
227 * psc_ac97_dai_template: template CPU Digital Audio Interface
228 */
229 static const struct snd_soc_dai_ops psc_ac97_analog_ops = {
230 .hw_params = psc_ac97_hw_analog_params,
231 .trigger = psc_ac97_trigger,
232 };
233
234 static const struct snd_soc_dai_ops psc_ac97_digital_ops = {
235 .hw_params = psc_ac97_hw_digital_params,
236 };
237
238 static struct snd_soc_dai_driver psc_ac97_dai[] = {
239 {
240 .name = "mpc5200-psc-ac97.0",
241 .bus_control = true,
242 .probe = psc_ac97_probe,
243 .playback = {
244 .stream_name = "AC97 Playback",
245 .channels_min = 1,
246 .channels_max = 6,
247 .rates = SNDRV_PCM_RATE_8000_48000,
248 .formats = SNDRV_PCM_FMTBIT_S32_BE,
249 },
250 .capture = {
251 .stream_name = "AC97 Capture",
252 .channels_min = 1,
253 .channels_max = 2,
254 .rates = SNDRV_PCM_RATE_8000_48000,
255 .formats = SNDRV_PCM_FMTBIT_S32_BE,
256 },
257 .ops = &psc_ac97_analog_ops,
258 },
259 {
260 .name = "mpc5200-psc-ac97.1",
261 .bus_control = true,
262 .playback = {
263 .stream_name = "AC97 SPDIF",
264 .channels_min = 1,
265 .channels_max = 2,
266 .rates = SNDRV_PCM_RATE_32000 | \
267 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
268 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
269 },
270 .ops = &psc_ac97_digital_ops,
271 } };
272
273 static const struct snd_soc_component_driver psc_ac97_component = {
274 .name = DRV_NAME,
275 };
276
277
278 /* ---------------------------------------------------------------------
279 * OF platform bus binding code:
280 * - Probe/remove operations
281 * - OF device match table
282 */
283 static int psc_ac97_of_probe(struct platform_device *op)
284 {
285 int rc;
286 struct mpc52xx_psc __iomem *regs;
287
288 rc = mpc5200_audio_dma_create(op);
289 if (rc != 0)
290 return rc;
291
292 rc = snd_soc_set_ac97_ops(&psc_ac97_ops);
293 if (rc != 0) {
294 dev_err(&op->dev, "Failed to set AC'97 ops: %d\n", rc);
295 return rc;
296 }
297
298 rc = snd_soc_register_component(&op->dev, &psc_ac97_component,
299 psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
300 if (rc != 0) {
301 dev_err(&op->dev, "Failed to register DAI\n");
302 return rc;
303 }
304
305 psc_dma = dev_get_drvdata(&op->dev);
306 regs = psc_dma->psc_regs;
307
308 psc_dma->imr = 0;
309 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
310
311 /* Configure the serial interface mode to AC97 */
312 psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
313 out_be32(&regs->sicr, psc_dma->sicr);
314
315 /* No slots active */
316 out_be32(&regs->ac97_slots, 0x00000000);
317
318 return 0;
319 }
320
321 static int psc_ac97_of_remove(struct platform_device *op)
322 {
323 mpc5200_audio_dma_destroy(op);
324 snd_soc_unregister_component(&op->dev);
325 snd_soc_set_ac97_ops(NULL);
326 return 0;
327 }
328
329 /* Match table for of_platform binding */
330 static const struct of_device_id psc_ac97_match[] = {
331 { .compatible = "fsl,mpc5200-psc-ac97", },
332 { .compatible = "fsl,mpc5200b-psc-ac97", },
333 {}
334 };
335 MODULE_DEVICE_TABLE(of, psc_ac97_match);
336
337 static struct platform_driver psc_ac97_driver = {
338 .probe = psc_ac97_of_probe,
339 .remove = psc_ac97_of_remove,
340 .driver = {
341 .name = "mpc5200-psc-ac97",
342 .of_match_table = psc_ac97_match,
343 },
344 };
345
346 module_platform_driver(psc_ac97_driver);
347
348 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
349 MODULE_DESCRIPTION("mpc5200 AC97 module");
350 MODULE_LICENSE("GPL");
351